From owner-svn-src-all@FreeBSD.ORG Sun May 18 16:07:36 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 255E3D58; Sun, 18 May 2014 16:07:36 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 122CA25B7; Sun, 18 May 2014 16:07:36 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s4IG7ZP5003663; Sun, 18 May 2014 16:07:35 GMT (envelope-from ian@svn.freebsd.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s4IG7Zdc003661; Sun, 18 May 2014 16:07:35 GMT (envelope-from ian@svn.freebsd.org) Message-Id: <201405181607.s4IG7Zdc003661@svn.freebsd.org> From: Ian Lepore Date: Sun, 18 May 2014 16:07:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r266406 - stable/10/sys/arm/xscale/ixp425 X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 May 2014 16:07:36 -0000 Author: ian Date: Sun May 18 16:07:35 2014 New Revision: 266406 URL: http://svnweb.freebsd.org/changeset/base/266406 Log: MFC 256942, 256943: - Fix a typo. - Use bus_dmamap_unload(), it is not optional. - The new allocator won't return coherent memory for any size > PAGE_SIZE, so don't assume we have coherent memory, and explicitely use bus_dmamap_sync(). Modified: stable/10/sys/arm/xscale/ixp425/if_npe.c stable/10/sys/arm/xscale/ixp425/ixp425_mem.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/xscale/ixp425/if_npe.c ============================================================================== --- stable/10/sys/arm/xscale/ixp425/if_npe.c Sun May 18 16:03:34 2014 (r266405) +++ stable/10/sys/arm/xscale/ixp425/if_npe.c Sun May 18 16:07:35 2014 (r266406) @@ -508,7 +508,6 @@ npe_dma_setup(struct npe_softc *sc, stru dma->name, error); return error; } - /* XXX COHERENT for now */ if (bus_dmamem_alloc(dma->buf_tag, (void **)&dma->hwbuf, BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT, &dma->buf_map) != 0) { @@ -1074,6 +1073,7 @@ npe_rxbuf_init(struct npe_softc *sc, str m->m_pkthdr.len = m->m_len = 1536; /* backload payload and align ip hdr */ m->m_data = m->m_ext.ext_buf + (m->m_ext.ext_size - (1536+ETHER_ALIGN)); + bus_dmamap_unload(dma->mtag, npe->ix_map); error = bus_dmamap_load_mbuf_sg(dma->mtag, npe->ix_map, m, segs, &nseg, 0); if (error != 0) { @@ -1086,6 +1086,8 @@ npe_rxbuf_init(struct npe_softc *sc, str /* NB: buffer length is shifted in word */ hw->ix_ne[0].len = htobe32(segs[0].ds_len << 16); hw->ix_ne[0].next = 0; + bus_dmamap_sync(dma->buf_tag, dma->buf_map, + BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); npe->ix_m = m; /* Flush the memory in the mbuf */ bus_dmamap_sync(dma->mtag, npe->ix_map, BUS_DMASYNC_PREREAD); @@ -1111,6 +1113,8 @@ npe_rxdone(int qid, void *arg) struct npebuf *npe = P2V(NPE_QM_Q_ADDR(entry), dma); struct mbuf *m; + bus_dmamap_sync(dma->buf_tag, dma->buf_map, + BUS_DMASYNC_POSTREAD); DPRINTF(sc, "%s: entry 0x%x neaddr 0x%x ne_len 0x%x\n", __func__, entry, npe->ix_neaddr, npe->ix_hw->ix_ne[0].len); /* @@ -1131,7 +1135,6 @@ npe_rxdone(int qid, void *arg) bus_dmamap_sync(dma->mtag, npe->ix_map, BUS_DMASYNC_POSTREAD); - /* XXX flush hw buffer; works now 'cuz coherent */ /* set m_len etc. per rx frame size */ mrx->m_len = be32toh(hw->ix_ne[0].len) & 0xffff; mrx->m_pkthdr.len = mrx->m_len; @@ -1314,6 +1317,7 @@ npestart_locked(struct ifnet *ifp) return; } npe = sc->tx_free; + bus_dmamap_unload(dma->mtag, npe->ix_map); error = bus_dmamap_load_mbuf_sg(dma->mtag, npe->ix_map, m, segs, &nseg, 0); if (error == EFBIG) { @@ -1356,7 +1360,8 @@ npestart_locked(struct ifnet *ifp) next += sizeof(hw->ix_ne[0]); } hw->ix_ne[i-1].next = 0; /* zero last in chain */ - /* XXX flush descriptor instead of using uncached memory */ + bus_dmamap_sync(dma->buf_tag, dma->buf_map, + BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); DPRINTF(sc, "%s: qwrite(%u, 0x%x) ne_data %x ne_len 0x%x\n", __func__, sc->tx_qid, npe->ix_neaddr, Modified: stable/10/sys/arm/xscale/ixp425/ixp425_mem.c ============================================================================== --- stable/10/sys/arm/xscale/ixp425/ixp425_mem.c Sun May 18 16:03:34 2014 (r266405) +++ stable/10/sys/arm/xscale/ixp425/ixp425_mem.c Sun May 18 16:07:35 2014 (r266406) @@ -76,7 +76,7 @@ ixp425_sdram_size(void) size = sdram_other[MCU_SDR_CONFIG_MCONF(sdr_config)]; if (size == 0) { - printf("** SDR_CONFIG retuns unknown value, using 32M\n"); + printf("** SDR_CONFIG returns unknown value, using 32M\n"); size = 32 * 1024 * 1024; }