From owner-freebsd-mips@FreeBSD.ORG Wed Apr 17 15:42:42 2013 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 5B640DD3 for ; Wed, 17 Apr 2013 15:42:42 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-qe0-f50.google.com (mail-qe0-f50.google.com [209.85.128.50]) by mx1.freebsd.org (Postfix) with ESMTP id 1D389F5 for ; Wed, 17 Apr 2013 15:42:41 +0000 (UTC) Received: by mail-qe0-f50.google.com with SMTP id a11so973838qen.9 for ; Wed, 17 Apr 2013 08:42:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to:x-mailer:x-gm-message-state; bh=DbXlQBY5AG7PSV1iRT54dJ6rTu8bqwK1o6fNrAQLHI0=; b=ZBZhLJIIJjCbP6ic+/Gr0/OUJx5uc0rxxezJnc6zHUULrRdb9zmTl1+9sXF2/Y6yxT vbopYYqQ9oExMZ1B8jog+B1AXg/gbcI0e5PU2BXGO5ppA3T7ZvHZLdDPCAhdSflwRnu2 q4nYtfZo++olNXR4/UxgbfeeffOb/c3mFtCyBoxu2bvAwD9tB2ssV3/y3TDaHhroowUI aV5zg6sCnhVnyXPC+fsgBUs7UJXQfP58ImefYS6rS5jCmTmGwoo17bZTFuQJboBhsdzz fDOgYMWkB2gJfiW/J1AdFIqSMhhYvZAgY/L5jZ/1E4oGKDFkYvS5CEnPkdj+1qxtm/P3 MIvw== X-Received: by 10.229.52.4 with SMTP id f4mr2426063qcg.18.1366213355606; Wed, 17 Apr 2013 08:42:35 -0700 (PDT) Received: from monkey-bot.int.fusionio.com ([209.117.142.2]) by mx.google.com with ESMTPS id g6sm8610145qav.6.2013.04.17.08.42.33 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 17 Apr 2013 08:42:34 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] partial 64-bit bus space generic implementation Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <20130417010835.GA17779@lor.one-eyed-alien.net> Date: Wed, 17 Apr 2013 09:42:32 -0600 Content-Transfer-Encoding: 7bit Message-Id: References: <20130417010835.GA17779@lor.one-eyed-alien.net> To: Brooks Davis X-Mailer: Apple Mail (2.1085) X-Gm-Message-State: ALoCoQnpKCqa9M8B434OIMNtQ1xg3N7+0CfkD1GPg27ZObsPXuCv+q4itNKFh/GD4dB4mcgluEWt Cc: freebsd-mips@freebsd.org X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Apr 2013 15:42:42 -0000 On Apr 16, 2013, at 7:08 PM, Brooks Davis wrote: > I've implemented generic_bs_*_8() for a subset of MIPS platforms > (!sibyte and !o32 ABI) based on the mips3_ld and mips3_sd code in > cpufunc.h. I've verified that simple reads and writes work for our > MIPS64 ISA CPU. The patch passes make universe, but I've not tested it > on any mips32 systems. Any reviews or objections to this patch? > > -- Brooks > > http://people.freebsd.org/~brooks/patches/mips-bs8.diff > > MFP4 223084: > > Partially implement generic_bs_*_8() for MIPS platforms. > > This is known to work with TARGET_ARCH=mips64 with FreeBSD/BERI. > Assuming that other definitions in cpufunc.h are correct it will work on > non-o64 ABI systems except sibyte. On sibyte and o32 systems > generic_bs_*_8() will remain panic() implementations. Why not include sibyte? Doesn't it have LD/SD instructions in 64-bit mode? > Index: sys/mips/mips/bus_space_generic.c > =================================================================== > --- sys/mips/mips/bus_space_generic.c (revision 249555) > +++ sys/mips/mips/bus_space_generic.c (working copy) > @@ -202,9 +202,11 @@ > #define rd8(a) cvmx_read64_uint8(a) > #define rd16(a) cvmx_read64_uint16(a) > #define rd32(a) cvmx_read64_uint32(a) > +#define rd64(a) cvmx_read64_uint64(a) > #define wr8(a, v) cvmx_write64_uint8(a, v) > #define wr16(a, v) cvmx_write64_uint16(a, v) > #define wr32(a, v) cvmx_write64_uint32(a, v) > +#define wr64(a, v) cvmx_write64_uint64(a, v) > #elif defined(CPU_SB1) && _BYTE_ORDER == _BIG_ENDIAN > #include > #define rd8(a) sb_big_endian_read8(a) > @@ -217,10 +219,16 @@ > #define rd8(a) readb(a) > #define rd16(a) readw(a) > #define rd32(a) readl(a) > +#ifdef readd > +#define rd64(a) readd((a)) > +#endif > #define wr8(a, v) writeb(a, v) > #define wr16(a, v) writew(a, v) > #define wr32(a, v) writel(a, v) > +#ifdef writed > +#define wr64(a, v) writed((uint64_t *)(a), v) > #endif > +#endif > > /* generic bus_space tag */ > bus_space_tag_t mips_bus_space_generic = &generic_space; > @@ -297,7 +305,11 @@ > generic_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset) > { > > +#ifdef rd64 > + return(rd64(handle + offset)); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > void > @@ -333,8 +345,14 @@ > generic_bs_rm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > uint64_t *addr, size_t count) > { > +#ifdef rd64 > + bus_addr_t baddr = bsh + offset; > > + while (count--) > + *addr++ = rd64(baddr); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -382,8 +400,16 @@ > generic_bs_rr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > uint64_t *addr, size_t count) > { > +#ifdef rd64 > + bus_addr_t baddr = bsh + offset; > > + while (count--) { > + *addr++ = rd64(baddr); > + baddr += 8; > + } > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -419,7 +445,11 @@ > uint64_t value) > { > > +#ifdef wr64 > + wr64(bsh + offset, value); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -460,8 +490,14 @@ > generic_bs_wm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > const uint64_t *addr, size_t count) > { > +#ifdef wr64 > + bus_addr_t baddr = bsh + offset; > > + while (count--) > + wr64(baddr, *addr++); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -508,8 +544,16 @@ > generic_bs_wr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > const uint64_t *addr, size_t count) > { > +#ifdef wr64 > + bus_addr_t baddr = bsh + offset; > > + while (count--) { > + wr64(baddr, *addr++); > + baddr += 8; > + } > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -550,8 +594,14 @@ > generic_bs_sm_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > uint64_t value, size_t count) > { > +#ifdef wr64 > + bus_addr_t addr = bsh + offset; > > + while (count--) > + wr64(addr, value); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -592,8 +642,14 @@ > generic_bs_sr_8(void *t, bus_space_handle_t bsh, bus_size_t offset, > uint64_t value, size_t count) > { > +#ifdef wr64 > + bus_addr_t addr = bsh + offset; > > + for (; count != 0; count--, addr += 8) > + wr64(addr, value); > +#else > panic("%s: not implemented", __func__); > +#endif > } > > /* > @@ -664,8 +720,23 @@ > generic_bs_c_8(void *t, bus_space_handle_t bsh1, bus_size_t off1, > bus_space_handle_t bsh2, bus_size_t off2, size_t count) > { > +#if defined(rd64) && defined(wr64) > + bus_addr_t addr1 = bsh1 + off1; > + bus_addr_t addr2 = bsh2 + off2; > > + if (addr1 >= addr2) { > + /* src after dest: copy forward */ > + for (; count != 0; count--, addr1 += 8, addr2 += 8) > + wr64(addr2, rd64(addr1)); > + } else { > + /* dest after src: copy backwards */ > + for (addr1 += 8 * (count - 1), addr2 += 8 * (count - 1); > + count != 0; count--, addr1 -= 8, addr2 -= 8) > + wr64(addr2, rd64(addr1)); > + } > +#else > panic("%s: not implemented", __func__); > +#endif > } > > void > Index: sys/mips/include/cpufunc.h > =================================================================== > --- sys/mips/include/cpufunc.h (revision 249555) > +++ sys/mips/include/cpufunc.h (working copy) > @@ -354,9 +354,15 @@ > #define readb(va) (*(volatile uint8_t *) (va)) > #define readw(va) (*(volatile uint16_t *) (va)) > #define readl(va) (*(volatile uint32_t *) (va)) > +#if defined(__GNUC__) && !defined(__mips_o32) > +#define readd(a) (*(volatile uint64_t *)(a)) > +#endif Why __GNU_C__ here? > #define writeb(va, d) (*(volatile uint8_t *) (va) = (d)) > #define writew(va, d) (*(volatile uint16_t *) (va) = (d)) > #define writel(va, d) (*(volatile uint32_t *) (va) = (d)) > +#if defined(__GNUC__) && !defined(__mips_o32) > +#define writed(va, d) (*(volatile uint64_t *) (va) = (d)) > +#endif And here... > #endif /* !_MACHINE_CPUFUNC_H_ */