From owner-svn-src-projects@FreeBSD.ORG Sat Aug 1 15:40:22 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 93605106566B; Sat, 1 Aug 2009 15:40:22 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 809A18FC16; Sat, 1 Aug 2009 15:40:22 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n71FeMJ9085499; Sat, 1 Aug 2009 15:40:22 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n71FeMcu085497; Sat, 1 Aug 2009 15:40:22 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <200908011540.n71FeMcu085497@svn.freebsd.org> From: Nathan Whitehorn Date: Sat, 1 Aug 2009 15:40:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r196018 - projects/ppc64/sys/powerpc/powerpc X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 01 Aug 2009 15:40:22 -0000 Author: nwhitehorn Date: Sat Aug 1 15:40:22 2009 New Revision: 196018 URL: http://svn.freebsd.org/changeset/base/196018 Log: Update setjmp.S to handle both the 32-bit and 64-bit case. Modified: projects/ppc64/sys/powerpc/powerpc/setjmp.S Modified: projects/ppc64/sys/powerpc/powerpc/setjmp.S ============================================================================== --- projects/ppc64/sys/powerpc/powerpc/setjmp.S Sat Aug 1 14:06:56 2009 (r196017) +++ projects/ppc64/sys/powerpc/powerpc/setjmp.S Sat Aug 1 15:40:22 2009 (r196018) @@ -6,61 +6,73 @@ #include -#define JMP_r1 0x04 -#define JMP_r14 0x08 -#define JMP_r15 0x0c -#define JMP_r16 0x10 -#define JMP_r17 0x14 -#define JMP_r18 0x18 -#define JMP_r19 0x1c -#define JMP_r20 0x20 -#define JMP_r21 0x24 -#define JMP_r22 0x28 -#define JMP_r23 0x2c -#define JMP_r24 0x30 -#define JMP_r25 0x34 -#define JMP_r26 0x38 -#define JMP_r27 0x3c -#define JMP_r28 0x40 -#define JMP_r29 0x44 -#define JMP_r30 0x48 -#define JMP_r31 0x4c -#define JMP_lr 0x50 -#define JMP_cr 0x54 -#define JMP_ctr 0x58 -#define JMP_xer 0x5c -#define JMP_sig 0x60 +#ifdef __powerpc64__ +#define LD_REG ld +#define ST_REG std +#define REGWIDTH 8 +#else +#define LD_REG lwz +#define ST_REG stw +#define REGWIDTH 4 +#endif + +#define JMP_r1 1*REGWIDTH +#define JMP_r2 2*REGWIDTH +#define JMP_r14 3*REGWIDTH +#define JMP_r15 4*REGWIDTH +#define JMP_r16 5*REGWIDTH +#define JMP_r17 6*REGWIDTH +#define JMP_r18 7*REGWIDTH +#define JMP_r19 8*REGWIDTH +#define JMP_r20 9*REGWIDTH +#define JMP_r21 10*REGWIDTH +#define JMP_r22 11*REGWIDTH +#define JMP_r23 12*REGWIDTH +#define JMP_r24 13*REGWIDTH +#define JMP_r25 14*REGWIDTH +#define JMP_r26 15*REGWIDTH +#define JMP_r27 16*REGWIDTH +#define JMP_r28 17*REGWIDTH +#define JMP_r29 18*REGWIDTH +#define JMP_r30 19*REGWIDTH +#define JMP_r31 20*REGWIDTH +#define JMP_lr 21*REGWIDTH +#define JMP_cr 22*REGWIDTH +#define JMP_ctr 23*REGWIDTH +#define JMP_xer 24*REGWIDTH +#define JMP_sig 25*REGWIDTH ASENTRY(setjmp) - stw 31, JMP_r31(3) - /* r1, r14-r30 */ - stw 1, JMP_r1 (3) - stw 14, JMP_r14(3) - stw 15, JMP_r15(3) - stw 16, JMP_r16(3) - stw 17, JMP_r17(3) - stw 18, JMP_r18(3) - stw 19, JMP_r19(3) - stw 20, JMP_r20(3) - stw 21, JMP_r21(3) - stw 22, JMP_r22(3) - stw 23, JMP_r23(3) - stw 24, JMP_r24(3) - stw 25, JMP_r25(3) - stw 26, JMP_r26(3) - stw 27, JMP_r27(3) - stw 28, JMP_r28(3) - stw 29, JMP_r29(3) - stw 30, JMP_r30(3) + ST_REG 31, JMP_r31(3) + /* r1, r2, r14-r30 */ + ST_REG 1, JMP_r1 (3) + ST_REG 2, JMP_r2 (3) + ST_REG 14, JMP_r14(3) + ST_REG 15, JMP_r15(3) + ST_REG 16, JMP_r16(3) + ST_REG 17, JMP_r17(3) + ST_REG 18, JMP_r18(3) + ST_REG 19, JMP_r19(3) + ST_REG 20, JMP_r20(3) + ST_REG 21, JMP_r21(3) + ST_REG 22, JMP_r22(3) + ST_REG 23, JMP_r23(3) + ST_REG 24, JMP_r24(3) + ST_REG 25, JMP_r25(3) + ST_REG 26, JMP_r26(3) + ST_REG 27, JMP_r27(3) + ST_REG 28, JMP_r28(3) + ST_REG 29, JMP_r29(3) + ST_REG 30, JMP_r30(3) /* cr, lr, ctr, xer */ mfcr 0 - stw 0, JMP_cr(3) + ST_REG 0, JMP_cr(3) mflr 0 - stw 0, JMP_lr(3) + ST_REG 0, JMP_lr(3) mfctr 0 - stw 0, JMP_ctr(3) + ST_REG 0, JMP_ctr(3) mfxer 0 - stw 0, JMP_xer(3) + ST_REG 0, JMP_xer(3) /* f14-f31, fpscr */ li 3, 0 blr @@ -68,34 +80,35 @@ ASENTRY(setjmp) .extern sigsetmask ASENTRY(longjmp) - lwz 31, JMP_r31(3) - /* r1, r14-r30 */ - lwz 1, JMP_r1 (3) - lwz 14, JMP_r14(3) - lwz 15, JMP_r15(3) - lwz 16, JMP_r16(3) - lwz 17, JMP_r17(3) - lwz 18, JMP_r18(3) - lwz 19, JMP_r19(3) - lwz 20, JMP_r20(3) - lwz 21, JMP_r21(3) - lwz 22, JMP_r22(3) - lwz 23, JMP_r23(3) - lwz 24, JMP_r24(3) - lwz 25, JMP_r25(3) - lwz 26, JMP_r26(3) - lwz 27, JMP_r27(3) - lwz 28, JMP_r28(3) - lwz 29, JMP_r29(3) - lwz 30, JMP_r30(3) + LD_REG 31, JMP_r31(3) + /* r1, r2, r14-r30 */ + LD_REG 1, JMP_r1 (3) + LD_REG 2, JMP_r2 (3) + LD_REG 14, JMP_r14(3) + LD_REG 15, JMP_r15(3) + LD_REG 16, JMP_r16(3) + LD_REG 17, JMP_r17(3) + LD_REG 18, JMP_r18(3) + LD_REG 19, JMP_r19(3) + LD_REG 20, JMP_r20(3) + LD_REG 21, JMP_r21(3) + LD_REG 22, JMP_r22(3) + LD_REG 23, JMP_r23(3) + LD_REG 24, JMP_r24(3) + LD_REG 25, JMP_r25(3) + LD_REG 26, JMP_r26(3) + LD_REG 27, JMP_r27(3) + LD_REG 28, JMP_r28(3) + LD_REG 29, JMP_r29(3) + LD_REG 30, JMP_r30(3) /* cr, lr, ctr, xer */ - lwz 0, JMP_cr(3) + LD_REG 0, JMP_cr(3) mtcr 0 - lwz 0, JMP_lr(3) + LD_REG 0, JMP_lr(3) mtlr 0 - lwz 0, JMP_ctr(3) + LD_REG 0, JMP_ctr(3) mtctr 0 - lwz 0, JMP_xer(3) + LD_REG 0, JMP_xer(3) mtxer 0 /* f14-f31, fpscr */ mr 3, 4