From owner-p4-projects@FreeBSD.ORG Fri Apr 1 16:33:20 2011 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 677A310658E1; Fri, 1 Apr 2011 16:33:19 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 70E7E1065FE1 for ; Fri, 1 Apr 2011 16:33:15 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 54EBC8FC17 for ; Fri, 1 Apr 2011 16:33:15 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id p31GXFwW076143 for ; Fri, 1 Apr 2011 16:33:15 GMT (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id p31GXFEu076140 for perforce@freebsd.org; Fri, 1 Apr 2011 16:33:15 GMT (envelope-from jhb@freebsd.org) Date: Fri, 1 Apr 2011 16:33:15 GMT Message-Id: <201104011633.p31GXFEu076140@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin To: Perforce Change Reviews Precedence: bulk Cc: Subject: PERFORCE change 190871 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Apr 2011 16:33:20 -0000 http://p4web.freebsd.org/@@190871?ac=10 Change 190871 by jhb@jhb_kavik on 2011/04/01 10:59:30 More pci-pci bridge hacking. Affected files ... .. //depot/projects/pci/sys/conf/options#2 edit .. //depot/projects/pci/sys/dev/pci/pci_pci.c#3 edit .. //depot/projects/pci/sys/dev/pci/pcib_private.h#3 edit Differences ... ==== //depot/projects/pci/sys/conf/options#2 (text+ko) ==== @@ -135,6 +135,7 @@ MFI_DECODE_LOG opt_mfi.h MPROF_BUFFERS opt_mprof.h MPROF_HASH_SIZE opt_mprof.h +NEW_PCIB opt_global.h NO_ADAPTIVE_MUTEXES opt_adaptive_mutexes.h NO_ADAPTIVE_RWLOCKS NO_ADAPTIVE_SX ==== //depot/projects/pci/sys/dev/pci/pci_pci.c#3 (text+ko) ==== @@ -100,7 +100,34 @@ DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0); +#ifdef NEW_PCIB /* + * Is a resource from a child device sub-allocated from one of our + * resource managers? + */ +static int +pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r) +{ + + /* Subtractive bridges do manage resources. */ + if (sc->flags & PCIB_SUBTRACTIVE) + return (0); + + switch (type) { + case SYS_RES_IOPORT: + return (rman_is_region_manager(r, &sc->io_rman)); + case SYS_RES_MEMORY: + /* Prefetchable resources may live in either memory rman. */ + if (rman_get_flags(r) & RF_PREFETCHABLE && + rman_is_region_manager(r, &sc->pmem_rman)) + return (1); + return (rman_is_region_manager(r, &sc->mem_rman)); + } + return (0); +} +#endif + +/* * Is the prefetch window open (eg, can we allocate memory in it?) */ static int @@ -662,7 +689,13 @@ pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r, u_long start, u_long end) { +#ifdef NEW_PCIB + struct pcib_softc *sc; + sc = device_get_softc(bus); + if (pcib_is_resource_managed(sc, type, r)) + return (rman_adjust_resource(r, start, end)); +#endif return (bus_generic_adjust_resource(bus, child, type, r, start, end)); } ==== //depot/projects/pci/sys/dev/pci/pcib_private.h#3 (text+ko) ==== @@ -54,17 +54,16 @@ u_int secbus; /* secondary bus number */ u_int subbus; /* subordinate bus number */ #ifdef NEW_PCIB - struct rman pmem_rm; /* prefetchable memory window */ - struct rman mem_rm; /* memory window */ - struct rman io_rm; /* I/O port window */ -#else + struct rman pmem_rman; /* prefetchable memory window */ + struct rman mem_rman; /* memory window */ + struct rman io_rman; /* I/O port window */ +#endif pci_addr_t pmembase; /* base address of prefetchable memory */ pci_addr_t pmemlimit; /* topmost address of prefetchable memory */ pci_addr_t membase; /* base address of memory window */ pci_addr_t memlimit; /* topmost address of memory window */ uint32_t iobase; /* base address of port window */ uint32_t iolimit; /* topmost address of port window */ -#endif uint16_t secstat; /* secondary bus status register */ uint16_t bridgectl; /* bridge control register */ uint8_t seclat; /* secondary bus latency timer */