From owner-svn-src-all@FreeBSD.ORG Wed Jul 2 23:23:19 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 696ACD82; Wed, 2 Jul 2014 23:23:19 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3DE332E10; Wed, 2 Jul 2014 23:23:19 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s62NNJx3061183; Wed, 2 Jul 2014 23:23:19 GMT (envelope-from marcel@svn.freebsd.org) Received: (from marcel@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s62NNIBB061175; Wed, 2 Jul 2014 23:23:18 GMT (envelope-from marcel@svn.freebsd.org) Message-Id: <201407022323.s62NNIBB061175@svn.freebsd.org> From: Marcel Moolenaar Date: Wed, 2 Jul 2014 23:23:18 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r268195 - stable/10/sys/ia64/ia64 X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Jul 2014 23:23:19 -0000 Author: marcel Date: Wed Jul 2 23:23:18 2014 New Revision: 268195 URL: http://svnweb.freebsd.org/changeset/base/268195 Log: MFC r263248 & r263257: In intr_event_handle() we already save and set td_intr_frame, so don't do it also in ia64_handle_intr(). Modified: stable/10/sys/ia64/ia64/clock.c stable/10/sys/ia64/ia64/interrupt.c stable/10/sys/ia64/ia64/mp_machdep.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/ia64/ia64/clock.c ============================================================================== --- stable/10/sys/ia64/ia64/clock.c Wed Jul 2 23:12:56 2014 (r268194) +++ stable/10/sys/ia64/ia64/clock.c Wed Jul 2 23:23:18 2014 (r268195) @@ -76,6 +76,7 @@ static u_int ia64_ih_clock(struct thread *td, u_int xiv, struct trapframe *tf) { struct eventtimer *et; + struct trapframe *stf; uint64_t itc, load; uint32_t mode; @@ -96,8 +97,12 @@ ia64_ih_clock(struct thread *td, u_int x ia64_srlz_d(); et = &ia64_clock_et; - if (et->et_active) + if (et->et_active) { + stf = td->td_intr_frame; + td->td_intr_frame = tf; et->et_event_cb(et, et->et_arg); + td->td_intr_frame = stf; + } return (1); } Modified: stable/10/sys/ia64/ia64/interrupt.c ============================================================================== --- stable/10/sys/ia64/ia64/interrupt.c Wed Jul 2 23:12:56 2014 (r268194) +++ stable/10/sys/ia64/ia64/interrupt.c Wed Jul 2 23:23:18 2014 (r268195) @@ -301,7 +301,6 @@ void ia64_handle_intr(struct trapframe *tf) { struct thread *td; - struct trapframe *stf; u_int xiv; td = curthread; @@ -316,9 +315,6 @@ ia64_handle_intr(struct trapframe *tf) } critical_enter(); - stf = td->td_intr_frame; - td->td_intr_frame = tf; - do { CTR2(KTR_INTR, "INTR: ITC=%u, XIV=%u", (u_int)tf->tf_special.ifa, xiv); @@ -329,8 +325,6 @@ ia64_handle_intr(struct trapframe *tf) xiv = ia64_get_ivr(); ia64_srlz_d(); } while (xiv != 15); - - td->td_intr_frame = stf; critical_exit(); out: Modified: stable/10/sys/ia64/ia64/mp_machdep.c ============================================================================== --- stable/10/sys/ia64/ia64/mp_machdep.c Wed Jul 2 23:12:56 2014 (r268194) +++ stable/10/sys/ia64/ia64/mp_machdep.c Wed Jul 2 23:23:18 2014 (r268195) @@ -113,10 +113,14 @@ ia64_ih_ast(struct thread *td, u_int xiv static u_int ia64_ih_hardclock(struct thread *td, u_int xiv, struct trapframe *tf) { + struct trapframe *stf; PCPU_INC(md.stats.pcs_nhardclocks); CTR1(KTR_SMP, "IPI_HARDCLOCK, cpuid=%d", PCPU_GET(cpuid)); + stf = td->td_intr_frame; + td->td_intr_frame = tf; hardclockintr(); + td->td_intr_frame = stf; return (0); }