From owner-p4-projects@FreeBSD.ORG Tue Mar 18 14:13:39 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id AA1111065675; Tue, 18 Mar 2008 14:13:39 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 69D9B1065673 for ; Tue, 18 Mar 2008 14:13:39 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 69FE78FC24 for ; Tue, 18 Mar 2008 14:13:39 +0000 (UTC) (envelope-from rrs@cisco.com) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m2IEDdkG065616 for ; Tue, 18 Mar 2008 14:13:39 GMT (envelope-from rrs@cisco.com) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m2IEDdNc065614 for perforce@freebsd.org; Tue, 18 Mar 2008 14:13:39 GMT (envelope-from rrs@cisco.com) Date: Tue, 18 Mar 2008 14:13:39 GMT Message-Id: <200803181413.m2IEDdNc065614@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to rrs@cisco.com using -f From: "Randall R. Stewart" To: Perforce Change Reviews Cc: Subject: PERFORCE change 138010 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Mar 2008 14:13:40 -0000 http://perforce.freebsd.org/chv.cgi?CH=138010 Change 138010 by rrs@rrs-mips2-jnpr on 2008/03/18 14:13:10 Allow all memory to be used now, and take out (for now) the unaligned setup bits, the simulator blows up on this ... not sure it helps much either. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_machdep.c#21 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/octeon32/octeon_machdep.c#21 (text+ko) ==== @@ -808,8 +808,8 @@ octeon_set_interrupts(cpu_status_bits); } -void octeon_set_unaligned(uint64_t *old); -void octeon_clr_unaligned(uint64_t *old); +void octeon_set_control(uint64_t *old, uint32_t val); +void octeon_get_control(uint64_t *val); static void mips_platform_init(void) @@ -1253,7 +1253,6 @@ * */ physmem = btoc(phys_avail[1] - phys_avail[0]); -#ifdef GAHHHHHHH if ((octeon_board_real()) && (realmem_bytes > OCTEON_DRAM_FIRST_256_END)) { /* take out the upper non-cached 1/2 */ @@ -1267,11 +1266,8 @@ phys_avail[2], phys_avail[3]); physmem += btoc(phys_avail[3] - phys_avail[2]); } else { -#endif printf("realmem_bytes is %d\n", realmem_bytes); -#ifdef GAHHHHHHH } -#endif realmem = physmem; printf("\nCode: _start 0x%X _end 0x%X", (uint32_t) (&_start), (uint32_t) (&end)); @@ -1338,7 +1334,8 @@ { vm_offset_t kernend; uint64_t platform_counter_freq; - uint64_t oldval; + /* uint64_t oldval, newval;*/ + /* uint32_t val;*/ mips_platform_init(); @@ -1353,13 +1350,26 @@ cninit(); mips_boot_params_init(); printf(" Initialized memory: 0x%p to 0x%lX\n", &edata, ((long)&edata) + ((long)kernend - (long)(&edata))); - oldval = 0; + /* oldval = 0;*/ /* Lets leave unaligned access not working like normal mips for now */ - octeon_clr_unaligned(&oldval); - /* - * Uncomment this to get unaligned access in hardware. - octeon_set_unaligned(&oldval); - */ + + + /* octeon_get_control(&oldval);*/ + + /* val = (uint32_t)(0x00000000ffffffff & oldval);*/ + /* Try to turn on REPUN and USEUN */ + /* val |= OCTEON_CTLREG_REPUN|OCTEON_CTLREG_USEUN;*/ + + /*val &= ~(OCTEON_CTLREG_REPUN|OCTEON_CTLREG_USEUN);*/ + + /* Try to turn off extend multiplications, evidence + * tells me this will not work. + */ + /* val |= OCTEON_CTLREG_NOMUL;*/ + /* octeon_set_control(&oldval, val); */ + /* octeon_get_control(&newval);*/ + /* printf(" Setting Cavium Control Register to 0x%llx old (%llx)\n", + newval, oldval);*/ mips_init(); platform_counter_freq = (uint64_t) (octeon_get_clock_rate()); mips_timer_init_params(platform_counter_freq, 0);