From owner-cvs-src@FreeBSD.ORG Wed Dec 15 20:04:31 2004 Return-Path: Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id DD15A16A4CE; Wed, 15 Dec 2004 20:04:31 +0000 (GMT) Received: from www.cryptography.com (li-22.members.linode.com [64.5.53.22]) by mx1.FreeBSD.org (Postfix) with ESMTP id 8CDDE43D46; Wed, 15 Dec 2004 20:04:31 +0000 (GMT) (envelope-from nate@root.org) Received: from [10.0.0.34] (adsl-67-119-74-222.dsl.sntc01.pacbell.net [67.119.74.222]) by www.cryptography.com (8.12.8/8.12.8) with ESMTP id iBFK4Qug009658 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 15 Dec 2004 12:04:30 -0800 Message-ID: <41C098C9.2010802@root.org> Date: Wed, 15 Dec 2004 12:04:25 -0800 From: Nate Lawson User-Agent: Mozilla Thunderbird 0.9 (Windows/20041103) X-Accept-Language: en-us, en MIME-Version: 1.0 To: Bruce Evans References: <200411300618.iAU6IkQX065609@repoman.freebsd.org> <200412141333.06213.jhb@FreeBSD.org> <41BF48D4.8080305@root.org> <200412141719.10701.jhb@FreeBSD.org> <41BF6F44.2090407@root.org> <20041215115843.E45301@delplex.bde.org> In-Reply-To: <20041215115843.E45301@delplex.bde.org> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit cc: cvs-src@FreeBSD.org cc: src-committers@FreeBSD.org cc: cvs-all@FreeBSD.org cc: John Baldwin Subject: Re: cvs commit: src/sys/i386/i386 vm_machdep.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Dec 2004 20:04:32 -0000 Bruce Evans wrote: > On Tue, 14 Dec 2004, Nate Lawson wrote: >>John Baldwin wrote: >> >>>On Tuesday 14 December 2004 03:11 pm, Nate Lawson wrote: >>>>John Baldwin wrote: >>>>... >>>> >>>>>FYI, this breaks the 'reset' command from ddb if you panic on a cpu other >>>>>than the BSP. boot() isn't the only function that calls cpu_reset(), so >>>>>perhaps this should be reverted (same for amd64) >>>> >>>>No, I think we should move forward instead of backward. Entering the >>>>debugger should happen on the BSP and possibly other cpus need to be >>>>stopped by panic(). >>> >>>Erm, well, that's not always easy since sometimes when you panic you can't >>>talk to the other CPUs for whatever reason. Putting back the proxy reset > > The most common reason is that at least one other CPU is looping with > interrupts disabled. Then it won't see IPIs and stop_cpus() will loop > forever. Yes, the NMI change would fix this. Please repost your ddb sync patch. I'm ok with John putting the cpu proxy reset stuff back in for now. He's right in that it's the best we can do for now. -- Nate