From owner-cvs-src@FreeBSD.ORG Wed Dec 15 22:03:42 2004 Return-Path: Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 305AD16A4D0 for ; Wed, 15 Dec 2004 22:03:42 +0000 (GMT) Received: from c00l3r.networx.ch (c00l3r.networx.ch [62.48.2.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id CA47343D5C for ; Wed, 15 Dec 2004 22:03:40 +0000 (GMT) (envelope-from andre@freebsd.org) Received: (qmail 39807 invoked from network); 15 Dec 2004 21:52:18 -0000 Received: from unknown (HELO freebsd.org) ([62.48.0.53]) (envelope-sender ) by c00l3r.networx.ch (qmail-ldap-1.03) with SMTP for ; 15 Dec 2004 21:52:18 -0000 Message-ID: <41C0B4BB.7AC10459@freebsd.org> Date: Wed, 15 Dec 2004 23:03:39 +0100 From: Andre Oppermann X-Mailer: Mozilla 4.8 [en] (Windows NT 5.0; U) X-Accept-Language: en MIME-Version: 1.0 To: obrien@freebsd.org References: <200412060827.iB68RAmE058040@repoman.freebsd.org> <200412131416.54087.peter@wemm.org> <20041214013304.GB3352@dragon.nuxi.com> <200412131939.46695.peter@wemm.org> <41BE6165.7070306@freebsd.org> <20041214172331.GA1581@dragon.nuxi.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit cc: src-committers@freebsd.org cc: Peter Wemm cc: cvs-src@freebsd.org cc: Scott Long cc: cvs-all@freebsd.org cc: Dag-Erling Sm?rgrav Subject: Re: cvs commit: src/sys/i386/pci pci_cfgreg.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Dec 2004 22:03:42 -0000 David O'Brien wrote: > > On Mon, Dec 13, 2004 at 08:43:33PM -0700, Scott Long wrote: > > Peter Wemm wrote: > > >On that note, we still barely support anything more from AMD's platform > > >than the basic instruction set due to lack of documentation.. That's > > >why FreeBSD/amd64 ran so quickly on the Intel hardware. We only used > > >the most basic features of the generic instruction set in an otherwise > > >PC platform. We don't take advantage of the IOMMU, the timers, etc. > > >(Still no documentation). I'd have expected AMD to push as hard as > > >they can to get every advantage while Intel is still trying to recover > > >their balance. > > > > Having IOMMU docs could have a very positive benefit for things like ATA > > on amd64. However, I can't even begin to evaluate what that benefit > > might be until docs become available. > > Beyond > > http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_9004,00.html The HPET (High Precision Event Timer) looks really cool and has real 32bit counters generating time event interrupts! Nice nice! (AMD-8111 Hyper- transport I/O Hub Data Sheet, Section 3.4.4) > http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_9003,00.html > http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_7044,00.html > > what docs do you want? -- Andre