Go backward to H8/300 Directives.
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Opcodes
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For detailed information on the H8/300 machine instruction set, see
`H8/300 Series Programming Manual' (Hitachi ADE-602-025).
`as' implements all the standard H8/300 opcodes. No additional
pseudo-instructions are needed on this family.
The following table summarizes the opcodes and their arguments:
Rs source register
Rd destination register
imm immediate data
x:3 a bit (as a number between 0 and 7)
d:8 eight bit displacement from `pc'
d:16 sixteen bit displacement from `Rs'
add.b Rs,Rd biand #x:3,Rd
add.b #imm:8,Rd biand #x:3,@Rd
add.w Rs,Rd biand #x:3,@aa:8
adds #1,Rd bild #x:3,Rd
adds #2,Rd bild #x:3,@Rd
addx #imm:8,Rd bild #x:3,@aa:8
addx Rs,Rd bior #x:3,Rd
and #imm:8,Rd bior #x:3,@Rd
and Rs,Rd bior #x:3,@aa:8
andc #imm:8,ccr bist #x:3,Rd
band #x:3,Rd bist #x:3,@Rd
band #x:3,@Rd bist #x:3,@aa:8
bra d:8 bixor #x:3,Rd
bt d:8 bixor #x:3,@Rd
brn d:8 bixor #x:3,@aa:8
bf d:8 bld #x:3,Rd
bhi d:8 bld #x:3,@Rd
bls d:8 bld #x:3,@aa:8
bcc d:8 bnot #x:3,Rd
bhs d:8 bnot #x:3,@Rd
bcs d:8 bnot #x:3,@aa:8
blo d:8 bnot Rs,Rd
bne d:8 bnot Rs,@Rd
beq d:8 bnot Rs,@aa:8
bvc d:8 bor #x:3,Rd
bvs d:8 bor #x:3,@Rd
bpl d:8 bor #x:3,@aa:8
bmi d:8 bset #x:3,@Rd
bge d:8 bset #x:3,@aa:8
blt d:8 bset Rs,Rd
bgt d:8 bset Rs,@Rd
ble d:8 bset Rs,@aa:8
bclr #x:3,Rd bsr d:8
bclr #x:3,@Rd bst #x:3,Rd
bclr #x:3,@aa:8 bst #x:3,@Rd
bclr Rs,Rd bst #x:3,@aa:8
bclr Rs,@Rd btst #x:3,Rd
btst #x:3,@Rd mov.w @(d:16, Rs),Rd
btst #x:3,@aa:8 mov.w @Rs+,Rd
btst Rs,Rd mov.w @aa:16,Rd
btst Rs,@Rd mov.w Rs,@Rd
btst Rs,@aa:8 mov.w Rs,@(d:16, Rd)
bxor #x:3,Rd mov.w Rs,@-Rd
bxor #x:3,@Rd mov.w Rs,@aa:16
bxor #x:3,@aa:8 movfpe @aa:16,Rd
cmp.b #imm:8,Rd movtpe Rs,@aa:16
cmp.b Rs,Rd mulxu Rs,Rd
cmp.w Rs,Rd neg Rs
daa Rs nop
das Rs not Rs
dec Rs or #imm:8,Rd
divxu Rs,Rd or Rs,Rd
eepmov orc #imm:8,ccr
inc Rs pop Rs
jmp @Rs push Rs
jmp @aa:16 rotl Rs
jmp @@aa rotr Rs
jsr @Rs rotxl Rs
jsr @aa:16 rotxr Rs
jsr @@aa:8 rte
ldc #imm:8,ccr rts
ldc Rs,ccr shal Rs
mov.b Rs,Rd shar Rs
mov.b #imm:8,Rd shll Rs
mov.b @Rs,Rd shlr Rs
mov.b @(d:16, Rs),Rd sleep
mov.b @Rs+,Rd stc ccr,Rd
mov.b @aa:16,Rd sub.b Rs,Rd
mov.b @aa:8,Rd sub.w Rs,Rd
mov.b Rs,@Rd subs #1,Rd
mov.b Rs,@(d:16, Rd) subs #2,Rd
mov.b Rs,@-Rd subx #imm:8,Rd
mov.b Rs,@aa:16 subx Rs,Rd
mov.b Rs,@aa:8 xor #imm:8,Rd
mov.w Rs,Rd xor Rs,Rd
mov.w #imm:16,Rd xorc #imm:8,ccr
mov.w @Rs,Rd
Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
with variants using the suffixes `.b' and `.w' to specify the size of a
memory operand. `as' supports these suffixes, but does not require
them; since one of the operands is always a register, `as' can deduce
the correct size.
For example, since `r0' refers to a 16-bit register,
mov r0,@foo
is equivalent to
mov.w r0,@foo
If you use the size suffixes, `as' will issue a warning if there's a
mismatch between the suffix and the register size.