From owner-freebsd-arm@FreeBSD.ORG Mon May 9 11:07:02 2011 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0A735106566B for ; Mon, 9 May 2011 11:07:02 +0000 (UTC) (envelope-from owner-bugmaster@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id EE2548FC1B for ; Mon, 9 May 2011 11:07:01 +0000 (UTC) Received: from freefall.freebsd.org (localhost [127.0.0.1]) by freefall.freebsd.org (8.14.4/8.14.4) with ESMTP id p49B718q070564 for ; Mon, 9 May 2011 11:07:01 GMT (envelope-from owner-bugmaster@FreeBSD.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.4/8.14.4/Submit) id p49B71SG070562 for freebsd-arm@FreeBSD.org; Mon, 9 May 2011 11:07:01 GMT (envelope-from owner-bugmaster@FreeBSD.org) Date: Mon, 9 May 2011 11:07:01 GMT Message-Id: <201105091107.p49B71SG070562@freefall.freebsd.org> X-Authentication-Warning: freefall.freebsd.org: gnats set sender to owner-bugmaster@FreeBSD.org using -f From: FreeBSD bugmaster To: freebsd-arm@FreeBSD.org Cc: Subject: Current problem reports assigned to freebsd-arm@FreeBSD.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 May 2011 11:07:02 -0000 Note: to view an individual PR, use: http://www.freebsd.org/cgi/query-pr.cgi?pr=(number). The following is a listing of current problems submitted by FreeBSD users. These represent problem reports covering all versions including experimental development code and obsolete releases. S Tracker Resp. Description -------------------------------------------------------------------------------- o arm/156814 arm OpenRD Ultimate does not boot on DB-88F6XXX or SHEEVAP o arm/156771 arm FreeBSD/arm fails to build trampoline code with clang o arm/156496 arm [patch] Minor bugfixes and enhancements to mmc and mmc o arm/155894 arm [patch] Enable at91 booting from SDHC (high capacity) o arm/155214 arm [patch] MMC/SD IO slow on Atmel ARM with modern large o arm/154306 arm named crashes with signal 11 o arm/154227 arm [geli] using GELI leads to panic on ARM o arm/154189 arm lang/perl5.12 doesn't build on arm o arm/153380 arm Panic / translation fault with wlan on ARM o arm/150581 arm [irq] Unknown error generates IRQ address decoding err o arm/149288 arm mail/dovecot causes panic during configure on Sheevapl o arm/134368 arm [patch] nslu2_led driver for the LEDs on the NSLU2 p arm/134338 arm [patch] Lock GPIO accesses on ixp425 13 problems total. From owner-freebsd-arm@FreeBSD.ORG Tue May 10 12:55:42 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E4D52106564A for ; Tue, 10 May 2011 12:55:42 +0000 (UTC) (envelope-from Tobias.Quintern@brunel.de) Received: from mailgate2.arcor-ip.de (mailgate2.arcor-ip.de [145.253.2.48]) by mx1.freebsd.org (Postfix) with ESMTP id 153898FC0A for ; Tue, 10 May 2011 12:55:40 +0000 (UTC) Received: from mailer.brunellocal.de (ffmcospub2ffmbrunelfw2lo-cs-nat-mail-server.adm.arcor.net [145.254.28.157]) by mailgate1.cs.arcor.net (Arcor-CN-MailRelay-l-B) with ESMTP id 0655BFBB85E for ; Tue, 10 May 2011 14:35:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by localhost (Postfix) with ESMTP id BD47250F17 for ; Tue, 10 May 2011 14:35:43 +0200 (CEST) X-Virus-Scanned: amavisd-new at brunellocal.de Received: from mailer.brunellocal.de ([127.0.0.1]) by localhost (mailer.brunellocal.de [127.0.0.1]) (amavisd-new, port 10024) with SMTP id Vz-xapfUAorU for ; Tue, 10 May 2011 14:35:43 +0200 (CEST) Received: from mail-hv.brunel.de (mail-hv.brunellocal.de [192.168.1.234]) by mailer.brunellocal.de (Postfix) with ESMTP id 8886539487 for ; Tue, 10 May 2011 14:35:43 +0200 (CEST) Received: from bcslx10.bcs.brunel.local ([172.16.101.231]) by 935s02su.brunellocal.de (Lotus Domino Release 7.0.4FP1) with ESMTP id 2011051014353953-67080 ; Tue, 10 May 2011 14:35:39 +0200 Received: from BCSPC109 (bcspc109.bcs.brunel.local [172.16.101.126]) by bcslx10.bcs.brunel.local (Postfix) with ESMTP id 025941341B5; Tue, 10 May 2011 14:35:39 +0200 (CEST) From: "Tobias Quintern" To: Date: Tue, 10 May 2011 14:35:39 +0200 Message-ID: <5EABE6DCF1B84BAAA5460DD75F075C82@bcs.brunel.local> MIME-Version: 1.0 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook, Build 10.0.6863 Importance: Normal Thread-Index: AcwPDsTuCex8HIHTQpCKxOdO7e9ZQQ== X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.6090 X-MIMETrack: Itemize by SMTP Server on HUB93501/Brunel/De(Release 7.0.4FP1|July 20, 2009) at 10.05.2011 02:35:39 PM, Serialize by Router on HUB10149/Brunel/De(Release 7.0.4FP1|July 20, 2009) at 10.05.2011 02:35:42 PM Content-Type: multipart/mixed; boundary="----=_NextPart_000_0004_01CC0F1F.88BA5F20" Subject: SD/MMC driver for OpenRD Board X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 May 2011 12:55:43 -0000 ------=_NextPart_000_0004_01CC0F1F.88BA5F20 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="us-ascii" Hello, I've integrated Rafal Czubaks SDIO driver (http://people.freebsd.org/~raj/misc/mv_sdio.c) into the FreeBSD HEAD (r221725). The patch has been verified to function with the OpenRD Ultimate board. = To ensure data-consistency the options noclusterr and noclusterw have to be given to mount. This is the current status: - Booting from SD works - DMA transfers work fine - PIO transfers not tested This patch only adds SDIO support to the kernel. The current = Ethernet-Issues (http://www.freebsd.org/cgi/query-pr.cgi?pr=3D156814) have to be patched separately. The openrd-cl.dts from this patch is preferable over the = patch from Arnaud, because it includes the configuration for several SD = specific GPIO pins. I attached 3 different kernel-configs for the sake of completeness. The OPENRD-CL-SDBOOT and OPENRD-CL-SATABOOT work just fine. =20 The OPENRD-CL config tries to boot via BOOTP/NFS, which seems to be = broken momentarily. I have an older SVN checkout (r219450) where the board is = able to boot from NFS. That kernel is patched quite similar to http://www.freebsd.org/cgi/query-pr.cgi?pr=3D156814. A bootlog of the failed boot is attached.=09 Regards Tobias=20 ------=_NextPart_000_0004_01CC0F1F.88BA5F20 Content-Type: text/plain; name="boot_nfs_fail.txt" Content-Disposition: attachment; filename="boot_nfs_fail.txt" Content-Transfer-Encoding: quoted-printable ## Starting application at 0x00900000 ... dtbp =3D 0xc0be3f10 KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2011 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 9.0-CURRENT #5 r221725M: Tue May 10 11:51:35 UTC 2011 root@vbcspc15.bcs.brunel.local:/usr/obj/arm.arm/build/arm/head=5Fr22152= 5/sys/O PENRD-CL arm module mvs already present! CPU: Feroceon 88FR131 rev 1 (Marvell core) DC enabled IC enabled WB enabled EABT branch prediction enabled 16KB/32B 4-way Instruction cache 16KB/32B 4-way write-back-locking-C Data cache real memory =3D 536870912 (512 MB) avail memory =3D 520105984 (496 MB) SOC: Marvell 88F6281 rev A1, TClock 200MHz simplebus0: on fdtbus0 ic0: mem 0xf1020200-0xf102023b on= simp lebus0 timer0: mem 0xf1020300-0xf102032f irq 1 on simplebus0 Event timer "CPUTimer0" frequency 200000000 Hz quality 1000 Timecounter "CPUTimer1" frequency 200000000 Hz quality 1000 gpio0: mem 0xf1010100-0xf101011f irq 3= 5,36, 37,38,39,40,41 on simplebus0 rtc0: mem 0xf1010300-0xf1010307 on simplebus0 twsi0: mem 0xf1011000-0xf101101f ir= q 43 on simplebus0 iicbus0: on twsi0 iic0: on iicbus0 mge0: mem 0xf1072000-0xf1073fff irq 1= 2,13, 14,11,46 on simplebus0 mge0: Ethernet address: f0:ad:4e:00:61:96 miibus0: on mge0 e1000phy0: PHY 0 on miibus0 e1000phy0: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT= , 100 0baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto mge1: mem 0xf1076000-0xf1077fff irq 1= 6,17, 18,15,47 on simplebus0 mge1: Ethernet address: f0:ad:4e:00:61:97 miibus1: on mge1 e1000phy1: PHY 1 on miibus1 e1000phy1: none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT= , 100 0baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto uart0: <16550 or compatible> mem 0xf1012000-0xf101201f irq 33 on simplebus0 uart0: console (1066,n,8,1) ehci0: mem 0xf1050000-0xf1050fff ir= q 48, 19 on simplebus0 usbus0: EHCI version 1.0 usbus0: set host controller mode usbus0: on ehci0 mvs0: mem 0xf1080000-0xf1085fff irq 21 on= simp lebus0 mvs0: Gen-IIe, 2 3Gbps ports, Port Multiplier supported with FBS mvsch0: at channel 0 on mvs0 mvsch1: at channel 1 on mvs0 sdio0: mem 0xf1090000-0xf1090133 = irq 2 8 on simplebus0 mmc0: on sdio0 pcib0: mem 0xf1040000-0xf1041fff = irq 4 4 on fdtbus0 pcib0: PCI IO/Memory space exhausted device=5Fattach: pcib0 attach returned 12 Timecounters tick every 10.000 msec usbus0: 480Mbps High Speed USB v2.0 ugen0.1: at usbus0 uhub0: on usbus0 ada0 at mvsch0 bus 0 scbus0 target 0 lun 0 ada0: ATA-7 SATA 1.x device ada0: 150.000MB/s transfers (SATA 1.x, UDMA6, PIO 8192bytes) ada0: Command Queueing enabled ada0: 57231MB (117210240 512 byte sectors: 16H 63S/T 16383C) mmcsd0: 3849MB at mmc0 50MHz/4bit bootpc=5Finit: wired to interface 'mge0' Sending DHCP Discover packet from interface mge0 (f0:ad:4e:00:61:96) Received DHCP Offer packet on mge0 from 172.16.102.155 (accepted) (no root = path) uhub0: 1 port with 1 removable, self powered mge0: link state changed to UP ugen0.2: at usbus0 uhub1: on usb= us0 uhub1: 4 ports with 4 removable, self powered ugen0.3: at usbus0 uhub2: on usb= us0 Sending DHCP Request packet from interface mge0 (f0:ad:4e:00:61:96) Received DHCP Ack packet on mge0 from 172.16.102.155 (accepted) (got root p= ath) uhub2: 4 ports with 4 removable, self powered mge0 at 172.16.102.152 server 172.16.102.155 subnet mask 255.255.255.0 router 172.16.102.3 rootfs 172.16.102.78:/bcstoqu= /open rd5=5Frootfs/ hostname open-rd5 Adjusted interface mge0 Trying to mount root from nfs: []... Mounting from nfs: failed with error 2: unknown file system. Loader variables: Manual root filesystem specification: : [options] Mount using filesystem and with the specified (optional) option list. eg. ufs:/dev/da0s1a zfs:tank cd9660:/dev/acd0 ro (which is equivalent to: mount -t cd9660 -o ro /dev/acd0 /) ? List valid disk boot devices . Yield 1 second (for background tasks) Abort manual input mountroot>= ------=_NextPart_000_0004_01CC0F1F.88BA5F20 Content-Type: text/plain; name="boot_nfs_fail_ethcap.txt" Content-Disposition: attachment; filename="boot_nfs_fail_ethcap.txt" Content-Transfer-Encoding: quoted-printable =D4=C3=B2=A1=02=00=04=00=00=00=00=00=00=00=00=00=FF=FF=00=00=01=00=00=00=17= '=C9M=17=C2=0E=00v=00=00=00v=00=00=00=00=0DV~=D2=D7=F0=ADN=00a=96=08=00E=00= =00h=00=03=00=00@=11U{=AC=10f=98=AC=10fN=03=FF=00o=00T=C9V=FF=FF=FF=01=00= =00=00=00=00=00=00=02=00=01=86=A0=00=00=00=02=00=00=00=03=00=00=00=01=00=00= =00=14=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=01=86=A5=00=00=00=03=00=00=00=11=00=00=00=00=17'=C9M=1D= =C3=0E=00F=00=00=00F=00=00=00=F0=ADN=00a=96=00=0DV~=D2=D7=08=00E=00=008=00= =00@=00@=11=15=AE=AC=10fN=AC=10f=98=00o=03=FF=00$%=3D=FF=FF=FF=01=00=00=00= =01=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=02=A1=17'=C9MD=C4= =0E=00=82=00=00=00=82=00=00=00=00=0DV~=D2=D7=F0=ADN=00a=96=08=00E=00=00t=00= =04=00=00@=11Un=AC=10f=98=AC=10fN=03=FF=02=A1=00`=AB=FB=FF=FF=FF=02=00=00= =00=00=00=00=00=02=00=01=86=A5=00=00=00=03=00=00=00=01=00=00=00=01=00=00=00= =14=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=18/bcstoqu/openrd5=5Frootfs/=18'=C9M=D0=C4=00=00v=00= =00=00v=00=00=00=F0=ADN=00a=96=00=0DV~=D2=D7=08=00E=00=00h=00=00@=00@=11=15= ~=AC=10fN=AC=10f=98=02=A1=03=FF=00T%m=FF=FF=FF=02=00=00=00=01=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=14=01=00=00=01=00= =FD=00=02=02=00=00=00=01=80L=00=F9<=A4=E2=00=00=00=05=00=00=00=00=00=00=00= =01=00=05=F3s=00=05=F3t=00=05=F3u=18'=C9M=0A=C6=00=00v=00=00=00v=00=00=00= =00=0DV~=D2=D7=F0=ADN=00a=96=08=00E=00=00h=00=05=00=00@=11Uy=AC=10f=98=AC= =10fN=03=FF=00o=00T=C9V=FF=FF=FF=03=00=00=00=00=00=00=00=02=00=01=86=A0=00= =00=00=02=00=00=00=03=00=00=00=01=00=00=00=14=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=00=01=86=A3=00=00=00= =03=00=00=00=11=00=00=00=00=18'=C9M=94=CA=00=00F=00=00=00F=00=00=00=F0=ADN= =00a=96=00=0DV~=D2=D7=08=00E=00=008=00=00@=00@=11=15=AE=AC=10fN=AC=10f=98= =00o=03=FF=00$%=3D=FF=FF=FF=03=00=00=00=01=00=00=00=00=00=00=00=00=00=00=00= =00=00=00=00=00=00=00=08=01= ------=_NextPart_000_0004_01CC0F1F.88BA5F20 Content-Type: text/plain; name="sdio_patch.txt" Content-Disposition: attachment; filename="sdio_patch.txt" Content-Transfer-Encoding: quoted-printable diff -prN --exclude=3D.svn head=5Fr221725/sys/arm/conf/OPENRD-CL head=5Fr22= 1525/sys/arm/conf/OPENRD-CL=0A*** head=5Fr221725/sys/arm/conf/OPENRD-CL Thu= Jan 1 00:00:00 1970=0A--- head=5Fr221525/sys/arm/conf/OPENRD-CL Tue May 1= 0 08:25:28 2011=0A***************=0A*** 0 ****=0A--- 1,94 ----=0A+ #=0A+ # = Custom kernel for OpenRD Client/Ultimate devices.=0A+ #=0A+ # $FreeBSD$=0A+= #=0A+ =0A+ ident OPENRD-CL=0A+ include "../mv/kirkwood/std.db88f6xxx"=0A= + =0A+ options SOC=5FMV=5FKIRKWOOD=0A+ makeoptions MODULES=5FOVERRIDE=3D""= =0A+ =0A+ makeoptions DEBUG=3D-g #Build kernel with gdb(1) debug symbols= =0A+ makeoptions WERROR=3D"-Werror"=0A+ =0A+ options SCHED=5F4BSD #4BSD s= cheduler=0A+ options INET #InterNETworking=0A+ options INET6 #IPv6 co= mmunications protocols=0A+ options FFS #Berkeley Fast Filesystem=0A+ opt= ions NFSCLIENT #Network Filesystem Client=0A+ options NFSLOCKD #Network= Lock Manager=0A+ options NFS=5FROOT #NFS usable as /, requires NFSCLIENT= =0A+ options BOOTP=0A+ options BOOTP=5FNFSROOT=0A+ options BOOTP=5FNFSV3= =0A+ options BOOTP=5FWIRED=5FTO=3Dmge0=0A+ =0A+ # Root fs on USB device=0A= + #options ROOTDEVNAME=3D\"ufs:/dev/da0a\"=0A+ =0A+ options SYSVSHM #SY= SV-style shared memory=0A+ options SYSVMSG #SYSV-style message queues=0A= + options SYSVSEM #SYSV-style semaphores=0A+ options =5FKPOSIX=5FPRIORI= TY=5FSCHEDULING #Posix P1003=5F1B real-time extensions=0A+ options MUTEX= =5FNOINLINE=0A+ options RWLOCK=5FNOINLINE=0A+ options NO=5FFFS=5FSNAPSHOT= =0A+ options NO=5FSWAPPING=0A+ =0A+ # Debugging=0A+ options ALT=5FBREAK= =5FTO=5FDEBUGGER=0A+ options DDB=0A+ options KDB=0A+ =0A+ # Pseudo device= s=0A+ device loop=0A+ device md=0A+ device pty=0A+ device random=0A+ = =0A+ # PCI Express=0A+ device pci=0A+ =0A+ # Serial ports=0A+ device uart= =0A+ =0A+ # Networking=0A+ device ether=0A+ device mge # Marvell Gigabi= t Ethernet controller=0A+ device mii=0A+ device e1000phy=0A+ device bpf= =0A+ =0A+ # USB=0A+ options USB=5FDEBUG # enable debug msgs=0A+ device u= sb=0A+ device ehci=0A+ device umass=0A+ =0A+ # SATA=0A+ device mvs=0A+ = =0A+ # CAM=0A+ device scbus=0A+ device da=0A+ device cd=0A+ device pass= =0A+ =0A+ # I2C (TWSI)=0A+ device iic=0A+ device iicbus=0A+ =0A+ # Enable= Flattened Device Tree support=0A+ options FDT=0A+ options FDT=5FDTB=5FST= ATIC=0A+ makeoptions FDT=5FDTS=5FFILE=3Dopenrd-cl.dts=0A+ =0A+ =0A+ # MMC/S= D=0A+ device mv=5Fsdio=0A+ device mmc=0A+ device = mmcsd=0A+ =0A+ =0Adiff -prN --exclude=3D.svn head=5Fr221725/sys/arm/conf/O= PENRD-CL-SATABOOT head=5Fr221525/sys/arm/conf/OPENRD-CL-SATABOOT=0A*** head= =5Fr221725/sys/arm/conf/OPENRD-CL-SATABOOT Thu Jan 1 00:00:00 1970=0A--- h= ead=5Fr221525/sys/arm/conf/OPENRD-CL-SATABOOT Tue May 10 08:25:27 2011=0A**= *************=0A*** 0 ****=0A--- 1,97 ----=0A+ #=0A+ # Custom kernel for Op= enRD Client/Ultimate devices.=0A+ #=0A+ # $FreeBSD$=0A+ #=0A+ =0A+ ident O= PENRD-CL=0A+ include "../mv/kirkwood/std.db88f6xxx"=0A+ =0A+ options SOC= =5FMV=5FKIRKWOOD=0A+ makeoptions MODULES=5FOVERRIDE=3D""=0A+ =0A+ makeoptio= ns DEBUG=3D-g #Build kernel with gdb(1) debug symbols=0A+ makeoptions WERR= OR=3D"-Wall"=0A+ =0A+ options SCHED=5F4BSD #4BSD scheduler=0A+ options I= NET #InterNETworking=0A+ options INET6 #IPv6 communications protocols= =0A+ #options MFS # Memory Filesystem=0A+ optio= ns FFS #Berkeley Fast Filesystem=0A+ options NFSCLIENT #Network Filesy= stem Client=0A+ options NFSLOCKD #Network Lock Manager=0A+ #options NFS= =5FROOT #NFS usable as /, requires NFSCLIENT=0A+ #options BOOTP=0A+ #opti= ons BOOTP=5FNFSROOT=0A+ #options BOOTP=5FNFSV3=0A+ #options BOOTP=5FWIRE= D=5FTO=3Dmge0=0A+ =0A+ # Root fs on USB device=0A+ #options ROOTDEVNAME=3D= \"ufs:/dev/da0a\"=0A+ options ROOTDEVNAME=3D\"ufs:/dev/ada0s2a\"=0A= + options SYSVSHM #SYSV-style shared memory=0A+ options SYSVMSG #SYSV= -style message queues=0A+ options SYSVSEM #SYSV-style semaphores=0A+ opt= ions =5FKPOSIX=5FPRIORITY=5FSCHEDULING #Posix P1003=5F1B real-time extensi= ons=0A+ options MUTEX=5FNOINLINE=0A+ options RWLOCK=5FNOINLINE=0A+ option= s NO=5FFFS=5FSNAPSHOT=0A+ options NO=5FSWAPPING=0A+ options HZ=3D2000=0A= + =0A+ # Debugging=0A+ #options ALT=5FBREAK=5FTO=5FDEBUGGER=0A+ #options = DDB=0A+ #options KDB=0A+ =0A+ # Pseudo devices=0A+ device loop=0A+ device= md=0A+ device pty=0A+ device random=0A+ =0A+ # PCI Express=0A+ device = pci=0A+ =0A+ # Serial ports=0A+ device uart=0A+ =0A+ # Networking=0A+ devi= ce ether=0A+ device mge # Marvell Gigabit Ethernet controller=0A+ devic= e mii=0A+ device e1000phy=0A+ device bpf=0A+ =0A+ # USB=0A+ options USB= =5FDEBUG # enable debug msgs=0A+ device usb=0A+ device ehci=0A+ device = umass=0A+ =0A+ # SATA=0A+ device mvs=0A+ #device ata=0A+ #device atadisk #= ATA disk drives=0A+ #options ATA=5FSTATIC=5FID # Static device numbering= =0A+ options EXT2FS=0A+ =0A+ # CAM=0A+ device scbus=0A+ device da= =0A+ device cd=0A+ device pass=0A+ =0A+ # I2C (TWSI)=0A+ device iic=0A+ = device iicbus=0A+ =0A+ # Enable Flattened Device Tree support=0A+ options = FDT=0A+ options FDT=5FDTB=5FSTATIC=0A+ makeoptions FDT=5FDTS=5FFILE=3Dope= nrd-cl.dts=0A+ =0A+ # MMC/SD=0A+ device mv=5Fsdio=0A+ device = mmc=0A+ device mmcsd=0A\ No newline at end of file=0Adiff -prN= --exclude=3D.svn head=5Fr221725/sys/arm/conf/OPENRD-CL-SDBOOT head=5Fr2215= 25/sys/arm/conf/OPENRD-CL-SDBOOT=0A*** head=5Fr221725/sys/arm/conf/OPENRD-C= L-SDBOOT Thu Jan 1 00:00:00 1970=0A--- head=5Fr221525/sys/arm/conf/OPENRD-= CL-SDBOOT Tue May 10 08:25:27 2011=0A***************=0A*** 0 ****=0A--- 1,9= 6 ----=0A+ #=0A+ # Custom kernel for OpenRD Client/Ultimate devices.=0A+ #= =0A+ # $FreeBSD$=0A+ #=0A+ =0A+ ident OPENRD-CL=0A+ include "../mv/kirkwo= od/std.db88f6xxx"=0A+ =0A+ options SOC=5FMV=5FKIRKWOOD=0A+ makeoptions MOD= ULES=5FOVERRIDE=3D""=0A+ =0A+ makeoptions DEBUG=3D-g #Build kernel with gd= b(1) debug symbols=0A+ makeoptions WERROR=3D"-Wall"=0A+ =0A+ options SCHED= =5F4BSD #4BSD scheduler=0A+ options INET #InterNETworking=0A+ options = INET6 #IPv6 communications protocols=0A+ #options MFS = # Memory Filesystem=0A+ options FFS #Berkeley Fast Filesystem= =0A+ options NFSCLIENT #Network Filesystem Client=0A+ options NFSLOCKD = #Network Lock Manager=0A+ #options NFS=5FROOT #NFS usable as /, requires = NFSCLIENT=0A+ #options BOOTP=0A+ #options BOOTP=5FNFSROOT=0A+ #options B= OOTP=5FNFSV3=0A+ #options BOOTP=5FWIRED=5FTO=3Dmge0=0A+ =0A+ # Root fs on = USB device=0A+ options ROOTDEVNAME=3D\"ufs:/dev/mmcsd0a\"=0A+ optio= ns SYSVSHM #SYSV-style shared memory=0A+ options SYSVMSG #SYSV-style = message queues=0A+ options SYSVSEM #SYSV-style semaphores=0A+ options = =5FKPOSIX=5FPRIORITY=5FSCHEDULING #Posix P1003=5F1B real-time extensions=0A= + options MUTEX=5FNOINLINE=0A+ options RWLOCK=5FNOINLINE=0A+ options NO= =5FFFS=5FSNAPSHOT=0A+ options NO=5FSWAPPING=0A+ options HZ=3D2000=0A+ =0A= + # Debugging=0A+ #options ALT=5FBREAK=5FTO=5FDEBUGGER=0A+ #options DDB= =0A+ #options KDB=0A+ =0A+ # Pseudo devices=0A+ device loop=0A+ device m= d=0A+ device pty=0A+ device random=0A+ =0A+ # PCI Express=0A+ device pci= =0A+ =0A+ # Serial ports=0A+ device uart=0A+ =0A+ # Networking=0A+ device = ether=0A+ device mge # Marvell Gigabit Ethernet controller=0A+ device = mii=0A+ device e1000phy=0A+ device bpf=0A+ =0A+ # USB=0A+ options USB=5F= DEBUG # enable debug msgs=0A+ device usb=0A+ device ehci=0A+ device uma= ss=0A+ =0A+ # SATA=0A+ device mvs=0A+ #device ata=0A+ #device atadisk # AT= A disk drives=0A+ #options ATA=5FSTATIC=5FID # Static device numbering=0A+ = options EXT2FS=0A+ =0A+ # CAM=0A+ device scbus=0A+ device da=0A+ = device cd=0A+ device pass=0A+ =0A+ # I2C (TWSI)=0A+ device iic=0A+ devic= e iicbus=0A+ =0A+ # Enable Flattened Device Tree support=0A+ options FDT= =0A+ options FDT=5FDTB=5FSTATIC=0A+ makeoptions FDT=5FDTS=5FFILE=3Dopenrd-= cl.dts=0A+ =0A+ # MMC/SD=0A+ device mv=5Fsdio=0A+ device = mmc=0A+ device mmcsd=0Adiff -prN --exclude=3D.svn head=5Fr221725/s= ys/arm/mv/files.mv head=5Fr221525/sys/arm/mv/files.mv=0A*** head=5Fr221725/= sys/arm/mv/files.mv Tue May 10 10:11:30 2011=0A--- head=5Fr221525/sys/arm/m= v/files.mv Tue May 10 08:24:17 2011=0A*************** arm/mv/mv=5Fpci.c o= ptional pci=0A*** 27,32 ****=0A--- 27,33 ----=0A arm/mv/mv=5Fsata.c optio= nal ata | atamvsata=0A arm/mv/timer.c standard=0A arm/mv/twsi.c optio= nal iicbus=0A+ arm/mv/mv=5Fsdio.c optional mv=5Fsdio= =0A =0A dev/mge/if=5Fmge.c optional mge=0A dev/mvs/mvs=5Fsoc.c optiona= l mvs=0Adiff -prN --exclude=3D.svn head=5Fr221725/sys/arm/mv/gpio.c head=5F= r221525/sys/arm/mv/gpio.c=0A*** head=5Fr221725/sys/arm/mv/gpio.c Tue May 10= 10:11:30 2011=0A--- head=5Fr221525/sys/arm/mv/gpio.c Tue May 10 11:50:01 2= 011=0A***************=0A*** 29,35 ****=0A */=0A =0A #include =0A! =5F=5FFBSDID("$FreeBSD: head/sys/arm/mv/gpio.c 219684 2011-03-16 00= :42:15Z marcel $");=0A =0A #include =0A #include =0A--- 29,35 ----=0A */=0A =0A #include =0A! =5F=5FFBSD= ID("$FreeBSD$");=0A =0A #include =0A #include = =0A*************** mv=5Fgpio=5Fattach(device=5Ft dev)=0A*** 145,151 ****=0A= =0A mv=5Fgpio=5Fsoftc =3D sc;=0A =0A! /* Get chip id and revision */= =0A soc=5Fid(&dev=5Fid, &rev=5Fid);=0A =0A if (dev=5Fid =3D=3D MV=5FDE= V=5F88F5182 ||=0A--- 145,151 ----=0A =0A mv=5Fgpio=5Fsoftc =3D sc;=0A = =0A! /* Get chip id and revision */=0A soc=5Fid(&dev=5Fid, &rev=5Fid);= =0A =0A if (dev=5Fid =3D=3D MV=5FDEV=5F88F5182 ||=0A*************** stat= ic int=0A*** 207,213 ****=0A mv=5Fgpio=5Fintr(void *arg)=0A {=0A uint32= =5Ft int=5Fcause, gpio=5Fval;=0A! uint32=5Ft int=5Fcause=5Fhi, gpio=5Fval= =5Fhi =3D 0;=0A int i;=0A =0A int=5Fcause =3D mv=5Fgpio=5Freg=5Fread(G= PIO=5FINT=5FCAUSE);=0A--- 207,214 ----=0A mv=5Fgpio=5Fintr(void *arg)=0A = {=0A uint32=5Ft int=5Fcause, gpio=5Fval;=0A! uint32=5Ft int=5Fcause=5Fhi= =3D 0;=0A! uint32=5Ft gpio=5Fval=5Fhi =3D 0;=0A int i;=0A =0A int= =5Fcause =3D mv=5Fgpio=5Freg=5Fread(GPIO=5FINT=5FCAUSE);=0A*************** = mv=5Fgpio=5Fintr(void *arg)=0A*** 240,245 ****=0A--- 241,287 ----=0A retu= rn (FILTER=5FHANDLED);=0A }=0A =0A+ =0A+ static int32=5Ft mv=5Fgpio=5Fget= =5Fgpio=5Firq( const uint32=5Ft u32=5Fgpio )=0A+ {=0A+ int32=5Ft s32=5Fre= t=5Fval =3D 0;=0A+ =0A+ if( 7 >=3D u32=5Fgpio )=0A+ {=0A+ s32=5Fr= et=5Fval =3D MV=5FINT=5FGPIO7=5F0;=0A+ }=0A+ else if( 15 >=3D u32=5Fgpi= o )=0A+ {=0A+ s32=5Fret=5Fval =3D MV=5FINT=5FGPIO15=5F8;=0A+ }=0A+ = else if( 23 >=3D u32=5Fgpio )=0A+ {=0A+ s32=5Fret=5Fval =3D MV=5FIN= T=5FGPIO23=5F16;=0A+ }=0A+ else if( 31 >=3D u32=5Fgpio )=0A+ {=0A+ = s32=5Fret=5Fval =3D MV=5FINT=5FGPIO31=5F24;=0A+ }=0A+ else if( ( 32 += 7 ) >=3D u32=5Fgpio )=0A+ {=0A+ s32=5Fret=5Fval =3D MV=5FINT=5FGPIOH= I7=5F0;=0A+ }=0A+ else if( ( 32 + 15 ) >=3D u32=5Fgpio )=0A+ {=0A+ = s32=5Fret=5Fval =3D MV=5FINT=5FGPIOHI15=5F8;=0A+ }=0A+ else if( ( 32= + 23 ) >=3D u32=5Fgpio )=0A+ {=0A+ s32=5Fret=5Fval =3D MV=5FINT=5FGP= IOHI23=5F16;=0A+ }=0A+ else=0A+ {=0A+ s32=5Fret=5Fval =3D -1;=0A+= }=0A+ =0A+ return s32=5Fret=5Fval;=0A+ }=0A+ =0A /*=0A * GPIO int= errupt handling=0A */=0A*************** mv=5Fgpio=5Fsetup=5Fintrhandler(c= onst char *na=0A*** 253,268 ****=0A struct intr=5Fevent *event;=0A int = error;=0A =0A if (pin < 0 || pin >=3D mv=5Fgpio=5Fsoftc->pin=5Fnum)=0A = return (ENXIO);=0A event =3D gpio=5Fevents[pin];=0A if (event =3D=3D = NULL) {=0A! error =3D intr=5Fevent=5Fcreate(&event, (void *)pin, 0, pin,= =0A! (void (*)(void *))mv=5Fgpio=5Fintr=5Fmask,=0A! (void (*)(v= oid *))mv=5Fgpio=5Fintr=5Funmask,=0A! (void (*)(void *))mv=5Fgpio=5Fi= nt=5Fack,=0A! NULL,=0A! "gpio%d:", pin);=0A if (error !=3D 0= )=0A return (error);=0A gpio=5Fevents[pin] =3D event;=0A--- 295,321 = ----=0A struct intr=5Fevent *event;=0A int error;=0A =0A+ int32=5Ft = s32=5Firq =3D mv=5Fgpio=5Fget=5Fgpio=5Firq( pin );=0A+ =0A+ if( 0 > s32= =5Firq )=0A+ {=0A+ printf("Could not find corresponding IRQ for pin %= i\n",=0A+ pin );=0A+ return( ENXIO );=0A+ }=0A+ =0A if (= pin < 0 || pin >=3D mv=5Fgpio=5Fsoftc->pin=5Fnum)=0A return (ENXIO);=0A = event =3D gpio=5Fevents[pin];=0A if (event =3D=3D NULL) {=0A! =0A! = error =3D intr=5Fevent=5Fcreate(&event, (void *)pin, 0,=0A! = s32=5Firq ,=0A! (void (*)(vo= id *))mv=5Fgpio=5Fintr=5Fmask,=0A! (void (*)(= void *))mv=5Fgpio=5Fintr=5Funmask,=0A! (void = (*)(void *))mv=5Fgpio=5Fint=5Fack,=0A! NULL,= =0A! "gpio%d:", pin);=0A if (error !=3D 0)= =0A return (error);=0A gpio=5Fevents[pin] =3D event;=0A*************= ** mv=5Fgpio=5Fintr=5Funmask(int pin)=0A*** 294,302 ****=0A--- 347,359 ----= =0A return;=0A =0A if (gpio=5Fsetup[pin] & MV=5FGPIO=5FIN=5FIRQ=5FEDG= E)=0A+ {=0A mv=5Fgpio=5Fedge(pin, 1);=0A+ }=0A else=0A+ {=0A = mv=5Fgpio=5Flevel(pin, 1);=0A+ }=0A }=0A =0A static void=0A***********= **** mv=5Fgpio=5Fintr=5Fhandler(int pin)=0A*** 306,314 ****=0A =0A event= =3D gpio=5Fevents[pin];=0A if (event =3D=3D NULL || TAILQ=5FEMPTY(&event= ->ie=5Fhandlers))=0A return;=0A! =0A intr=5Fevent=5Fhandle(event, NULL= );=0A }=0A =0A static int=0A--- 363,377 ----=0A =0A event =3D gpio=5F= events[pin];=0A if (event =3D=3D NULL || TAILQ=5FEMPTY(&event->ie=5Fhandl= ers))=0A+ {=0A+ printf("mv=5Fgpio=5Fintr=5Fhandler(): No handler for = Pin %i\n",=0A+ pin);=0A+ mv=5Fgpio=5Fint=5Fack(pin);=0A r= eturn;=0A! }=0A intr=5Fevent=5Fhandle(event, NULL);=0A+ =0A+ mv=5Fgpi= o=5Fint=5Fack(pin);=0A }=0A =0A static int=0Adiff -prN --exclude=3D.svn = head=5Fr221725/sys/arm/mv/mv=5Fsdio.c head=5Fr221525/sys/arm/mv/mv=5Fsdio.c= =0A*** head=5Fr221725/sys/arm/mv/mv=5Fsdio.c Thu Jan 1 00:00:00 1970=0A---= head=5Fr221525/sys/arm/mv/mv=5Fsdio.c Tue May 10 08:24:17 2011=0A*********= ******=0A*** 0 ****=0A--- 1,1806 ----=0A+ /*-=0A+ * Copyright (c) 2009 Sem= ihalf, Rafal Czubak=0A+ * All rights reserved.=0A+ *=0A+ * Redistributio= n and use in source and binary forms, with or without=0A+ * modification, = are permitted provided that the following conditions=0A+ * are met:=0A+ *= 1. Redistributions of source code must retain the above copyright=0A+ * = notice, this list of conditions and the following disclaimer.=0A+ * 2. R= edistributions in binary form must reproduce the above copyright=0A+ * = notice, this list of conditions and the following disclaimer in the=0A+ * = documentation and/or other materials provided with the distribution.=0A+= *=0A+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS= '' AND=0A+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED= TO, THE=0A+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PAR= TICULAR PURPOSE=0A+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CON= TRIBUTORS BE LIABLE=0A+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, E= XEMPLARY, OR CONSEQUENTIAL=0A+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, P= ROCUREMENT OF SUBSTITUTE GOODS=0A+ * OR SERVICES; LOSS OF USE, DATA, OR PR= OFITS; OR BUSINESS INTERRUPTION)=0A+ * HOWEVER CAUSED AND ON ANY THEORY OF= LIABILITY, WHETHER IN CONTRACT, STRICT=0A+ * LIABILITY, OR TORT (INCLUDIN= G NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY=0A+ * OUT OF THE USE OF THIS= SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF=0A+ * SUCH DAMAGE.=0A+ *= /=0A+ =0A+ /*=0A+ * Driver for Marvell Integrated SDIO Host Controller.=0A= + * Works stable in DMA mode. PIO mode has problems with large data transf= ers=0A+ * (timeouts).=0A+ */=0A+ =0A+ #include =0A+ =0A+ #in= clude =0A+ #include =0A+ #include =0A= + #include =0A+ #include =0A+ #include =0A+ #include =0A+ #include =0A+ #include =0A+ #include =0A+ =0A+ #include = =0A+ #include =0A+ =0A+ #include =0A+ #inclu= de =0A+ =0A+ #include =0A+ #include =0A+ #include =0A+ #include =0A+ =0A+ #include =0A+ #include =0A+ =0A+ #include "mmcbr=5Fif.h"=0A+ =0A+ #include "mv=5Fsdio.h= "=0A+ =0A+ /* Minimum DMA segment size. */=0A+ #define MV=5FSDIO=5FDMA=5FSE= GMENT=5FSIZE 4096=0A+ =0A+ /* Transferred block size. */=0A+ #define MV=5FS= DIO=5FBLOCK=5FSIZE 512=0A+ =0A+ /* Maximum number of blocks the controller= can handle. */=0A+ #define MV=5FSDIO=5FBLOCKS=5FMAX 65535=0A+ =0A+ /* Hal= fword bit masks used for command response extraction. */=0A+ #define MV=5FS= DIO=5FRSP48=5FBM2 0x0002 /* Lower 2 bits. */=0A+ #define MV=5FSDIO=5FRSP48= =5FBM6 0x003f /* Lower 6 bits. */=0A+ #define MV=5FSDIO=5FRSP48=5FBM16 0xff= ff /* 16 bits */=0A+ =0A+ /* SDIO aggregated command interrupts */=0A+ #def= ine MV=5FSDIO=5FIRQS=5FCMD (MV=5FSDIO=5FIRQ=5FCMD | MV=5FSDIO=5FIRQ=5FUNEXP= ECTED=5FRSP)=0A+ #define MV=5FSDIO=5FEIRQS=5FCMD (MV=5FSDIO=5FEIRQ=5FCMD=5F= TMO | MV=5FSDIO=5FEIRQ=5FCMD=5FCRC7 | \=0A+ MV=5FSDIO=5FEIRQ=5FCMD=5FEN= DBIT | MV=5FSDIO=5FEIRQ=5FCMD=5FINDEX | \=0A+ MV=5FSDIO=5FEIRQ=5FCMD=5F= STARTBIT | MV=5FSDIO=5FEIRQ=5FRSP=5FTBIT)=0A+ =0A+ /* SDIO aggregated data = interrupts */=0A+ #define MV=5FSDIO=5FIRQS=5FDATA (MV=5FSDIO=5FIRQ=5FXFER |= MV=5FSDIO=5FIRQ=5FTX=5FEMPTY | \=0A+ MV=5FSDIO=5FIRQ=5FRX=5FFULL | MV= =5FSDIO=5FIRQ=5FDMA | MV=5FSDIO=5FIRQ=5FAUTOCMD12)=0A+ #define MV=5FSDIO=5F= EIRQS=5FDATA (MV=5FSDIO=5FEIRQ=5FDATA=5FTMO | \=0A+ MV=5FSDIO=5FEIRQ=5F= DATA=5FCRC16 | MV=5FSDIO=5FEIRQ=5FDATA=5FENDBIT | \=0A+ MV=5FSDIO=5FEIR= Q=5FAUTOCMD12 | MV=5FSDIO=5FEIRQ=5FXFER=5FSIZE | \=0A+ MV=5FSDIO=5FEIRQ= =5FCRC=5FENDBIT | MV=5FSDIO=5FEIRQ=5FCRC=5FSTARTBIT | \=0A+ MV=5FSDIO= =5FEIRQ=5FCRC=5FSTAT)=0A+ =0A+ /*=0A+ * Timing configuration.=0A+ */=0A+ = =0A+ /* SDIO controller base clock frequency. */=0A+ #define MV=5FSDIO=5FF= =5FBASE 100000000 /* 200 MHz */=0A+ =0A+ /* Maximum SD clock frequency. = */=0A+ #define MV=5FSDIO=5FF=5FMAX (MV=5FSDIO=5FF=5FBASE / 2) /* 50 MHz *= /=0A+ =0A+ /* Maximum timeout value. */=0A+ #define MV=5FSDIO=5FTMO=5FMAX = 0xf=0A+ =0A+ /* Reset delay in microseconds. */=0A+ #define MV=5FSDIO=5FRE= SET=5FDELAY 10000 /* 10 ms */=0A+ =0A+ /* Empty FIFO polling delay. */=0A+= #define MV=5FSDIO=5FFIFO=5FEMPTY=5FDELAY 1000 /* 1 ms */=0A+ =0A+ /* Delay= s between operations on multiple blocks. */=0A+ #define MV=5FSDIO=5FRD=5FDE= LAY 50 /*50*/ /* Read access time. */=0A+ #define MV=5FSDIO=5FWR=5FDELAY = 10 /*10*/ /* Write access time. */=0A+ =0A+ /* Maximum clock divider value.= */=0A+ #define MV=5FSDIO=5FCLK=5FDIV=5FMAX 0x7ff=0A+ =0A+ /*=0A+ * Platf= orm-dependent pins =0A+ */=0A+ /* Card-Detect Pin */=0A+ #define MV=5FSDIO= =5FCARD=5FDETECT=5FPIN 29=0A+ =0A+ /* Pin that connects the SD-Card-Port Pi= ns to the processor */=0A+ #define MV=5FSDIO=5FOPENRD=5FMUX=5FPIN 34=0A+ = =0A+ struct mv=5Fsdio=5Fsoftc {=0A+ device=5Ft sc=5Fdev;=0A+ device=5Ft = sc=5Fchild;=0A+ =0A+ bus=5Fspace=5Fhandle=5Ft sc=5Fbsh;=0A+ bus=5Fspace= =5Ftag=5Ft sc=5Fbst;=0A+ =0A+ int sc=5Fuse=5Fdma;=0A+ bus=5Fdma=5Ftag= =5Ft sc=5Fdmatag;=0A+ bus=5Fdmamap=5Ft sc=5Fdmamap;=0A+ uint8=5Ft *sc= =5Fdmamem;=0A+ bus=5Faddr=5Ft sc=5Fphysaddr;=0A+ int sc=5Fmapped;=0A+ = size=5Ft sc=5Fdma=5Fsize;=0A+ =0A+ struct resource *sc=5Fmem=5Fres;=0A= + int sc=5Fmem=5Frid;=0A+ =0A+ struct resource *sc=5Firq=5Fres;=0A+ i= nt sc=5Firq=5Frid;=0A+ void *sc=5Fihl;=0A+ =0A+ struct resource *sc= =5Fcd=5Firq=5Fres;=0A+ int sc=5Fcd=5Firq=5Frid;=0A+ void *sc=5Fcd=5Fi= hl;=0A+ =0A+ uint32=5Ft sc=5Firq=5Fmask;=0A+ uint32=5Ft sc=5Feirq=5Fmas= k;=0A+ =0A+ struct task sc=5Fcard=5Ftask;=0A+ struct callout sc=5Fcard= =5Fcallout;=0A+ =0A+ struct mtx sc=5Fmtx;=0A+ =0A+ int sc=5Fbus=5Fbusy= ;=0A+ int sc=5Fcard=5Fpresent;=0A+ struct mmc=5Fhost sc=5Fhost;=0A+ s= truct mmc=5Frequest *sc=5Freq;=0A+ struct mmc=5Fcommand *sc=5Fcurcmd;=0A+ = =0A+ uint32=5Ft sc=5Fdata=5Foffset;=0A+ };=0A+ =0A+ /* Read/write data fr= om/to registers.*/=0A+ static uint32=5Ft MV=5FSDIO=5FRD4(struct mv=5Fsdio= =5Fsoftc *, bus=5Fsize=5Ft);=0A+ static void MV=5FSDIO=5FWR4(struct mv=5Fsd= io=5Fsoftc *, bus=5Fsize=5Ft, uint32=5Ft);=0A+ =0A+ static int mv=5Fsdio=5F= probe(device=5Ft);=0A+ static int mv=5Fsdio=5Fattach(device=5Ft);=0A+ =0A+ = static int mv=5Fsdio=5Fread=5Fivar(device=5Ft, device=5Ft, int, uintptr=5Ft= *);=0A+ static int mv=5Fsdio=5Fwrite=5Fivar(device=5Ft, device=5Ft, int, u= intptr=5Ft);=0A+ =0A+ static int mv=5Fsdio=5Fupdate=5Fios(device=5Ft, devic= e=5Ft);=0A+ static int mv=5Fsdio=5Frequest(device=5Ft, device=5Ft, struct m= mc=5Frequest *);=0A+ static int mv=5Fsdio=5Fget=5Fro(device=5Ft, device=5Ft= );=0A+ static int mv=5Fsdio=5Facquire=5Fhost(device=5Ft, device=5Ft);=0A+ s= tatic int mv=5Fsdio=5Frelease=5Fhost(device=5Ft, device=5Ft);=0A+ =0A+ /* F= inalizes active MMC request. */=0A+ static void mv=5Fsdio=5Ffinalize=5Frequ= est(struct mv=5Fsdio=5Fsoftc *);=0A+ =0A+ /* Initializes controller's regis= ters. */=0A+ static void mv=5Fsdio=5Finit(device=5Ft);=0A+ =0A+ /* Initiali= zes host structure. */=0A+ static void mv=5Fsdio=5Finit=5Fhost(struct mv=5F= sdio=5Fsoftc *);=0A+ =0A+ /* Used to add and handle sysctls. */=0A+ static = void mv=5Fsdio=5Fadd=5Fsysctls(struct mv=5Fsdio=5Fsoftc *);=0A+ static int = mv=5Fsdio=5Fsysctl=5Fuse=5Fdma(SYSCTL=5FHANDLER=5FARGS);=0A+ =0A+ /* DMA in= itialization and cleanup functions. */=0A+ static int mv=5Fsdio=5Fdma=5Fini= t(struct mv=5Fsdio=5Fsoftc *);=0A+ static void mv=5Fsdio=5Fdma=5Ffinish(str= uct mv=5Fsdio=5Fsoftc *);=0A+ =0A+ /* DMA map load callback. */=0A+ static = void mv=5Fsdio=5Fgetaddr(void *, bus=5Fdma=5Fsegment=5Ft *, int, int);=0A+ = =0A+ /* Prepare command/data before transaction. */=0A+ static int mv=5Fsdi= o=5Fstart=5Fcommand(struct mv=5Fsdio=5Fsoftc *, struct=0A+ mmc=5Fcomman= d *);=0A+ static int mv=5Fsdio=5Fstart=5Fdata(struct mv=5Fsdio=5Fsoftc *, s= truct mmc=5Fdata *);=0A+ =0A+ /* Finish command after transaction. */=0A+ s= tatic void mv=5Fsdio=5Ffinish=5Fcommand(struct mv=5Fsdio=5Fsoftc *);=0A+ = =0A+ /* Response handling. */=0A+ static void mv=5Fsdio=5Fhandle=5F136bit= =5Fresp(struct mv=5Fsdio=5Fsoftc *);=0A+ static void mv=5Fsdio=5Fhandle=5F4= 8bit=5Fresp(struct mv=5Fsdio=5Fsoftc *,=0A+ struct mmc=5Fcommand *);=0A= + =0A+ /* Interrupt handler and interrupt helper functions. */=0A+ static v= oid mv=5Fsdio=5Fintr(void *);=0A+ static void mv=5Fsdio=5Fcmd=5Fintr(struct= mv=5Fsdio=5Fsoftc *, uint32=5Ft, uint32=5Ft);=0A+ static void mv=5Fsdio=5F= data=5Fintr(struct mv=5Fsdio=5Fsoftc *, uint32=5Ft, uint32=5Ft);=0A+ static= void mv=5Fsdio=5Fcd=5Fintr(void *);=0A+ static void mv=5Fsdio=5Fdisable=5F= intr(struct mv=5Fsdio=5Fsoftc *);=0A+ =0A+ /* Used after card detect interr= upt has been handled. */=0A+ static void mv=5Fsdio=5Fcard=5Fdelay(void *);= =0A+ static void mv=5Fsdio=5Fcard=5Ftask(void *, int);=0A+ =0A+ /* Read/wri= te data from FIFO in PIO mode. */=0A+ static uint32=5Ft mv=5Fsdio=5Fread=5F= fifo(struct mv=5Fsdio=5Fsoftc *);=0A+ static void mv=5Fsdio=5Fwrite=5Ffifo(= struct mv=5Fsdio=5Fsoftc *, uint32=5Ft);=0A+ =0A+ /*=0A+ * PIO mode handli= ng.=0A+ *=0A+ * Inspired by sdhci(4) driver routines.=0A+ */=0A+ static = void mv=5Fsdio=5Ftransfer=5Fpio(struct mv=5Fsdio=5Fsoftc *);=0A+ static voi= d mv=5Fsdio=5Fread=5Fblock=5Fpio(struct mv=5Fsdio=5Fsoftc *);=0A+ static vo= id mv=5Fsdio=5Fwrite=5Fblock=5Fpio(struct mv=5Fsdio=5Fsoftc *);=0A+ =0A+ = =0A+ static device=5Fmethod=5Ft mv=5Fsdio=5Fmethods[] =3D {=0A+ /* device= =5Fif */=0A+ DEVMETHOD(device=5Fprobe, mv=5Fsdio=5Fprobe),=0A+ DEVMETHOD(= device=5Fattach, mv=5Fsdio=5Fattach),=0A+ =0A+ /* Bus interface */=0A+ DE= VMETHOD(bus=5Fread=5Fivar, mv=5Fsdio=5Fread=5Fivar),=0A+ DEVMETHOD(bus=5Fw= rite=5Fivar, mv=5Fsdio=5Fwrite=5Fivar),=0A+ =0A+ /* mmcbr=5Fif */=0A+ DEV= METHOD(mmcbr=5Fupdate=5Fios, mv=5Fsdio=5Fupdate=5Fios),=0A+ DEVMETHOD(mmcb= r=5Frequest, mv=5Fsdio=5Frequest),=0A+ DEVMETHOD(mmcbr=5Fget=5Fro, mv=5Fsd= io=5Fget=5Fro),=0A+ DEVMETHOD(mmcbr=5Facquire=5Fhost, mv=5Fsdio=5Facquire= =5Fhost),=0A+ DEVMETHOD(mmcbr=5Frelease=5Fhost, mv=5Fsdio=5Frelease=5Fhost= ),=0A+ =0A+ {0, 0},=0A+ };=0A+ =0A+ static driver=5Ft mv=5Fsdio=5Fdriver = =3D {=0A+ "sdio",=0A+ mv=5Fsdio=5Fmethods,=0A+ sizeof(struct mv=5Fsdio= =5Fsoftc),=0A+ };=0A+ static devclass=5Ft mv=5Fsdio=5Fdevclass;=0A+ =0A+ DR= IVER=5FMODULE( sdio, simplebus, mv=5Fsdio=5Fdriver, mv=5Fsdio=5Fdevclass, 0= , 0);=0A+ =0A+ =0A+ static =5F=5Finline uint32=5Ft=0A+ MV=5FSDIO=5FRD4(stru= ct mv=5Fsdio=5Fsoftc *sc, bus=5Fsize=5Ft off)=0A+ {=0A+ =0A+ return (bus= =5Fread=5F4(sc->sc=5Fmem=5Fres, off));=0A+ }=0A+ =0A+ static =5F=5Finline v= oid=0A+ MV=5FSDIO=5FWR4(struct mv=5Fsdio=5Fsoftc *sc, bus=5Fsize=5Ft off, u= int32=5Ft val)=0A+ {=0A+ =0A+ bus=5Fwrite=5F4(sc->sc=5Fmem=5Fres, off, val= );=0A+ }=0A+ =0A+ static int platform=5Fsdio=5Fslot=5Fsignal( int signal )= =0A+ {=0A+ #ifdef MV=5FSDIO=5FOPENRD=5FMUX=5FPIN =0A+ uint32=5Ft gpio=5Fr= ead =3D 0;=0A+ #endif /* MV=5FSDIO=5FOPENRD=5FMUX=5FPIN */=0A+ =0A+ sw= itch( signal )=0A+ {=0A+ case MV=5FSDIO=5FSIG=5FCD:=0A+ {=0A+ #if= ndef MV=5FSDIO=5FOPENRD=5FMUX=5FPIN =0A+ return -1;=0A+ #else=0A+ = gpio=5Fread =3D mv=5Fgpio=5Fin(MV=5FSDIO=5FCARD=5FDETECT=5FPIN);=0A+ = =0A+ if( 0 =3D=3D gpio=5Fread )=0A+ {=0A+ retu= rn 0;=0A+ }=0A+ else=0A+ {=0A+ return 1;=0A+ = }=0A+ #endif /* MV=5FSDIO=5FOPENRD=5FMUX=5FPIN */=0A+ break;=0A+ = }=0A+ case MV=5FSDIO=5FSIG=5FWP:=0A+ return 0;=0A+ break= ;=0A+ default:=0A+ return -1;=0A+ break;=0A+ }=0A+ =0A+= return 0;=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Fprobe(device=5Ft dev= )=0A+ {=0A+ uint32=5Ft device, revision;=0A+ =0A+ /*device=5Fprintf(de= v,"SDIO probe!\n");*/=0A+ =0A+ if (!ofw=5Fbus=5Fis=5Fcompatible(dev, "m= rvl,sdio"))=0A+ return (ENXIO);=0A+ =0A+ =0A+ soc=5Fid(&device, &revisio= n);=0A+ =0A+ switch (device) {=0A+ case MV=5FDEV=5F88F6281:=0A+ break;= =0A+ default:=0A+ printf("ENXIO!\n");=0A+ return (ENXIO);=0A+ }=0A+= =0A+ device=5Fset=5Fdesc(dev, "Marvell Integrated SDIO Host Controller");= =0A+ =0A+ return (BUS=5FPROBE=5FSPECIFIC);=0A+ }=0A+ =0A+ static int=0A+ m= v=5Fsdio=5Fattach(device=5Ft dev)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;= =0A+ int task=5Finitialized =3D 0;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(d= ev);=0A+ sc->sc=5Fdev =3D dev;=0A+ =0A+ mtx=5Finit(&sc->sc=5Fmtx, device= =5Fget=5Fnameunit(dev), NULL, MTX=5FDEF);=0A+ =0A+ /* Allocate memory and = interrupt resources. */=0A+ sc->sc=5Fmem=5Frid =3D 0;=0A+ sc->sc=5Fmem=5F= res =3D bus=5Falloc=5Fresource=5Fany(dev, SYS=5FRES=5FMEMORY,=0A+ &sc-= >sc=5Fmem=5Frid, RF=5FACTIVE);=0A+ =0A+ if (sc->sc=5Fmem=5Fres =3D=3D NULL= ) {=0A+ device=5Fprintf(dev, "Could not allocate memory!\n");=0A+ goto = fail;=0A+ }=0A+ =0A+ sc->sc=5Firq=5Frid =3D 0;=0A+ sc->sc=5Firq=5Fres = =3D bus=5Falloc=5Fresource=5Fany(dev, SYS=5FRES=5FIRQ,=0A+ &sc->sc=5Fi= rq=5Frid, RF=5FACTIVE);=0A+ =0A+ if (sc->sc=5Firq=5Fres =3D=3D NULL) {=0A+= device=5Fprintf(dev, "Could not allocate IRQ!\n");=0A+ goto fail;=0A+ = }=0A+ =0A+ sc->sc=5Fbst =3D rman=5Fget=5Fbustag(sc->sc=5Fmem=5Fres);=0A+ = sc->sc=5Fbsh =3D rman=5Fget=5Fbushandle(sc->sc=5Fmem=5Fres);=0A+ =0A+ = =0A+ /* Initialize host controller's registers. */=0A+ mv=5Fsdio=5Finit(d= ev);=0A+ =0A+ /* Try to setup DMA. */=0A+ sc->sc=5Fmapped =3D 0; /* No DM= A buffer is mapped. */=0A+ sc->sc=5Fuse=5Fdma =3D 1; /* DMA mode is prefer= red to PIO mode. */=0A+ =0A+ if (mv=5Fsdio=5Fdma=5Finit(sc) < 0) {=0A+ d= evice=5Fprintf(dev, "Falling back to PIO mode.\n");=0A+ sc->sc=5Fuse=5Fdm= a =3D 0;=0A+ }=0A+ =0A+ /* Add sysctls. */=0A+ mv=5Fsdio=5Fadd=5Fsysctls= (sc);=0A+ =0A+ #ifdef MV=5FSDIO=5FOPENRD=5FMUX=5FPIN=0A+ =0A+ /* Set Pi= n 34 to 1, to forward SD-Card Pins to processor */=0A+ mv=5Fgpio=5Fout( M= V=5FSDIO=5FOPENRD=5FMUX=5FPIN, /* uint32=5Ft pin*/=0A+ 1, /*= uint8=5Ft val,*/=0A+ 1 /*uint8=5Ft enable*/);=0A+ =0A+ #end= if /* MV=5FSDIO=5FOPENRD=5FMUX=5FPIN */=0A+ =0A+ if (platform=5Fsdio=5Fslo= t=5Fsignal(MV=5FSDIO=5FSIG=5FCD) !=3D -1) {=0A+ =0A+ #ifdef MV=5FSDIO=5FOPE= NRD=5FMUX=5FPIN =0A+ =0A+ /* Register IRQ-handler for pin in GPIO-f= ramework */=0A+ if( 0 !=3D mv=5Fgpio=5Fsetup=5Fintrhandler( "Card detec= t IRQ", /* name */=0A+ N= ULL, /*driver=5Ffilter=5Ft *filt*/=0A+ = mv=5Fsdio=5Fcd=5Fintr, /*void (*ha= nd)(void *)*/=0A+ sc, = /*void *arg*/=0A+ MV= =5FSDIO=5FCARD=5FDETECT=5FPIN, /*int pin*/=0A+ = INTR=5FTYPE=5FMISC | INTR=5FMPSAFE, /*int flags*/ =0A+ = &sc->sc=5Fcd=5Fihl /*vo= id **cookiep*/) )=0A+ {=0A+ device=5Fprintf(dev, "mv=5Fgpio=5Fset= up=5Fintrhandler failed!\n");=0A+ goto fail;=0A+ }=0A+ =0A+ = /* Activate IRQ for Pin 29 */=0A+ mv=5Fgpio=5Fintr=5Funmask(MV=5FSDIO= =5FCARD=5FDETECT=5FPIN);=0A+ =0A+ #endif /* MV=5FSDIO=5FOPENRD=5FMUX=5FPIN = */=0A+ =0A+ =0A+ /* Check if card is present in the slot. */=0A+ if (pl= atform=5Fsdio=5Fslot=5Fsignal(MV=5FSDIO=5FSIG=5FCD) =3D=3D 1)=0A+ sc->sc= =5Fcard=5Fpresent =3D 1;=0A+ }=0A+ =0A+ TASK=5FINIT(&sc->sc=5Fcard=5Ftask= , 0, mv=5Fsdio=5Fcard=5Ftask, sc);=0A+ callout=5Finit(&sc->sc=5Fcard=5Fcal= lout, 1);=0A+ task=5Finitialized =3D 1;=0A+ =0A+ /* Setup interrupt. */= =0A+ if (bus=5Fsetup=5Fintr(dev, sc->sc=5Firq=5Fres, INTR=5FTYPE=5FMISC |= =0A+ INTR=5FMPSAFE, NULL, mv=5Fsdio=5Fintr, sc, &sc->sc=5Fihl) !=3D 0)= {=0A+ device=5Fprintf(dev, "Could not setup interrupt!\n");=0A+ goto f= ail;=0A+ }=0A+ =0A+ /* Host can be acquired. */=0A+ sc->sc=5Fbus=5Fbusy = =3D 0;=0A+ =0A+ /*=0A+ * Attach MMC bus only if the card is in the slot = or card detect is=0A+ * not supported on the platform.=0A+ */=0A+ if (= (platform=5Fsdio=5Fslot=5Fsignal(MV=5FSDIO=5FSIG=5FCD) =3D=3D -1) ||=0A+ = sc->sc=5Fcard=5Fpresent) {=0A+ sc->sc=5Fchild =3D device=5Fadd=5Fchild= (dev, "mmc", -1);=0A+ =0A+ if (sc->sc=5Fchild =3D=3D NULL) {=0A+ devic= e=5Fprintf(dev, "Could not add MMC bus!\n");=0A+ goto fail;=0A+ }=0A+ = =0A+ /* Initialize host structure for MMC bus. */=0A+ mv=5Fsdio=5Finit= =5Fhost(sc);=0A+ =0A+ device=5Fset=5Fivars(sc->sc=5Fchild, &sc->sc=5Fhost= );=0A+ }=0A+ =0A+ return (bus=5Fgeneric=5Fattach(dev));=0A+ =0A+ fail:=0A= + mv=5Fsdio=5Fdma=5Ffinish(sc);=0A+ if (task=5Finitialized) {=0A+ callo= ut=5Fdrain(&sc->sc=5Fcard=5Fcallout);=0A+ taskqueue=5Fdrain(taskqueue=5Fs= wi, &sc->sc=5Fcard=5Ftask);=0A+ }=0A+ if (sc->sc=5Fihl !=3D NULL)=0A+ b= us=5Fteardown=5Fintr(dev, sc->sc=5Firq=5Fres, sc->sc=5Fihl);=0A+ if (sc->s= c=5Fcd=5Fihl !=3D NULL)=0A+ bus=5Fteardown=5Fintr(dev, sc->sc=5Fcd=5Firq= =5Fres, sc->sc=5Fcd=5Fihl);=0A+ if (sc->sc=5Firq=5Fres !=3D NULL)=0A+ bu= s=5Frelease=5Fresource(dev, SYS=5FRES=5FIRQ, sc->sc=5Firq=5Frid,=0A+ = sc->sc=5Firq=5Fres);=0A+ if (sc->sc=5Fcd=5Firq=5Fres !=3D NULL)=0A+ bus= =5Frelease=5Fresource(dev, SYS=5FRES=5FIRQ, sc->sc=5Fcd=5Firq=5Frid,=0A+ = sc->sc=5Fcd=5Firq=5Fres);=0A+ if (sc->sc=5Fmem=5Fres !=3D NULL)=0A+ = bus=5Frelease=5Fresource(dev, SYS=5FRES=5FMEMORY, sc->sc=5Fmem=5Frid,=0A+ = sc->sc=5Fmem=5Fres);=0A+ mtx=5Fdestroy(&sc->sc=5Fmtx);=0A+ return (E= NXIO);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Fupdate=5Fios(device=5Ft br= dev, device=5Ft reqdev)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;=0A+ struc= t mmc=5Fhost *host;=0A+ struct mmc=5Fios *ios;=0A+ uint32=5Ft xfer, clk= =5Fdiv, host=5Fcr;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(brdev);=0A+ host = =3D device=5Fget=5Fivars(reqdev);=0A+ ios =3D &host->ios;=0A+ =0A+ mtx=5F= lock(&sc->sc=5Fmtx);=0A+ =0A+ if (ios->power=5Fmode =3D=3D power=5Foff)=0A= + /* Re-initialize the controller. */=0A+ mv=5Fsdio=5Finit(brdev);=0A+ = =0A+ xfer =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FXFER);=0A+ =0A+ if (ios->cl= ock =3D=3D 0) {=0A+ /* Disable clock. */=0A+ xfer |=3D MV=5FSDIO=5FXFER= =5FSTOP=5FCLK;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FXFER, xfer);=0A+ =0A+ = /* Set maximum clock divider. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCL= K=5FDIV, MV=5FSDIO=5FCLK=5FDIV=5FMAX);=0A+ } else {=0A+ /*=0A+ * Calc= ulate and set clock divider.=0A+ * Clock rate value is:=0A+ * clo= ck =3D MV=5FSDIO=5FF=5FBASE / (clk=5Fdiv + 1)=0A+ * Thus we calculate th= e divider value as:=0A+ * clk=5Fdiv =3D (MV=5FSDIO=5FF=5FBASE / cloc= k) - 1=0A+ */=0A+ clk=5Fdiv =3D (MV=5FSDIO=5FF=5FBASE / ios->clock) - = 1;=0A+ if (clk=5Fdiv > MV=5FSDIO=5FCLK=5FDIV=5FMAX)=0A+ clk=5Fdiv =3D = MV=5FSDIO=5FCLK=5FDIV=5FMAX;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCLK=5FDI= V, clk=5Fdiv);=0A+ =0A+ /* Enable clock. */=0A+ xfer &=3D ~MV=5FSDI= O=5FXFER=5FSTOP=5FCLK;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FXFER, xfer);= =0A+ }=0A+ =0A+ host=5Fcr =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FHOST=5FCR);= =0A+ =0A+ /* Set card type. */=0A+ if (host->mode =3D=3D mode=5Fmmc)=0A+ = host=5Fcr |=3D MV=5FSDIO=5FHOST=5FCR=5FMMC; /* MMC card. */=0A+ else=0A= + host=5Fcr &=3D ~MV=5FSDIO=5FHOST=5FCR=5FMMC; /* SD card. */=0A+ =0A+ /= * Set bus width. */=0A+ if (ios->bus=5Fwidth =3D=3D bus=5Fwidth=5F4)=0A+ = host=5Fcr |=3D MV=5FSDIO=5FHOST=5FCR=5F4BIT; /* 4-bit bus width */=0A+ el= se=0A+ host=5Fcr &=3D ~MV=5FSDIO=5FHOST=5FCR=5F4BIT; /* 1-bit bus width *= /=0A+ =0A+ /* Set high/normal speed mode. */=0A+ #if 0 /* Some cards have = problems with the highspeed-mode =0A+ * Not selecting High-Speed mod= e enables all cards to work=0A+ */=0A+ =0A+ if ((ios->timing =3D= =3D bus=5Ftiming=5Fhs ) && ( 1 =3D=3D 0 ) )=0A+ host=5Fcr |=3D MV=5FSDIO= =5FHOST=5FCR=5FHIGHSPEED;=0A+ else=0A+ #endif=0A+ host=5Fcr &=3D ~MV=5FS= DIO=5FHOST=5FCR=5FHIGHSPEED;=0A+ =0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FHOST= =5FCR, host=5Fcr);=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ =0A+ return = (0);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Frequest(device=5Ft brdev, de= vice=5Ft reqdev, struct mmc=5Frequest *req)=0A+ {=0A+ struct mv=5Fsdio=5Fs= oftc *sc;=0A+ int rv;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(brdev);=0A+ r= v =3D EBUSY;=0A+ =0A+ mtx=5Flock(&sc->sc=5Fmtx);=0A+ =0A+ if (sc->sc=5Fre= q !=3D NULL) {=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ return (rv);=0A+ }= =0A+ =0A+ sc->sc=5Freq =3D req;=0A+ /*=0A+ device=5Fprintf(sc->sc=5Fdev,= "cmd %d (hw state 0x%04x)\n",=0A+ req->cmd->opcode , MV=5FSDIO= =5FRD4( sc, MV=5FSDIO=5FHOST=5FSR ) );=0A+ */=0A+ rv =3D mv=5Fsdio=5Fstart= =5Fcommand(sc, req->cmd);=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ =0A+ = return (rv);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Fget=5Fro(device=5Ft = brdev, device=5Ft reqdev)=0A+ {=0A+ int rv;=0A+ =0A+ /* Check if card is = read only. */=0A+ rv =3D platform=5Fsdio=5Fslot=5Fsignal(MV=5FSDIO=5FSIG= =5FWP);=0A+ =0A+ /*=0A+ * Assume that card is not write protected, when = platform doesn't=0A+ * support WP signal.=0A+ */=0A+ if (rv < 0)=0A+ = rv =3D 0;=0A+ =0A+ return (rv);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio= =5Facquire=5Fhost(device=5Ft brdev, device=5Ft reqdev)=0A+ {=0A+ struct mv= =5Fsdio=5Fsoftc *sc;=0A+ int rv;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(brd= ev);=0A+ rv =3D 0;=0A+ =0A+ mtx=5Flock(&sc->sc=5Fmtx);=0A+ while (sc->sc= =5Fbus=5Fbusy)=0A+ rv =3D mtx=5Fsleep(sc, &sc->sc=5Fmtx, PZERO, "sdioah",= 0);=0A+ sc->sc=5Fbus=5Fbusy++;=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ =0A+= return (rv);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Frelease=5Fhost(dev= ice=5Ft brdev, device=5Ft reqdev)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;= =0A+ =0A+ sc =3D device=5Fget=5Fsoftc(brdev);=0A+ =0A+ mtx=5Flock(&sc->sc= =5Fmtx);=0A+ sc->sc=5Fbus=5Fbusy--;=0A+ wakeup(sc);=0A+ mtx=5Funlock(&sc= ->sc=5Fmtx);=0A+ =0A+ return (0);=0A+ }=0A+ =0A+ static void=0A+ mv=5Fsdio= =5Ffinalize=5Frequest(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ struct mmc= =5Frequest *req;=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWNED);=0A+ =0A= + req =3D sc->sc=5Freq;=0A+ =0A+ if (req) {=0A+ /* Finalize active requ= est. */=0A+ /*device=5Fprintf(sc->sc=5Fdev, "Finalize request %i\n",req= ->cmd->opcode);*/=0A+ sc->sc=5Freq =3D NULL;=0A+ sc->sc=5Fcurcmd =3D NU= LL;=0A+ req->done(req);=0A+ =0A+ =0A+ } else=0A+ device=5Fprin= tf(sc->sc=5Fdev, "No active request to finalize!\n");=0A+ }=0A+ =0A+ static= void=0A+ mv=5Fsdio=5Finit(device=5Ft dev)=0A+ {=0A+ struct mv=5Fsdio=5Fso= ftc *sc;=0A+ uint32=5Ft host=5Fcr;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(d= ev);=0A+ =0A+ /* Disable interrupts. */=0A+ sc->sc=5Firq=5Fmask =3D 0;=0A= + sc->sc=5Feirq=5Fmask =3D 0;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FE= N, sc->sc=5Firq=5Fmask);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ=5FEN, sc= ->sc=5Feirq=5Fmask);=0A+ =0A+ /* Clear interrupt status registers. */=0A+ = MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FSR, MV=5FSDIO=5FIRQ=5FALL);=0A+ MV= =5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ=5FSR, MV=5FSDIO=5FEIRQ=5FALL);=0A+ =0A+ = /* Enable interrupt status registers. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDI= O=5FIRQ=5FSR=5FEN, MV=5FSDIO=5FIRQ=5FALL);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSD= IO=5FEIRQ=5FSR=5FEN, MV=5FSDIO=5FEIRQ=5FALL);=0A+ =0A+ /* Initialize Host = Control Register. */=0A+ host=5Fcr =3D (MV=5FSDIO=5FHOST=5FCR=5FPUSHPULL |= MV=5FSDIO=5FHOST=5FCR=5FBE |=0A+ MV=5FSDIO=5FHOST=5FCR=5FTMOV= AL(MV=5FSDIO=5FTMO=5FMAX) | MV=5FSDIO=5FHOST=5FCR=5FTMO);=0A+ =0A+ MV=5FSD= IO=5FWR4(sc, MV=5FSDIO=5FHOST=5FCR, host=5Fcr);=0A+ =0A+ /* Stop clock and= reset Transfer Mode Register. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FXFER= , MV=5FSDIO=5FXFER=5FSTOP=5FCLK);=0A+ =0A+ /* Set maximum clock divider va= lue. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCLK=5FDIV, MV=5FSDIO=5FCLK=5FD= IV=5FMAX);=0A+ =0A+ /* Reset status, state machine and FIFOs synchronously= . */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FSW=5FRESET, MV=5FSDIO=5FSW=5FRESE= T=5FALL);=0A+ DELAY(MV=5FSDIO=5FRESET=5FDELAY);=0A+ }=0A+ =0A+ static = void=0A+ mv=5Fsdio=5Finit=5Fhost(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ s= truct mmc=5Fhost *host;=0A+ =0A+ host =3D &sc->sc=5Fhost;=0A+ =0A+ /* Cle= ar host structure. */=0A+ bzero(host, sizeof(struct mmc=5Fhost));=0A+ =0A+= /* Calculate minimum and maximum operating frequencies. */=0A+ host->f= =5Fmin =3D MV=5FSDIO=5FF=5FBASE / (MV=5FSDIO=5FCLK=5FDIV=5FMAX + 1);=0A+ h= ost->f=5Fmax =3D MV=5FSDIO=5FF=5FMAX;=0A+ =0A+ /* Set operation conditio= ns (voltage). */=0A+ host->host=5Focr =3D MMC=5FOCR=5F320=5F330 | MMC=5FOC= R=5F330=5F340;=0A+ =0A+ /* Set additional host controller capabilities. */= =0A+ host->caps =3D MMC=5FCAP=5F4=5FBIT=5FDATA | MMC=5FCAP=5FHSPEED;=0A+ }= =0A+ =0A+ static void=0A+ mv=5Fsdio=5Fadd=5Fsysctls(struct mv=5Fsdio=5Fsoft= c *sc)=0A+ {=0A+ struct sysctl=5Fctx=5Flist *ctx;=0A+ struct sysctl=5Foid= =5Flist *children;=0A+ struct sysctl=5Foid *tree;=0A+ =0A+ ctx =3D device= =5Fget=5Fsysctl=5Fctx(sc->sc=5Fdev);=0A+ children =3D SYSCTL=5FCHILDREN(de= vice=5Fget=5Fsysctl=5Ftree(sc->sc=5Fdev));=0A+ tree =3D SYSCTL=5FADD=5FNOD= E(ctx, children, OID=5FAUTO, "params",=0A+ CTLFLAG=5FRD, 0, "Driver pa= rameters");=0A+ children =3D SYSCTL=5FCHILDREN(tree);=0A+ =0A+ SYSCTL=5FA= DD=5FPROC(ctx, children, OID=5FAUTO, "use=5Fdma",=0A+ CTLTYPE=5FUINT |= CTLFLAG=5FRW, sc, 0, mv=5Fsdio=5Fsysctl=5Fuse=5Fdma,=0A+ "I", "Use DM= A for data transfers (0-1)");=0A+ }=0A+ =0A+ /*=0A+ * This sysctl allows s= witching between DMA and PIO modes for data transfers:=0A+ *=0A+ * dev.mv= =5Fsdio..params.use=5Fdma=0A+ *=0A+ * Values:=0A+ *=0A+ * - 1 set= s DMA mode=0A+ * - 0 sets PIO mode=0A+ *=0A+ * Driver uses DMA mode by d= efault.=0A+ */=0A+ static int=0A+ mv=5Fsdio=5Fsysctl=5Fuse=5Fdma(SYSCTL=5F= HANDLER=5FARGS)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;=0A+ uint32=5Ft us= e=5Fdma;=0A+ int error;=0A+ =0A+ sc =3D (struct mv=5Fsdio=5Fsoftc *)arg1;= =0A+ =0A+ use=5Fdma =3D sc->sc=5Fuse=5Fdma;=0A+ =0A+ error =3D sysctl=5Fh= andle=5Fint(oidp, &use=5Fdma, 0, req);=0A+ if (error !=3D 0 || req->newptr= =3D=3D NULL)=0A+ return (error);=0A+ =0A+ if (use=5Fdma > 1)=0A+ retu= rn (EINVAL);=0A+ =0A+ mtx=5Flock(&sc->sc=5Fmtx);=0A+ =0A+ /* Check if req= uested mode is already being used. */=0A+ if (sc->sc=5Fuse=5Fdma =3D=3D us= e=5Fdma) {=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ return (EPERM);=0A+ }= =0A+ =0A+ if (!(sc->sc=5Fmapped)) {=0A+ device=5Fprintf(sc->sc=5Fdev, "D= MA not initialized!\n");=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ return (E= NOMEM);=0A+ }=0A+ =0A+ /* Set new mode. */=0A+ sc->sc=5Fuse=5Fdma =3D us= e=5Fdma;=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ =0A+ return (0);=0A+ }= =0A+ =0A+ static void=0A+ mv=5Fsdio=5Fgetaddr(void *arg, bus=5Fdma=5Fsegmen= t=5Ft *segs, int nsegs, int error)=0A+ {=0A+ =0A+ if (error !=3D 0)=0A+ = return;=0A+ =0A+ /* Get first segment's physical address. */=0A+ *(bus=5F= addr=5Ft *)arg =3D segs->ds=5Faddr;=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio= =5Fdma=5Finit(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ device=5Ft dev;=0A+ = bus=5Fsize=5Ft dmabuf=5Fsize;=0A+ =0A+ dev =3D sc->sc=5Fdev;=0A+ dmabuf= =5Fsize =3D MAXPHYS;=0A+ =0A+ /* Create DMA tag. */=0A+ if (bus=5Fdma=5Ft= ag=5Fcreate(bus=5Fget=5Fdma=5Ftag(dev), /* parent */=0A+ MV=5FSDIO=5FD= MA=5FSEGMENT=5FSIZE, 0, /* alignment, boundary */=0A+ BUS=5FSPACE=5FMA= XADDR=5F32BIT, /* lowaddr */=0A+ BUS=5FSPACE=5FMAXADDR, /* highaddr= */=0A+ NULL, NULL, /* filtfunc, filtfuncarg */=0A+ MAXPHYS, 1= , /* maxsize, nsegments */=0A+ MAXPHYS, BUS=5FDMA=5FALLOCNOW, /* m= axsegsz, flags */=0A+ NULL, NULL, /* lockfunc, lockfuncarg */=0A+ = &sc->sc=5Fdmatag) !=3D 0) {=0A+ device=5Fprintf(dev, "Could not creat= e DMA tag!\n");=0A+ return (-1);=0A+ }=0A+ =0A+ /* Allocate DMA memory.= */=0A+ if (bus=5Fdmamem=5Falloc(sc->sc=5Fdmatag, (void **)&sc->sc=5Fdmame= m,=0A+ BUS=5FDMA=5FNOWAIT, &sc->sc=5Fdmamap) !=3D 0) {=0A+ device=5F= printf(dev, "Could not allocate DMA memory!\n");=0A+ mv=5Fsdio=5Fdma=5Ffi= nish(sc);=0A+ return (-1);=0A+ }=0A+ =0A+ /* Find the biggest available= DMA buffer size. */=0A+ while (bus=5Fdmamap=5Fload(sc->sc=5Fdmatag, sc->s= c=5Fdmamap,=0A+ (void *)sc->sc=5Fdmamem, dmabuf=5Fsize, mv=5Fsdio=5Fge= taddr,=0A+ &sc->sc=5Fphysaddr, 0) !=3D 0) {=0A+ dmabuf=5Fsize >>=3D = 1;=0A+ if (dmabuf=5Fsize < MV=5FSDIO=5FBLOCK=5FSIZE) {=0A+ device=5Fpr= intf(dev, "Could not load DMA map!\n");=0A+ mv=5Fsdio=5Fdma=5Ffinish(sc)= ;=0A+ return (-1);=0A+ }=0A+ }=0A+ =0A+ sc->sc=5Fmapped++;=0A+ sc->= sc=5Fdma=5Fsize =3D dmabuf=5Fsize;=0A+ =0A+ return (0);=0A+ }=0A+ =0A+ sta= tic void=0A+ mv=5Fsdio=5Fdma=5Ffinish(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {= =0A+ =0A+ /* Free DMA resources. */=0A+ if (sc->sc=5Fmapped) {=0A+ bus= =5Fdmamap=5Funload(sc->sc=5Fdmatag, sc->sc=5Fdmamap);=0A+ sc->sc=5Fmapped= --;=0A+ }=0A+ if (sc->sc=5Fdmamem !=3D NULL)=0A+ bus=5Fdmamem=5Ffree(sc= ->sc=5Fdmatag, sc->sc=5Fdmamem, sc->sc=5Fdmamap);=0A+ if (sc->sc=5Fdmamap = !=3D NULL)=0A+ bus=5Fdmamap=5Fdestroy(sc->sc=5Fdmatag, sc->sc=5Fdmamap);= =0A+ if (sc->sc=5Fdmatag !=3D NULL)=0A+ bus=5Fdma=5Ftag=5Fdestroy(sc->sc= =5Fdmatag);=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Fstart=5Fcommand(struc= t mv=5Fsdio=5Fsoftc *sc, struct mmc=5Fcommand *cmd)=0A+ {=0A+ struct mmc= =5Frequest *req;=0A+ uint32=5Ft cmdreg;=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fm= tx, MA=5FOWNED);=0A+ =0A+ req =3D sc->sc=5Freq;=0A+ =0A+ sc->sc=5Fcurcmd = =3D cmd;=0A+ =0A+ cmd->error =3D MMC=5FERR=5FNONE;=0A+ =0A+ /* Check if c= ard is in the slot. */=0A+ if ((platform=5Fsdio=5Fslot=5Fsignal(MV=5FSDIO= =5FSIG=5FCD) !=3D -1) &&=0A+ (sc->sc=5Fcard=5Fpresent =3D=3D 0)) {=0A+= cmd->error =3D MMC=5FERR=5FFAILED;=0A+ mv=5Fsdio=5Ffinalize=5Frequest(= sc);=0A+ return (-1);=0A+ }=0A+ =0A+ /* Check if clock is enabled. */= =0A+ if (MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FXFER) & MV=5FSDIO=5FXFER=5FSTOP= =5FCLK) {=0A+ cmd->error =3D MMC=5FERR=5FFAILED;=0A+ mv=5Fsdio=5Ffinali= ze=5Frequest(sc);=0A+ return (-1);=0A+ }=0A+ =0A+ /* Write command argu= ment. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCMD=5FARGL, cmd->arg & 0xffff= );=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCMD=5FARGH, cmd->arg >> 16);=0A+ = =0A+ /* Determine response type. */=0A+ if (cmd->flags & MMC=5FRSP=5F136)= =0A+ cmdreg =3D MV=5FSDIO=5FCMD=5FRSP=5F136;=0A+ else if (cmd->flags & M= MC=5FRSP=5FBUSY)=0A+ cmdreg =3D MV=5FSDIO=5FCMD=5FRSP=5F48=5FBUSY;=0A+ e= lse if (cmd->flags & MMC=5FRSP=5FPRESENT)=0A+ cmdreg =3D MV=5FSDIO=5FCMD= =5FRSP=5F48;=0A+ else {=0A+ /* No response. */=0A+ cmdreg =3D MV=5FSDI= O=5FCMD=5FRSP=5FNONE;=0A+ /* Enable host to detect unexpected response. *= /=0A+ cmdreg |=3D MV=5FSDIO=5FCMD=5FUNEXPECTED=5FRSP;=0A+ sc->sc=5Firq= =5Fmask |=3D MV=5FSDIO=5FCMD=5FUNEXPECTED=5FRSP;=0A+ }=0A+ =0A+ /* Check = command checksum if needed. */=0A+ if (cmd->flags & MMC=5FRSP=5FCRC)=0A+ = cmdreg |=3D MV=5FSDIO=5FCMD=5FCRC7;=0A+ /* Check command opcode if needed= . */=0A+ if (cmd->flags & MMC=5FRSP=5FOPCODE)=0A+ cmdreg |=3D MV=5FSDIO= =5FCMD=5FINDEX=5FCHECK;=0A+ =0A+ /* Set commannd opcode. */=0A+ cmdreg |= =3D MV=5FSDIO=5FCMD=5FINDEX(cmd->opcode);=0A+ =0A+ /* Setup interrupts. */= =0A+ sc->sc=5Firq=5Fmask =3D MV=5FSDIO=5FIRQ=5FCMD;=0A+ sc->sc=5Feirq=5Fm= ask =3D MV=5FSDIO=5FEIRQ=5FALL;=0A+ =0A+ /* Prepare data transfer. */=0A+ = if (cmd->data) {=0A+ cmdreg |=3D (MV=5FSDIO=5FCMD=5FDATA=5FPRESENT | MV= =5FSDIO=5FCMD=5FDATA=5FCRC16);=0A+ if (mv=5Fsdio=5Fstart=5Fdata(sc, cmd->= data) < 0) {=0A+ cmd->error =3D MMC=5FERR=5FFAILED;=0A+ printf("mv= =5Fsdio=5Fstart=5Fdata() failed!\n");=0A+ mv=5Fsdio=5Ffinalize=5Frequest= (sc);=0A+ return (-1);=0A+ }=0A+ }=0A+ =0A+ /* Write command registe= r. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FCMD, cmdreg);=0A+ =0A+ /* Clear= interrupt status. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FSR, ~MV=5F= SDIO=5FIRQ=5FCARD=5FEVENT /*MV=5FSDIO=5FIRQ=5FALL*/);=0A+ MV=5FSDIO=5FWR4(= sc, MV=5FSDIO=5FEIRQ=5FSR, 0xffff /*MV=5FSDIO=5FEIRQ=5FALL*/);=0A+ =0A+ /*= Update interrupt/error interrupt enable registers. */=0A+ MV=5FSDIO=5FWR4= (sc, MV=5FSDIO=5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ MV=5FSDIO=5FWR4(sc, M= V=5FSDIO=5FEIRQ=5FEN, sc->sc=5Feirq=5Fmask);=0A+ =0A+ /* Do not complete r= equest, interrupt handler will do this. */=0A+ return (0);=0A+ }=0A+ =0A+ = static void=0A+ mv=5Fsdio=5Ffinish=5Fcommand(struct mv=5Fsdio=5Fsoftc *sc)= =0A+ {=0A+ struct mmc=5Fcommand *cmd;=0A+ struct mmc=5Fdata *data;=0A+ = =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWNED);=0A+ =0A+ cmd =3D sc->sc=5Fc= urcmd;=0A+ data =3D cmd->data;=0A+ =0A+ /* Get response. */=0A+ if (cmd-= >flags & MMC=5FRSP=5FPRESENT) {=0A+ if(cmd->flags & MMC=5FRSP=5F136)=0A+ = /* 136-bit response. */=0A+ mv=5Fsdio=5Fhandle=5F136bit=5Fresp(sc);= =0A+ else=0A+ /* 48-bit response. */=0A+ mv=5Fsdio=5Fhandle=5F48bit= =5Fresp(sc, NULL);=0A+ }=0A+ =0A+ if (data) {=0A+ /*=0A+ * Disable c= ommand complete interrupt. It has already been=0A+ * handled.=0A+ */= =0A+ sc->sc=5Firq=5Fmask &=3D ~MV=5FSDIO=5FIRQ=5FCMD;=0A+ =0A+ /* Enabl= e XFER interrupt. */=0A+ sc->sc=5Firq=5Fmask |=3D MV=5FSDIO=5FIRQ=5FXFER;= =0A+ =0A+ /* Check which data interrupts we need to activate. */=0A+ if= (sc->sc=5Fuse=5Fdma)=0A+ /* DMA transaction. */=0A+ sc->sc=5Firq=5Fm= ask |=3D MV=5FSDIO=5FIRQ=5FDMA;=0A+ else if (data->flags & MMC=5FDATA=5FR= EAD)=0A+ /* Read transaction in PIO mode. */=0A+ sc->sc=5Firq=5Fmask = |=3D MV=5FSDIO=5FIRQ=5FRX=5FFULL;=0A+ else=0A+ /* Write transaction in= PIO mode. */=0A+ sc->sc=5Firq=5Fmask |=3D MV=5FSDIO=5FIRQ=5FTX=5FEMPTY;= =0A+ =0A+ /* Check if Auto-CMD12 interrupt will be needed. */=0A+ if (s= c->sc=5Freq->stop)=0A+ sc->sc=5Firq=5Fmask |=3D MV=5FSDIO=5FIRQ=5FAUTOCM= D12;=0A+ =0A+ /* Update interrupt enable register. */=0A+ MV=5FSDIO=5FW= R4(sc, MV=5FSDIO=5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ } else {=0A+ /* W= e're done. Disable interrupts and finalize request. */=0A+ mv=5Fsdio=5Fdi= sable=5Fintr(sc);=0A+ mv=5Fsdio=5Ffinalize=5Frequest(sc);=0A+ }=0A+ }=0A= + =0A+ static int=0A+ mv=5Fsdio=5Fstart=5Fdata(struct mv=5Fsdio=5Fsoftc *sc= , struct mmc=5Fdata *data)=0A+ {=0A+ struct mmc=5Fcommand *stop;=0A+ uint= 32=5Ft autocmd12reg, xfer, host=5Fsr;=0A+ size=5Ft blk=5Fsize, blk=5Fcount= ;=0A+ int retries;=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWNED);=0A+ = =0A+ /*=0A+ * No transfer can be started when FIFO=5FEMPTY bit in MV=5FS= DIO=5FHOST=5FSR=0A+ * is not set. This bit is sometimes not set instantly= after XFER=0A+ * interrupt has been asserted.=0A+ */=0A+ host=5Fsr = =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FHOST=5FSR);=0A+ =0A+ retries =3D 10;= =0A+ while (!(host=5Fsr & MV=5FSDIO=5FHOST=5FSR=5FFIFO=5FEMPTY)) {=0A+ i= f (retries =3D=3D 0)=0A+ return (-1);=0A+ retries--;=0A+ DELAY(MV=5F= SDIO=5FFIFO=5FEMPTY=5FDELAY);=0A+ host=5Fsr =3D MV=5FSDIO=5FRD4(sc, MV=5F= SDIO=5FHOST=5FSR);=0A+ }=0A+ =0A+ /* Clear data offset. */=0A+ sc->sc=5F= data=5Foffset =3D 0;=0A+ =0A+ /*=0A+ * Set block size. It can be less th= an or equal to MV=5FSDIO=5FBLOCK=5FSIZE=0A+ * bytes.=0A+ */=0A+ blk=5F= size =3D (data->len < MV=5FSDIO=5FBLOCK=5FSIZE) ? data->len :=0A+ MV= =5FSDIO=5FBLOCK=5FSIZE;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FBLK=5FSIZE, bl= k=5Fsize);=0A+ =0A+ /* Set block count. */=0A+ blk=5Fcount =3D (data->len= + MV=5FSDIO=5FBLOCK=5FSIZE - 1) / MV=5FSDIO=5FBLOCK=5FSIZE;=0A+ MV=5FSDIO= =5FWR4(sc, MV=5FSDIO=5FBLK=5FCOUNT, blk=5Fcount);=0A+ =0A+ /* We want to i= nitiate transfer by software. */=0A+ xfer =3D MV=5FSDIO=5FXFER=5FSW=5FWR= =5FEN;=0A+ =0A+ if (sc->sc=5Fuse=5Fdma) {=0A+ /* Synchronize before DMA = transfer. */=0A+ if (data->flags & MMC=5FDATA=5FREAD)=0A+ bus=5Fdmamap= =5Fsync(sc->sc=5Fdmatag, sc->sc=5Fdmamap,=0A+ BUS=5FDMASYNC=5FPREREA= D);=0A+ else {=0A+ memcpy(sc->sc=5Fdmamem, data->data, data->len);=0A+= bus=5Fdmamap=5Fsync(sc->sc=5Fdmatag, sc->sc=5Fdmamap,=0A+ BUS=5F= DMASYNC=5FPREWRITE);=0A+ }=0A+ =0A+ /* Write DMA buffer address registe= r. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FDMA=5FADDRL, sc->sc=5Fphysaddr = & 0xffff);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FDMA=5FADDRH, sc->sc=5Fphys= addr >> 16);=0A+ } else=0A+ /* Set PIO transfer mode. */=0A+ xfer |=3D= MV=5FSDIO=5FXFER=5FPIO;=0A+ =0A+ /*=0A+ * Prepare Auto-CMD12. This comm= and is automatically sent to the card=0A+ * by the host controller to sto= p multiple-block data transaction.=0A+ */=0A+ if (sc->sc=5Freq->stop) {= =0A+ stop =3D sc->sc=5Freq->stop;=0A+ =0A+ /* Set Auto-CMD12 argument. = */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FAUTOCMD12=5FARGL, stop->arg & 0xff= ff);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FAUTOCMD12=5FARGH, stop->arg >> 1= 6);=0A+ =0A+ /* Set Auto-CMD12 opcode. */=0A+ autocmd12reg =3D MV=5FSDI= O=5FAUTOCMD12=5FINDEX(stop->opcode);=0A+ =0A+ /* Check busy signal if nee= ded. */=0A+ if (stop->flags & MMC=5FRSP=5FBUSY)=0A+ autocmd12reg |=3D = MV=5FSDIO=5FAUTOCMD12=5FBUSY=5FCHECK;=0A+ /* Check Auto-CMD12 index. */= =0A+ if (stop->flags & MMC=5FRSP=5FOPCODE)=0A+ autocmd12reg |=3D MV=5F= SDIO=5FAUTOCMD12=5FINDEX=5FCHECK;=0A+ =0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO= =5FAUTOCMD12, autocmd12reg);=0A+ =0A+ xfer |=3D MV=5FSDIO=5FXFER=5FAUTOCM= D12;=0A+ }=0A+ =0A+ /* Change data direction. */=0A+ if (data->flags & M= MC=5FDATA=5FREAD)=0A+ xfer |=3D MV=5FSDIO=5FXFER=5FTO=5FHOST;=0A+ =0A+ /= * Write transfer mode register. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FXFE= R, xfer);=0A+ =0A+ return (0);=0A+ }=0A+ =0A+ static void=0A+ mv=5Fsdio=5F= handle=5F136bit=5Fresp(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ struct mmc= =5Fcommand *cmd;=0A+ uint32=5Ft resp[8];=0A+ uint32=5Ft base, extra;=0A+ = int i, j, off;=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWNED);=0A+ =0A+= cmd =3D sc->sc=5Fcurcmd;=0A+ =0A+ /* Collect raw response from the contr= oller. */=0A+ for (i =3D 0; i < 8; i++)=0A+ resp[i] =3D MV=5FSDIO=5FRD4(= sc, MV=5FSDIO=5FRSP(i));=0A+ =0A+ /* Response passed to MMC bus is shifted= by one byte. */=0A+ extra =3D 0;=0A+ for (i =3D 0, j =3D 7; i < 4; i++, = j -=3D 2) {=0A+ off =3D (i ? 0 : 2);=0A+ base =3D resp[j] | (resp[j - 1= ] << (16 - off));=0A+ cmd->resp[3 - i] =3D (base << (6 + off)) + extra;= =0A+ extra =3D base >> (26 - off);=0A+ }=0A+ }=0A+ =0A+ static void=0A+ = mv=5Fsdio=5Fhandle=5F48bit=5Fresp(struct mv=5Fsdio=5Fsoftc *sc, struct mmc= =5Fcommand *stop)=0A+ {=0A+ struct mmc=5Fcommand *cmd;=0A+ uint32=5Ft res= p[3], word;=0A+ uint8=5Ft *rp;=0A+ int i;=0A+ =0A+ mtx=5Fassert(&sc->sc= =5Fmtx, MA=5FOWNED);=0A+ =0A+ if (stop =3D=3D NULL)=0A+ cmd =3D sc->sc= =5Fcurcmd;=0A+ else=0A+ cmd =3D stop;=0A+ =0A+ /* Collect raw response = from the controller. */=0A+ for (i =3D 0; i < 3; i++) {=0A+ if (stop =3D= =3D NULL)=0A+ resp[i] =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FRSP(i));=0A+ = else=0A+ resp[i] =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FAUTOCMD12=5FRSP(i)= );=0A+ }=0A+ =0A+ /* Clear MMC bus response buffer. */=0A+ bzero(&cmd->r= esp[0], 4 * sizeof(uint32=5Ft));=0A+ =0A+ /*=0A+ * Fill MMC bus response= buffer.=0A+ */=0A+ =0A+ rp =3D (uint8=5Ft *)&cmd->resp[0];=0A+ =0A+ /*= Response bits [45:14] */=0A+ word =3D (resp[1] & MV=5FSDIO=5FRSP48=5FBM16= ) |=0A+ ((resp[0] & MV=5FSDIO=5FRSP48=5FBM16) << 16);=0A+ =0A+ /* Res= ponse bits [15:14] and [13:8] */=0A+ *rp++ =3D (resp[2] & MV=5FSDIO=5FRSP4= 8=5FBM6) |=0A+ ((word & MV=5FSDIO=5FRSP48=5FBM2) << 6);=0A+ =0A+ /* R= esponse bits [15:14] are already included. */=0A+ word >>=3D 2;=0A+ =0A+ = /* Response bits [45:16] */=0A+ memcpy(rp, &word, sizeof(uint32=5Ft));=0A+= }=0A+ =0A+ static void=0A+ mv=5Fsdio=5Fintr(void *arg)=0A+ {=0A+ struct m= v=5Fsdio=5Fsoftc *sc;=0A+ uint32=5Ft irq=5Fstat, eirq=5Fstat;=0A+ =0A+ s= c =3D (struct mv=5Fsdio=5Fsoftc *)arg;=0A+ #if 0=0A+ device=5Fprintf(sc->s= c=5Fdev,"intr 0x%04x intr=5Fen 0x%04x hw=5Fstate 0x%04x\n",=0A+ = MV=5FSDIO=5FRD4( sc, MV=5FSDIO=5FIRQ=5FSR ) , =0A+ MV= =5FSDIO=5FRD4( sc, MV=5FSDIO=5FIRQ=5FEN ),=0A+ MV=5FSDIO=5F= RD4( sc, MV=5FSDIO=5FHOST=5FSR ));=0A+ #endif=0A+ =0A+ =0A+ mtx=5Flock= (&sc->sc=5Fmtx);=0A+ =0A+ =0A+ =0A+ irq=5Fstat =3D MV=5FSDIO=5FRD4(sc, M= V=5FSDIO=5FIRQ=5FSR) & sc->sc=5Firq=5Fmask;=0A+ eirq=5Fstat =3D MV=5FSDIO= =5FRD4(sc, MV=5FSDIO=5FEIRQ=5FSR) & sc->sc=5Feirq=5Fmask;=0A+ =0A+ /*=0A+ = * In case of error interrupt, interrupt cause will be identified by=0A+ = * checking bits in error interrupt status register.=0A+ */=0A+ irq=5Fst= at &=3D ~MV=5FSDIO=5FIRQ=5FERR;=0A+ =0A+ /* Handle command interrupts. */= =0A+ if ((irq=5Fstat & MV=5FSDIO=5FIRQS=5FCMD) ||=0A+ (eirq=5Fstat & = MV=5FSDIO=5FEIRQS=5FCMD)) {=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FSR,= irq=5Fstat);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ=5FSR, eirq=5Fstat)= ;=0A+ mv=5Fsdio=5Fcmd=5Fintr(sc, irq=5Fstat, eirq=5Fstat);=0A+ irq=5Fst= at &=3D ~MV=5FSDIO=5FIRQS=5FCMD;=0A+ eirq=5Fstat &=3D ~MV=5FSDIO=5FEIRQS= =5FCMD;=0A+ }=0A+ =0A+ /* Handle data interrupts. */=0A+ if ((irq=5Fstat= & MV=5FSDIO=5FIRQS=5FDATA) ||=0A+ (eirq=5Fstat & MV=5FSDIO=5FEIRQS=5F= DATA)) {=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FSR, irq=5Fstat);=0A+ = MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ=5FSR, eirq=5Fstat);=0A+ mv=5Fsdio= =5Fdata=5Fintr(sc, irq=5Fstat, eirq=5Fstat);=0A+ irq=5Fstat &=3D ~MV=5FSD= IO=5FIRQS=5FDATA;=0A+ eirq=5Fstat &=3D ~MV=5FSDIO=5FEIRQS=5FDATA;=0A+ }= =0A+ =0A+ /* Handle unexpected interrupts. */=0A+ if (irq=5Fstat) {=0A+ = device=5Fprintf(sc->sc=5Fdev, "Unexpected interrupt(s)! "=0A+ "IRQ S= R =3D 0x%08x\n", irq=5Fstat);=0A+ /* Clear interrupt status. */=0A+ MV= =5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FSR, irq=5Fstat);=0A+ }=0A+ if (eirq= =5Fstat) {=0A+ device=5Fprintf(sc->sc=5Fdev, "Unexpected error interrupt(= s)! "=0A+ "EIRQ SR =3D 0x%08x\n", eirq=5Fstat);=0A+ /* Clear error = interrupt status. */=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ=5FSR, eirq= =5Fstat);=0A+ }=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ }=0A+ =0A+ stat= ic void=0A+ mv=5Fsdio=5Fcmd=5Fintr(struct mv=5Fsdio=5Fsoftc *sc, uint32=5Ft= irq, uint32=5Ft eirq)=0A+ {=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWN= ED);=0A+ =0A+ if (!sc->sc=5Fcurcmd) {=0A+ device=5Fprintf(sc->sc=5Fdev, = "Got command interrupt, but there "=0A+ "is no active command!\n");= =0A+ return;=0A+ }=0A+ =0A+ /* Handle unexpected response error. */=0A+= if (irq & MV=5FSDIO=5FIRQ=5FUNEXPECTED=5FRSP) {=0A+ sc->sc=5Fcurcmd->er= ror =3D MMC=5FERR=5FFAILED;=0A+ device=5Fprintf(sc->sc=5Fdev, "Unexpected= response!\n");=0A+ }=0A+ =0A+ /* Handle errors. */=0A+ if (eirq & MV=5F= SDIO=5FEIRQ=5FCMD=5FTMO) {=0A+ sc->sc=5Fcurcmd->error =3D MMC=5FERR=5FTIM= EOUT;=0A+ device=5Fprintf(sc->sc=5Fdev, "Error - command %d timeout!\n",= =0A+ sc->sc=5Fcurcmd->opcode);=0A+ } else if (eirq & MV=5FSDIO=5FEIR= Q=5FCMD=5FCRC7) {=0A+ sc->sc=5Fcurcmd->error =3D MMC=5FERR=5FBADCRC;=0A+ = device=5Fprintf(sc->sc=5Fdev, "Error - bad command %d "=0A+ "checks= um!\n", sc->sc=5Fcurcmd->opcode);=0A+ } else if (eirq) {=0A+ sc->sc=5Fcu= rcmd->error =3D MMC=5FERR=5FFAILED;=0A+ device=5Fprintf(sc->sc=5Fdev, "Co= mmand %d error!\n",=0A+ sc->sc=5Fcurcmd->opcode);=0A+ }=0A+ =0A+ if= (sc->sc=5Fcurcmd->error !=3D MMC=5FERR=5FNONE) {=0A+ /* Error. Disable i= nterrupts and finalize request. */=0A+ mv=5Fsdio=5Fdisable=5Fintr(sc);=0A= + mv=5Fsdio=5Ffinalize=5Frequest(sc);=0A+ return;=0A+ }=0A+ =0A+ if (= irq & MV=5FSDIO=5FIRQ=5FCMD)=0A+ mv=5Fsdio=5Ffinish=5Fcommand(sc);=0A+ }= =0A+ =0A+ static void=0A+ mv=5Fsdio=5Fdata=5Fintr(struct mv=5Fsdio=5Fsoftc = *sc, uint32=5Ft irq, uint32=5Ft eirq)=0A+ {=0A+ struct mmc=5Fcommand *stop= ;=0A+ =0A+ mtx=5Fassert(&sc->sc=5Fmtx, MA=5FOWNED);=0A+ =0A+ if (!sc->sc= =5Fcurcmd) {=0A+ device=5Fprintf(sc->sc=5Fdev, "Got data interrupt, but t= here is "=0A+ "no active command.\n");=0A+ return;=0A+ }=0A+ if (= (!sc->sc=5Fcurcmd->data) && ((sc->sc=5Fcurcmd->flags &=0A+ MMC=5FRSP= =5FBUSY) =3D=3D 0)) {=0A+ device=5Fprintf(sc->sc=5Fdev, "Got data interru= pt, but there is "=0A+ "no active data transaction.n\n");=0A+ sc->s= c=5Fcurcmd->error =3D MMC=5FERR=5FFAILED;=0A+ return;=0A+ }=0A+ =0A+ /*= Handle errors. */=0A+ if(eirq & MV=5FSDIO=5FEIRQ=5FDATA=5FTMO) {=0A+ sc= ->sc=5Fcurcmd->error =3D MMC=5FERR=5FTIMEOUT;=0A+ device=5Fprintf(sc->sc= =5Fdev, "Data %s timeout!\n",=0A+ (sc->sc=5Fcurcmd->data->flags & MMC= =5FDATA=5FREAD) ? "read" :=0A+ "write");=0A+ } else if (eirq & (MV= =5FSDIO=5FEIRQ=5FDATA=5FCRC16 |=0A+ MV=5FSDIO=5FEIRQ=5FDATA=5FENDBIT))= {=0A+ sc->sc=5Fcurcmd->error =3D MMC=5FERR=5FBADCRC;=0A+ device=5Fprin= tf(sc->sc=5Fdev, "Bad data checksum!\n");=0A+ } else if (eirq) {=0A+ sc-= >sc=5Fcurcmd->error =3D MMC=5FERR=5FFAILED;=0A+ device=5Fprintf(sc->sc=5F= dev, "Data error!: 0x%04X \n",=0A+ eirq);=0A+ =0A+ if( 0 !=3D ( e= irq & MV=5FSDIO=5FEIRQ=5FCRC=5FSTAT ) )=0A+ {=0A+ device=5Fprintf= (sc->sc=5Fdev, "MV=5FSDIO=5FEIRQ=5FCRC=5FSTAT\n");=0A+ }=0A+ }=0A+ =0A= + /* Handle Auto-CMD12 error. */=0A+ if (eirq & MV=5FSDIO=5FEIRQ=5FAUTOCM= D12) {=0A+ sc->sc=5Freq->stop->error =3D MMC=5FERR=5FFAILED;=0A+ sc->sc= =5Fcurcmd->error =3D MMC=5FERR=5FFAILED;=0A+ device=5Fprintf(sc->sc=5Fdev= , "Auto-CMD12 error!\n");=0A+ }=0A+ =0A+ if (sc->sc=5Fcurcmd->error !=3D = MMC=5FERR=5FNONE) {=0A+ /* Error. Disable interrupts and finalize request= . */=0A+ mv=5Fsdio=5Fdisable=5Fintr(sc);=0A+ mv=5Fsdio=5Ffinalize=5Freq= uest(sc);=0A+ return;=0A+ }=0A+ =0A+ /* Handle PIO interrupt. */=0A+ i= f (irq & (MV=5FSDIO=5FIRQ=5FTX=5FEMPTY | MV=5FSDIO=5FIRQ=5FRX=5FFULL))=0A+ = mv=5Fsdio=5Ftransfer=5Fpio(sc);=0A+ =0A+ /* Handle DMA interrupt. */=0A+= if (irq & (MV=5FSDIO=5FIRQ=5FDMA)) {=0A+ /* Synchronize DMA buffer. */= =0A+ if (MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FXFER) & MV=5FSDIO=5FXFER=5FTO=5F= HOST) {=0A+ bus=5Fdmamap=5Fsync(sc->sc=5Fdmatag, sc->sc=5Fdmamap,=0A+ = BUS=5FDMASYNC=5FPOSTWRITE);=0A+ memcpy(sc->sc=5Fcurcmd->data->data,= sc->sc=5Fdmamem,=0A+ sc->sc=5Fcurcmd->data->len);=0A+ } else=0A+ = bus=5Fdmamap=5Fsync(sc->sc=5Fdmatag, sc->sc=5Fdmamap,=0A+ BUS=5FD= MASYNC=5FPOSTREAD);=0A+ =0A+ /* Disable DMA interrupt. */=0A+ sc->sc=5F= irq=5Fmask &=3D ~MV=5FSDIO=5FIRQ=5FDMA;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO= =5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ }=0A+ =0A+ /* Handle Auto-CMD12 in= terrupt. */=0A+ if (irq & (MV=5FSDIO=5FIRQ=5FAUTOCMD12)) {=0A+ stop =3D = sc->sc=5Freq->stop;=0A+ /* Get 48-bit response. */=0A+ mv=5Fsdio=5Fhand= le=5F48bit=5Fresp(sc, stop);=0A+ =0A+ /* Disable Auto-CMD12 interrupt. */= =0A+ sc->sc=5Firq=5Fmask &=3D ~MV=5FSDIO=5FIRQ=5FAUTOCMD12;=0A+ MV=5FSD= IO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ }=0A+ =0A+ /= * Transfer finished. Disable interrupts and finalize request. */=0A+ if (i= rq & (MV=5FSDIO=5FIRQ=5FXFER)) {=0A+ mv=5Fsdio=5Fdisable=5Fintr(sc);=0A+ = mv=5Fsdio=5Ffinalize=5Frequest(sc);=0A+ }=0A+ }=0A+ =0A+ static void=0A+= mv=5Fsdio=5Fcd=5Fintr(void *arg)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;= =0A+ =0A+ sc =3D (struct mv=5Fsdio=5Fsoftc *)arg;=0A+ =0A+ mtx=5Flock(&sc= ->sc=5Fmtx);=0A+ =0A+ if (platform=5Fsdio=5Fslot=5Fsignal(MV=5FSDIO=5FSIG= =5FCD) =3D=3D 0) {=0A+ =0A+ device=5Fprintf(sc->sc=5Fdev, "Card rem= oved\n");=0A+ =0A+ callout=5Fstop(&sc->sc=5Fcard=5Fcallout);=0A+ =0A+= sc->sc=5Fcard=5Fpresent =3D 0;=0A+ =0A+ taskqueue=5Fenqueue(taskqueue= =5Fswi, &sc->sc=5Fcard=5Ftask);=0A+ =0A+ =0A+ } else {=0A+ =0A+ = device=5Fprintf(sc->sc=5Fdev, "Card inserted\n");=0A+ =0A+ =0A+ = if( 1 =3D=3D sc->sc=5Fcard=5Fpresent )=0A+ {=0A+ /* Card has bee= n removed previously =0A+ * Remove the child-device, before it is ad= ded again=0A+ */=0A+ if( NULL !=3D sc->sc=5Fchild )=0A+ = {=0A+ device=5Fprintf(sc->sc=5Fdev, "Previous removal has not been = detected properly\n");=0A+ if (device=5Fdelete=5Fchild(sc->sc=5Fdev= , sc->sc=5Fchild) !=3D 0) {=0A+ device=5Fprintf(sc->sc=5Fdev, "Co= uld not delete MMC "=0A+ "bus!\n");=0A+ }= =0A+ sc->sc=5Fchild =3D NULL;=0A+ }=0A+ }=0A+ else=0A= + {=0A+ sc->sc=5Fcard=5Fpresent =3D 1;=0A+ }=0A+ callout=5F= reset(&sc->sc=5Fcard=5Fcallout, hz / 2,=0A+ mv=5Fsdio=5Fc= ard=5Fdelay, sc);=0A+ =0A+ =0A+ }=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);= =0A+ }=0A+ =0A+ static void=0A+ mv=5Fsdio=5Fdisable=5Fintr(struct mv=5Fsdio= =5Fsoftc *sc)=0A+ {=0A+ =0A+ /* Disable interrupts that were enabled. */= =0A+ sc->sc=5Firq=5Fmask &=3D ~(sc->sc=5Firq=5Fmask);=0A+ sc->sc=5Feirq= =5Fmask &=3D ~(sc->sc=5Feirq=5Fmask);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5F= IRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FEIRQ= =5FEN, sc->sc=5Feirq=5Fmask);=0A+ }=0A+ =0A+ #if 1=0A+ static void=0A+ mv= =5Fsdio=5Fcard=5Fdelay(void *arg)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;= =0A+ =0A+ sc =3D (struct mv=5Fsdio=5Fsoftc *)arg;=0A+ =0A+ taskqueue=5Fen= queue(taskqueue=5Fswi, &sc->sc=5Fcard=5Ftask);=0A+ }=0A+ #endif=0A+ =0A+ st= atic void=0A+ mv=5Fsdio=5Fcard=5Ftask(void *arg, int pending)=0A+ {=0A+ st= ruct mv=5Fsdio=5Fsoftc *sc;=0A+ =0A+ int device=5Fprobe=5Fand=5Fattach= =5Fret=5Fval =3D 0;=0A+ =0A+ sc =3D (struct mv=5Fsdio=5Fsoftc *)arg;=0A+ = =0A+ mtx=5Flock(&sc->sc=5Fmtx);=0A+ =0A+ #if 0=0A+ device=5Fprintf(sc->s= c=5Fdev, "mv=5Fsdio=5Fcard=5Ftask\n");=0A+ #endif=0A+ =0A+ if (sc->sc=5Fca= rd=5Fpresent) {=0A+ if (sc->sc=5Fchild) {=0A+ mtx=5Funlock(&sc->sc=5Fm= tx);=0A+ return;=0A+ }=0A+ =0A+ /* Initialize host controller's regi= sters. */=0A+ mv=5Fsdio=5Finit(sc->sc=5Fdev);=0A+ =0A+ sc->sc=5Fchild = =3D device=5Fadd=5Fchild(sc->sc=5Fdev, "mmc", -1);=0A+ if (sc->sc=5Fchild= =3D=3D NULL) {=0A+ device=5Fprintf(sc->sc=5Fdev, "Could not add MMC bus= !\n");=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ return;=0A+ }=0A+ = =0A+ /* Initialize host structure for MMC bus. */=0A+ mv=5Fsdio= =5Finit=5Fhost(sc);=0A+ =0A+ device=5Fset=5Fivars(sc->sc=5Fchild, &sc->sc= =5Fhost);=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ =0A+ // device=5F= probe=5Fand=5Fattach=5Fret=5Fval =3D bus=5Fgeneric=5Fattach( sc->sc=5Fdev )= ;=0A+ =0A+ device=5Fprobe=5Fand=5Fattach=5Fret=5Fval =3D device=5Fp= robe=5Fand=5Fattach(sc->sc=5Fchild);=0A+ =0A+ //device=5Fprobe=5Fand=5F= attach=5Fret=5Fval =3D device=5Fprobe=5Fchild( sc->sc=5Fdev, sc->sc=5Fchild= ); //device=5Ft dev, device=5Ft child)=0A+ =0A+ if( 0 !=3D dev= ice=5Fprobe=5Fand=5Fattach=5Fret=5Fval ) {=0A+ device=5Fprintf(sc->sc=5F= dev, "MMC bus failed on probe "=0A+ "and attach! %i\n",= device=5Fprobe=5Fand=5Fattach=5Fret=5Fval);=0A+ device=5Fdelete=5Fchild(= sc->sc=5Fdev, sc->sc=5Fchild);=0A+ sc->sc=5Fchild =3D NULL;=0A+ }=0A+ = } else {=0A+ if (sc->sc=5Fchild =3D=3D NULL) {=0A+ mtx=5Funlock(&sc->= sc=5Fmtx);=0A+ return;=0A+ }=0A+ =0A+ mtx=5Funlock(&sc->sc=5Fmtx);= =0A+ if (device=5Fdelete=5Fchild(sc->sc=5Fdev, sc->sc=5Fchild) !=3D 0) {= =0A+ device=5Fprintf(sc->sc=5Fdev, "Could not delete MMC "=0A+ "b= us!\n");=0A+ }=0A+ sc->sc=5Fchild =3D NULL;=0A+ }=0A+ }=0A+ =0A+ stati= c uint32=5Ft=0A+ mv=5Fsdio=5Fread=5Ffifo(struct mv=5Fsdio=5Fsoftc *sc)=0A+ = {=0A+ uint32=5Ft data;=0A+ device=5Fprintf(sc->sc=5Fdev, "This is not te= sted, yet MV=5FSDIO=5FFIFO not ensured\n ");=0A+ =0A+ while (!(MV=5FSDI= O=5FRD4(sc, MV=5FSDIO=5FIRQ=5FSR) & MV=5FSDIO=5FIRQ=5FRX=5FFULL));=0A+ dat= a =3D MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FFIFO);=0A+ while (!(MV=5FSDIO=5FRD4(= sc, MV=5FSDIO=5FIRQ=5FSR) & MV=5FSDIO=5FIRQ=5FRX=5FFULL));=0A+ data |=3D (= MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FFIFO) << 16);=0A+ return data;=0A+ }=0A+ = =0A+ static void=0A+ mv=5Fsdio=5Fwrite=5Ffifo(struct mv=5Fsdio=5Fsoftc *sc,= uint32=5Ft val)=0A+ {=0A+ while (!(MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FIRQ=5F= SR) & MV=5FSDIO=5FIRQ=5FTX=5FEMPTY));=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5F= FIFO, val & 0xffff);=0A+ while (!(MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FIRQ=5FSR= ) & MV=5FSDIO=5FIRQ=5FTX=5FEMPTY));=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FFI= FO, val >> 16);=0A+ }=0A+ =0A+ static void=0A+ mv=5Fsdio=5Ftransfer=5Fpio(s= truct mv=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ struct mmc=5Fcommand *cmd;=0A+ = =0A+ device=5Fprintf(sc->sc=5Fdev, "mv=5Fsdio=5Ftransfer=5Fpio()\n");=0A+= =0A+ cmd =3D sc->sc=5Fcurcmd;=0A+ =0A+ if (cmd->data->flags & MMC=5FDATA= =5FREAD) {=0A+ while (MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FIRQ=5FSR) &=0A+ = MV=5FSDIO=5FIRQ=5FRX=5FFULL) {=0A+ mv=5Fsdio=5Fread=5Fblock=5Fpio(sc)= ;=0A+ /*=0A+ * Assert delay after each block transfer to meet read= =0A+ * access timing constraint.=0A+ */=0A+ DELAY(MV=5FSDIO=5FRD= =5FDELAY);=0A+ if (sc->sc=5Fdata=5Foffset >=3D cmd->data->len)=0A+ b= reak;=0A+ }=0A+ /* All blocks read in PIO mode. Disable interrupt. */= =0A+ sc->sc=5Firq=5Fmask &=3D ~MV=5FSDIO=5FIRQ=5FRX=5FFULL;=0A+ MV=5FSD= IO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A+ } else {=0A+ = while (MV=5FSDIO=5FRD4(sc, MV=5FSDIO=5FIRQ=5FSR) &=0A+ MV=5FSDIO=5F= IRQ=5FTX=5FEMPTY) {=0A+ mv=5Fsdio=5Fwrite=5Fblock=5Fpio(sc);=0A+ /* W= ait while card is programming the memory. */=0A+ while ((MV=5FSDIO=5FRD4= (sc, MV=5FSDIO=5FHOST=5FSR) &=0A+ MV=5FSDIO=5FHOST=5FSR=5FCAR= D=5FBUSY));=0A+ /*=0A+ * Assert delay after each block transfer to m= eet=0A+ * write access timing constraint.=0A+ */=0A+ DELAY(MV=5F= SDIO=5FWR=5FDELAY);=0A+ =0A+ if (sc->sc=5Fdata=5Foffset >=3D cmd->data->= len)=0A+ break;=0A+ }=0A+ /* All blocks written in PIO mode. Disabl= e interrupt. */=0A+ sc->sc=5Firq=5Fmask &=3D ~MV=5FSDIO=5FIRQ=5FTX=5FEMPT= Y;=0A+ MV=5FSDIO=5FWR4(sc, MV=5FSDIO=5FIRQ=5FEN, sc->sc=5Firq=5Fmask);=0A= + }=0A+ }=0A+ =0A+ static void=0A+ mv=5Fsdio=5Fread=5Fblock=5Fpio(struct m= v=5Fsdio=5Fsoftc *sc)=0A+ {=0A+ uint32=5Ft data;=0A+ char *buffer;=0A+ s= ize=5Ft left;=0A+ =0A+ buffer =3D sc->sc=5Fcurcmd->data->data;=0A+ buffer= +=3D sc->sc=5Fdata=5Foffset;=0A+ /* Transfer one block at a time. */=0A+ = left =3D min(MV=5FSDIO=5FBLOCK=5FSIZE, sc->sc=5Fcurcmd->data->len -=0A+ = sc->sc=5Fdata=5Foffset);=0A+ sc->sc=5Fdata=5Foffset +=3D left;=0A+ =0A+= /* Handle unaligned and aligned buffer cases. */=0A+ if ((intptr=5Ft)buf= fer & 3) {=0A+ while (left > 3) {=0A+ data =3D mv=5Fsdio=5Fread=5Ffifo= (sc);=0A+ buffer[0] =3D data;=0A+ buffer[1] =3D (data >> 8);=0A+ b= uffer[2] =3D (data >> 16);=0A+ buffer[3] =3D (data >> 24);=0A+ buffer= +=3D 4;=0A+ left -=3D 4;=0A+ }=0A+ } else {=0A+ while (left > 3) {= =0A+ data =3D mv=5Fsdio=5Fread=5Ffifo(sc);=0A+ *((uint32=5Ft *)buffer= ) =3D data;=0A+ buffer +=3D 4;=0A+ left -=3D 4;=0A+ }=0A+ }=0A+ /= * Handle uneven size case. */=0A+ if (left > 0) {=0A+ data =3D mv=5Fsdio= =5Fread=5Ffifo(sc);=0A+ while (left > 0) {=0A+ *(buffer++) =3D data;= =0A+ data >>=3D 8;=0A+ left--;=0A+ }=0A+ }=0A+ }=0A+ =0A+ static v= oid=0A+ mv=5Fsdio=5Fwrite=5Fblock=5Fpio(struct mv=5Fsdio=5Fsoftc *sc)=0A+ {= =0A+ uint32=5Ft data =3D 0;=0A+ char *buffer;=0A+ size=5Ft left;=0A+ =0A= + buffer =3D sc->sc=5Fcurcmd->data->data;=0A+ buffer +=3D sc->sc=5Fdata= =5Foffset;=0A+ /* Transfer one block at a time. */=0A+ left =3D min(MV=5F= SDIO=5FBLOCK=5FSIZE, sc->sc=5Fcurcmd->data->len -=0A+ sc->sc=5Fdata=5F= offset);=0A+ sc->sc=5Fdata=5Foffset +=3D left;=0A+ =0A+ /* Handle unalign= ed and aligned buffer cases. */=0A+ if ((intptr=5Ft)buffer & 3) {=0A+ wh= ile (left > 3) {=0A+ data =3D buffer[0] +=0A+ (buffer[1] << 8) += =0A+ (buffer[2] << 16) +=0A+ (buffer[3] << 24);=0A+ left -= =3D 4;=0A+ buffer +=3D 4;=0A+ mv=5Fsdio=5Fwrite=5Ffifo(sc, data);=0A+= }=0A+ } else {=0A+ while (left > 3) {=0A+ data =3D *((uint32=5Ft *= )buffer);=0A+ left -=3D 4;=0A+ buffer +=3D 4;=0A+ mv=5Fsdio=5Fwrit= e=5Ffifo(sc, data);=0A+ }=0A+ }=0A+ /* Handle uneven size case. */=0A+ = if (left > 0) {=0A+ data =3D 0;=0A+ while (left > 0) {=0A+ data <<= =3D 8;=0A+ data +=3D *(buffer++);=0A+ left--;=0A+ }=0A+ mv=5Fsdio= =5Fwrite=5Ffifo(sc, data);=0A+ }=0A+ }=0A+ =0A+ static int=0A+ mv=5Fsdio= =5Fread=5Fivar(device=5Ft dev, device=5Ft child, int index, uintptr=5Ft *re= sult)=0A+ {=0A+ struct mv=5Fsdio=5Fsoftc *sc;=0A+ struct mmc=5Fhost *host= ;=0A+ =0A+ sc =3D device=5Fget=5Fsoftc(dev);=0A+ host =3D device=5Fget=5F= ivars(child);=0A+ =0A+ switch (index) {=0A+ case MMCBR=5FIVAR=5FBUS=5FMOD= E:=0A+ *(int *)result =3D host->ios.bus=5Fmode;=0A+ break;=0A+ case MM= CBR=5FIVAR=5FBUS=5FWIDTH:=0A+ *(int *)result =3D host->ios.bus=5Fwidth;= =0A+ break;=0A+ case MMCBR=5FIVAR=5FCHIP=5FSELECT:=0A+ *(int *)result = =3D host->ios.chip=5Fselect;=0A+ break;=0A+ case MMCBR=5FIVAR=5FCLOCK:= =0A+ *(int *)result =3D host->ios.clock;=0A+ break;=0A+ case MMCBR=5FI= VAR=5FF=5FMIN:=0A+ *(int *)result =3D host->f=5Fmin;=0A+ break;=0A+ ca= se MMCBR=5FIVAR=5FF=5FMAX:=0A+ *(int *)result =3D host->f=5Fmax;=0A+ br= eak;=0A+ case MMCBR=5FIVAR=5FHOST=5FOCR:=0A+ *(int *)result =3D host->ho= st=5Focr;=0A+ break;=0A+ case MMCBR=5FIVAR=5FMODE:=0A+ *(int *)result = =3D host->mode;=0A+ break;=0A+ case MMCBR=5FIVAR=5FOCR:=0A+ *(int *)re= sult =3D host->ocr;=0A+ break;=0A+ case MMCBR=5FIVAR=5FPOWER=5FMODE:=0A+= *(int *)result =3D host->ios.power=5Fmode;=0A+ break;=0A+ case MMCBR= =5FIVAR=5FVDD:=0A+ *(int *)result =3D host->ios.vdd;=0A+ break;=0A+ ca= se MMCBR=5FIVAR=5FCAPS:=0A+ *(int *)result =3D host->caps;=0A+ break;= =0A+ case MMCBR=5FIVAR=5FTIMING:=0A+ *(int *)result =3D host->ios.timing= ;=0A+ break;=0A+ case MMCBR=5FIVAR=5FMAX=5FDATA:=0A+ mtx=5Flock(&sc->s= c=5Fmtx);=0A+ /* Return maximum number of blocks the driver can handle. *= /=0A+ if (sc->sc=5Fuse=5Fdma)=0A+ *(int *)result =3D (sc->sc=5Fdma=5Fs= ize /=0A+ MV=5FSDIO=5FBLOCK=5FSIZE);=0A+ else=0A+ *(int *)resul= t =3D MV=5FSDIO=5FBLOCKS=5FMAX;=0A+ mtx=5Funlock(&sc->sc=5Fmtx);=0A+ br= eak;=0A+ default:=0A+ return (EINVAL);=0A+ }=0A+ =0A+ return (0);=0A+ = }=0A+ =0A+ static int=0A+ mv=5Fsdio=5Fwrite=5Fivar(device=5Ft dev, device= =5Ft child, int index, uintptr=5Ft value)=0A+ {=0A+ struct mmc=5Fhost *hos= t;=0A+ =0A+ host =3D device=5Fget=5Fivars(child);=0A+ =0A+ switch (index)= {=0A+ case MMCBR=5FIVAR=5FBUS=5FMODE:=0A+ host->ios.bus=5Fmode =3D valu= e;=0A+ break;=0A+ case MMCBR=5FIVAR=5FBUS=5FWIDTH:=0A+ host->ios.bus= =5Fwidth =3D value;=0A+ break;=0A+ case MMCBR=5FIVAR=5FCHIP=5FSELECT:=0A= + host->ios.chip=5Fselect =3D value;=0A+ break;=0A+ case MMCBR=5FIVAR= =5FCLOCK:=0A+ host->ios.clock =3D value;=0A+ break;=0A+ case MMCBR=5FI= VAR=5FMODE:=0A+ host->mode =3D value;=0A+ break;=0A+ case MMCBR=5FIVAR= =5FOCR:=0A+ host->ocr =3D value;=0A+ break;=0A+ case MMCBR=5FIVAR=5FPO= WER=5FMODE:=0A+ host->ios.power=5Fmode =3D value;=0A+ break;=0A+ case = MMCBR=5FIVAR=5FVDD:=0A+ host->ios.vdd =3D value;=0A+ break;=0A+ case M= MCBR=5FIVAR=5FTIMING:=0A+ host->ios.timing =3D value;=0A+ break;=0A+ c= ase MMCBR=5FIVAR=5FCAPS:=0A+ case MMCBR=5FIVAR=5FHOST=5FOCR:=0A+ case MMC= BR=5FIVAR=5FF=5FMIN:=0A+ case MMCBR=5FIVAR=5FF=5FMAX:=0A+ case MMCBR=5FIV= AR=5FMAX=5FDATA:=0A+ default:=0A+ /* Instance variable not writable. */= =0A+ return (EINVAL);=0A+ }=0A+ =0A+ return (0);=0A+ }=0Adiff -prN --ex= clude=3D.svn head=5Fr221725/sys/arm/mv/mv=5Fsdio.h head=5Fr221525/sys/arm/m= v/mv=5Fsdio.h=0A*** head=5Fr221725/sys/arm/mv/mv=5Fsdio.h Thu Jan 1 00:00:= 00 1970=0A--- head=5Fr221525/sys/arm/mv/mv=5Fsdio.h Tue May 10 08:24:17 201= 1=0A***************=0A*** 0 ****=0A--- 1,172 ----=0A+ /*=0A+ * Copyright = (C) 2008 Marvell Semiconductors, All Rights Reserved.=0A+ *=0A+ * This pr= ogram is free software; you can redistribute it and/or modify=0A+ * it und= er the terms of the GNU General Public License version 2 as=0A+ * publishe= d by the Free Software Foundation.=0A+ *=0A+ */=0A+ =0A+ #ifndef =5FMVSDM= MC=5FINCLUDE=0A+ #define =5FMVSDMMC=5FINCLUDE=0A+ =0A+ =0A+ #define MVSDMMC= =5FDMA=5FSIZE 65536=0A+ =0A+ =0A+ =0A+ /*=0A+ * The base MMC clock rate= =0A+ */=0A+ =0A+ #define MVSDMMC=5FCLOCKRATE=5FMIN 100000=0A+ #define MV= SDMMC=5FCLOCKRATE=5FMAX 50000000=0A+ =0A+ #define MVSDMMC=5FBASE=5FFAST= =5FCLOCK 200000000=0A+ =0A+ =0A+ /*=0A+ * SDIO register=0A+ */=0A+ =0A+= #define MV=5FSDIO=5FDMA=5FADDRL 0x000 =0A+ #define MV=5FSDIO=5FDMA= =5FADDRH 0x004=0A+ #define MV=5FSDIO=5FBLK=5FSIZE 0x008=0A+ #defin= e MV=5FSDIO=5FBLK=5FCOUNT 0x00c=0A+ #define MV=5FSDIO=5FCMD = 0x01c=0A+ #define MV=5FSDIO=5FCMD=5FARGL 0x010=0A+ #define MV=5FSDIO= =5FCMD=5FARGH 0x014=0A+ #define MV=5FSDIO=5FXFER 0x018=0A+ #d= efine MV=5FSDIO=5FHOST=5FSR 0x048=0A+ #define MV=5FSDIO=5FHOST=5FCR= 0x050=0A+ #define MV=5FSDIO=5FSW=5FRESET 0x05c=0A+ #define = MV=5FSDIO=5FIRQ=5FSR 0x060=0A+ #define MV=5FSDIO=5FEIRQ=5FSR = 0x064=0A+ #define MV=5FSDIO=5FIRQ=5FSR=5FEN 0x068=0A+ #define MV=5FS= DIO=5FEIRQ=5FSR=5FEN 0x06c=0A+ #define MV=5FSDIO=5FIRQ=5FEN 0= x070=0A+ #define MV=5FSDIO=5FEIRQ=5FEN 0x074=0A+ #define MV=5FSDIO= =5FAUTOCMD12=5FARGL 0x084=0A+ #define MV=5FSDIO=5FAUTOCMD12=5FARGH 0x088=0A= + #define MV=5FSDIO=5FAUTOCMD12 0x08c=0A+ #define MV=5FSDIO=5FCLK=5FDIV= 0x128=0A+ #define MV=5FSDIO=5FFIFO 0xa2100 /* FIXME!!! */=0A+ =0A= + #define MV=5FSDIO=5FRSP(i) (0x020 + ((i)<<2))=0A+ #define MV=5FSDIO= =5FAUTOCMD12=5FRSP(i) (0x090 + ((i)<<2))=0A+ =0A+ /*=0A+ * SDIO Status-Reg= ister=0A+ */=0A+ #define MV=5FSDIO=5FHOST=5FSR=5FCARD=5FBUSY (1<<1)=0A+ #d= efine MV=5FSDIO=5FHOST=5FSR=5FFIFO=5FEMPTY (1<<13)=0A+ =0A+ =0A+ =0A+ /*=0A= + * SDIO=5FCMD=0A+ */=0A+ #define MV=5FSDIO=5FCMD=5FRSP=5FNONE (0 << 0)= =0A+ #define MV=5FSDIO=5FCMD=5FRSP=5F136 (1 << 0)=0A+ #define MV=5FSDIO= =5FCMD=5FRSP=5F48 (2 << 0)=0A+ #define MV=5FSDIO=5FCMD=5FRSP=5F48=5FBUSY= (3 << 0)=0A+ #define MV=5FSDIO=5FCMD=5FDATA=5FCRC16 (1<<2)=0A+ #define M= V=5FSDIO=5FCMD=5FCRC7 (1<<3)=0A+ #define MV=5FSDIO=5FCMD=5FINDEX=5FCHECK (1= <<4)=0A+ #define MV=5FSDIO=5FCMD=5FDATA=5FPRESENT (1<<5)=0A+ #define MV=5FS= DIO=5FCMD=5FUNEXPECTED=5FRSP (1<<7)=0A+ #define MV=5FSDIO=5FCMD=5FINDEX(x) = ( (x) << 8 )=0A+ =0A+ =0A+ /*=0A+ * SDIO=5FXFER=5FMODE=0A+ */=0A+ #define= MV=5FSDIO=5FXFER=5FSTOP=5FCLK (1 << 5)=0A+ #define MV=5FSDIO=5FXFER=5FTO= =5FHOST (1 << 4)=0A+ #define MV=5FSDIO=5FXFER=5FPIO (1 << 3)=0A+= #define MV=5FSDIO=5FXFER=5FAUTOCMD12 (1 << 2)=0A+ #define MV=5FSDIO=5FXFE= R=5FSW=5FWR=5FEN (1 << 1)=0A+ =0A+ /*=0A+ * SDIO=5FHOST=5FCTRL=0A+ */= =0A+ #define MV=5FSDIO=5FHOST=5FCR=5FPUSHPULL (1 << 0)=0A+ #define MV=5FS= DIO=5FHOST=5FCR=5FMMC (3 << 1)=0A+ #define MV=5FSDIO=5FHOST=5FCR=5FB= E (1 << 3)=0A+ #define MV=5FSDIO=5FHOST=5FCR=5F4BIT (1 << 9)= =0A+ #define MV=5FSDIO=5FHOST=5FCR=5FHIGHSPEED (1 << 10)=0A+ =0A+ #define M= V=5FSDIO=5FHOST=5FCR=5FTMOVAL(x) ((x) << 11)=0A+ #define MV=5FSDIO=5FHOST= =5FCR=5FTMO ( 1 << 15 ) =0A+ =0A+ /*=0A+ * NORmal status bits=0A+ *= /=0A+ =0A+ =0A+ #define MV=5FSDIO=5FIRQ=5FERR (1<<15)=0A+ #defin= e MV=5FSDIO=5FIRQ=5FUNEXPECTED=5FRSP (1<<14)=0A+ #define MV=5FSDIO=5FIRQ=5F= AUTOCMD12 (1<<13)=0A+ #define MV=5FSDIO=5FIRQ=5FSUSPENSE=5FON=5FIRQ=5F= EN (1<<12)=0A+ #define MV=5FSDIO=5FIRQ=5FIMB=5FFIFO=5FWORD=5FAVAIL (1<<11)= =0A+ #define MV=5FSDIO=5FIRQ=5FIMB=5FFIFO=5FWORD=5FFILLED (1<<10)=0A+ #defi= ne MV=5FSDIO=5FIRQ=5FREAD=5FWAIT (1<<9)=0A+ #define MV=5FSDIO=5FIRQ=5FCARD= =5FEVENT (1<<8)=0A+ #define MV=5FSDIO=5FIRQ=5FRX=5FFULL (1<<5)=0A+ #define = MV=5FSDIO=5FIRQ=5FTX=5FEMPTY (1<<4)=0A+ #define MV=5FSDIO=5FIRQ=5FDMA (1<<3= )=0A+ #define MV=5FSDIO=5FIRQ=5FBLOCK=5FGAP (1<<2)=0A+ #define MV=5FSDIO=5F= IRQ=5FXFER (1<<1)=0A+ #define MV=5FSDIO=5FIRQ=5FCMD (1<<0)=0A+ =0A+ #define= MV=5FSDIO=5FIRQ=5FALL (MV=5FSDIO=5FIRQ=5FCMD | MV=5FSDIO=5FIRQ=5FXFER | MV= =5FSDIO=5FIRQ=5FBLOCK=5FGAP | MV=5FSDIO=5FIRQ=5FDMA | MV=5FSDIO=5FIRQ=5FRX= =5FFULL | MV=5FSDIO=5FIRQ=5FTX=5FEMPTY | MV=5FSDIO=5FIRQ=5FCARD=5FEVENT | M= V=5FSDIO=5FIRQ=5FREAD=5FWAIT | MV=5FSDIO=5FIRQ=5FIMB=5FFIFO=5FWORD=5FFILLED= | MV=5FSDIO=5FIRQ=5FIMB=5FFIFO=5FWORD=5FAVAIL | MV=5FSDIO=5FIRQ=5FSUSPENSE= =5FON=5FIRQ=5FEN | MV=5FSDIO=5FIRQ=5FAUTOCMD12 | MV=5FSDIO=5FIRQ=5FUNEXPECT= ED=5FRSP | MV=5FSDIO=5FIRQ=5FERR )=0A+ =0A+ //#define MV=5FSDIO=5FIRQ=5FSR = =0A+ =0A+ =0A+ /*=0A+ * ERR status bits=0A+ */=0A+ #define MV=5FSDIO=5FEI= RQ=5FCRC=5FSTAT (1<<14)=0A+ #define MV=5FSDIO=5FEIRQ=5FCRC=5FSTARTBIT (= 1<<13)=0A+ #define MV=5FSDIO=5FEIRQ=5FCRC=5FENDBIT (1<<12)=0A+ #define MV= =5FSDIO=5FEIRQ=5FRSP=5FTBIT (1<<11)=0A+ #define MV=5FSDIO=5FEIRQ=5FXFER= =5FSIZE (1<<10)=0A+ #define MV=5FSDIO=5FEIRQ=5FCMD=5FSTARTBIT (1<<9)=0A+= #define MV=5FSDIO=5FEIRQ=5FAUTOCMD12 (1<<8)=0A+ #define MV=5FSDIO=5FEIR= Q=5FDATA=5FENDBIT (1<<6)=0A+ #define MV=5FSDIO=5FEIRQ=5FDATA=5FCRC16 (1<= <5)=0A+ #define MV=5FSDIO=5FEIRQ=5FDATA=5FTMO (1<<4)=0A+ #define MV=5FS= DIO=5FEIRQ=5FCMD=5FINDEX (1<<3)=0A+ #define MV=5FSDIO=5FEIRQ=5FCMD=5FEND= BIT (1<<2)=0A+ #define MV=5FSDIO=5FEIRQ=5FCMD=5FCRC7 (1<<1)=0A+ #defi= ne MV=5FSDIO=5FEIRQ=5FCMD=5FTMO (1<<0)=0A+ =0A+ #define MV=5FSDIO=5FEI= RQ=5FALL (MV=5FSDIO=5FEIRQ=5FCMD=5FTMO | \=0A+ MV= =5FSDIO=5FEIRQ=5FCMD=5FCRC7 | \=0A+ MV=5FSDIO=5FE= IRQ=5FCMD=5FENDBIT | \=0A+ MV=5FSDIO=5FEIRQ=5FCMD= =5FINDEX | \=0A+ MV=5FSDIO=5FEIRQ=5FDATA=5FTMO | = \=0A+ MV=5FSDIO=5FEIRQ=5FDATA=5FCRC16 | \=0A+ = MV=5FSDIO=5FEIRQ=5FDATA=5FENDBIT | \=0A+ = MV=5FSDIO=5FEIRQ=5FAUTOCMD12 | \=0A+ = MV=5FSDIO=5FEIRQ=5FCMD=5FSTARTBIT |\=0A+ MV=5F= SDIO=5FEIRQ=5FXFER=5FSIZE |\=0A+ MV=5FSDIO=5FEIRQ= =5FRSP=5FTBIT |\=0A+ MV=5FSDIO=5FEIRQ=5FCRC=5FEND= BIT |\=0A+ MV=5FSDIO=5FEIRQ=5FCRC=5FSTARTBIT |\= =0A+ MV=5FSDIO=5FEIRQ=5FCRC=5FSTAT)=0A+ =0A+ /* A= UTOCMD12 register values */=0A+ #define MV=5FSDIO=5FAUTOCMD12=5FBUSY=5FCHEC= K (1<<0)=0A+ #define MV=5FSDIO=5FAUTOCMD12=5FINDEX=5FCHECK (1<<1)=0A+ #defi= ne MV=5FSDIO=5FAUTOCMD12=5FINDEX(x) (x<<8)=0A+ =0A+ /* Software reset regis= ter */=0A+ #define MV=5FSDIO=5FSW=5FRESET=5FALL (1<<8)=0A+ =0A+ /* */=0A+ #= define MV=5FSDIO=5FSIG=5FCD 1=0A+ #define MV=5FSDIO=5FSIG=5FWP 2=0A+ =0A+ #= endif /* =5FMVSDMMC=5FINCLUDE */=0Adiff -prN --exclude=3D.svn head=5Fr22172= 5/sys/boot/fdt/dts/openrd-cl.dts head=5Fr221525/sys/boot/fdt/dts/openrd-cl.= dts=0A*** head=5Fr221725/sys/boot/fdt/dts/openrd-cl.dts Thu Jan 1 00:00:00= 1970=0A--- head=5Fr221525/sys/boot/fdt/dts/openrd-cl.dts Tue May 10 08:24:= 54 2011=0A***************=0A*** 0 ****=0A--- 1,399 ----=0A+ /*=0A+ * Copyr= ight (c) 2009-2010 The FreeBSD Foundation=0A+ * All rights reserved.=0A+ = *=0A+ * This software was developed by Semihalf under sponsorship from=0A+= * the FreeBSD Foundation.=0A+ *=0A+ * Redistribution and use in source = and binary forms, with or without=0A+ * modification, are permitted provid= ed that the following conditions=0A+ * are met:=0A+ * 1. Redistributions = of source code must retain the above copyright=0A+ * notice, this list = of conditions and the following disclaimer.=0A+ * 2. Redistributions in bi= nary form must reproduce the above copyright=0A+ * notice, this list of= conditions and the following disclaimer in the=0A+ * documentation and= /or other materials provided with the distribution.=0A+ *=0A+ * THIS SOFT= WARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND=0A+ * ANY EX= PRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE=0A+ * IMPL= IED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE=0A+ = * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE= =0A+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQ= UENTIAL=0A+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBST= ITUTE GOODS=0A+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS = INTERRUPTION)=0A+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER= IN CONTRACT, STRICT=0A+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTH= ERWISE) ARISING IN ANY WAY=0A+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF = ADVISED OF THE POSSIBILITY OF=0A+ * SUCH DAMAGE.=0A+ *=0A+ * OpenRD-Clie= nt/Ultimate Device Tree Source.=0A+ *=0A+ * $FreeBSD$=0A+ */=0A+ =0A+ /d= ts-v1/;=0A+ =0A+ / {=0A+ model =3D "mrvl,OpenRD-CL";=0A+ compatible =3D "= OpenRD-CL";=0A+ #address-cells =3D <1>;=0A+ #size-cells =3D <1>;=0A+ =0A+= aliases {=0A+ ethernet0 =3D &enet0;=0A+ ethernet1 =3D &enet1;=0A+ m= pp =3D &MPP;=0A+ pci0 =3D &pci0;=0A+ serial0 =3D &serial0;=0A+ /*seri= al1 =3D &serial1;*/=0A+ soc =3D &SOC;=0A+ sram =3D &SRAM;=0A+ };=0A+ = =0A+ cpus {=0A+ #address-cells =3D <1>;=0A+ #size-cells =3D <0>;=0A+ = =0A+ cpu@0 {=0A+ device=5Ftype =3D "cpu";=0A+ compatible =3D "ARM,8= 8FR131";=0A+ reg =3D <0x0>;=0A+ d-cache-line-size =3D <32>; // 32 byt= es=0A+ i-cache-line-size =3D <32>; // 32 bytes=0A+ d-cache-size =3D <= 0x4000>; // L1, 16K=0A+ i-cache-size =3D <0x4000>; // L1, 16K=0A+ tim= ebase-frequency =3D <0>;=0A+ bus-frequency =3D <0>;=0A+ clock-frequen= cy =3D <0>;=0A+ };=0A+ };=0A+ =0A+ memory {=0A+ device=5Ftype =3D "me= mory";=0A+ reg =3D <0x0 0x20000000>; // 512M at 0x0=0A+ };=0A+ =0A+ lo= calbus@f1000000 {=0A+ #address-cells =3D <2>;=0A+ #size-cells =3D <1>;= =0A+ compatible =3D "mrvl,lbc";=0A+ =0A+ /* This reflects CPU decode wi= ndows setup. */=0A+ ranges =3D <0x0 0x0f 0xf9300000 0x00100000=0A+ 0= x1 0x1e 0xfa000000 0x00100000=0A+ 0x2 0x1d 0xfa100000 0x02000000=0A+ = 0x3 0x1b 0xfc100000 0x00000400>;=0A+ =0A+ nor@0,0 {=0A+ #address-c= ells =3D <1>;=0A+ #size-cells =3D <1>;=0A+ compatible =3D "cfi-flash"= ;=0A+ reg =3D <0x0 0x0 0x00100000>;=0A+ bank-width =3D <2>;=0A+ de= vice-width =3D <1>;=0A+ };=0A+ =0A+ led@1,0 {=0A+ #address-cells =3D= <1>;=0A+ #size-cells =3D <1>;=0A+ compatible =3D "led";=0A+ reg = =3D <0x1 0x0 0x00100000>;=0A+ };=0A+ =0A+ nor@2,0 {=0A+ #address-cel= ls =3D <1>;=0A+ #size-cells =3D <1>;=0A+ compatible =3D "cfi-flash";= =0A+ reg =3D <0x2 0x0 0x02000000>;=0A+ bank-width =3D <2>;=0A+ dev= ice-width =3D <1>;=0A+ };=0A+ =0A+ nand@3,0 {=0A+ #address-cells =3D= <1>;=0A+ #size-cells =3D <1>;=0A+ reg =3D <0x3 0x0 0x00100000>;=0A+ = bank-width =3D <2>;=0A+ device-width =3D <1>;=0A+ };=0A+ };=0A+ = =0A+ SOC: soc88f6281@f1000000 {=0A+ #address-cells =3D <1>;=0A+ #size-= cells =3D <1>;=0A+ compatible =3D "simple-bus";=0A+ ranges =3D <0x0 0xf= 1000000 0x00100000>;=0A+ bus-frequency =3D <0>;=0A+ =0A+ PIC: pic@20200= {=0A+ interrupt-controller;=0A+ #address-cells =3D <0>;=0A+ #inte= rrupt-cells =3D <1>;=0A+ reg =3D <0x20200 0x3c>;=0A+ compatible =3D "= mrvl,pic";=0A+ };=0A+ =0A+ timer@20300 {=0A+ compatible =3D "mrvl,ti= mer";=0A+ reg =3D <0x20300 0x30>;=0A+ interrupts =3D <1>;=0A+ inte= rrupt-parent =3D <&PIC>;=0A+ mrvl,has-wdt;=0A+ };=0A+ =0A+ MPP: mpp@= 10000 {=0A+ #pin-cells =3D <2>;=0A+ compatible =3D "mrvl,mpp";=0A+ = reg =3D <0x10000 0x34>;=0A+ pin-count =3D <50>;=0A+ pin-map =3D <=0A= + 0 1 /* MPP[0]: NF=5FIO[2] */=0A+ 1 1 /* MPP[1]: NF=5FIO[3] = */=0A+ 2 1 /* MPP[2]: NF=5FIO[4] */=0A+ 3 1 /* MPP[3]: NF=5FI= O[5] */=0A+ 4 1 /* MPP[4]: NF=5FIO[6] */=0A+ 5 1 /* MPP[5]: N= F=5FIO[7] */=0A+ 6 1 /* MPP[6]: SYSRST=5FOUTn */=0A+ 7 0 /* MP= P[7]: GPO[7] */=0A+ 8 1 /* MPP[8]: TW=5FSDA */=0A+ 9 1 /* MPP= [9]: TW=5FSCK */=0A+ 10 3 /* MPP[10]: UA0=5FTXD */=0A+ 11 3 /* M= PP[11]: UA0=5FRXD */=0A+ 12 1 /* MPP[12]: SD=5FCLK */=0A+ 13 1 /*= MPP[13]: SD=5FCMD */=0A+ 14 1 /* MPP[14]: SD=5FD[0] */=0A+ 15 1 = /* MPP[15]: SD=5FD[1] */=0A+ 16 1 /* MPP[16]: SD=5FD[2] */=0A+ 17 = 1 /* MPP[17]: SD=5FD[3] */=0A+ 18 1 /* MPP[18]: NF=5FIO[0] */=0A+ = 19 1 /* MPP[19]: NF=5FIO[1] */=0A+ 20 3 /* MPP[20]: GE1[0] */=0A+ = 21 3 /* MPP[21]: GE1[1] */=0A+ 22 3 /* MPP[22]: GE1[2] */=0A+ 2= 3 3 /* MPP[23]: GE1[3] */=0A+ 24 3 /* MPP[24]: GE1[4] */=0A+ 25 3= /* MPP[25]: GE1[5] */=0A+ 26 3 /* MPP[26]: GE1[6] */=0A+ 27 3 /= * MPP[27]: GE1[7] */=0A+ 28 0 /* MPP[28]: GPIO[28] */=0A+ 29 0 /*= MPP[29]: GPIO[29] */=0A+ 30 3 /* MPP[30]: GE1[10] */=0A+ 31 3 /*= MPP[31]: GE1[11] */=0A+ 32 3 /* MPP[32]: GE1[12] */=0A+ 33 3 /* = MPP[33]: GE1[13] */=0A+ 34 0 /* MPP[34]: GPIO[34] */=0A+ 35 2 /* = MPP[35]: TDM=5FCH0=5FTX=5FQL */=0A+ 36 2 /* MPP[36]: TDM=5FSPI=5FCS1 *= /=0A+ 37 2 /* MPP[37]: TDM=5FCH2=5FTX=5FQL */=0A+ 38 2 /* MPP[38]= : TDM=5FCH2=5FRX=5FQL */=0A+ 39 4 /* MPP[39]: AU=5FI2SBCLK */=0A+ = 40 4 /* MPP[40]: AU=5FI2SDO */=0A+ 41 4 /* MPP[41]: AU=5FI2SLRCLK */= =0A+ 42 4 /* MPP[42]: AU=5FI2SMCLK */=0A+ 43 4 /* MPP[43]: AU=5FI= 2SDI */=0A+ 44 4 /* MPP[44]: AU=5FEXTCLK */=0A+ 45 2 /* MPP[45]: = TDM=5FPCLK */=0A+ 46 2 /* MPP[46]: TDM=5FFS */=0A+ 47 2 /* MPP[47= ]: TDM=5FDRX */=0A+ 48 2 /* MPP[48]: TDM=5FDTX */=0A+ 49 2>; /* M= PP[49]: TDM=5FCH0=5FTX=5FQL */=0A+ };=0A+ =0A+ GPIO: gpio@10100 {=0A+ = #gpio-cells =3D <3>;=0A+ compatible =3D "mrvl,gpio";=0A+ reg =3D <0= x10100 0x20>;=0A+ gpio-controller =3D <1>;=0A+ pin-count =3D <50>;=0A= + interrupts =3D <35 36 37 38 39 40 41>;=0A+ interrupt-parent =3D <&P= IC>;=0A+ =0A+ =0A+ =0A+ =0A+ };=0A+ =0A+ rtc@10300 {=0A+ compa= tible =3D "mrvl,rtc";=0A+ reg =3D <0x10300 0x08>;=0A+ };=0A+ =0A+ tw= si@11000 {=0A+ #address-cells =3D <1>;=0A+ #size-cells =3D <0>;=0A+ = compatible =3D "mrvl,twsi";=0A+ reg =3D <0x11000 0x20>;=0A+ interru= pts =3D <43>;=0A+ interrupt-parent =3D <&PIC>;=0A+ };=0A+ =0A+ mdio0= : mdio@72000 {=0A+ device=5Ftype =3D "mdio";=0A+ compatible =3D= "mrvl,mdio";=0A+ reg =3D <72000 20>;=0A+ #address-cells =3D <1= >;=0A+ #size-cells =3D <0>;=0A+ =0A+ phy0: ethernet-phy@0 {=0A+= reg =3D <0>;=0A+ device=5Ftype =3D "ethernet-phy";=0A+ };=0A= + =0A+ =0A+ };=0A+ =0A+ mdio1: mdio@76000 {=0A+ device= =5Ftype =3D "mdio";=0A+ compatible =3D "mrvl,mdio";=0A+ reg =3D= <76000 20>;=0A+ #address-cells =3D <1>;=0A+ #size-cells =3D <0= >;=0A+ =0A+ phy1: ethernet-phy@0 {=0A+ reg =3D <1>;=0A+ = device=5Ftype =3D "ethernet-phy";=0A+ };=0A+ =0A+ =0A+ };= =0A+ =0A+ enet0: ethernet@72000 {=0A+ #address-cells =3D <1>;=0A+ #= size-cells =3D <1>;=0A+ model =3D "V2";=0A+ compatible =3D "mrvl,ge";= =0A+ reg =3D <0x72000 0x2000>;=0A+ ranges =3D <0x0 0x72000 0x2000>;= =0A+ local-mac-address =3D [ 00 00 00 00 00 00 ];=0A+ interrupts =3D = <12 13 14 11 46>;=0A+ interrupt-parent =3D <&PIC>;=0A+ phy-handle =3D= <&phy0>;=0A+ =0A+ };=0A+ =0A+ enet1: ethernet@76000 {=0A+ #address-= cells =3D <1>;=0A+ #size-cells =3D <1>;=0A+ model =3D "V2";=0A+ co= mpatible =3D "mrvl,ge";=0A+ reg =3D <0x76000 0x2000>;=0A+ ranges =3D = <0x0 0x76000 0x2000>;=0A+ local-mac-address =3D [ 00 00 00 00 00 00 ];= =0A+ interrupts =3D <16 17 18 15 47>;=0A+ interrupt-parent =3D <&PIC>= ;=0A+ phy-handle =3D <&phy1>;=0A+ /*=0A+ mdio@1 {=0A+ #address-ce= lls =3D <1>;=0A+ #size-cells =3D <0>;=0A+ compatible =3D "mrvl,mdio= ";=0A+ };=0A+ */=0A+ };=0A+ =0A+ serial0: serial@12000 {=0A+ comp= atible =3D "ns16550";=0A+ reg =3D <0x12000 0x20>;=0A+ reg-shift =3D <= 2>;=0A+ clock-frequency =3D <0>;=0A+ interrupts =3D <33>;=0A+ inte= rrupt-parent =3D <&PIC>;=0A+ };=0A+ /*=0A+ serial1: serial@12100 {=0A+ = compatible =3D "ns16550";=0A+ reg =3D <0x12100 0x20>;=0A+ reg-shif= t =3D <2>;=0A+ clock-frequency =3D <0>;=0A+ interrupts =3D <34>;=0A+ = interrupt-parent =3D <&PIC>;=0A+ };=0A+ */=0A+ =0A+ =0A+ crypto@= 30000 {=0A+ compatible =3D "mrvl,cesa";=0A+ reg =3D <0x30000 0x10000>= ;=0A+ interrupts =3D <22>;=0A+ interrupt-parent =3D <&PIC>;=0A+ };= =0A+ =0A+ usb@50000 {=0A+ compatible =3D "mrvl,usb-ehci", "usb-ehci";= =0A+ reg =3D <0x50000 0x1000>;=0A+ interrupts =3D <48 19>;=0A+ int= errupt-parent =3D <&PIC>;=0A+ };=0A+ =0A+ xor@60000 {=0A+ compatible= =3D "mrvl,xor";=0A+ reg =3D <0x60000 0x1000>;=0A+ interrupts =3D <5 = 6 7 8>;=0A+ interrupt-parent =3D <&PIC>;=0A+ };=0A+ =0A+ sata@80000 = {=0A+ compatible =3D "mrvl,sata";=0A+ reg =3D <0x80000 0x6000>;=0A+ = interrupts =3D <21>;=0A+ interrupt-parent =3D <&PIC>;=0A+ };=0A+ s= dio@90000 {=0A+ compatible =3D "mrvl,sdio";=0A+ reg =3D <0x90000 0x13= 4>;=0A+ interrupts =3D <28>;=0A+ interrupt-parent =3D <&PIC>;=0A+ = =0A+ gpios =3D <&GPIO 29 1 0x00030000 /* GPIO[29]: IN=5FPOL=5FLOW, IR= Q (edge) */=0A+ &GPIO 34 2 0x00000000>; /* GPIO[34]: OUT */ = =0A+ =0A+ };=0A+ };=0A+ =0A+ SRAM: sram@fd000000 {=0A+ compatible = =3D "mrvl,cesa-sram";=0A+ reg =3D <0xfd000000 0x00100000>;=0A+ };=0A+ = =0A+ chosen {=0A+ stdin =3D "serial0";=0A+ stdout =3D "serial0";=0A+ = };=0A+ =0A+ =0A+ pci0: pcie@f1040000 {=0A+ compatible =3D "mrvl,pcie";= =0A+ device=5Ftype =3D "pci";=0A+ #interrupt-cells =3D <1>;=0A+ #size= -cells =3D <2>;=0A+ #address-cells =3D <3>;=0A+ reg =3D <0xf1040000 0x2= 000>;=0A+ bus-range =3D <0 255>;=0A+ ranges =3D <0x02000000 0x0 0xf4000= 000 0xf4000000 0x0 0x04000000=0A+ 0x01000000 0x0 0x00000000 0xf1100000= 0x0 0x00100000>;=0A+ clock-frequency =3D <33333333>;=0A+ interrupt-par= ent =3D <&PIC>;=0A+ interrupts =3D <44>;=0A+ interrupt-map-mask =3D <0x= f800 0x0 0x0 0x7>;=0A+ interrupt-map =3D <=0A+ /* IDSEL 0x1 */=0A+ = 0x0800 0x0 0x0 0x1 &PIC 0x9=0A+ 0x0800 0x0 0x0 0x2 &PIC 0x9=0A+ 0x080= 0 0x0 0x0 0x3 &PIC 0x9=0A+ 0x0800 0x0 0x0 0x4 &PIC 0x9=0A+ >;=0A+ p= cie@0 {=0A+ reg =3D <0x0 0x0 0x0 0x0 0x0>;=0A+ #size-cells =3D <2>;= =0A+ #address-cells =3D <3>;=0A+ device=5Ftype =3D "pci";=0A+ rang= es =3D <0x02000000 0x0 0xf4000000=0A+ 0x02000000 0x0 0xf4000000=0A+ = 0x0 0x04040000=0A+ =0A+ 0x01000000 0x0 0x0=0A+ 0x01000000 = 0x0 0x0=0A+ 0x0 0x00100000>;=0A+ };=0A+ };=0A+ };=0Adiff -prN --ex= clude=3D.svn head=5Fr221725/sys/dev/mge/if=5Fmge.c head=5Fr221525/sys/dev/m= ge/if=5Fmge.c=0A*** head=5Fr221725/sys/dev/mge/if=5Fmge.c Tue May 10 10:19:= 23 2011=0A--- head=5Fr221525/sys/dev/mge/if=5Fmge.c Fri May 6 09:35:05 201= 1=0A***************=0A*** 34,40 ****=0A #endif=0A =0A #include =0A! =5F=5FFBSDID("$FreeBSD: head/sys/dev/mge/if=5Fmge.c 213893 2010-10= -15 14:52:11Z marius $");=0A =0A #include =0A #include =0A--- 34,40 ----=0A #endif=0A =0A #include =0A! = =5F=5FFBSDID("$FreeBSD$");=0A =0A #include =0A #include =0Adiff -prN --exclude=3D.svn head=5Fr221725/sys/dev/mmc/mmc.c he= ad=5Fr221525/sys/dev/mmc/mmc.c=0A*** head=5Fr221725/sys/dev/mmc/mmc.c Tue M= ay 10 10:17:04 2011=0A--- head=5Fr221525/sys/dev/mmc/mmc.c Fri May 6 09:04= :27 2011=0A*************** static devclass=5Ft mmc=5Fdevclass;=0A*** 1539,1= 542 ****=0A--- 1539,1543 ----=0A =0A =0A DRIVER=5FMODULE(mmc, at91=5Fmci= , mmc=5Fdriver, mmc=5Fdevclass, NULL, NULL);=0A+ DRIVER=5FMODULE(mmc, sdio,= mmc=5Fdriver, mmc=5Fdevclass, NULL, NULL);=0A DRIVER=5FMODULE(mmc, sdhci,= mmc=5Fdriver, mmc=5Fdevclass, NULL, NULL);=0A= ------=_NextPart_000_0004_01CC0F1F.88BA5F20-- From owner-freebsd-arm@FreeBSD.ORG Tue May 10 22:29:36 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BFB031065672 for ; Tue, 10 May 2011 22:29:36 +0000 (UTC) (envelope-from milu@dat.pl) Received: from jab.dat.pl (dat.pl [80.51.155.34]) by mx1.freebsd.org (Postfix) with ESMTP id 7C4478FC0A for ; Tue, 10 May 2011 22:29:36 +0000 (UTC) Received: from jab.dat.pl (jsrv.dat.pl [127.0.0.1]) by jab.dat.pl (Postfix) with ESMTP id A94C0EA; Wed, 11 May 2011 00:04:39 +0200 (CEST) X-Virus-Scanned: amavisd-new at dat.pl Received: from jab.dat.pl ([127.0.0.1]) by jab.dat.pl (jab.dat.pl [127.0.0.1]) (amavisd-new, port 10024) with LMTP id AwsEpo1K4xim; Wed, 11 May 2011 00:04:33 +0200 (CEST) Received: from snifi.laptop (87-205-165-167.adsl.inetia.pl [87.205.165.167]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by jab.dat.pl (Postfix) with ESMTPSA id 3BB9AD5; Wed, 11 May 2011 00:04:33 +0200 (CEST) From: Maciej Milewski To: freebsd-arm@freebsd.org Date: Wed, 11 May 2011 00:05:05 +0200 User-Agent: KMail/1.13.7 (FreeBSD/8.2-STABLE; KDE/4.6.2; i386; ; ) References: <5EABE6DCF1B84BAAA5460DD75F075C82@bcs.brunel.local> In-Reply-To: <5EABE6DCF1B84BAAA5460DD75F075C82@bcs.brunel.local> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable Message-Id: <201105110005.06003.milu@dat.pl> Cc: Tobias Quintern Subject: Re: SD/MMC driver for OpenRD Board X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 May 2011 22:29:36 -0000 Tuesday 10 of May 2011 14:35:39 Tobias Quintern napisa=B3(a): > The OPENRD-CL config tries to boot via BOOTP/NFS, which seems to be broken > momentarily. I have an older SVN checkout (r219450) where the board is ab= le > to boot from NFS. That kernel is patched quite similar to > http://www.freebsd.org/cgi/query-pr.cgi?pr=3D156814. > A bootlog of the failed boot is attached. >=20 > Regards > Tobias If your tree is after 20110427 then this may be the cause: 20110427: The default NFS client is now the new NFS client, so fstype "newnfs" is now "nfs" and the regular/old NFS client is now fstype "oldnfs". Although mounts via fstype "nfs" will usually work without userland changes, it is recommended that the mount(8) and mount_nfs(8) commands be rebuilt from sources and that a link to mount_nfs called mount_oldnfs be created. The new client is compiled into the kernel with "options NFSCL" and this is needed for diskless root file systems. The GENERIC kernel configs have been changed to use NFSCL and NFSD (the new server) instead of NFSCLIENT and NFSSERVER. To use the regular/old client, you can "mount -t oldnfs ...". For a diskless root file system, you must also include a line like: vfs.root.mountfrom=3D"oldnfs:" in the boot/loader.conf on the root fs on the NFS server to make a diskless root fs use the old client. Regards, Maciej Milewski From owner-freebsd-arm@FreeBSD.ORG Wed May 11 06:39:01 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6560F106566B for ; Wed, 11 May 2011 06:39:01 +0000 (UTC) (envelope-from Tobias.Quintern@brunel.de) Received: from mailgate2.arcor-ip.de (mailgate2.arcor-ip.de [145.253.2.48]) by mx1.freebsd.org (Postfix) with ESMTP id C63A78FC16 for ; Wed, 11 May 2011 06:39:00 +0000 (UTC) Received: from mailer.brunellocal.de (ffmcospub2ffmbrunelfw2lo-cs-nat-mail-server.adm.arcor.net [145.254.28.157]) by mailgate1.cs.arcor.net (Arcor-CN-MailRelay-l-B) with ESMTP id 21629FBC2CD for ; Wed, 11 May 2011 08:38:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by localhost (Postfix) with ESMTP id DF1A250FA2 for ; Wed, 11 May 2011 08:38:58 +0200 (CEST) X-Virus-Scanned: amavisd-new at brunellocal.de Received: from mailer.brunellocal.de ([127.0.0.1]) by localhost (mailer.brunellocal.de [127.0.0.1]) (amavisd-new, port 10024) with SMTP id 4e86QKBFXzxn for ; Wed, 11 May 2011 08:38:58 +0200 (CEST) Received: from mail-hv.brunel.de (mail-hv.brunellocal.de [192.168.1.234]) by mailer.brunellocal.de (Postfix) with ESMTP id BF424396CF for ; Wed, 11 May 2011 08:38:58 +0200 (CEST) Received: from bcslx10.bcs.brunel.local ([172.16.101.231]) by 935s02su.brunellocal.de (Lotus Domino Release 7.0.4FP1) with ESMTP id 2011051108385732-67182 ; Wed, 11 May 2011 08:38:57 +0200 Received: from BCSPC109 (bcspc109.bcs.brunel.local [172.16.101.126]) by bcslx10.bcs.brunel.local (Postfix) with ESMTP id C0157FD861 for ; Wed, 11 May 2011 08:38:57 +0200 (CEST) From: "Tobias Quintern" To: Date: Wed, 11 May 2011 08:38:57 +0200 Message-ID: <6C64D98649E646D291B714CEAEF36D6E@bcs.brunel.local> MIME-Version: 1.0 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook, Build 10.0.6863 Importance: Normal Thread-Index: AcwPXkJEQl3qQdQkQNmvBDxgIJVQwgARTksg X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.6090 In-Reply-To: <201105110005.06003.milu@dat.pl> X-MIMETrack: Itemize by SMTP Server on HUB93501/Brunel/De(Release 7.0.4FP1|July 20, 2009) at 11.05.2011 08:38:57 AM, Serialize by Router on HUB10149/Brunel/De(Release 7.0.4FP1|July 20, 2009) at 11.05.2011 08:38:58 AM, Serialize complete at 11.05.2011 08:38:58 AM Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-2" X-Mailman-Approved-At: Wed, 11 May 2011 11:10:53 +0000 Subject: AW: SD/MMC driver for OpenRD Board X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 11 May 2011 06:39:01 -0000 The kernel is able to boot from NFS again, when compiled with "option NFSCL". Mounting in userspace is working again, as well. Thanks for pointing that out. Regards, Tobias Quintern -----Urspr=FCngliche Nachricht----- Von: Maciej Milewski [mailto:milu@dat.pl]=20 Gesendet: Mittwoch, 11. Mai 2011 00:05 An: freebsd-arm@freebsd.org Cc: Tobias Quintern Betreff: Re: SD/MMC driver for OpenRD Board Tuesday 10 of May 2011 14:35:39 Tobias Quintern napisa=B3(a): > The OPENRD-CL config tries to boot via BOOTP/NFS, which seems to be=20 > broken momentarily. I have an older SVN checkout (r219450) where the=20 > board is able to boot from NFS. That kernel is patched quite similar=20 > to http://www.freebsd.org/cgi/query-pr.cgi?pr=3D156814. > A bootlog of the failed boot is attached. >=20 > Regards > Tobias If your tree is after 20110427 then this may be the cause: 20110427: The default NFS client is now the new NFS client, so fstype = "newnfs" is now "nfs" and the regular/old NFS client is now fstype = "oldnfs". Although mounts via fstype "nfs" will usually work without = userland changes, it is recommended that the mount(8) and mount_nfs(8) commands be rebuilt from sources and that a link to mount_nfs = called mount_oldnfs be created. The new client is compiled into the kernel with "options NFSCL" and this is needed for diskless root file systems. The GENERIC kernel configs have been changed to = use NFSCL and NFSD (the new server) instead of NFSCLIENT and = NFSSERVER. To use the regular/old client, you can "mount -t oldnfs ...". = For a diskless root file system, you must also include a line like: vfs.root.mountfrom=3D"oldnfs:" in the boot/loader.conf on the root fs on the NFS server to make a diskless root fs use the old client. Regards, Maciej Milewski From owner-freebsd-arm@FreeBSD.ORG Wed May 11 22:35:55 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EEC8D106566B for ; Wed, 11 May 2011 22:35:55 +0000 (UTC) (envelope-from damjan.marion@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 760E58FC0C for ; Wed, 11 May 2011 22:35:55 +0000 (UTC) Received: by wyf23 with SMTP id 23so1014958wyf.13 for ; Wed, 11 May 2011 15:35:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:content-type:mime-version:subject:from :in-reply-to:date:content-transfer-encoding:message-id:references:to :x-mailer; bh=EtvQKasi/q8zB9KZzdNk3w9zDqFMUFrbR/YKD9/TbaQ=; b=KF2QX1IXWDy1gSIidtEg4+pQuqJxte906Rt238xtV1O9c7t1qxTeUp5kV8/iOfm2iJ mN4ffe43A/7bnzLixzuzRpCUvRs7yb2KsW7jHHp3n2z9lCOXwGmuctMPjixO1YKJvYpp UN3yNzC2H2qe8NnIIG9bUgpv6+vYnNl9HbNgY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=content-type:mime-version:subject:from:in-reply-to:date :content-transfer-encoding:message-id:references:to:x-mailer; b=go6+nK8uoqoMSbLQ6f+mUXUv1N/b01LQg9x2ngELxzD+oEtYHX/oYdC42dTOxZrSex Tjsd2ID6popRTrxb7bRaABz+rdJbgxSDHiHlnG9mPulqLfg82GDqwWWGMYT3BuJbsW2J uwqvmzP8VfD3a86mw4Q6UZyjvjgyLL9c8gu7g= Received: by 10.227.10.67 with SMTP id o3mr10158772wbo.26.1305153354238; Wed, 11 May 2011 15:35:54 -0700 (PDT) Received: from [192.168.123.4] (cpe-109-60-66-194.zg3.cable.xnet.hr [109.60.66.194]) by mx.google.com with ESMTPS id y29sm386917wbd.4.2011.05.11.15.35.52 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 11 May 2011 15:35:52 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Apple Message framework v1084) From: Damjan Marion In-Reply-To: Date: Thu, 12 May 2011 00:35:50 +0200 Content-Transfer-Encoding: quoted-printable Message-Id: <2A67CDC2-37BA-4ABE-9E7E-8C151E7E9887@gmail.com> References: To: freebsd-arm@freebsd.org X-Mailer: Apple Mail (2.1084) Subject: Re: Few issues with Marvell code X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 11 May 2011 22:35:56 -0000 On May 3, 2011, at 10:42 PM, Damjan Marion wrote: >=20 > Hi, >=20 > During my attempt to bring up 88F5181L I found few issues with current = marvell code: >=20 > 1. There is a typo in sys/arm/mv/common.c >=20 > - { "mvrl,pcie", &decode_win_pcie_setup, NULL }, > + { "mrvl,pcie", &decode_win_pcie_setup, NULL }, >=20 >=20 > 2. Even if this is fixed, decode_win_pcie_setup will not be executed = as in FDT file pci tree sits outside of SOC tree >=20 >=20 > 3. CPU decode windows setup in FDT localbus tree is missing target, = instead target is hardcoded to 1: >=20 > cpu_win_tbl[t].target =3D 1;=20 >=20 > On other side 1st column looks like a sequence. Is this 1st column = needed?=20 > Can we extend this definition to also have target defined? >=20 > I.e. In case of 88F5181L I need to add following window, and it will = be more convenient to do that in FDT file. >=20 > cpu_win_tbl[++t].target =3D 0x04; > cpu_win_tbl[t].attr =3D 0x79; > cpu_win_tbl[t].base =3D 0xf0000000; > cpu_win_tbl[t].size =3D 0x01000000; > cpu_win_tbl[t].remap =3D -1; >=20 I will appreciate if somebody can comment this :) Thanks, Damjan= From owner-freebsd-arm@FreeBSD.ORG Thu May 12 08:48:12 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0EC06106564A for ; Thu, 12 May 2011 08:48:12 +0000 (UTC) (envelope-from vladimir-its@yandex.ru) Received: from forward3.mail.yandex.net (forward3.mail.yandex.net [77.88.46.8]) by mx1.freebsd.org (Postfix) with ESMTP id 7F68F8FC17 for ; Thu, 12 May 2011 08:48:11 +0000 (UTC) Received: from web64.yandex.ru (web64.yandex.ru [77.88.47.165]) by forward3.mail.yandex.net (Yandex) with ESMTP id 9E188B415C4 for ; Thu, 12 May 2011 12:29:19 +0400 (MSD) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1305188959; bh=OojqI5j2N/JoX0onXV8et0rnsu9lgVbboVgfZ1yxDQU=; h=From:To:Subject:MIME-Version:Message-Id:Date: Content-Transfer-Encoding:Content-Type; b=gBFX6nZQybHE3D62M43cCkrSKet1pAOF4iEsIEPJzLMkBl7W9e9NpInYkm1dxHNeH gLhy47RGcqrahN12yWHtb2y4BrDXbZ0LoCJoycafvSKVjvTox59pqwubEvIdTF4jBv GqxW1nWOyuZ/NtEkc1lh8mnoHOT8dKL7v30dVg+0= Received: from localhost (localhost.localdomain [127.0.0.1]) by web64.yandex.ru (Yandex) with ESMTP id 93B90468038 for ; Thu, 12 May 2011 12:29:19 +0400 (MSD) X-Yandex-Spam: 1 Received: from 91.206.19.225.base-net.ru (91.206.19.225.base-net.ru [91.206.19.225]) by mail.yandex.ru with HTTP; Thu, 12 May 2011 12:29:18 +0400 From: =?koi8-r?B?98zBxMnNydIg5sXdxc7Lzw==?= To: freebsd-arm@freebsd.org MIME-Version: 1.0 Message-Id: <578421305188959@web64.yandex.ru> Date: Thu, 12 May 2011 12:29:18 +0400 X-Mailer: Yamail [ http://yandex.ru ] 5.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain X-Mailman-Approved-At: Thu, 12 May 2011 11:37:33 +0000 Subject: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 08:48:12 -0000 Hi! I have installed FreeBSD on GT2440 ARM9 development board (S3C2440A SoC). I'm try compile next simple code: Code: %cat test.c #include #include int main(int argc, char *argv[]) { unsigned int area_size = 1024*1024; unsigned int *p = (unsigned int *)malloc(area_size * sizeof(unsigned int)); if(p){ unsigned int cnt = 32; while(cnt > 0){ unsigned int i = 0; while(i < area_size){ p[i] = i; i++; } cnt--; } free(p); }else{ printf("memory allocation failed.\n"); } return(0); } %cc -O0 -o test test.c and execute it: Code: %/usr/bin/time -l ./test 120.16 real 119.44 user 0.16 sys 4824 maximum resident set size 4 average shared memory size 963 average unshared data size 128 average unshared stack size 1101 page reclaims 0 page faults 0 swaps 0 block input operations 0 block output operations 1 messages sent 0 messages received 0 signals received 2 voluntary context switches 12177 involuntary context switches time of execution is over 120 sec ... but after system reboot: Code: %/usr/bin/time -l ./test 2.85 real 2.55 user 0.25 sys 4824 maximum resident set size 4 average shared memory size 953 average unshared data size 129 average unshared stack size 1101 page reclaims 0 page faults 0 swaps 0 block input operations 0 block output operations 1 messages sent 0 messages received 0 signals received 3 voluntary context switches 292 involuntary context switches execution time is 2.85(!) sec, but it's not all! Code: %cat test > /dev/null %/usr/bin/time -l ./test 120.40 real 119.51 user 0.23 sys 4824 maximum resident set size 4 average shared memory size 963 average unshared data size 128 average unshared stack size 1101 page reclaims 0 page faults 0 swaps 0 block input operations 0 block output operations 1 messages sent 0 messages received 0 signals received 2 voluntary context switches 12201 involuntary context switches Once the file has been opened for reading (cat test > /dev/null), execution time again increased to 120 sec (until the next reboot). What is it?! From owner-freebsd-arm@FreeBSD.ORG Thu May 12 12:49:04 2011 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6E7F9106566B; Thu, 12 May 2011 12:49:04 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id 0EBEC8FC1A; Thu, 12 May 2011 12:49:03 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.4/8.14.4) with ESMTP id p4CCn3dw096888; Thu, 12 May 2011 08:49:03 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.4/8.14.4/Submit) id p4CCn3k6096887; Thu, 12 May 2011 12:49:03 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 12 May 2011 12:49:03 GMT Message-Id: <201105121249.p4CCn3k6096887@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Precedence: bulk Cc: Subject: [head tinderbox] failure on arm/arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 12:49:04 -0000 TB --- 2011-05-12 12:00:00 - tinderbox 2.7 running on freebsd-current.sentex.ca TB --- 2011-05-12 12:00:00 - starting HEAD tinderbox run for arm/arm TB --- 2011-05-12 12:00:00 - cleaning the object tree TB --- 2011-05-12 12:00:21 - cvsupping the source tree TB --- 2011-05-12 12:00:21 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/arm/arm/supfile TB --- 2011-05-12 12:01:08 - building world TB --- 2011-05-12 12:01:08 - MAKEOBJDIRPREFIX=/obj TB --- 2011-05-12 12:01:08 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-05-12 12:01:08 - TARGET=arm TB --- 2011-05-12 12:01:08 - TARGET_ARCH=arm TB --- 2011-05-12 12:01:08 - TZ=UTC TB --- 2011-05-12 12:01:08 - __MAKE_CONF=/dev/null TB --- 2011-05-12 12:01:08 - cd /src TB --- 2011-05-12 12:01:08 - /usr/bin/make -B buildworld >>> World build started on Thu May 12 12:01:08 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o from from.o gzip -cn /src/usr.bin/from/from.1 > from.1.gz ===> usr.bin/fstat (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/fstat/fstat.c cc1: warnings being treated as errors /src/usr.bin/fstat/fstat.c: In function 'print_vnode_info': /src/usr.bin/fstat/fstat.c:455: warning: format '%6ld' expects type 'long int', but argument 2 has type 'uint64_t' /src/usr.bin/fstat/fstat.c:464: warning: format '%6lu' expects type 'long unsigned int', but argument 2 has type 'uint64_t' *** Error code 1 Stop in /src/usr.bin/fstat. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-05-12 12:49:02 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-05-12 12:49:02 - ERROR: failed to build world TB --- 2011-05-12 12:49:02 - 2102.50 user 606.36 system 2941.91 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Thu May 12 14:13:25 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 966F8106566C for ; Thu, 12 May 2011 14:13:25 +0000 (UTC) (envelope-from marktinguely@gmail.com) Received: from mail-yw0-f54.google.com (mail-yw0-f54.google.com [209.85.213.54]) by mx1.freebsd.org (Postfix) with ESMTP id 4A2728FC1B for ; Thu, 12 May 2011 14:13:24 +0000 (UTC) Received: by ywf7 with SMTP id 7so660834ywf.13 for ; Thu, 12 May 2011 07:13:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:message-id:date:from:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=W1FHpC+UX+X7IJa94fTEdrqHGhQZ/AC5tgI2XYd1xM4=; b=ZZTL5ey8+UgEKySVnlniZIvINjRaCfRWB3VcHdPTU4RAOvA9SIMDCC6vXU8VSsvh7e DsDPwf6bdGX4YKuRybPifpanyCyiDK5G8jqLHg+oIz1gNAqXUhLEWpSQbp+8aWNsspsJ h5OnyUKEEGyXaLdSnzww5FO4H3GeFpxNMhc6Q= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; b=NaR+PjAjoNjo9Qwq2u/KDcZVND6RJDolhnR7LlxE5KeZfZEQ4k+nkHdS1jokmw6Bn7 OHL8ZQ4oL/B/Q2BO+kJ4DrLFVXYwc3qc6Jqv5bK+lQ7K/yNIJZ77d4If6p3oIFlaBMXz HRDuK0TZwHZmvwIo6t/CwVcHLeP5w408rQrBw= Received: by 10.100.211.13 with SMTP id j13mr140708ang.111.1305209604470; Thu, 12 May 2011 07:13:24 -0700 (PDT) Received: from [192.168.1.111] (173-19-151-200.client.mchsi.com [173.19.151.200]) by mx.google.com with ESMTPS id d17sm820481ann.39.2011.05.12.07.13.23 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 12 May 2011 07:13:23 -0700 (PDT) Message-ID: <4DCBEB00.3040608@gmail.com> Date: Thu, 12 May 2011 09:13:20 -0500 From: Mark Tinguely User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?UTF-8?B?0JLQu9Cw0LTQuNC80LjRgCDQpNC10YnQtdC90LrQvg==?= References: <578421305188959@web64.yandex.ru> In-Reply-To: <578421305188959@web64.yandex.ru> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 14:13:25 -0000 On 5/12/2011 3:29 AM, Владимир Фещенко wrote: > %cc -O0 -o test test.c > > and execute it: > > Code: > > %/usr/bin/time -l ./test > 120.16 real 119.44 user 0.16 sys > 12177 involuntary context switches > > time of execution is over 120 sec ... but after system reboot: > > Code: > > %/usr/bin/time -l ./test > 2.85 real 2.55 user 0.25 sys > 292 involuntary context switches > > execution time is 2.85(!) sec, but it's not all! > > Code: > > %cat test> /dev/null > > %/usr/bin/time -l ./test > 120.40 real 119.51 user 0.23 sys > 12201 involuntary context switches > > Once the file has been opened for reading (cat test> /dev/null), execution time again increased to 120 sec (until the next reboot). > > What is it?! Sounds like the executable cache gets disabled on the executable page that is also writable issue that we talked about year or so ago. If you want a quick test, in pmap_fix_cache(), and exit the routine immediately if the mapping is executable. I did some tracing, and there are cases where this is not the correct solution - executable mappings that are really shared and cache should be disabled. I have a idea level patch for this but never tested it well enough. I also notice a huge jump in "involuntary context switch" counts in your runs. --Mark Tinguely From owner-freebsd-arm@FreeBSD.ORG Thu May 12 16:20:25 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2CBED1065672 for ; Thu, 12 May 2011 16:20:25 +0000 (UTC) (envelope-from vladimir-its@yandex.ru) Received: from forward11.mail.yandex.net (forward11.mail.yandex.net [95.108.130.93]) by mx1.freebsd.org (Postfix) with ESMTP id AC9DC8FC0C for ; Thu, 12 May 2011 16:20:24 +0000 (UTC) Received: from web154.yandex.ru (web154.yandex.ru [95.108.131.167]) by forward11.mail.yandex.net (Yandex) with ESMTP id 02761E8186C; Thu, 12 May 2011 20:20:22 +0400 (MSD) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1305217223; bh=VdxfnlnojbexAvlK8bo5oFRBpqhGJetTniGUZ5d/HVQ=; h=From:To:Cc:In-Reply-To:References:Subject:MIME-Version:Message-Id: Date:Content-Transfer-Encoding:Content-Type; b=f+r8MFWpYV0fiz5Hjr4vzkAWRdq+pHSMpfGVpD5RwbEBeZ01tpAI4pGft677lUqgU 2ChO/aYhuXOIkUz+E2r14nbuBqWGbXj8HERiUmos9bhuxJK4kBrnKh8mLg6qB6Y271 5Askx9Cde3EEuoNy0QQPnYYgwp4z+Bz6GCsSi9SY= Received: from localhost (localhost.localdomain [127.0.0.1]) by web154.yandex.ru (Yandex) with ESMTP id E47971140054; Thu, 12 May 2011 20:20:22 +0400 (MSD) X-Yandex-Spam: 1 Received: from 91.206.19.225.base-net.ru (91.206.19.225.base-net.ru [91.206.19.225]) by mail.yandex.ru with HTTP; Thu, 12 May 2011 20:20:21 +0400 From: =?koi8-r?B?98zBxMnNydIg5sXdxc7Lzw==?= To: rozhuk.im@gmail.com In-Reply-To: <4dcbf64e.171de30a.7f21.4894@mx.google.com> References: <578421305188959@web64.yandex.ru> <4dcbf64e.171de30a.7f21.4894@mx.google.com> Message-Id: <851631305217222@web154.yandex.ru> Date: Thu, 12 May 2011 20:20:21 +0400 X-Mailer: Yamail [ http://yandex.ru ] 5.0 Content-Transfer-Encoding: base64 X-Mailman-Approved-At: Thu, 12 May 2011 16:37:43 +0000 MIME-Version: 1.0 Content-Type: text/plain X-Content-Filtered-By: Mailman/MimeDel 2.1.5 Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 16:20:25 -0000 PGRpdj4xMi4wNS4yMDExLCAxOTowMSwgcm96aHVrLmltQGdtYWlsLmNvbTo8L2Rpdj48ZG l2PiZn dDsgTWF5IGJlIHVuc2lnbmVkIGludCAqcCA9ICh1bnNpZ25lZCBpbnQgKiltYWxsb2MoYX JlYV9z aXplICogc2l6ZW9mKHVuc2lnbmVkPC9kaXY+PGRpdj4mZ3Q7IGludCkpOzwvZGl2PjxkaX Y+Jmd0 OyBtdXN0IGJlIGFsaWduIDQgYnl0ZT88L2Rpdj48ZGl2PiZndDs8L2Rpdj48ZGl2PiZndD sgLS08 L2Rpdj48ZGl2PiZndDsgUm96aHVrIEl2YW48L2Rpdj48ZGl2PiZuYnNwOzwvZGl2PjxkaX Y+WWVz IG9mIGNvdXJzZSwgaXQncyBtdXN0IGJlIGFuZCBpdCdzIGlzLiBMaXR0bGUgbW9kaWZpY2 F0aW9u IG9mIHNvdXJjZSBjb2RlOjwvZGl2PjxkaXY+Jm5ic3A7PC9kaXY+PGRpdj48c3BhbiBzdH lsZT0i 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Jm5ic3A7IGJsb2NrIGlucHV0IG9wZXJhdGlvbnM8YnIgLz4mbmJzcDsmbmJzcDsmbmJzcD smbmJz cDsmbmJzcDsmbmJzcDsmbmJzcDsmbmJzcDsgMCZuYnNwOyBibG9jayBvdXRwdXQgb3Blcm F0aW9u czxiciAvPiZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYn NwOyAx Jm5ic3A7IG1lc3NhZ2VzIHNlbnQ8YnIgLz4mbmJzcDsmbmJzcDsmbmJzcDsmbmJzcDsmbm JzcDsm bmJzcDsmbmJzcDsmbmJzcDsgMCZuYnNwOyBtZXNzYWdlcyByZWNlaXZlZDxiciAvPiZuYn NwOyZu YnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyZuYnNwOyAwJm5ic3A7IHNpZ2 5hbHMg cmVjZWl2ZWQ8YnIgLz4mbmJzcDsmbmJzcDsmbmJzcDsmbmJzcDsmbmJzcDsmbmJzcDsmbm JzcDsm bmJzcDsgMiZuYnNwOyB2b2x1bnRhcnkgY29udGV4dCBzd2l0Y2hlczxiciAvPiZuYnNwOy ZuYnNw OyZuYnNwOyZuYnNwOyAxMjE3NyZuYnNwOyBpbnZvbHVudGFyeSBjb250ZXh0IHN3aXRjaG VzPC9z cGFuPjwvZGl2PjxkaXY+Jm5ic3A7PC9kaXY+PGRpdj5wIGlzIGFsaWduZWQgLi4uPC9kaX Y+ From owner-freebsd-arm@FreeBSD.ORG Thu May 12 17:49:21 2011 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D609C1065678; Thu, 12 May 2011 17:49:21 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) by mx1.freebsd.org (Postfix) with ESMTP id 777B18FC0A; Thu, 12 May 2011 17:49:21 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.4/8.14.4) with ESMTP id p4CHnKen088220; Thu, 12 May 2011 13:49:20 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.4/8.14.4/Submit) id p4CHnKni088219; Thu, 12 May 2011 17:49:20 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 12 May 2011 17:49:20 GMT Message-Id: <201105121749.p4CHnKni088219@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Precedence: bulk Cc: Subject: [head tinderbox] failure on arm/arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 17:49:21 -0000 TB --- 2011-05-12 17:00:01 - tinderbox 2.7 running on freebsd-current.sentex.ca TB --- 2011-05-12 17:00:01 - starting HEAD tinderbox run for arm/arm TB --- 2011-05-12 17:00:01 - cleaning the object tree TB --- 2011-05-12 17:00:10 - cvsupping the source tree TB --- 2011-05-12 17:00:10 - /usr/bin/csup -z -r 3 -g -L 1 -h cvsup.sentex.ca /tinderbox/HEAD/arm/arm/supfile TB --- 2011-05-12 17:00:55 - building world TB --- 2011-05-12 17:00:55 - MAKEOBJDIRPREFIX=/obj TB --- 2011-05-12 17:00:55 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2011-05-12 17:00:55 - TARGET=arm TB --- 2011-05-12 17:00:55 - TARGET_ARCH=arm TB --- 2011-05-12 17:00:55 - TZ=UTC TB --- 2011-05-12 17:00:55 - __MAKE_CONF=/dev/null TB --- 2011-05-12 17:00:55 - cd /src TB --- 2011-05-12 17:00:55 - /usr/bin/make -B buildworld >>> World build started on Thu May 12 17:00:56 UTC 2011 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o from from.o gzip -cn /src/usr.bin/from/from.1 > from.1.gz ===> usr.bin/fstat (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/usr.bin/fstat/fstat.c cc1: warnings being treated as errors /src/usr.bin/fstat/fstat.c: In function 'print_vnode_info': /src/usr.bin/fstat/fstat.c:455: warning: format '%6ld' expects type 'long int', but argument 2 has type 'uint64_t' /src/usr.bin/fstat/fstat.c:464: warning: format '%6lu' expects type 'long unsigned int', but argument 2 has type 'uint64_t' *** Error code 1 Stop in /src/usr.bin/fstat. *** Error code 1 Stop in /src/usr.bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2011-05-12 17:49:19 - WARNING: /usr/bin/make returned exit code 1 TB --- 2011-05-12 17:49:19 - ERROR: failed to build world TB --- 2011-05-12 17:49:19 - 2114.13 user 613.04 system 2958.75 real http://tinderbox.freebsd.org/tinderbox-head-HEAD-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Thu May 12 17:31:42 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B471F106564A for ; Thu, 12 May 2011 17:31:42 +0000 (UTC) (envelope-from vladimir-its@yandex.ru) Received: from forward15.mail.yandex.net (forward15.mail.yandex.net [95.108.130.119]) by mx1.freebsd.org (Postfix) with ESMTP id 649898FC14 for ; Thu, 12 May 2011 17:31:42 +0000 (UTC) Received: from web156.yandex.ru (web156.yandex.ru [95.108.131.169]) by forward15.mail.yandex.net (Yandex) with ESMTP id 439D09E0C41; Thu, 12 May 2011 21:31:19 +0400 (MSD) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1305221479; bh=ZDlakgG27CPZHF86XUdgSmDlYfRh1HD2HLu+TFQ8p94=; h=From:To:Cc:In-Reply-To:References:Subject:MIME-Version:Message-Id: Date:Content-Transfer-Encoding:Content-Type; b=OHHrB2fV4jPnCyl3dPfCKZCntUNfYKg5bbR4ex16IV6f5dkvs1RiFRtb8UjCsi/cg aERUFV0x/SKacbxbbu/QwE/aBYCzUKq0eaRfa5mxZtzATx9/hAlcENnDMs3gF3tGBE mvzQjCEhASCdE1yQWkWxCg8YbqamruxkGtMW/uig= Received: from localhost (localhost.localdomain [127.0.0.1]) by web156.yandex.ru (Yandex) with ESMTP id 2E7E542381D7; Thu, 12 May 2011 21:31:19 +0400 (MSD) X-Yandex-Spam: 1 Received: from 91.206.19.225.base-net.ru (91.206.19.225.base-net.ru [91.206.19.225]) by mail.yandex.ru with HTTP; Thu, 12 May 2011 21:31:15 +0400 From: =?koi8-r?B?98zBxMnNydIg5sXdxc7Lzw==?= To: Mark Tinguely In-Reply-To: <4DCBEB00.3040608@gmail.com> References: <578421305188959@web64.yandex.ru> <4DCBEB00.3040608@gmail.com> MIME-Version: 1.0 Message-Id: <881651305221476@web156.yandex.ru> Date: Thu, 12 May 2011 21:31:15 +0400 X-Mailer: Yamail [ http://yandex.ru ] 5.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=koi8-r X-Mailman-Approved-At: Thu, 12 May 2011 18:13:55 +0000 Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 17:31:42 -0000 12.05.2011, 18:13, "Mark Tinguely" : > On 5/12/2011 3:29 AM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: > >> š%cc -O0 -o test test.c >> >> šand execute it: >> >> šCode: >> >> š%/usr/bin/time -l ./test >> šššššššš120.16 real šššššš119.44 user šššššššš0.16 sys >> ššššššš12177 šinvoluntary context switches >> >> štime of execution is over 120 sec ... but after system reboot: >> >> šCode: >> >> š%/usr/bin/time -l ./test >> šššššššššš2.85 real šššššššš2.55 user šššššššš0.25 sys >> ššššššššš292 šinvoluntary context switches >> >> šexecution time is 2.85(!) sec, but it's not all! >> >> šCode: >> >> š%cat test> š/dev/null >> >> š%/usr/bin/time -l ./test >> šššššššš120.40 real šššššš119.51 user šššššššš0.23 sys >> ššššššš12201 šinvoluntary context switches >> >> šOnce the file has been opened for reading (cat test> š/dev/null), execution time again increased to 120 sec (until the next reboot). >> >> šWhat is it?! > > Sounds like the executable cache gets disabled on the executable page > that is also writable issue that we talked about year or so ago. If you > want a quick test, in pmap_fix_cache(), and exit the routine immediately > if the mapping is executable. I did some tracing, and there are cases > where this is not the correct solution - executable mappings that are > really shared and cache should be disabled. I have a idea level patch > for this but never tested it well enough. > > I also notice a huge jump in "involuntary context switch" counts in your > runs. > > --Mark Tinguely please, i want code sample for use pmap_fix_cache() :) may be this issue is caching problem ... but why 'open for read' make this effect? From owner-freebsd-arm@FreeBSD.ORG Thu May 12 18:53:01 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AFAAB1065740 for ; Thu, 12 May 2011 18:53:01 +0000 (UTC) (envelope-from marktinguely@gmail.com) Received: from mail-qw0-f54.google.com (mail-qw0-f54.google.com [209.85.216.54]) by mx1.freebsd.org (Postfix) with ESMTP id 63F658FC16 for ; Thu, 12 May 2011 18:53:01 +0000 (UTC) Received: by qwc9 with SMTP id 9so1252722qwc.13 for ; Thu, 12 May 2011 11:53:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:message-id:date:from:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type; bh=tHs3J8+k029PZlMHwfNyNeU8u+/lB4LCWODQwrvyKsY=; b=LN7gqqobKF0m4EgQxcymcSqUIox30eo+E9Vzq3iEPZegKnSTyQiAMTfriqq0JdxjAG OOo5bGTucMv7ypa5xmprQpr0s4uQ7cg6cCg6Vm4DwTj8VzGKUnRsrqF1oLUNCS/pg4hN 0q3nszmN8ywnWWkH5Mn36Ozz6yntFy1fVsMGk= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type; b=T4pOQ2PbnwXfQRtimlNbf7OllUQIvGhCrJTx54OD0gUf1+IRMxE8IkxREJiMgYEfXa IGzMkB24+d5OA7TigSb4q5NeOjxIZgj+/yUoR80SUVaoxwhXsSpEhxk03UMuuNPMeTQc gLJpwX7f5OMp3RQGr0P7Q/uE2YcAmj8S8B3vI= Received: by 10.224.112.204 with SMTP id x12mr468841qap.384.1305226380608; Thu, 12 May 2011 11:53:00 -0700 (PDT) Received: from [192.168.1.111] (173-19-151-200.client.mchsi.com [173.19.151.200]) by mx.google.com with ESMTPS id l38sm877543qck.6.2011.05.12.11.52.59 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 12 May 2011 11:52:59 -0700 (PDT) Message-ID: <4DCC2C88.3030809@gmail.com> Date: Thu, 12 May 2011 13:52:56 -0500 From: Mark Tinguely User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?KOI8-R?Q?=F7=CC=C1=C4=C9=CD=C9=D2_=E6=C5=DD=C5=CE=CB=CF?= References: <578421305188959@web64.yandex.ru> <4DCBEB00.3040608@gmail.com> <881651305221476@web156.yandex.ru> In-Reply-To: <881651305221476@web156.yandex.ru> Content-Type: multipart/mixed; boundary="------------000601050508020001050305" Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 18:53:01 -0000 This is a multi-part message in MIME format. --------------000601050508020001050305 Content-Type: text/plain; charset=KOI8-R; format=flowed Content-Transfer-Encoding: 8bit On 5/12/2011 12:31 PM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: > 12.05.2011, 18:13, "Mark Tinguely": >> On 5/12/2011 3:29 AM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: >> >>> %cc -O0 -o test test.c >>> >>> and execute it: >>> >>> Code: >>> >>> %/usr/bin/time -l ./test >>> 120.16 real 119.44 user 0.16 sys >>> 12177 involuntary context switches >>> >>> time of execution is over 120 sec ... but after system reboot: >>> >>> Code: >>> >>> %/usr/bin/time -l ./test >>> 2.85 real 2.55 user 0.25 sys >>> 292 involuntary context switches >>> >>> execution time is 2.85(!) sec, but it's not all! >>> >>> Code: >>> >>> %cat test> /dev/null >>> >>> %/usr/bin/time -l ./test >>> 120.40 real 119.51 user 0.23 sys >>> 12201 involuntary context switches >>> >>> Once the file has been opened for reading (cat test> /dev/null), execution time again increased to 120 sec (until the next reboot). >>> >>> What is it?! >> Sounds like the executable cache gets disabled on the executable page >> that is also writable issue that we talked about year or so ago. If you >> want a quick test, in pmap_fix_cache(), and exit the routine immediately >> if the mapping is executable. I did some tracing, and there are cases >> where this is not the correct solution - executable mappings that are >> really shared and cache should be disabled. I have a idea level patch >> for this but never tested it well enough. >> >> I also notice a huge jump in "involuntary context switch" counts in your >> runs. >> >> --Mark Tinguely > please, i want code sample for use pmap_fix_cache() :) > may be this issue is caching problem ... but why 'open for read' make this effect? If the page is still in a kernel mapping (mapped to do I/O) then the cache sharing rules are applied to turn off caching. Below should bypass cache disabling if the page is executable. Quick test only: *** arm/arm/pmap.c.orig Thu May 12 13:31:35 2011 --- arm/arm/pmap.c Thu May 12 13:37:00 2011 *************** pmap_fix_cache(struct vm_page *pg, pmap_ *** 1313,1318 **** --- 1313,1321 ---- mtx_assert(&vm_page_queue_mtx, MA_OWNED); + if (pv->pv_flags & PVF_EXEC) + return(); + /* the cache gets written back/invalidated on context switch. * therefore, if a user page shares an entry in the same page or * with the kernel map and at least one is writable, then the --Mark --------------000601050508020001050305 Content-Type: text/x-patch; name="pmapTEMP.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="pmapTEMP.diff" *** arm/arm/pmap.c.orig Thu May 12 13:31:35 2011 --- arm/arm/pmap.c Thu May 12 13:37:00 2011 *************** pmap_fix_cache(struct vm_page *pg, pmap_ *** 1313,1318 **** --- 1313,1321 ---- mtx_assert(&vm_page_queue_mtx, MA_OWNED); + if (pv->pv_flags & PVF_EXEC) + return(); + /* the cache gets written back/invalidated on context switch. * therefore, if a user page shares an entry in the same page or * with the kernel map and at least one is writable, then the --------------000601050508020001050305-- From owner-freebsd-arm@FreeBSD.ORG Thu May 12 21:10:27 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B5379106564A for ; Thu, 12 May 2011 21:10:27 +0000 (UTC) (envelope-from Rozhuk_I@mail.ru) Received: from fallback1.mail.ru (fallback1.mail.ru [94.100.176.18]) by mx1.freebsd.org (Postfix) with ESMTP id 6A3248FC14 for ; Thu, 12 May 2011 21:10:27 +0000 (UTC) Received: from smtp3.mail.ru (smtp3.mail.ru [94.100.176.131]) by fallback1.mail.ru (mPOP.Fallback_MX) with ESMTP id 8A9AF358CEB8 for ; Thu, 12 May 2011 20:39:04 +0400 (MSD) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mail.ru; s=mail; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:To:From:Reply-To; bh=aAj5aG5ScHydxR2RiGwI1xA6wX/oyhQzPgvaXTIBUW0=; b=Nt5FHyffUjLpAuRGiywOYUEGsNTmErBUxBsOFZ/M1sTKymNSuf8aeLaBlzxNkIR1cWraHSjbxn8tAZkmbul9muX+SLeQ2Cmc379ddKW9CL51p45H3N9BKVyTR5uX4HCa; Received: from [178.184.60.33] (port=53204 helo=rimwks1x64) by smtp3.mail.ru with asmtp id 1QKYuk-0004mu-00 for freebsd-arm@freebsd.org; Thu, 12 May 2011 20:39:02 +0400 From: "Rozhuk Ivan" To: Date: Fri, 13 May 2011 01:39:00 +0900 Message-ID: <029601cc10c3$19ca3090$4d5e91b0$@ru> MIME-Version: 1.0 Content-Type: text/plain; charset="windows-1251" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Office Outlook 12.0 Thread-Index: AcwQwxjSmkw+MjSNSsqDOJYqvRl7Mw== Content-Language: ru X-Spam: Not detected X-Mras: Ok Subject: how to add DMA support? X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: Rozhuk_I@mail.ru List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 21:10:27 -0000 Hi! STR813X/CNS213X have: - eight-channel Generic DMA controller (GDMA) - single-channel High Speed DMA controller (HSDMA) Both for: memory-to-memory, memory-to-peripheral, peripheral-to-memory, = and peripheral-to-peripheral data transferring with a shared buffer. Both have IRQ: - Generic DMA Terminal Counter, Generic DMA Error (GDMA) - HSDMA Terminal Counter and Error Interrupt. How I can tell system to use DMA? How tell to use DMA in ECHI and OCHI standard USB drives? =A0 -- Rozhuk Ivan =A0=20 From owner-freebsd-arm@FreeBSD.ORG Fri May 13 07:10:10 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BC957106566B for ; Fri, 13 May 2011 07:10:10 +0000 (UTC) (envelope-from hselasky@c2i.net) Received: from swip.net (mailfe08.c2i.net [212.247.154.226]) by mx1.freebsd.org (Postfix) with ESMTP id 487AB8FC14 for ; Fri, 13 May 2011 07:10:09 +0000 (UTC) X-Cloudmark-Score: 0.000000 [] X-Cloudmark-Analysis: v=1.1 cv=6QwXiDozn7Gnsf2tGidwH+ndAwLlGixx7JAIKZICKmI= c=1 sm=1 a=SvYTsOw2Z4kA:10 a=Dyoqhi_TatcA:10 a=Db7PZhDbB6YA:10 a=WQU8e4WWZSUA:10 a=Cfj4BQAnxiAA:10 a=CL8lFSKtTFcA:10 a=i9M/sDlu2rpZ9XS819oYzg==:17 a=tJFyRY0O2pdaXMLBiEkA:9 a=Ft8UYL4EG9YA:10 a=i9M/sDlu2rpZ9XS819oYzg==:117 Received: from [188.126.198.129] (account mc467741@c2i.net HELO laptop002.hselasky.homeunix.org) by mailfe08.swip.net (CommuniGate Pro SMTP 5.2.19) with ESMTPA id 126012351; Fri, 13 May 2011 09:00:03 +0200 From: Hans Petter Selasky To: freebsd-arm@freebsd.org, Rozhuk_I@mail.ru Date: Fri, 13 May 2011 08:58:53 +0200 User-Agent: KMail/1.13.5 (FreeBSD/8.2-STABLE; KDE/4.4.5; amd64; ; ) References: <029601cc10c3$19ca3090$4d5e91b0$@ru> In-Reply-To: <029601cc10c3$19ca3090$4d5e91b0$@ru> X-Face: *nPdTl_}RuAI6^PVpA02T?$%Xa^>@hE0uyUIoiha$pC:9TVgl.Oq, NwSZ4V"|LR.+tj}g5 %V,x^qOs~mnU3]Gn; cQLv&.N>TrxmSFf+p6(30a/{)KUU!s}w\IhQBj}[g}bj0I3^glmC( :AuzV9:.hESm-x4h240C`9=w MIME-Version: 1.0 Content-Type: Text/Plain; charset="windows-1251" Content-Transfer-Encoding: 7bit Message-Id: <201105130858.53324.hselasky@c2i.net> Cc: Subject: Re: how to add DMA support? X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 May 2011 07:10:10 -0000 On Thursday 12 May 2011 18:39:00 Rozhuk Ivan wrote: > How tell to use DMA in ECHI and OCHI standard USB drives? Hi, The EHCI and OHCI has its own busmaster and need not be configured to use DMA. They always use DMA. --HPS From owner-freebsd-arm@FreeBSD.ORG Fri May 13 06:51:52 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 87CF4106564A for ; Fri, 13 May 2011 06:51:52 +0000 (UTC) (envelope-from vladimir-its@yandex.ru) Received: from forward16.mail.yandex.net (forward16.mail.yandex.net [95.108.253.141]) by mx1.freebsd.org (Postfix) with ESMTP id 1C5948FC19 for ; Fri, 13 May 2011 06:51:51 +0000 (UTC) Received: from web20.yandex.ru (web20.yandex.ru [95.108.253.229]) by forward16.mail.yandex.net (Yandex) with ESMTP id 3EB14D42380; Fri, 13 May 2011 10:51:50 +0400 (MSD) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yandex.ru; s=mail; t=1305269510; bh=9OIBZoFSKRtMpk/uqpLA2gNmC1aobaaRIEr9IWZGwdU=; h=From:To:Cc:In-Reply-To:References:Subject:MIME-Version:Message-Id: Date:Content-Transfer-Encoding:Content-Type; b=WJHSHUuw4/MzimrL4h6XHqmY32T6FDyhrIhcXkIzlk6XohhVnyXMvMNnqTsDC3W2e KMBePgFUgICerY5beA6koxHM6yMAivC5R2BbzL4YN2ha0rwyxUeJZT1o8yC+KcFXvZ zqW3O/3FUR5Y3Gubp8GLvN0LNOPEFdwr53WW0Vcs= Received: from localhost (localhost.localdomain [127.0.0.1]) by web20.yandex.ru (Yandex) with ESMTP id 2BB17618830D; Fri, 13 May 2011 10:51:50 +0400 (MSD) X-Yandex-Spam: 1 Received: from 91.206.19.225.base-net.ru (91.206.19.225.base-net.ru [91.206.19.225]) by mail.yandex.ru with HTTP; Fri, 13 May 2011 10:51:48 +0400 From: =?koi8-r?B?98zBxMnNydIg5sXdxc7Lzw==?= To: Mark Tinguely In-Reply-To: <4DCC2C88.3030809@gmail.com> References: <578421305188959@web64.yandex.ru> <4DCBEB00.3040608@gmail.com> <881651305221476@web156.yandex.ru> <4DCC2C88.3030809@gmail.com> MIME-Version: 1.0 Message-Id: <94351305269509@web20.yandex.ru> Date: Fri, 13 May 2011 10:51:48 +0400 X-Mailer: Yamail [ http://yandex.ru ] 5.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=koi8-r X-Mailman-Approved-At: Fri, 13 May 2011 11:03:59 +0000 Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 May 2011 06:51:52 -0000 12.05.2011, 22:52, "Mark Tinguely" ;: > šOn 5/12/2011 12:31 PM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: >> šš12.05.2011, 18:13, "Mark Tinguely";;: >>> ššOn 5/12/2011 3:29 AM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: >>>> šššš%cc -O0 -o test test.c >>>> >>>> ššššand execute it: >>>> >>>> ššššCode: >>>> >>>> šššš%/usr/bin/time -l ./test >>>> ššššššššššš120.16 real šššššš119.44 user šššššššš0.16 sys >>>> šššššššššš12177 šinvoluntary context switches >>>> >>>> šššštime of execution is over 120 sec ... but after system reboot: >>>> >>>> ššššCode: >>>> >>>> šššš%/usr/bin/time -l ./test >>>> ššššššššššššš2.85 real šššššššš2.55 user šššššššš0.25 sys >>>> šššššššššššš292 šinvoluntary context switches >>>> >>>> ššššexecution time is 2.85(!) sec, but it's not all! >>>> >>>> ššššCode: >>>> >>>> šššš%cat test> ššš/dev/null >>>> >>>> šššš%/usr/bin/time -l ./test >>>> ššššššššššš120.40 real šššššš119.51 user šššššššš0.23 sys >>>> šššššššššš12201 šinvoluntary context switches >>>> >>>> ššššOnce the file has been opened for reading (cat test> ššš/dev/null), execution time again increased to 120 sec (until the next reboot). >>>> >>>> ššššWhat is it?! >>> ššSounds like the executable cache gets disabled on the executable page >>> ššthat is also writable issue that we talked about year or so ago. If you >>> ššwant a quick test, in pmap_fix_cache(), and exit the routine immediately >>> ššif the mapping is executable. I did some tracing, and there are cases >>> ššwhere this is not the correct solution - executable mappings that are >>> ššreally shared and cache should be disabled. I have a idea level patch >>> ššfor this but never tested it well enough. >>> >>> ššI also notice a huge jump in "involuntary context switch" counts in your >>> ššruns. >>> >>> šš--Mark Tinguely >> ššplease, i want code sample for use pmap_fix_cache() :) >> ššmay be this issue is caching problem ... but why 'open for read' make this effect? > šIf the page is still in a kernel mapping (mapped to do I/O) then the > šcache sharing rules are applied to turn off caching. > > šBelow should bypass cache disabling if the page is executable. Quick > štest only: > > š*** arm/arm/pmap.c.orig Thu May 12 13:31:35 2011 > š--- arm/arm/pmap.c šššššThu May 12 13:37:00 2011 > š*************** pmap_fix_cache(struct vm_page *pg, pmap_ > š*** 1313,1318 **** > š--- 1313,1321 ---- > > ššššššššššmtx_assert(&vm_page_queue_mtx, MA_OWNED); > > š+ ššššššif (pv->pv_flags & PVF_EXEC) > š+ ššššššššššššššreturn(); > š+ > šššššššššš/* the cache gets written back/invalidated on context switch. > ššššššššššš* therefore, if a user page shares an entry in the same page or > ššššššššššš* with the kernel map and at least one is writable, then the > > š--Mark -- Thank you, Mark! After applying of patch, execution time become a stable (3 sec) :) You wrote: >>> Sounds like the executable cache gets disabled on the executable page >>> that is also writable issue that we talked about year or so ago. where i can see this thread? With respect, Vladimir. From owner-freebsd-arm@FreeBSD.ORG Fri May 13 14:00:29 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1D1E810656DD for ; Fri, 13 May 2011 14:00:29 +0000 (UTC) (envelope-from marktinguely@gmail.com) Received: from mail-iw0-f182.google.com (mail-iw0-f182.google.com [209.85.214.182]) by mx1.freebsd.org (Postfix) with ESMTP id D2E158FC1C for ; Fri, 13 May 2011 14:00:28 +0000 (UTC) Received: by iwn33 with SMTP id 33so3185509iwn.13 for ; Fri, 13 May 2011 07:00:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:message-id:date:from:user-agent:mime-version:to :cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=DS+SL2/Wiyaf8U2T1SRvA6H8APrVlZs4EC5tOxsua7A=; b=RXr1yrYK/iGpZju6yCWaZJ1kGY1eZIpnwCBCIlq289KZA0tytVop6O7YCnqj7ZEtnJ bf4CaKO7/KloAOGJdKKUqYOrZcNZ4dQ55+POghqNznTcDAMusJByboCKsVLr/lgdv0GR FH7xXe+FmOSRex1vB++2FrTio3+Ungo410cXY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:user-agent:mime-version:to:cc:subject :references:in-reply-to:content-type:content-transfer-encoding; b=EQFNKcBlZqct0WznzUd882XC1BwANoxHuSwnuW5HpY3TXqq/lKGirovpphO57waPao 1C8VLY1Gnc8zn9XhiOAHFqmlw8M32hys1rP0sBmrr7itDYRV/9pQlERsM58IUSo4TYKm QzE64tHr/7gXiV+iEOC0uYHRx5IUCm6LhOxzw= Received: by 10.43.57.211 with SMTP id wh19mr1940035icb.1.1305295228317; Fri, 13 May 2011 07:00:28 -0700 (PDT) Received: from [192.168.1.111] (173-19-151-200.client.mchsi.com [173.19.151.200]) by mx.google.com with ESMTPS id a8sm975092ibg.31.2011.05.13.07.00.26 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 13 May 2011 07:00:26 -0700 (PDT) Message-ID: <4DCD3976.9010603@gmail.com> Date: Fri, 13 May 2011 09:00:22 -0500 From: Mark Tinguely User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; en-US; rv:1.9.2.17) Gecko/20110414 Thunderbird/3.1.10 MIME-Version: 1.0 To: =?KOI8-R?Q?=F7=CC=C1=C4=C9=CD=C9=D2_=E6=C5=DD=C5=CE=CB=CF?= References: <578421305188959@web64.yandex.ru> <4DCBEB00.3040608@gmail.com> <881651305221476@web156.yandex.ru> <4DCC2C88.3030809@gmail.com> <94351305269509@web20.yandex.ru> In-Reply-To: <94351305269509@web20.yandex.ru> Content-Type: text/plain; charset=KOI8-R; format=flowed Content-Transfer-Encoding: 8bit Cc: freebsd-arm@freebsd.org Subject: Re: S3C2440A strange perfomance issue X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 May 2011 14:00:29 -0000 On 5/13/2011 1:51 AM, ÷ÌÁÄÉÍÉÒ æÅÝÅÎËÏ wrote: > Thank you, Mark! > After applying of patch, execution time become a stable (3 sec):) That patch that I sent was bad, the variable pv was not defined at the point. Below is a better temporary test patch. TAILQ_FOREACH(pv, &pg->md.pv_list, pv_list) { + if (pv->pv_flags & PVF_EXEC) + return; /* generate a count of the pv_entry uses */ The thread was in March 2010. It is in the FreeBSD ARM mailing list archive under the subject, "Performance of SheevaPlug on 8-stable". Is this FreeBSD current or 8.x? (We made some changes between 8.x and -current). Do you have cluster I/O enabled on the filesystem? Does it do this with the cluster I/O turned off? (If the below theory is true, this won't matter). The executable page should be in the page cache, so there should not be any I/O for the "cat" command. That leads me to suspect the "cat" turns the write bit on the page and that bit is left on. The cache fixing routine is doing its job based on incorrect information (that the page is mapped for writing). --Mark Tinguely From owner-freebsd-arm@FreeBSD.ORG Fri May 13 16:38:50 2011 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1A11E1065673 for ; Fri, 13 May 2011 16:38:50 +0000 (UTC) (envelope-from rozhuk.im@gmail.com) Received: from mail-wy0-f182.google.com (mail-wy0-f182.google.com [74.125.82.182]) by mx1.freebsd.org (Postfix) with ESMTP id 9A7D18FC17 for ; Fri, 13 May 2011 16:38:49 +0000 (UTC) Received: by wyf23 with SMTP id 23so2774937wyf.13 for ; Fri, 13 May 2011 09:38:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:reply-to:from:to:references:in-reply-to:subject :date:message-id:mime-version:content-type:content-transfer-encoding :x-mailer:thread-index:content-language; bh=FCV2yU4W/PezQC3ExNF1T5DFRWUinvdk5t3n+uX3Jqg=; b=wdJUCf0NOcsJYEmD2pPG89BjI004XSqjPYxXzidq/77qK2KroGtTluUsaWsqF+wlKP IxxBPEldAwZajHxLh4B/taMRNlvNDE4bdsrayR5uGrelEwQsiAXH6gIgvVGRC2P79kRR vNOWiIfenzYzwR/mxqEPVL/hjQJMK3nQ9xaxs= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=reply-to:from:to:references:in-reply-to:subject:date:message-id :mime-version:content-type:content-transfer-encoding:x-mailer :thread-index:content-language; b=XNGWxa2PkNZKQnAQ56CpCwm2IVBVLYFHavRo5Lh7USgeyz5OFPIWNWX0HPK/ruNEDZ Fh7TR5Ny48HO95KyP1IWNSTmJdQiTSm7W7SjqD7QdRCSmftf0Dk0X3YINlft0+mpOOjZ UMtCHz6226At9hvFLPifUsC1TcJKa5fwlAcMQ= Received: by 10.216.60.74 with SMTP id t52mr1764927wec.30.1305303031248; Fri, 13 May 2011 09:10:31 -0700 (PDT) Received: from rimwks1x64 ([92.124.38.95]) by mx.google.com with ESMTPS id n2sm1222300wej.22.2011.05.13.09.10.28 (version=SSLv3 cipher=OTHER); Fri, 13 May 2011 09:10:30 -0700 (PDT) From: rozhuk.im@gmail.com To: "'Hans Petter Selasky'" , , References: <029601cc10c3$19ca3090$4d5e91b0$@ru> <201105130858.53324.hselasky@c2i.net> In-Reply-To: <201105130858.53324.hselasky@c2i.net> Date: Sat, 14 May 2011 01:10:26 +0900 Message-ID: <4dcd57f6.8290d80a.134d.79cf@mx.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset="windows-1251" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Office Outlook 12.0 Thread-Index: AcwRPPOg871MjWCwTw+lihPpgcAPPgASToMA Content-Language: ru Cc: Subject: RE: how to add DMA support? X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: Rozhuk.IM@gmail.com List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 May 2011 16:38:50 -0000 Hi! > The EHCI and OHCI has its own busmaster and need not be configured to > use DMA. > They always use DMA. May be on some other chips. On this chip only MAC (NIC) has its own dma, all other subsystems must = use GDMA or HSDMA. Im looking a way to tell system that chip has GDMA/HSDMA. For arm I found this: grep -r "dma_memcpy" /usr/src/sys/arm /usr/src/sys/arm/xscale/i80321/i80321_dma.c:static int dma_memcpy(void = *, void *, int, int); /usr/src/sys/arm/xscale/i80321/i80321_dma.c: _arm_memcpy =3D = dma_memcpy; /usr/src/sys/arm/xscale/i80321/i80321_dma.c:dma_memcpy(void *dst, void = *src, int len, int flags) grep -r "_arm_memcpy" /usr/src/sys/arm /usr/src/sys/arm/include/md_var.h:extern int (*_arm_memcpy)(void *, void = *, int, int); /usr/src/sys/arm/arm/bcopyinout.S:.L_arm_memcpy: ... =A0 -- Rozhuk Ivan =A0=20 > -----Original Message----- > From: owner-freebsd-arm@freebsd.org [mailto:owner-freebsd- > arm@freebsd.org] On Behalf Of Hans Petter Selasky > Sent: Friday, May 13, 2011 3:59 PM > To: freebsd-arm@freebsd.org; Rozhuk_I@mail.ru > Subject: Re: how to add DMA support? >=20 > On Thursday 12 May 2011 18:39:00 Rozhuk Ivan wrote: > > How tell to use DMA in ECHI and OCHI standard USB drives? >=20 > Hi, >=20 >=20 > --HPS > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"