From owner-p4-projects@FreeBSD.ORG Mon Oct 22 06:35:06 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 50FBF651; Mon, 22 Oct 2012 06:35:06 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 0D03F64F for ; Mon, 22 Oct 2012 06:35:06 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id E5C7B8FC26 for ; Mon, 22 Oct 2012 06:35:05 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M6Z5Pb082012 for ; Mon, 22 Oct 2012 06:35:05 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M6Z5jN082007 for perforce@freebsd.org; Mon, 22 Oct 2012 06:35:05 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 06:35:05 GMT Message-Id: <201210220635.q9M6Z5jN082007@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218755 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 06:35:06 -0000 http://p4web.freebsd.org/@@218755?ac=10 Change 218755 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/19 14:30:57 Merge CHERI ISAv2 support from the CHERI binutils tree to the CheriBSD Perforce branch: commit 664853aff8d01d9c8e03545136e80f6640960363 Author: Michael Roe Date: Wed Oct 10 13:19:09 2012 +0100 Updated gas to version 2 of the CHERI ISA. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/gas/config/tc-mips.c#4 edit .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-dis.c#3 edit .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#7 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/gas/config/tc-mips.c#4 (text+ko) ==== @@ -8429,6 +8429,7 @@ USE_BITS (OP_MASK_SEL, OP_SH_SEL); break; case 'v': USE_BITS (OP_MASK_FD, OP_SH_FD); break; case 'w': USE_BITS (OP_MASK_RT, OP_SH_RT); break; + case 'x': USE_BITS (OP_MASK_RS, OP_SH_RS); break; default: as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"), c, opc->name, opc->args); @@ -9058,7 +9059,8 @@ is a base register specification. */ assert (args[1] == 'b' || args[1] == '5' || args[1] == '-' || args[1] == '4' - || (args[1] == '+' && args[2] == 'b')); + || (args[1] == '+' && args[2] == 'b') + || (args[1] == '+' && args[2] == 'w')); if (*s == '\0') return; @@ -9222,6 +9224,7 @@ case 'w': case 'b': case 'v': + case 'x': if (s[0] == '$' && s[1] == 'c' && ISDIGIT (s[2])) { c = *args; @@ -9252,6 +9255,11 @@ INSERT_OPERAND (FD, *ip, regno); continue; } + else if (c == 'x') + { + INSERT_OPERAND (RS, *ip, regno); + continue; + } } else as_bad (_("Invalid capability register number")); ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-dis.c#3 (text+ko) ==== @@ -914,6 +914,10 @@ OP_MASK_FD); break; + case 'x': + (*info->fprintf_func) (info->stream, "c%d", (l >> OP_SH_RS) & + OP_MASK_RS); + break; case 'o': delta = ((l >> OP_SH_CDELTA) & OP_MASK_CDELTA); (*info->fprintf_func) (info->stream, "%d", delta); ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#7 (text+ko) ==== @@ -188,30 +188,58 @@ {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I3 },/* daddu */ {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I1 },/* addu */ {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, INSN2_ALIAS, I1 },/* or */ -{"cgetbase","t,+b", 0x48000001, 0xffe007ff, 0, 0, I1 }, -{"cgetlen", "t,+b", 0x48000000, 0xffe007ff, 0, 0, I1 }, -{"cgetleng","t,+b", 0x48000000, 0xffe007ff, 0, 0, I1 }, -{"cgetperm","t,+b", 0x48000006, 0xffe007ff, 0, 0, I1 }, -{"cgettype","t,+b", 0x48000002, 0xffe007ff, 0, 0, I1 }, -{"csettype","+w,+b,m", 0x48800002, 0xffe0003f, 0, 0, I1 }, -{"cincbase","+w,+b,m", 0x48800001, 0xffe0003f, 0, 0, I1 }, -{"cmove", "+w,+b", 0x48800001, 0xffe007ff, 0, 0, I1 }, -{"csetlen", "+w,+b,m", 0x48800000, 0xffe0003f, 0, 0, I1 }, -{"candperm","+w,+b,m", 0x48800006, 0xffe0003f, 0, 0, I1 }, +{"cgetperm","t,+b", 0x48000000, 0xffe007ff, 0, 0, I1}, +{"cgettype","t,+b", 0x48000001, 0xffe007ff, 0, 0, I1}, +{"cgetbase","t,+b", 0x48000002, 0xffe007ff, 0, 0, I1}, +{"cgetlen", "t,+b", 0x48000003, 0xffe007ff, 0, 0, I1}, +{"cgettag", "t,+b", 0x48000005, 0xffe007ff, 0, 0, I1}, +{"cgetunsealed", "t,+b", 0x48000006, 0xffe007ff, 0, 0, I1}, +{"cgetpcc", "t(+b)", 0x48000007, 0xffe007ff, 0, 0, I1}, +{"candperm","+w,+b,m", 0x48800000, 0xffe0003f, 0, 0, I1}, +{"csettype","+w,+b,m", 0x48800001, 0xffe0003f, 0, 0, I1}, +{"cincbase","+w,+b,m", 0x48800002, 0xffe0003f, 0, 0, I1}, +{"cmove", "+w,+b", 0x48800002, 0xffe007ff, 0, 0, I1}, +{"csetlen", "+w,+b,m", 0x48800003, 0xffe0003f, 0, 0, I1}, +{"ccleartag", "+w", 0x48800005, 0xffe0ffff, 0, 0, I1}, +{"csc", "+x,d(+w)", 0xf8000000, 0xfc0007ff, 0, 0, I1}, +{"clc", "+x,d(+w)", 0xd8000000, 0xfc0007ff, 0, 0, I1}, + {"cscr", "+w,m(+b)", 0x49200000, 0xffe0003f, 0, 0, I1 }, {"clcr", "+w,m(+b)", 0x49400000, 0xffe0003f, 0, 0, I1 }, -{"clb", "t,+o(+b)", 0x4a000000, 0xffe00000,0, 0, I1 }, -{"clh", "t,+o(+b)", 0x4a200000, 0xffe00000, 0, 0, I1 }, -{"clw", "t,+o(+b)", 0x4a400000, 0xffe00000, 0, 0, I1 }, -{"cld", "t,+o(+b)", 0x4a600000, 0xffe00000, 0, 0, I1 }, +/* mask should be 0xfc000007. Because I don't have letters for the + * other register and offset argument, temporarily mask them. + * Hence mask of 0xfc0007ff. + */ +{"clbu", "v,d(+w)", 0xc8000000, 0xfc0007ff, 0, 0, I1}, +{"clhu", "v,d(+w)", 0xc8000001, 0xfc0007ff, 0, 0, I1}, +{"clwu", "v,d(+w)", 0xc8000002, 0xfc0007ff, 0, 0, I1}, +/* there is no cldu */ +{"clb", "v,d(+w)", 0xc8000004, 0xfc0007ff, 0, 0, I1}, +{"clh", "v,d(+w)", 0xc8000005, 0xfc0007ff, 0, 0, I1}, +{"clw", "v,d(+w)", 0xc8000006, 0xfc0007ff, 0, 0, I1}, +{"cld", "v,d(+w)", 0xc8000007, 0xfc0007ff, 0, 0, I1}, + +{"csbh", "v,d(+w)", 0xe8000000, 0xfc0007ff, 0, 0, I1}, +{"cshh", "v,d(+w)", 0xe8000001, 0xfc0007ff, 0, 0, I1}, +{"cswh", "v,d(+w)", 0xe8000002, 0xfc0007ff, 0, 0, I1}, +/* there is no csdu */ +{"csb", "v,d(+w)", 0xe8000004, 0xfc0007ff, 0, 0, I1}, +{"csh", "v,d(+w)", 0xe8000005, 0xfc0007ff, 0, 0, I1}, +{"csw", "v,d(+w)", 0xe8000006, 0xfc0007ff, 0, 0, I1}, +{"csd", "v,d(+w)", 0xe8000007, 0xfc0007ff, 0, 0, I1}, + +{"clbi", "t,+o(+b)", 0x4a000000, 0xffe00000,0, 0, I1 }, +{"clhi", "t,+o(+b)", 0x4a200000, 0xffe00000, 0, 0, I1 }, +{"clwi", "t,+o(+b)", 0x4a400000, 0xffe00000, 0, 0, I1 }, +{"cldi", "t,+o(+b)", 0x4a600000, 0xffe00000, 0, 0, I1 }, {"clbr", "t,m(+b)", 0x4a800000, 0xffe0003f, 0, 0, I1 }, {"clhr", "t,m(+b)", 0x4aa00000, 0xffe0003f, 0, 0, I1 }, {"clwr", "t,m(+b)", 0x4ac00000, 0xffe0003f, 0, 0, I1 }, {"cldr", "t,m(+b)", 0x4ae00000, 0xffe0003f, 0, 0, I1 }, -{"csb", "t,+o(+b)", 0x4b000000, 0xffe00000, 0, 0, I1 }, -{"csh", "t,+o(+b)", 0x4b200000, 0xffe00000, 0, 0, I1 }, -{"csw", "t,+o(+b)", 0x4b400000, 0xffe00000, 0, 0, I1 }, -{"csd", "t,+o(+b)", 0x4b600000, 0xffe00000, 0, 0, I1 }, +{"csbi", "t,+o(+b)", 0x4b000000, 0xffe00000, 0, 0, I1 }, +{"cshi", "t,+o(+b)", 0x4b200000, 0xffe00000, 0, 0, I1 }, +{"cswi", "t,+o(+b)", 0x4b400000, 0xffe00000, 0, 0, I1 }, +{"csdi", "t,+o(+b)", 0x4b600000, 0xffe00000, 0, 0, I1 }, {"csbr", "t,m(+b)", 0x4b800000, 0xffe0003f, 0, 0, I1 }, {"cshr", "t,m(+b)", 0x4ba00000, 0xffe0003f, 0, 0, I1 }, {"cswr", "t,m(+b)", 0x4bc00000, 0xffe0003f, 0, 0, I1 }, From owner-p4-projects@FreeBSD.ORG Mon Oct 22 06:35:06 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id A1EF7730; Mon, 22 Oct 2012 06:35:06 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 5F67E680 for ; Mon, 22 Oct 2012 06:35:06 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 402358FC1E for ; Mon, 22 Oct 2012 06:35:06 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M6Z6Oh082018 for ; Mon, 22 Oct 2012 06:35:06 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M6Z5Fr082015 for perforce@freebsd.org; Mon, 22 Oct 2012 06:35:05 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 06:35:05 GMT Message-Id: <201210220635.q9M6Z5Fr082015@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218756 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 06:35:06 -0000 http://p4web.freebsd.org/@@218756?ac=10 Change 218756 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/19 14:31:38 Merge CHERI ISAv2 support from the CHERI binutils tree to the CheriBSD Perforce branch: commit a4d8c1b26a055ec2f4d5b4c713b3f919c95de78b Author: Michael Roe Date: Wed Oct 17 13:39:41 2012 +0100 Added assembler support for CGetCause. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#8 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#8 (text+ko) ==== @@ -192,6 +192,7 @@ {"cgettype","t,+b", 0x48000001, 0xffe007ff, 0, 0, I1}, {"cgetbase","t,+b", 0x48000002, 0xffe007ff, 0, 0, I1}, {"cgetlen", "t,+b", 0x48000003, 0xffe007ff, 0, 0, I1}, +{"cgetcause", "t", 0x48000004, 0xffe0ffff, 0, 0, I1}, {"cgettag", "t,+b", 0x48000005, 0xffe007ff, 0, 0, I1}, {"cgetunsealed", "t,+b", 0x48000006, 0xffe007ff, 0, 0, I1}, {"cgetpcc", "t(+b)", 0x48000007, 0xffe007ff, 0, 0, I1}, From owner-p4-projects@FreeBSD.ORG Mon Oct 22 06:35:28 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 72FEF953; Mon, 22 Oct 2012 06:35:28 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 14E54950 for ; Mon, 22 Oct 2012 06:35:28 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id ED3FA8FC20 for ; Mon, 22 Oct 2012 06:35:27 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M6ZRa4082217 for ; Mon, 22 Oct 2012 06:35:27 GMT (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M6ZHXm082206 for perforce@freebsd.org; Mon, 22 Oct 2012 06:35:17 GMT (envelope-from jhb@freebsd.org) Date: Mon, 22 Oct 2012 06:35:17 GMT Message-Id: <201210220635.q9M6ZHXm082206@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin Subject: PERFORCE change 218782 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 06:35:28 -0000 http://p4web.freebsd.org/@@218782?ac=10 Change 218782 by jhb@jhb_ralph on 2012/10/20 03:26:21 IFC @218780 Affected files ... .. //depot/projects/smpng/share/man/man9/BUS_CHILD_DELETED.9#1 branch .. //depot/projects/smpng/share/man/man9/BUS_CHILD_DETACHED.9#1 branch .. //depot/projects/smpng/share/man/man9/DRIVER_MODULE.9#3 integrate .. //depot/projects/smpng/share/man/man9/Makefile#31 integrate .. //depot/projects/smpng/share/man/man9/VFS.9#4 integrate .. //depot/projects/smpng/share/man/man9/buf_ring.9#3 integrate .. //depot/projects/smpng/share/man/man9/bus_dma.9#3 integrate .. //depot/projects/smpng/share/man/man9/drbr.9#3 integrate .. //depot/projects/smpng/share/man/man9/hash.9#2 integrate .. //depot/projects/smpng/share/man/man9/locking.9#9 integrate .. //depot/projects/smpng/share/man/man9/module.9#2 integrate .. //depot/projects/smpng/share/man/man9/pfil.9#2 integrate .. //depot/projects/smpng/share/man/man9/vinvalbuf.9#2 integrate .. //depot/projects/smpng/share/man/man9/vslock.9#3 integrate .. //depot/projects/smpng/sys/amd64/amd64/identcpu.c#45 integrate .. //depot/projects/smpng/sys/amd64/amd64/machdep.c#111 integrate .. //depot/projects/smpng/sys/amd64/amd64/mp_machdep.c#84 integrate .. //depot/projects/smpng/sys/amd64/amd64/pmap.c#125 integrate .. //depot/projects/smpng/sys/amd64/amd64/trap.c#89 integrate .. //depot/projects/smpng/sys/amd64/conf/GENERIC#103 integrate .. //depot/projects/smpng/sys/amd64/conf/NOTES#67 integrate .. //depot/projects/smpng/sys/amd64/include/atomic.h#37 integrate .. //depot/projects/smpng/sys/amd64/include/intr_machdep.h#24 integrate .. //depot/projects/smpng/sys/amd64/include/pc/bios.h#5 integrate .. //depot/projects/smpng/sys/amd64/linux32/linux32_sysvec.c#53 integrate .. //depot/projects/smpng/sys/amd64/pci/pci_cfgreg.c#15 integrate .. //depot/projects/smpng/sys/arm/arm/busdma_machdep-v6.c#2 integrate .. //depot/projects/smpng/sys/arm/arm/busdma_machdep.c#38 integrate .. //depot/projects/smpng/sys/arm/arm/cpufunc.c#26 integrate .. //depot/projects/smpng/sys/arm/arm/cpufunc_asm_arm11.S#4 integrate .. //depot/projects/smpng/sys/arm/arm/cpufunc_asm_armv6.S#1 branch .. //depot/projects/smpng/sys/arm/arm/disassem.c#4 integrate .. //depot/projects/smpng/sys/arm/arm/elf_trampoline.c#29 integrate .. //depot/projects/smpng/sys/arm/arm/identcpu.c#21 integrate .. //depot/projects/smpng/sys/arm/arm/machdep.c#41 integrate .. //depot/projects/smpng/sys/arm/arm/pmap-v6.c#2 integrate .. //depot/projects/smpng/sys/arm/arm/pmap.c#70 integrate .. //depot/projects/smpng/sys/arm/arm/sc_machdep.c#1 branch .. //depot/projects/smpng/sys/arm/arm/vm_machdep.c#40 integrate .. //depot/projects/smpng/sys/arm/at91/at91_machdep.c#13 integrate .. //depot/projects/smpng/sys/arm/at91/at91_mci.c#19 integrate .. //depot/projects/smpng/sys/arm/at91/at91_pmc.c#15 integrate .. //depot/projects/smpng/sys/arm/at91/at91_rtc.c#7 integrate .. //depot/projects/smpng/sys/arm/at91/at91_rtcreg.h#4 integrate .. //depot/projects/smpng/sys/arm/at91/at91_spi.c#14 integrate .. //depot/projects/smpng/sys/arm/at91/std.at91#9 integrate .. //depot/projects/smpng/sys/arm/at91/std.at91sam9#7 integrate .. //depot/projects/smpng/sys/arm/at91/std.at91sam9g45#2 integrate .. //depot/projects/smpng/sys/arm/at91/std.atmel#3 integrate .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_fb.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_intr.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_machdep.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_mbox.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_mbox.h#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_systimer.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_vcbus.h#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_wdog.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bcm2835_wdog.h#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/bus_space.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/common.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/dwc_otg_brcm.c#1 branch .. //depot/projects/smpng/sys/arm/broadcom/bcm2835/files.bcm2835#1 branch .. //depot/projects/smpng/sys/arm/conf/AC100#1 branch .. //depot/projects/smpng/sys/arm/conf/ARMADAXP#2 integrate .. //depot/projects/smpng/sys/arm/conf/AVILA#27 integrate .. //depot/projects/smpng/sys/arm/conf/AVILA.hints#8 integrate .. //depot/projects/smpng/sys/arm/conf/BEAGLEBONE#2 integrate .. //depot/projects/smpng/sys/arm/conf/CAMBRIA#19 integrate .. //depot/projects/smpng/sys/arm/conf/CAMBRIA.hints#8 integrate .. //depot/projects/smpng/sys/arm/conf/CNS11XXNAS#5 integrate .. //depot/projects/smpng/sys/arm/conf/DEFAULTS#7 integrate .. //depot/projects/smpng/sys/arm/conf/DOCKSTAR#4 integrate .. //depot/projects/smpng/sys/arm/conf/EA3250#2 integrate .. //depot/projects/smpng/sys/arm/conf/GUMSTIX-QEMU#3 integrate .. //depot/projects/smpng/sys/arm/conf/HL201#6 integrate .. //depot/projects/smpng/sys/arm/conf/KB920X#25 integrate .. //depot/projects/smpng/sys/arm/conf/LN2410SBC#6 integrate .. //depot/projects/smpng/sys/arm/conf/PANDABOARD#2 integrate .. //depot/projects/smpng/sys/arm/conf/QILA9G20#6 integrate .. //depot/projects/smpng/sys/arm/conf/RPI-B#1 branch .. //depot/projects/smpng/sys/arm/conf/SAM9G20EK#6 integrate .. //depot/projects/smpng/sys/arm/conf/SAM9X25EK#3 integrate .. //depot/projects/smpng/sys/arm/conf/SHEEVAPLUG#8 integrate .. //depot/projects/smpng/sys/arm/conf/SN9G45#2 integrate .. //depot/projects/smpng/sys/arm/conf/TS7800#4 integrate .. //depot/projects/smpng/sys/arm/econa/econa_machdep.c#6 integrate .. //depot/projects/smpng/sys/arm/econa/std.econa#3 integrate .. //depot/projects/smpng/sys/arm/include/armreg.h#13 integrate .. //depot/projects/smpng/sys/arm/include/atomic.h#35 integrate .. //depot/projects/smpng/sys/arm/include/cpufunc.h#20 integrate .. //depot/projects/smpng/sys/arm/include/intr.h#15 integrate .. //depot/projects/smpng/sys/arm/include/machdep.h#5 integrate .. //depot/projects/smpng/sys/arm/include/pmap.h#38 integrate .. //depot/projects/smpng/sys/arm/include/sc_machdep.h#1 branch .. //depot/projects/smpng/sys/arm/lpc/lpc_machdep.c#2 integrate .. //depot/projects/smpng/sys/arm/lpc/std.lpc#2 integrate .. //depot/projects/smpng/sys/arm/mv/armadaxp/armadaxp.c#2 integrate .. //depot/projects/smpng/sys/arm/mv/common.c#14 integrate .. //depot/projects/smpng/sys/arm/mv/files.mv#13 integrate .. //depot/projects/smpng/sys/arm/mv/gpio.c#10 integrate .. //depot/projects/smpng/sys/arm/mv/mpic.c#2 integrate .. //depot/projects/smpng/sys/arm/mv/mv_machdep.c#20 integrate .. //depot/projects/smpng/sys/arm/mv/mv_pci.c#9 integrate .. //depot/projects/smpng/sys/arm/mv/mv_ts.c#1 branch .. //depot/projects/smpng/sys/arm/mv/mvreg.h#11 integrate .. //depot/projects/smpng/sys/arm/mv/mvvar.h#7 integrate .. //depot/projects/smpng/sys/arm/mv/mvwin.h#7 integrate .. //depot/projects/smpng/sys/arm/mv/std-pj4b.mv#2 integrate .. //depot/projects/smpng/sys/arm/mv/std.mv#3 integrate .. //depot/projects/smpng/sys/arm/mv/timer.c#7 integrate .. //depot/projects/smpng/sys/arm/mv/twsi.c#4 integrate .. //depot/projects/smpng/sys/arm/s3c2xx0/s3c24x0_machdep.c#7 integrate .. //depot/projects/smpng/sys/arm/s3c2xx0/std.s3c2410#3 integrate .. //depot/projects/smpng/sys/arm/sa11x0/assabet_machdep.c#28 integrate .. //depot/projects/smpng/sys/arm/sa11x0/std.sa11x0#4 integrate .. //depot/projects/smpng/sys/arm/tegra/common.c#2 integrate .. //depot/projects/smpng/sys/arm/tegra/std.tegra2#2 integrate .. //depot/projects/smpng/sys/arm/tegra/tegra2_machdep.c#2 integrate .. //depot/projects/smpng/sys/arm/ti/cpsw/if_cpsw.c#2 integrate .. //depot/projects/smpng/sys/arm/ti/std.ti#2 integrate .. //depot/projects/smpng/sys/arm/ti/ti_edma3.c#2 integrate .. //depot/projects/smpng/sys/arm/ti/ti_machdep.c#2 integrate .. //depot/projects/smpng/sys/arm/ti/ti_scm.c#2 integrate .. //depot/projects/smpng/sys/arm/ti/usb/omap_ehci.c#2 integrate .. //depot/projects/smpng/sys/arm/xscale/i80321/ep80219_machdep.c#15 integrate .. //depot/projects/smpng/sys/arm/xscale/i80321/iq31244_machdep.c#34 integrate .. //depot/projects/smpng/sys/arm/xscale/i80321/std.i80219#2 integrate .. //depot/projects/smpng/sys/arm/xscale/i80321/std.i80321#4 integrate .. //depot/projects/smpng/sys/arm/xscale/i8134x/crb_machdep.c#13 integrate .. //depot/projects/smpng/sys/arm/xscale/i8134x/std.i81342#2 integrate .. //depot/projects/smpng/sys/arm/xscale/ixp425/avila_machdep.c#19 integrate .. //depot/projects/smpng/sys/arm/xscale/ixp425/cambria_gpio.c#3 integrate .. //depot/projects/smpng/sys/arm/xscale/ixp425/std.ixp425#3 integrate .. //depot/projects/smpng/sys/arm/xscale/ixp425/std.ixp435#3 integrate .. //depot/projects/smpng/sys/arm/xscale/pxa/pxa_machdep.c#8 integrate .. //depot/projects/smpng/sys/arm/xscale/pxa/std.pxa#2 integrate .. //depot/projects/smpng/sys/arm/xscale/std.xscale#4 integrate .. //depot/projects/smpng/sys/arm/xscale/std.xscale-be#1 branch .. //depot/projects/smpng/sys/boot/Makefile.ia64#2 integrate .. //depot/projects/smpng/sys/boot/arm/uboot/Makefile#7 integrate .. //depot/projects/smpng/sys/boot/common/bootstrap.h#17 integrate .. //depot/projects/smpng/sys/boot/common/console.c#5 integrate .. //depot/projects/smpng/sys/boot/common/disk.c#4 integrate .. //depot/projects/smpng/sys/boot/common/disk.h#3 integrate .. //depot/projects/smpng/sys/boot/common/load_elf.c#23 integrate .. //depot/projects/smpng/sys/boot/common/module.c#13 integrate .. //depot/projects/smpng/sys/boot/common/part.c#2 integrate .. //depot/projects/smpng/sys/boot/common/reloc_elf.c#4 integrate .. //depot/projects/smpng/sys/boot/fdt/dts/bcm2835-rpi-b.dts#1 branch .. //depot/projects/smpng/sys/boot/fdt/dts/db78460.dts#1 branch .. //depot/projects/smpng/sys/boot/fdt/dts/db88f78160.dts#2 delete .. //depot/projects/smpng/sys/boot/fdt/dts/tegra20-paz00.dts#1 branch .. //depot/projects/smpng/sys/boot/fdt/dts/tegra20.dtsi#1 branch .. //depot/projects/smpng/sys/boot/fdt/dts/xlp-basic.dts#2 integrate .. //depot/projects/smpng/sys/boot/forth/beastie.4th#18 integrate .. //depot/projects/smpng/sys/boot/forth/color.4th.8#4 integrate .. //depot/projects/smpng/sys/boot/forth/loader.4th#8 integrate .. //depot/projects/smpng/sys/boot/forth/loader.conf#77 integrate .. //depot/projects/smpng/sys/boot/forth/menu-commands.4th#4 integrate .. //depot/projects/smpng/sys/boot/forth/menu.4th#6 integrate .. //depot/projects/smpng/sys/boot/forth/menu.rc#3 integrate .. //depot/projects/smpng/sys/boot/i386/boot2/boot2.c#43 integrate .. //depot/projects/smpng/sys/boot/i386/boot2/lib.h#4 integrate .. //depot/projects/smpng/sys/boot/i386/boot2/sio.S#6 integrate .. //depot/projects/smpng/sys/boot/i386/btx/btx/btx.S#11 integrate .. //depot/projects/smpng/sys/boot/i386/gptboot/gptboot.c#10 integrate .. //depot/projects/smpng/sys/boot/i386/libi386/biosdisk.c#29 integrate .. //depot/projects/smpng/sys/boot/i386/libi386/comconsole.c#6 integrate .. //depot/projects/smpng/sys/boot/i386/libi386/pxe.c#10 integrate .. //depot/projects/smpng/sys/boot/i386/libi386/pxe.h#3 integrate .. //depot/projects/smpng/sys/boot/i386/loader/Makefile#35 integrate .. //depot/projects/smpng/sys/boot/i386/loader/conf.c#14 integrate .. //depot/projects/smpng/sys/boot/i386/loader/main.c#23 integrate .. //depot/projects/smpng/sys/boot/i386/zfsboot/zfsboot.c#13 integrate .. //depot/projects/smpng/sys/boot/ia64/Makefile#6 integrate .. //depot/projects/smpng/sys/boot/ofw/libofw/devicename.c#11 integrate .. //depot/projects/smpng/sys/boot/pc98/loader/main.c#21 integrate .. //depot/projects/smpng/sys/boot/powerpc/uboot/Makefile#7 integrate .. //depot/projects/smpng/sys/boot/sparc64/loader/main.c#38 integrate .. //depot/projects/smpng/sys/boot/uboot/common/main.c#7 integrate .. //depot/projects/smpng/sys/boot/uboot/lib/Makefile#6 integrate .. //depot/projects/smpng/sys/boot/uboot/lib/devicename.c#6 integrate .. //depot/projects/smpng/sys/boot/uboot/lib/disk.c#8 integrate .. //depot/projects/smpng/sys/boot/uboot/lib/libuboot.h#5 integrate .. //depot/projects/smpng/sys/boot/userboot/test/test.c#3 integrate .. //depot/projects/smpng/sys/boot/userboot/userboot.h#3 integrate .. //depot/projects/smpng/sys/boot/userboot/userboot/libuserboot.h#2 integrate .. //depot/projects/smpng/sys/boot/userboot/userboot/main.c#3 integrate .. //depot/projects/smpng/sys/boot/userboot/userboot/userboot_disk.c#3 integrate .. //depot/projects/smpng/sys/boot/zfs/libzfs.h#2 integrate .. //depot/projects/smpng/sys/boot/zfs/zfs.c#11 integrate .. //depot/projects/smpng/sys/boot/zfs/zfsimpl.c#17 integrate .. //depot/projects/smpng/sys/cam/ata/ata_da.c#20 integrate .. //depot/projects/smpng/sys/cam/ata/ata_pmp.c#9 integrate .. //depot/projects/smpng/sys/cam/ata/ata_xpt.c#19 integrate .. //depot/projects/smpng/sys/cam/cam_periph.c#50 integrate .. //depot/projects/smpng/sys/cam/cam_queue.c#8 integrate .. //depot/projects/smpng/sys/cam/cam_xpt.c#83 integrate .. //depot/projects/smpng/sys/cam/ctl/ctl.c#4 integrate .. //depot/projects/smpng/sys/cam/ctl/ctl_backend_block.c#2 integrate .. //depot/projects/smpng/sys/cam/ctl/ctl_backend_ramdisk.c#2 integrate .. //depot/projects/smpng/sys/cam/ctl/ctl_frontend_cam_sim.c#3 integrate .. //depot/projects/smpng/sys/cam/ctl/scsi_ctl.c#5 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_cd.c#55 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_ch.c#26 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_da.c#107 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_enc.c#4 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_enc_ses.c#3 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_low.c#23 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_low.h#7 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_low_pisa.c#5 delete .. //depot/projects/smpng/sys/cam/scsi/scsi_low_pisa.h#4 delete .. //depot/projects/smpng/sys/cam/scsi/scsi_pass.c#31 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_sa.c#42 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_sg.c#14 integrate .. //depot/projects/smpng/sys/cam/scsi/scsi_xpt.c#13 integrate .. //depot/projects/smpng/sys/cddl/boot/zfs/zfsimpl.h#12 integrate .. //depot/projects/smpng/sys/cddl/compat/opensolaris/kern/opensolaris_cmn_err.c#4 integrate .. //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/assfail.h#1 branch .. //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/debug.h#2 integrate .. //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/dkio.h#3 integrate .. //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/sid.h#5 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/common/nvpair/fnvpair.c#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/common/zfs/zfeature_common.c#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/common/zfs/zfeature_common.h#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/dtrace/dtrace.c#13 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c#22 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/bpobj.c#3 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/bptree.c#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dbuf.c#11 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu.c#14 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_objset.c#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_send.c#14 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_traverse.c#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dmu_tx.c#8 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dnode.c#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dnode_sync.c#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dataset.c#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_deadlist.c#3 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_dir.c#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_pool.c#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_scan.c#5 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/dsl_synctask.c#4 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/metaslab.c#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sa.c#4 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa.c#13 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_history.c#8 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/spa_misc.c#10 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/space_map.c#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h#8 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/bpobj.h#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dmu.h#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dmu_objset.h#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dnode.h#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_dataset.h#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/dsl_pool.h#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/sa_impl.h#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa.h#10 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/spa_impl.h#10 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/trim_map.h#1 branch .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/txg.h#4 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/vdev.h#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/vdev_impl.h#9 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zap.h#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zfs_debug.h#3 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zil.h#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zil_impl.h#5 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio.h#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/zio_impl.h#5 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/trim_map.c#1 branch .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/txg.c#11 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev.c#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_geom.c#16 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_label.c#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_mirror.c#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/vdev_raidz.c#7 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zap.c#6 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zap_micro.c#8 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfeature.c#3 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_debug.c#2 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_ioctl.c#23 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_rlock.c#5 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vfsops.c#22 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_vnops.c#33 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zfs_znode.c#20 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zil.c#11 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zio.c#17 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/zvol.c#12 integrate .. //depot/projects/smpng/sys/cddl/contrib/opensolaris/uts/common/sys/debug.h#5 integrate .. //depot/projects/smpng/sys/compat/freebsd32/freebsd32_proto.h#73 integrate .. //depot/projects/smpng/sys/compat/freebsd32/freebsd32_syscall.h#72 integrate .. //depot/projects/smpng/sys/compat/freebsd32/freebsd32_syscalls.c#72 integrate .. //depot/projects/smpng/sys/compat/freebsd32/freebsd32_sysent.c#73 integrate .. //depot/projects/smpng/sys/compat/freebsd32/freebsd32_systrace_args.c#6 integrate .. //depot/projects/smpng/sys/compat/freebsd32/syscalls.master#76 integrate .. //depot/projects/smpng/sys/compat/linux/linux_file.c#53 integrate .. //depot/projects/smpng/sys/compat/linux/linux_misc.c#110 integrate .. //depot/projects/smpng/sys/compat/netbsd/physio_proc.h#3 delete .. //depot/projects/smpng/sys/compat/svr4/svr4_sysvec.c#34 integrate .. //depot/projects/smpng/sys/conf/Makefile.amd64#21 integrate .. //depot/projects/smpng/sys/conf/Makefile.arm#39 integrate .. //depot/projects/smpng/sys/conf/Makefile.powerpc#38 integrate .. //depot/projects/smpng/sys/conf/NOTES#200 integrate .. //depot/projects/smpng/sys/conf/files#281 integrate .. //depot/projects/smpng/sys/conf/files.amd64#91 integrate .. //depot/projects/smpng/sys/conf/files.arm#25 integrate .. //depot/projects/smpng/sys/conf/files.i386#150 integrate .. //depot/projects/smpng/sys/conf/files.ia64#74 integrate .. //depot/projects/smpng/sys/conf/files.mips#20 integrate .. //depot/projects/smpng/sys/conf/files.pc98#113 integrate .. //depot/projects/smpng/sys/conf/files.powerpc#74 integrate .. //depot/projects/smpng/sys/conf/files.sparc64#83 integrate .. //depot/projects/smpng/sys/conf/kern.mk#36 integrate .. //depot/projects/smpng/sys/conf/kern.pre.mk#78 integrate .. //depot/projects/smpng/sys/conf/kmod.mk#88 integrate .. //depot/projects/smpng/sys/conf/ldscript.arm#4 integrate .. //depot/projects/smpng/sys/conf/newvers.sh#36 integrate .. //depot/projects/smpng/sys/conf/options#197 integrate .. //depot/projects/smpng/sys/conf/options.amd64#33 integrate .. //depot/projects/smpng/sys/conf/options.arm#30 integrate .. //depot/projects/smpng/sys/conf/options.i386#68 integrate .. //depot/projects/smpng/sys/conf/options.ia64#24 integrate .. //depot/projects/smpng/sys/conf/options.mips#12 integrate .. //depot/projects/smpng/sys/conf/options.powerpc#17 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_cbq.c#7 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_hfsc.c#7 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_priq.c#6 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_red.c#7 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_rio.c#6 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_rmclass.c#4 integrate .. //depot/projects/smpng/sys/contrib/altq/altq/altq_subr.c#19 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/acpica_prep.sh#20 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/changes.txt#20 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/adisasm.c#19 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/ahpredef.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/dmrestag.c#10 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/dmtable.c#12 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/dmtbdump.c#10 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/common/dmtbinfo.c#11 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslcompile.c#19 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslcompiler.h#20 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslcompiler.y#18 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslerror.c#15 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslfiles.c#15 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslfold.c#10 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslglobal.h#16 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslmain.c#20 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslmessages.h#8 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/asloperands.c#10 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslopt.c#11 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslstartup.c#9 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslsupport.l#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/asltree.c#12 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/asltypes.h#18 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/aslutils.c#16 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/dtio.c#8 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/compiler/preprocess.h#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbcmds.c#4 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbexec.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbinput.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbmethod.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbnames.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbstats.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/debugger/dbutils.c#4 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/disassembler/dmbuffer.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/disassembler/dmopcode.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/dispatcher/dswload.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/dispatcher/dswload2.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/events/evgpe.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/events/evxfgpe.c#4 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/hardware/hwesleep.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/hardware/hwgpe.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/hardware/hwsleep.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/hardware/hwxfsleep.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/namespace/nsdump.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/tables/tbinstal.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/tables/tbxface.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/utilities/utosi.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/utilities/utxface.c#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/utilities/utxferror.c#3 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/components/utilities/utxfinit.c#1 branch .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acbuffer.h#1 branch .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acdebug.h#13 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acdisasm.h#13 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/achware.h#8 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/aclocal.h#18 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acmacros.h#9 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acnames.h#5 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/acpixf.h#20 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/actbl.h#8 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/actbl1.h#7 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/actbl2.h#7 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/actbl3.h#2 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/actypes.h#14 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/include/platform/acenv.h#8 integrate .. //depot/projects/smpng/sys/contrib/dev/acpica/os_specific/service_layers/osunixxf.c#3 integrate .. //depot/projects/smpng/sys/contrib/ipfilter/netinet/fil.c#26 integrate .. //depot/projects/smpng/sys/contrib/ipfilter/netinet/ip_auth.c#20 integrate .. //depot/projects/smpng/sys/contrib/ipfilter/netinet/ip_fil_freebsd.c#15 integrate .. //depot/projects/smpng/sys/contrib/ipfilter/netinet/mlfk_ipl.c#14 integrate .. //depot/projects/smpng/sys/contrib/pf/net/if_pflog.c#22 delete .. //depot/projects/smpng/sys/contrib/pf/net/if_pflog.h#10 delete .. //depot/projects/smpng/sys/contrib/pf/net/if_pflow.h#2 delete .. //depot/projects/smpng/sys/contrib/pf/net/if_pfsync.c#35 delete .. //depot/projects/smpng/sys/contrib/pf/net/if_pfsync.h#11 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf.c#49 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_if.c#22 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_ioctl.c#42 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_lb.c#3 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_mtag.h#3 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_norm.c#19 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_osfp.c#8 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_ruleset.c#3 delete .. //depot/projects/smpng/sys/contrib/pf/net/pf_table.c#12 delete .. //depot/projects/smpng/sys/contrib/pf/net/pfvar.h#21 delete .. //depot/projects/smpng/sys/contrib/pf/netinet/in4_cksum.c#5 delete .. //depot/projects/smpng/sys/contrib/rdma/rdma_addr.c#5 integrate .. //depot/projects/smpng/sys/contrib/rdma/rdma_cma.c#9 integrate .. //depot/projects/smpng/sys/contrib/rdma/rdma_device.c#2 integrate .. //depot/projects/smpng/sys/contrib/rdma/rdma_iwcm.c#2 integrate .. //depot/projects/smpng/sys/crypto/rc4/rc4.c#5 integrate .. //depot/projects/smpng/sys/dev/aac/aac_cam.c#32 integrate .. //depot/projects/smpng/sys/dev/acpi_support/acpi_wmi.c#6 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi.c#138 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi_cpu.c#62 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi_hpet.c#23 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi_pcib_acpi.c#38 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi_thermal.c#51 integrate .. //depot/projects/smpng/sys/dev/acpica/acpi_video.c#20 integrate .. //depot/projects/smpng/sys/dev/acpica/acpivar.h#86 integrate .. //depot/projects/smpng/sys/dev/advansys/adv_eisa.c#13 integrate .. //depot/projects/smpng/sys/dev/advansys/adv_isa.c#14 integrate .. //depot/projects/smpng/sys/dev/advansys/adv_pci.c#17 integrate .. //depot/projects/smpng/sys/dev/advansys/advansys.c#18 integrate .. //depot/projects/smpng/sys/dev/advansys/advansys.h#3 integrate .. //depot/projects/smpng/sys/dev/advansys/advlib.c#9 integrate .. //depot/projects/smpng/sys/dev/advansys/advlib.h#5 integrate .. //depot/projects/smpng/sys/dev/advansys/adw_pci.c#14 integrate .. //depot/projects/smpng/sys/dev/advansys/adwcam.c#20 integrate .. //depot/projects/smpng/sys/dev/advansys/adwlib.c#6 integrate .. //depot/projects/smpng/sys/dev/advansys/adwlib.h#4 integrate .. //depot/projects/smpng/sys/dev/advansys/adwvar.h#3 integrate .. //depot/projects/smpng/sys/dev/aha/aha.c#23 integrate .. //depot/projects/smpng/sys/dev/aha/aha_isa.c#19 integrate .. //depot/projects/smpng/sys/dev/aha/aha_mca.c#14 integrate .. //depot/projects/smpng/sys/dev/aha/ahareg.h#8 integrate .. //depot/projects/smpng/sys/dev/ahb/ahb.c#22 integrate .. //depot/projects/smpng/sys/dev/ahb/ahbreg.h#4 integrate .. //depot/projects/smpng/sys/dev/ahci/ahci.c#26 integrate .. //depot/projects/smpng/sys/dev/ahci/ahciem.c#2 integrate .. //depot/projects/smpng/sys/dev/aic/aic.c#14 integrate .. //depot/projects/smpng/sys/dev/aic/aic_cbus.c#8 integrate .. //depot/projects/smpng/sys/dev/aic/aic_isa.c#8 integrate .. //depot/projects/smpng/sys/dev/aic/aic_pccard.c#15 integrate .. //depot/projects/smpng/sys/dev/aic/aicvar.h#5 integrate .. //depot/projects/smpng/sys/dev/alc/if_alc.c#19 integrate .. //depot/projects/smpng/sys/dev/ale/if_ale.c#15 integrate .. //depot/projects/smpng/sys/dev/altera/avgen/altera_avgen.c#1 branch .. //depot/projects/smpng/sys/dev/altera/avgen/altera_avgen.h#1 branch .. //depot/projects/smpng/sys/dev/altera/jtag_uart/altera_jtag_uart.h#1 branch .. //depot/projects/smpng/sys/dev/altera/jtag_uart/altera_jtag_uart_cons.c#1 branch .. //depot/projects/smpng/sys/dev/altera/jtag_uart/altera_jtag_uart_nexus.c#1 branch .. //depot/projects/smpng/sys/dev/altera/jtag_uart/altera_jtag_uart_tty.c#1 branch .. //depot/projects/smpng/sys/dev/altera/sdcard/altera_sdcard.c#1 branch .. //depot/projects/smpng/sys/dev/altera/sdcard/altera_sdcard.h#1 branch .. //depot/projects/smpng/sys/dev/altera/sdcard/altera_sdcard_disk.c#1 branch .. //depot/projects/smpng/sys/dev/altera/sdcard/altera_sdcard_io.c#1 branch .. //depot/projects/smpng/sys/dev/altera/sdcard/altera_sdcard_nexus.c#1 branch .. //depot/projects/smpng/sys/dev/amr/amr.c#57 integrate .. //depot/projects/smpng/sys/dev/amr/amr_pci.c#32 integrate .. //depot/projects/smpng/sys/dev/amr/amrvar.h#29 integrate .. //depot/projects/smpng/sys/dev/arcmsr/arcmsr.c#30 integrate .. //depot/projects/smpng/sys/dev/arcmsr/arcmsr.h#10 integrate .. //depot/projects/smpng/sys/dev/ata/ata-all.c#116 integrate .. //depot/projects/smpng/sys/dev/ata/ata-all.h#76 integrate .. //depot/projects/smpng/sys/dev/ata/ata-lowlevel.c#47 integrate .. //depot/projects/smpng/sys/dev/ata/ata-pci.h#79 integrate .. //depot/projects/smpng/sys/dev/ata/ata-sata.c#12 integrate .. //depot/projects/smpng/sys/dev/ata/chipsets/ata-jmicron.c#9 integrate .. //depot/projects/smpng/sys/dev/ath/ath_dfs/null/dfs_null.c#7 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah.c#19 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah.h#20 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah_desc.h#10 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah_diagcodes.h#3 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah_eeprom.h#7 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah_eeprom_9287.c#4 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ah_internal.h#22 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c#13 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c#13 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5212/ar5212.h#16 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c#16 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c#14 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5212/ar5212_recv.c#6 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5212/ar5212phy.h#3 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar2133.c#8 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416.h#15 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c#10 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c#16 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416_misc.c#12 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416_radar.c#2 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c#21 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar5416/ar5416reg.h#13 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9280.c#5 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c#9 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9285.h#4 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c#8 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c#2 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c#6 integrate .. //depot/projects/smpng/sys/dev/ath/ath_hal/ar9003/ar9300_devid.h#1 branch .. //depot/projects/smpng/sys/dev/ath/ath_rate/sample/sample.c#23 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath.c#104 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_debug.c#7 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_debug.h#5 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_misc.h#6 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_rx.c#5 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_rx_edma.c#3 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_sysctl.c#10 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_tx.c#9 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_tx.h#6 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_tx_edma.c#2 integrate .. //depot/projects/smpng/sys/dev/ath/if_ath_tx_ht.c#9 integrate .. //depot/projects/smpng/sys/dev/ath/if_athioctl.h#30 integrate .. //depot/projects/smpng/sys/dev/ath/if_athvar.h#62 integrate .. //depot/projects/smpng/sys/dev/atkbdc/psm.c#23 integrate .. //depot/projects/smpng/sys/dev/bge/if_bge.c#127 integrate .. //depot/projects/smpng/sys/dev/bge/if_bgereg.h#72 integrate .. //depot/projects/smpng/sys/dev/bktr/bktr_mem.c#9 integrate .. //depot/projects/smpng/sys/dev/buslogic/bt.c#21 integrate .. //depot/projects/smpng/sys/dev/buslogic/bt_eisa.c#11 integrate .. //depot/projects/smpng/sys/dev/buslogic/bt_isa.c#10 integrate .. //depot/projects/smpng/sys/dev/buslogic/bt_mca.c#9 integrate .. //depot/projects/smpng/sys/dev/buslogic/bt_pci.c#12 integrate .. //depot/projects/smpng/sys/dev/buslogic/btreg.h#4 integrate .. //depot/projects/smpng/sys/dev/bxe/if_bxe.c#6 integrate .. //depot/projects/smpng/sys/dev/ct/bshw_machdep.c#7 integrate .. //depot/projects/smpng/sys/dev/ct/ct.c#8 integrate .. //depot/projects/smpng/sys/dev/ct/ct_isa.c#14 integrate .. //depot/projects/smpng/sys/dev/ct/ct_machdep.h#6 integrate .. //depot/projects/smpng/sys/dev/ct/ctvar.h#4 integrate .. //depot/projects/smpng/sys/dev/cxgb/cxgb_main.c#43 integrate .. //depot/projects/smpng/sys/dev/cxgb/cxgb_osdep.h#15 integrate .. //depot/projects/smpng/sys/dev/cxgb/cxgb_t3fw.c#4 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/iw_cxgb/iw_cxgb.c#13 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/tom/cxgb_cpl_io.c#22 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/tom/cxgb_listen.c#7 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/tom/cxgb_toepcb.h#6 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/tom/cxgb_tom.c#10 integrate .. //depot/projects/smpng/sys/dev/cxgb/ulp/tom/cxgb_tom.h#5 integrate .. //depot/projects/smpng/sys/dev/cxgbe/adapter.h#8 integrate .. //depot/projects/smpng/sys/dev/cxgbe/common/common.h#6 integrate .. //depot/projects/smpng/sys/dev/cxgbe/common/t4_hw.c#6 integrate .. //depot/projects/smpng/sys/dev/cxgbe/common/t4_hw.h#3 integrate .. //depot/projects/smpng/sys/dev/cxgbe/common/t4_msg.h#3 integrate .. //depot/projects/smpng/sys/dev/cxgbe/firmware/t4fw-1.6.2.0.bin.uu#1 branch .. //depot/projects/smpng/sys/dev/cxgbe/firmware/t4fw_cfg.txt#3 integrate .. //depot/projects/smpng/sys/dev/cxgbe/firmware/t4fw_interface.h#4 integrate .. //depot/projects/smpng/sys/dev/cxgbe/offload.h#6 integrate .. //depot/projects/smpng/sys/dev/cxgbe/osdep.h#6 integrate .. //depot/projects/smpng/sys/dev/cxgbe/t4_ioctl.h#5 integrate .. //depot/projects/smpng/sys/dev/cxgbe/t4_l2t.h#4 integrate .. //depot/projects/smpng/sys/dev/cxgbe/t4_main.c#10 integrate .. //depot/projects/smpng/sys/dev/cxgbe/t4_sge.c#9 integrate .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_connect.c#2 integrate .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_cpl_io.c#3 integrate .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_ddp.c#1 branch .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_listen.c#2 integrate .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_tom.c#2 integrate .. //depot/projects/smpng/sys/dev/cxgbe/tom/t4_tom.h#2 integrate .. //depot/projects/smpng/sys/dev/dpt/dpt.h#10 integrate .. //depot/projects/smpng/sys/dev/dpt/dpt_eisa.c#12 integrate .. //depot/projects/smpng/sys/dev/dpt/dpt_isa.c#10 integrate .. //depot/projects/smpng/sys/dev/dpt/dpt_pci.c#16 integrate .. //depot/projects/smpng/sys/dev/dpt/dpt_scsi.c#23 integrate .. //depot/projects/smpng/sys/dev/drm2/drmP.h#3 integrate .. //depot/projects/smpng/sys/dev/drm2/drm_drv.c#2 integrate .. //depot/projects/smpng/sys/dev/drm2/drm_gem.c#2 integrate .. //depot/projects/smpng/sys/dev/drm2/drm_ioc32.c#1 branch .. //depot/projects/smpng/sys/dev/drm2/i915/i915_dma.c#2 integrate .. //depot/projects/smpng/sys/dev/drm2/i915/i915_drv.c#2 integrate .. //depot/projects/smpng/sys/dev/drm2/i915/i915_drv.h#2 integrate .. //depot/projects/smpng/sys/dev/drm2/i915/i915_ioc32.c#1 branch .. //depot/projects/smpng/sys/dev/e1000/e1000_82575.c#14 integrate .. //depot/projects/smpng/sys/dev/e1000/e1000_ich8lan.c#13 integrate .. //depot/projects/smpng/sys/dev/e1000/if_em.c#33 integrate .. //depot/projects/smpng/sys/dev/e1000/if_igb.c#39 integrate .. //depot/projects/smpng/sys/dev/e1000/if_igb.h#19 integrate .. //depot/projects/smpng/sys/dev/e1000/if_lem.c#14 integrate .. //depot/projects/smpng/sys/dev/et/if_et.c#11 integrate .. //depot/projects/smpng/sys/dev/etherswitch/arswitch/arswitch.c#2 integrate .. //depot/projects/smpng/sys/dev/etherswitch/arswitch/arswitch_phy.c#2 integrate .. //depot/projects/smpng/sys/dev/etherswitch/arswitch/arswitch_reg.c#2 integrate .. //depot/projects/smpng/sys/dev/etherswitch/arswitch/arswitchvar.h#2 integrate .. //depot/projects/smpng/sys/dev/etherswitch/etherswitch.c#2 integrate .. //depot/projects/smpng/sys/dev/etherswitch/etherswitch_if.m#2 integrate .. //depot/projects/smpng/sys/dev/fb/fbreg.h#20 integrate .. //depot/projects/smpng/sys/dev/fdt/fdt_common.c#6 integrate .. //depot/projects/smpng/sys/dev/fdt/fdt_common.h#6 integrate .. //depot/projects/smpng/sys/dev/fdt/fdt_pci.c#6 integrate .. //depot/projects/smpng/sys/dev/flash/mx25l.c#6 integrate .. //depot/projects/smpng/sys/dev/gxemul/cons/gxemul_cons.c#2 integrate .. //depot/projects/smpng/sys/dev/gxemul/disk/gxemul_disk.c#2 integrate .. //depot/projects/smpng/sys/dev/hptmv/entry.c#22 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_amd.c#16 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_arm.c#7 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_core.c#15 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_core.h#5 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_intel.c#11 integrate .. //depot/projects/smpng/sys/dev/hwpmc/hwpmc_x86.c#15 integrate .. //depot/projects/smpng/sys/dev/hwpmc/pmc_events.h#14 integrate .. //depot/projects/smpng/sys/dev/ida/ida.c#20 integrate .. //depot/projects/smpng/sys/dev/ida/ida_disk.c#16 integrate .. //depot/projects/smpng/sys/dev/ida/ida_eisa.c#14 integrate .. //depot/projects/smpng/sys/dev/ida/ida_pci.c#18 integrate .. //depot/projects/smpng/sys/dev/ida/idavar.h#9 integrate .. //depot/projects/smpng/sys/dev/ie/if_ie_isa.c#9 integrate .. //depot/projects/smpng/sys/dev/iicbus/ad7417.c#3 integrate .. //depot/projects/smpng/sys/dev/iicbus/ds1631.c#1 branch .. //depot/projects/smpng/sys/dev/iicbus/ds1775.c#6 integrate .. //depot/projects/smpng/sys/dev/iicbus/max6690.c#5 integrate .. //depot/projects/smpng/sys/dev/iicbus/pcf8563.c#2 integrate .. //depot/projects/smpng/sys/dev/iicbus/s35390a.c#1 branch .. //depot/projects/smpng/sys/dev/ipmi/ipmi_smbios.c#7 integrate .. //depot/projects/smpng/sys/dev/isci/isci.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/isci.h#3 integrate .. //depot/projects/smpng/sys/dev/isci/isci_controller.c#3 integrate .. //depot/projects/smpng/sys/dev/isci/isci_remote_device.c#3 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sati.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sati_callbacks.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sati_unmap.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sati_util.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sati_write_buffer.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sci_base_controller.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sci_base_domain.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sci_base_phy.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/sci_base_remote_device.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_io_request.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_sds_phy.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_sds_port.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_sds_remote_device.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_sds_remote_node_context.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scic_sds_request.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scif_sas_sati_binding.h#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scif_sas_stp_io_request.c#2 integrate .. //depot/projects/smpng/sys/dev/isci/scil/scu_bios_definitions.h#2 integrate .. //depot/projects/smpng/sys/dev/iscsi/initiator/iscsi.c#12 integrate .. //depot/projects/smpng/sys/dev/isf/isf.c#1 branch .. //depot/projects/smpng/sys/dev/isf/isf.h#1 branch .. //depot/projects/smpng/sys/dev/isf/isf_nexus.c#1 branch .. //depot/projects/smpng/sys/dev/isp/isp_freebsd.c#76 integrate .. //depot/projects/smpng/sys/dev/isp/isp_freebsd.h#55 integrate .. //depot/projects/smpng/sys/dev/isp/isp_pci.c#71 integrate .. //depot/projects/smpng/sys/dev/isp/isp_sbus.c#37 integrate .. //depot/projects/smpng/sys/dev/ixgbe/ixgbe.c#32 integrate .. //depot/projects/smpng/sys/dev/ixgbe/ixgbe.h#19 integrate .. //depot/projects/smpng/sys/dev/ixgbe/ixgbe_82599.c#9 integrate .. //depot/projects/smpng/sys/dev/ixgbe/ixgbe_osdep.h#10 integrate .. //depot/projects/smpng/sys/dev/ixgbe/ixv.c#6 integrate .. //depot/projects/smpng/sys/dev/jme/if_jme.c#15 integrate .. //depot/projects/smpng/sys/dev/mfi/mfi.c#40 integrate .. //depot/projects/smpng/sys/dev/mii/brgphy.c#61 integrate .. //depot/projects/smpng/sys/dev/mii/smscphy.c#2 integrate .. //depot/projects/smpng/sys/dev/mlx/mlx.c#27 integrate .. //depot/projects/smpng/sys/dev/mlx/mlx_compat.h#4 delete .. //depot/projects/smpng/sys/dev/mlx/mlx_disk.c#12 integrate .. //depot/projects/smpng/sys/dev/mlx/mlx_pci.c#14 integrate .. //depot/projects/smpng/sys/dev/mlx/mlxreg.h#4 integrate .. //depot/projects/smpng/sys/dev/mlx/mlxvar.h#12 integrate .. //depot/projects/smpng/sys/dev/mly/mly.c#38 integrate .. //depot/projects/smpng/sys/dev/mmc/mmc.c#21 integrate .. //depot/projects/smpng/sys/dev/mmc/mmcsd.c#12 integrate .. //depot/projects/smpng/sys/dev/mps/mps_sas.c#10 integrate .. //depot/projects/smpng/sys/dev/mxge/if_mxge.c#45 integrate .. //depot/projects/smpng/sys/dev/mxge/mxge_eth_z8e.c#2 integrate .. //depot/projects/smpng/sys/dev/mxge/mxge_ethp_z8e.c#2 integrate .. //depot/projects/smpng/sys/dev/mxge/mxge_rss_eth_z8e.c#2 integrate .. //depot/projects/smpng/sys/dev/mxge/mxge_rss_ethp_z8e.c#2 integrate .. //depot/projects/smpng/sys/dev/ncv/ncr53c500.c#11 integrate .. //depot/projects/smpng/sys/dev/ncv/ncr53c500_pccard.c#23 integrate .. //depot/projects/smpng/sys/dev/ncv/ncr53c500hw.h#4 integrate .. //depot/projects/smpng/sys/dev/ncv/ncr53c500var.h#7 integrate .. //depot/projects/smpng/sys/dev/netmap/netmap.c#5 integrate .. //depot/projects/smpng/sys/dev/netmap/netmap_kern.h#5 integrate .. //depot/projects/smpng/sys/dev/netmap/netmap_mem2.c#3 integrate .. //depot/projects/smpng/sys/dev/nsp/nsp.c#13 integrate .. //depot/projects/smpng/sys/dev/nsp/nsp_pccard.c#18 integrate .. //depot/projects/smpng/sys/dev/nsp/nspvar.h#7 integrate .. //depot/projects/smpng/sys/dev/nvd/nvd.c#1 branch .. //depot/projects/smpng/sys/dev/nve/if_nvereg.h#8 integrate .. //depot/projects/smpng/sys/dev/nvme/nvme.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme.h#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_ctrlr.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_ctrlr_cmd.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_ns.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_ns_cmd.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_private.h#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_qpair.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_sysctl.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_test.c#1 branch .. //depot/projects/smpng/sys/dev/nvme/nvme_uio.c#1 branch .. //depot/projects/smpng/sys/dev/oce/oce_if.c#2 integrate .. //depot/projects/smpng/sys/dev/ofw/ofw_bus_subr.c#7 integrate .. //depot/projects/smpng/sys/dev/ofw/ofw_bus_subr.h#6 integrate .. //depot/projects/smpng/sys/dev/ofw/openfirm.c#22 integrate .. //depot/projects/smpng/sys/dev/ofw/openfirm.h#14 integrate .. //depot/projects/smpng/sys/dev/pci/pci.c#129 integrate .. //depot/projects/smpng/sys/dev/pci/pci_user.c#24 integrate .. //depot/projects/smpng/sys/dev/pci/pcireg.h#40 integrate .. //depot/projects/smpng/sys/dev/random/ivy.c#1 branch .. //depot/projects/smpng/sys/dev/random/nehemiah.c#8 integrate .. //depot/projects/smpng/sys/dev/random/nehemiah.h#2 delete .. //depot/projects/smpng/sys/dev/random/probe.c#6 integrate .. //depot/projects/smpng/sys/dev/re/if_re.c#97 integrate .. //depot/projects/smpng/sys/dev/rndtest/rndtest.c#6 integrate .. //depot/projects/smpng/sys/dev/sdhci/sdhci.c#13 integrate .. //depot/projects/smpng/sys/dev/sdhci/sdhci.h#3 integrate .. //depot/projects/smpng/sys/dev/sdhci/sdhci_if.m#1 branch .. //depot/projects/smpng/sys/dev/sdhci/sdhci_pci.c#1 branch .. //depot/projects/smpng/sys/dev/sound/macio/onyx.c#1 branch .. //depot/projects/smpng/sys/dev/sound/pci/hda/hdaa.c#5 integrate .. //depot/projects/smpng/sys/dev/sound/pci/hda/hdaa_patches.c#3 integrate .. //depot/projects/smpng/sys/dev/sound/pci/hda/hdac.c#54 integrate .. //depot/projects/smpng/sys/dev/sound/pci/hda/hdac.h#3 integrate .. //depot/projects/smpng/sys/dev/sound/pci/hdspe-pcm.c#2 integrate .. //depot/projects/smpng/sys/dev/sound/pci/hdspe.c#3 integrate .. //depot/projects/smpng/sys/dev/sound/usb/uaudio.c#47 integrate .. //depot/projects/smpng/sys/dev/sound/usb/uaudioreg.h#10 integrate .. //depot/projects/smpng/sys/dev/spibus/spi.h#3 integrate .. //depot/projects/smpng/sys/dev/spibus/spibus.c#8 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30.c#13 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30_isa.c#10 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30_pccard.c#18 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30_pci.c#7 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30_subr.c#8 integrate .. //depot/projects/smpng/sys/dev/stg/tmc18c30var.h#7 integrate .. //depot/projects/smpng/sys/dev/streams/streams.c#40 integrate .. //depot/projects/smpng/sys/dev/syscons/schistory.c#11 integrate .. //depot/projects/smpng/sys/dev/syscons/scterm-teken.c#12 integrate .. //depot/projects/smpng/sys/dev/syscons/syscons.c#86 integrate .. //depot/projects/smpng/sys/dev/tdfx/tdfx_linux.c#3 integrate .. //depot/projects/smpng/sys/dev/terasic/de4led/terasic_de4led.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/de4led/terasic_de4led.h#1 branch .. //depot/projects/smpng/sys/dev/terasic/de4led/terasic_de4led_nexus.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl.h#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl_nexus.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl_pixel.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl_reg.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl_syscons.c#1 branch .. //depot/projects/smpng/sys/dev/terasic/mtl/terasic_mtl_text.c#1 branch .. //depot/projects/smpng/sys/dev/twe/twe.c#21 integrate .. //depot/projects/smpng/sys/dev/twe/twe_compat.h#12 integrate .. //depot/projects/smpng/sys/dev/twe/twe_freebsd.c#33 integrate .. //depot/projects/smpng/sys/dev/twe/twevar.h#13 integrate .. //depot/projects/smpng/sys/dev/tws/tws.c#4 integrate .. //depot/projects/smpng/sys/dev/tws/tws.h#3 integrate .. //depot/projects/smpng/sys/dev/tws/tws_cam.c#2 integrate .. //depot/projects/smpng/sys/dev/tws/tws_hdm.h#2 integrate .. //depot/projects/smpng/sys/dev/tws/tws_user.c#2 integrate .. //depot/projects/smpng/sys/dev/uart/uart.h#10 integrate .. //depot/projects/smpng/sys/dev/uart/uart_bus_fdt.c#6 integrate .. //depot/projects/smpng/sys/dev/uart/uart_dev_pl011.c#1 branch .. //depot/projects/smpng/sys/dev/usb/controller/at91dci.c#20 integrate .. //depot/projects/smpng/sys/dev/usb/controller/at91dci_atmelarm.c#10 integrate .. //depot/projects/smpng/sys/dev/usb/controller/atmegadci.c#23 integrate .. //depot/projects/smpng/sys/dev/usb/controller/avr32dci.c#15 integrate .. //depot/projects/smpng/sys/dev/usb/controller/dwc_otg.c#4 integrate .. //depot/projects/smpng/sys/dev/usb/controller/dwc_otg.h#2 integrate .. //depot/projects/smpng/sys/dev/usb/controller/dwc_otgreg.h#1 branch .. //depot/projects/smpng/sys/dev/usb/controller/ehci.c#27 integrate .. //depot/projects/smpng/sys/dev/usb/controller/musb_otg.c#21 integrate .. //depot/projects/smpng/sys/dev/usb/controller/ohci.c#21 integrate .. //depot/projects/smpng/sys/dev/usb/controller/ohci_atmelarm.c#11 integrate .. //depot/projects/smpng/sys/dev/usb/controller/uhci.c#22 integrate .. //depot/projects/smpng/sys/dev/usb/controller/usb_controller.c#24 integrate .. //depot/projects/smpng/sys/dev/usb/controller/uss820dci.c#23 integrate .. //depot/projects/smpng/sys/dev/usb/controller/xhci.c#8 integrate .. //depot/projects/smpng/sys/dev/usb/controller/xhci.h#5 integrate .. //depot/projects/smpng/sys/dev/usb/controller/xhci_pci.c#8 integrate .. //depot/projects/smpng/sys/dev/usb/input/ums.c#22 integrate .. //depot/projects/smpng/sys/dev/usb/net/if_smsc.c#2 integrate .. //depot/projects/smpng/sys/dev/usb/net/uhso.c#12 integrate .. //depot/projects/smpng/sys/dev/usb/net/usb_ethernet.c#16 integrate .. //depot/projects/smpng/sys/dev/usb/quirk/usb_quirk.c#27 integrate .. //depot/projects/smpng/sys/dev/usb/quirk/usb_quirk.h#10 integrate .. //depot/projects/smpng/sys/dev/usb/serial/u3g.c#32 integrate .. //depot/projects/smpng/sys/dev/usb/serial/uchcom.c#18 integrate .. //depot/projects/smpng/sys/dev/usb/serial/ufoma.c#19 integrate .. //depot/projects/smpng/sys/dev/usb/serial/uftdi.c#26 integrate .. //depot/projects/smpng/sys/dev/usb/serial/uftdi_reg.h#4 integrate .. //depot/projects/smpng/sys/dev/usb/storage/umass.c#29 integrate .. //depot/projects/smpng/sys/dev/usb/usb_hub.c#27 integrate .. //depot/projects/smpng/sys/dev/usb/usb_pf.c#5 integrate .. //depot/projects/smpng/sys/dev/usb/usb_request.c#25 integrate .. //depot/projects/smpng/sys/dev/usb/usbdevs#176 integrate .. //depot/projects/smpng/sys/dev/usb/wlan/if_run.c#17 integrate .. //depot/projects/smpng/sys/dev/utopia/utopia.c#12 integrate .. //depot/projects/smpng/sys/dev/virtio/scsi/virtio_scsi.c#1 branch .. //depot/projects/smpng/sys/dev/virtio/scsi/virtio_scsi.h#1 branch .. //depot/projects/smpng/sys/dev/virtio/scsi/virtio_scsivar.h#1 branch .. //depot/projects/smpng/sys/dev/virtio/virtio.c#3 integrate .. //depot/projects/smpng/sys/dev/virtio/virtio.h#5 integrate .. //depot/projects/smpng/sys/dev/virtio/virtqueue.c#4 integrate .. //depot/projects/smpng/sys/dev/vxge/include/vxgehal-ll.h#4 integrate .. //depot/projects/smpng/sys/dev/vxge/vxge.c#3 integrate .. //depot/projects/smpng/sys/dev/wtap/if_wtap.c#3 integrate .. //depot/projects/smpng/sys/dev/xen/netback/netback_unit_tests.c#2 integrate .. //depot/projects/smpng/sys/fs/coda/coda_subr.c#6 integrate .. //depot/projects/smpng/sys/fs/deadfs/dead_vnops.c#19 integrate .. //depot/projects/smpng/sys/fs/devfs/devfs_int.h#10 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2_alloc.c#7 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2_bmap.c#3 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2_dinode.h#5 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2_inode.c#6 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2_inode_cnv.c#3 integrate .. //depot/projects/smpng/sys/fs/ext2fs/ext2fs.h#5 integrate .. //depot/projects/smpng/sys/fs/ext2fs/inode.h#5 integrate .. //depot/projects/smpng/sys/fs/fuse/fuse.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_debug.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_device.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_file.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_file.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_internal.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_internal.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_io.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_io.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_ipc.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_ipc.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_kernel.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_main.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_node.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_node.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_param.h#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_vfsops.c#1 branch .. //depot/projects/smpng/sys/fs/fuse/fuse_vnops.c#1 branch .. //depot/projects/smpng/sys/fs/hpfs/hpfs_vfsops.c#44 integrate .. //depot/projects/smpng/sys/fs/nandfs/bmap.c#2 integrate .. //depot/projects/smpng/sys/fs/nfs/nfs.h#8 integrate .. //depot/projects/smpng/sys/fs/nfs/nfs_commonacl.c#10 integrate .. //depot/projects/smpng/sys/fs/nfs/nfs_commonport.c#13 integrate .. //depot/projects/smpng/sys/fs/nfs/nfs_commonsubs.c#13 integrate .. //depot/projects/smpng/sys/fs/nfs/nfs_var.h#20 integrate .. //depot/projects/smpng/sys/fs/nfs/nfscl.h#2 integrate .. //depot/projects/smpng/sys/fs/nfsclient/nfs_clcomsubs.c#5 integrate .. //depot/projects/smpng/sys/fs/nfsclient/nfs_clrpcops.c#16 integrate .. //depot/projects/smpng/sys/fs/nfsserver/nfs_nfsdkrpc.c#11 integrate .. //depot/projects/smpng/sys/fs/nfsserver/nfs_nfsdport.c#27 integrate .. //depot/projects/smpng/sys/fs/ntfs/ntfs_subr.c#34 integrate .. //depot/projects/smpng/sys/fs/ntfs/ntfs_vfsops.c#46 integrate .. //depot/projects/smpng/sys/fs/ntfs/ntfs_vnops.c#37 integrate .. //depot/projects/smpng/sys/fs/nullfs/null.h#9 integrate .. //depot/projects/smpng/sys/fs/nullfs/null_subr.c#24 integrate .. //depot/projects/smpng/sys/fs/nullfs/null_vfsops.c#35 integrate .. //depot/projects/smpng/sys/fs/nullfs/null_vnops.c#49 integrate .. //depot/projects/smpng/sys/fs/tmpfs/tmpfs_vfsops.c#11 integrate .. //depot/projects/smpng/sys/geom/bde/g_bde.c#19 integrate .. //depot/projects/smpng/sys/geom/geom.h#63 integrate .. //depot/projects/smpng/sys/geom/geom_dev.c#61 integrate .. //depot/projects/smpng/sys/geom/geom_disk.c#67 integrate .. //depot/projects/smpng/sys/geom/geom_slice.c#40 integrate .. //depot/projects/smpng/sys/geom/geom_subr.c#68 integrate .. //depot/projects/smpng/sys/geom/label/g_label.c#23 integrate .. //depot/projects/smpng/sys/geom/label/g_label.h#11 integrate .. //depot/projects/smpng/sys/geom/mirror/g_mirror.c#49 integrate .. //depot/projects/smpng/sys/geom/multipath/g_multipath.c#15 integrate .. //depot/projects/smpng/sys/geom/part/g_part.c#41 integrate .. //depot/projects/smpng/sys/geom/raid/g_raid.c#5 integrate .. //depot/projects/smpng/sys/geom/raid/g_raid.h#3 integrate .. //depot/projects/smpng/sys/geom/raid/g_raid_ctl.c#3 integrate .. //depot/projects/smpng/sys/geom/raid/md_ddf.c#2 integrate .. //depot/projects/smpng/sys/geom/raid/md_intel.c#5 integrate .. //depot/projects/smpng/sys/geom/raid/md_jmicron.c#3 integrate .. //depot/projects/smpng/sys/geom/raid/md_nvidia.c#4 integrate .. //depot/projects/smpng/sys/geom/raid/md_promise.c#4 integrate .. //depot/projects/smpng/sys/geom/raid/md_sii.c#3 integrate .. //depot/projects/smpng/sys/geom/raid/tr_concat.c#2 integrate .. //depot/projects/smpng/sys/geom/raid/tr_raid0.c#2 integrate .. //depot/projects/smpng/sys/geom/raid/tr_raid1.c#4 integrate .. //depot/projects/smpng/sys/geom/raid/tr_raid1e.c#4 integrate .. //depot/projects/smpng/sys/geom/raid/tr_raid5.c#2 integrate .. //depot/projects/smpng/sys/geom/raid3/g_raid3.c#48 integrate .. //depot/projects/smpng/sys/geom/uncompress/g_uncompress.c#3 integrate .. //depot/projects/smpng/sys/geom/uzip/g_uzip.c#16 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_compat.h#4 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_freebsd.h#3 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_ioctl.c#6 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_mountops.c#12 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_stats.c#2 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/FreeBSD/xfs_super.c#7 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/xfs_alloc.c#3 integrate .. //depot/projects/smpng/sys/gnu/fs/xfs/xfs_vfsops.c#4 integrate .. //depot/projects/smpng/sys/i386/bios/smapi.c#13 integrate .. //depot/projects/smpng/sys/i386/bios/smapi_bios.S#5 integrate .. //depot/projects/smpng/sys/i386/conf/GENERIC#132 integrate .. //depot/projects/smpng/sys/i386/conf/NOTES#159 integrate .. //depot/projects/smpng/sys/i386/conf/PAE#28 integrate .. //depot/projects/smpng/sys/i386/i386/identcpu.c#76 integrate .. //depot/projects/smpng/sys/i386/i386/machdep.c#177 integrate .. //depot/projects/smpng/sys/i386/i386/mp_machdep.c#144 integrate .. //depot/projects/smpng/sys/i386/i386/pmap.c#164 integrate .. //depot/projects/smpng/sys/i386/i386/trap.c#137 integrate .. //depot/projects/smpng/sys/i386/ibcs2/ibcs2_sysvec.c#16 integrate .. //depot/projects/smpng/sys/i386/include/atomic.h#57 integrate .. //depot/projects/smpng/sys/i386/include/intr_machdep.h#27 integrate .. //depot/projects/smpng/sys/i386/include/param.h#28 integrate .. //depot/projects/smpng/sys/i386/include/pc/bios.h#9 integrate .. //depot/projects/smpng/sys/i386/include/xen/xen-os.h#7 integrate .. //depot/projects/smpng/sys/i386/isa/elink.c#5 integrate .. //depot/projects/smpng/sys/i386/linux/linux_sysvec.c#79 integrate .. //depot/projects/smpng/sys/i386/pci/pci_cfgreg.c#41 integrate .. //depot/projects/smpng/sys/i386/xen/mp_machdep.c#25 integrate .. //depot/projects/smpng/sys/i386/xen/pmap.c#28 integrate .. //depot/projects/smpng/sys/i386/xen/xen_machdep.c#14 integrate .. //depot/projects/smpng/sys/ia64/conf/NOTES#15 integrate .. //depot/projects/smpng/sys/ia64/conf/SKI#26 delete .. //depot/projects/smpng/sys/ia64/ia32/ia32_trap.c#24 integrate .. //depot/projects/smpng/sys/ia64/ia64/mem.c#21 integrate .. //depot/projects/smpng/sys/ia64/ia64/pmap.c#108 integrate .. //depot/projects/smpng/sys/ia64/ia64/ssc.c#23 delete .. //depot/projects/smpng/sys/ia64/ia64/sscdisk.c#24 delete .. //depot/projects/smpng/sys/ia64/ia64/trap.c#103 integrate .. //depot/projects/smpng/sys/kern/Make.tags.inc#12 integrate .. //depot/projects/smpng/sys/kern/bus_if.m#22 integrate .. //depot/projects/smpng/sys/kern/dtio_kdtrace.c#2 integrate .. //depot/projects/smpng/sys/kern/imgact_elf.c#83 integrate .. //depot/projects/smpng/sys/kern/init_sysent.c#106 integrate .. //depot/projects/smpng/sys/kern/kern_clocksource.c#11 integrate .. //depot/projects/smpng/sys/kern/kern_condvar.c#56 integrate .. //depot/projects/smpng/sys/kern/kern_conf.c#76 integrate .. //depot/projects/smpng/sys/kern/kern_cons.c#6 integrate .. //depot/projects/smpng/sys/kern/kern_cpuset.c#15 integrate .. //depot/projects/smpng/sys/kern/kern_exec.c#143 integrate .. //depot/projects/smpng/sys/kern/kern_exit.c#159 integrate .. //depot/projects/smpng/sys/kern/kern_fork.c#139 integrate .. //depot/projects/smpng/sys/kern/kern_intr.c#112 integrate .. //depot/projects/smpng/sys/kern/kern_ktr.c#46 integrate .. //depot/projects/smpng/sys/kern/kern_lock.c#90 integrate .. //depot/projects/smpng/sys/kern/kern_mbuf.c#36 integrate .. //depot/projects/smpng/sys/kern/kern_module.c#33 integrate .. //depot/projects/smpng/sys/kern/kern_mutex.c#165 integrate .. //depot/projects/smpng/sys/kern/kern_rmlock.c#13 integrate .. //depot/projects/smpng/sys/kern/kern_rwlock.c#36 integrate .. //depot/projects/smpng/sys/kern/kern_sig.c#168 integrate .. //depot/projects/smpng/sys/kern/kern_sx.c#70 integrate .. //depot/projects/smpng/sys/kern/kern_thread.c#127 integrate .. //depot/projects/smpng/sys/kern/kern_time.c#60 integrate .. //depot/projects/smpng/sys/kern/link_elf.c#58 integrate .. //depot/projects/smpng/sys/kern/sched_4bsd.c#109 integrate .. //depot/projects/smpng/sys/kern/sched_ule.c#123 integrate .. //depot/projects/smpng/sys/kern/subr_bus.c#102 integrate .. //depot/projects/smpng/sys/kern/subr_hints.c#12 integrate .. //depot/projects/smpng/sys/kern/subr_param.c#37 integrate .. //depot/projects/smpng/sys/kern/subr_sleepqueue.c#56 integrate .. //depot/projects/smpng/sys/kern/subr_syscall.c#5 integrate .. //depot/projects/smpng/sys/kern/subr_taskqueue.c#53 integrate .. //depot/projects/smpng/sys/kern/subr_trap.c#105 integrate .. //depot/projects/smpng/sys/kern/subr_turnstile.c#48 integrate .. //depot/projects/smpng/sys/kern/subr_unit.c#9 integrate .. //depot/projects/smpng/sys/kern/subr_witness.c#192 integrate .. //depot/projects/smpng/sys/kern/sys_generic.c#72 integrate .. //depot/projects/smpng/sys/kern/sys_procdesc.c#3 integrate .. //depot/projects/smpng/sys/kern/syscalls.c#105 integrate .. //depot/projects/smpng/sys/kern/syscalls.master#112 integrate .. //depot/projects/smpng/sys/kern/systrace_args.c#30 integrate .. //depot/projects/smpng/sys/kern/tty_ttydisc.c#12 integrate .. //depot/projects/smpng/sys/kern/uipc_domain.c#29 integrate .. //depot/projects/smpng/sys/kern/uipc_mqueue.c#34 integrate .. //depot/projects/smpng/sys/kern/uipc_socket.c#149 integrate .. //depot/projects/smpng/sys/kern/uipc_usrreq.c#100 integrate .. //depot/projects/smpng/sys/kern/vfs_default.c#76 integrate .. //depot/projects/smpng/sys/kern/vfs_lookup.c#70 integrate .. //depot/projects/smpng/sys/kern/vfs_mount.c#113 integrate .. //depot/projects/smpng/sys/kern/vfs_subr.c#193 integrate .. //depot/projects/smpng/sys/kern/vfs_syscalls.c#171 integrate .. //depot/projects/smpng/sys/kern/vfs_vnops.c#115 integrate .. //depot/projects/smpng/sys/kern/vnode_if.src#50 integrate .. //depot/projects/smpng/sys/libkern/jenkins.h#3 delete .. //depot/projects/smpng/sys/libkern/jenkins_hash.c#1 branch .. //depot/projects/smpng/sys/mips/atheros/ar71xx_gpio.c#5 integrate .. //depot/projects/smpng/sys/mips/atheros/ar724x_pci.c#5 integrate .. //depot/projects/smpng/sys/mips/beri/beri_machdep.c#1 branch .. //depot/projects/smpng/sys/mips/beri/files.beri#1 branch .. //depot/projects/smpng/sys/mips/beri/std.beri#1 branch .. //depot/projects/smpng/sys/mips/cavium/octeon_gpio.c#2 integrate .. //depot/projects/smpng/sys/mips/cavium/usb/octusb.c#6 integrate .. //depot/projects/smpng/sys/mips/conf/AP91#1 branch .. //depot/projects/smpng/sys/mips/conf/AP91.hints#1 branch .. //depot/projects/smpng/sys/mips/conf/AP93#2 integrate .. //depot/projects/smpng/sys/mips/conf/AP93.hints#2 integrate .. //depot/projects/smpng/sys/mips/conf/AP96#2 integrate .. //depot/projects/smpng/sys/mips/conf/AR724X_BASE#1 branch .. //depot/projects/smpng/sys/mips/conf/AR724X_BASE.hints#1 branch .. //depot/projects/smpng/sys/mips/conf/BERI_DE4.hints#1 branch .. //depot/projects/smpng/sys/mips/conf/BERI_DE4_MDROOT#1 branch .. //depot/projects/smpng/sys/mips/conf/BERI_DE4_SDROOT#1 branch >>> TRUNCATED FOR MAIL (1000 lines) <<< From owner-p4-projects@FreeBSD.ORG Mon Oct 22 06:35:28 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id B39D6A30; Mon, 22 Oct 2012 06:35:28 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 5AED9951 for ; Mon, 22 Oct 2012 06:35:28 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 40E888FC22 for ; Mon, 22 Oct 2012 06:35:28 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M6ZSjG082223 for ; Mon, 22 Oct 2012 06:35:28 GMT (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M6ZRXp082220 for perforce@freebsd.org; Mon, 22 Oct 2012 06:35:27 GMT (envelope-from jhb@freebsd.org) Date: Mon, 22 Oct 2012 06:35:27 GMT Message-Id: <201210220635.q9M6ZRXp082220@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin Subject: PERFORCE change 218783 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 06:35:28 -0000 http://p4web.freebsd.org/@@218783?ac=10 Change 218783 by jhb@jhb_ralph on 2012/10/20 03:28:49 Mismerge. Affected files ... .. //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/debug.h#3 edit Differences ... ==== //depot/projects/smpng/sys/cddl/compat/opensolaris/sys/debug.h#3 (text+ko) ==== @@ -23,26 +23,20 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $FreeBSD: src/sys/cddl/compat/opensolaris/sys/debug.h,v 1.2 2008/03/28 22:16:06 jb Exp $ + * $FreeBSD: src/sys/cddl/compat/opensolaris/sys/debug.h,v 1.4 2012/09/12 18:05:43 mm Exp $ */ #ifndef _OPENSOLARIS_SYS_DEBUG_H_ #define _OPENSOLARIS_SYS_DEBUG_H_ #ifdef _KERNEL -#include #include #include_next - -#define assfail(a, f, l) \ - (panic("solaris assert: %s, file: %s, line: %d", (a), (f), (l)), 0) +#else /* !_KERNEL */ -#define assfail3(a, lv, op, rv, f, l) \ - panic("solaris assert: %s (0x%jx %s 0x%jx), file: %s, line: %d", \ - (a), (uintmax_t)(lv), (op), (uintmax_t)(rv), (f), (l)) -#else /* !_KERNEL */ #include_next -#endif +#include +#endif /* _KERNEL */ #endif /* _OPENSOLARIS_SYS_DEBUG_H_ */ From owner-p4-projects@FreeBSD.ORG Mon Oct 22 06:35:36 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id BDB17B59; Mon, 22 Oct 2012 06:35:36 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 7BD76B57 for ; Mon, 22 Oct 2012 06:35:36 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 5F6E98FC08 for ; Mon, 22 Oct 2012 06:35:36 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M6ZZwf082306 for ; Mon, 22 Oct 2012 06:35:35 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M6ZZZ6082301 for perforce@freebsd.org; Mon, 22 Oct 2012 06:35:35 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 06:35:35 GMT Message-Id: <201210220635.q9M6ZZZ6082301@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218793 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 06:35:36 -0000 http://p4web.freebsd.org/@@218793?ac=10 Change 218793 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/20 10:00:09 First of several changes to update the CheriBSD headers for CHERI ISAv2; in this pass, header files are (generally) updated based on definition changes, excluding instruction changes: - Revision (I think) to split a first 64-bit field into two 32-bit fields for the permissions and reserved bits, so swap in code. Not 100% sure this is right, endianness is confusing. - C26 has been returned to the pool of general-purpose registers, so include it in saved frame state for user threads. On the other hand, we're no longer saving TSC, so remove saving of C28. - Expand comments on C25 use, and how we plan to return it to the register pool once life is better. - A few other useful comments on cp2_frame. - Remove old permission definitions; define new ones. - Comment that we now likely no longer require the unpriv capability, since we can clear capability registers, but leave it for now, until the code is updated. - Update definitions further for the reserved register juggle. - There is a possible bug in the CHERI ISAv2 spec, so don't quite use the exception codes listed (KDC is probably not the same exception code as EPCC). Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#6 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#6 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#5 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#6 (text+ko) ==== @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2011 Robert N. M. Watson + * Copyright (c) 2011-2012 Robert N. M. Watson * All rights reserved. * * This software was developed by SRI International and the University of @@ -42,8 +42,8 @@ */ #define CAPABILITY_SIZE 32 struct chericap { + uint32_t c_reserved; uint32_t c_uperms; - uint32_t c_reserved; union { uint64_t c_otype; uint64_t c_eaddr; @@ -68,25 +68,30 @@ struct chericap cf_c0; /* - * General-purpose capabilities -- note, numbering is from v1.3 of - * the CHERI ISA spec. v1.4 is expected to renumber the specific - * purpose capabilities to be at the bottom, rather than the top, of - * the capability register space (per Ross Anderson's suggestion). + * General-purpose capabilities -- note, numbering is from v1.7 of the + * CHERI ISA spec (ISAv2). + * + * XXXRW: Currently, C25 is used in-kernel to maintain a saved UDC + * (C0), and so not part of cp2_frame. This will change in the + * future. */ struct chericap cf_c1, cf_c2, cf_c3, cf_c4; struct chericap cf_c5, cf_c6, cf_c7; struct chericap cf_c8, cf_c9, cf_c10, cf_c11, cf_c12; struct chericap cf_c13, cf_c14, cf_c15, cf_c16, cf_c17; struct chericap cf_c18, cf_c19, cf_c20, cf_c21, cf_c22; - struct chericap cf_c23, cf_c24; + struct chericap cf_c23, cf_c24, cf_c26; /* * Special-purpose capability registers that must be preserved on a - * user context switch. Note that KT0, KT1, KCC, and KDC are omitted. + * user context switch. Note that KRC0, KRC1, KCC, and KDC are + * omitted. */ - struct chericap cf_tsc; + /* XXXRW: Gone in v1.7: struct chericap cf_tsc; */ - /* Program counter capability. */ + /* + * Program counter capability -- extracted from exception frame EPCC. + */ struct chericap cf_pcc; }; CTASSERT(sizeof(struct cp2_frame) == (27 * CAPABILITY_SIZE)); ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#6 (text+ko) ==== @@ -49,7 +49,7 @@ andi reg, reg, SR_KSU_USER; \ beq reg, $0, 64f; \ nop; \ - cmove $c25, $c0; \ + cmove $c27, $c0; \ cmove $c0, $c30; \ 64: @@ -103,6 +103,8 @@ * XXXRW: It woudld be nice to make calls to these conditional on actual CP2 * coprocessor use, similar to on-demand context management for other MIPS * coprocessors (e.g., FP). + * + * XXXRW: Note hard-coding of UDC here. */ #define SAVE_CP2_CONTEXT(treg, base) \ SAVE_U_PCB_CP2REG(treg, $c25, CHERI_CR_C0_OFF, base); \ @@ -130,7 +132,7 @@ SAVE_U_PCB_CP2REG(treg, $c22, CHERI_CR_C22_OFF, base); \ SAVE_U_PCB_CP2REG(treg, $c23, CHERI_CR_C23_OFF, base); \ SAVE_U_PCB_CP2REG(treg, $c24, CHERI_CR_C24_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c28, CHERI_CR_TSC_OFF, base); \ + SAVE_U_PCB_CP2REG(treg, $c26, CHERI_CR_C26_OFF, base); \ SAVE_U_PCB_CP2REG(treg, $c31, CHERI_CR_PCC_OFF, base) #define RESTORE_CP2_CONTEXT(treg, base) \ @@ -159,7 +161,7 @@ RESTORE_U_PCB_CP2REG(treg, $c22, CHERI_CR_C22_OFF, base); \ RESTORE_U_PCB_CP2REG(treg, $c23, CHERI_CR_C23_OFF, base); \ RESTORE_U_PCB_CP2REG(treg, $c24, CHERI_CR_C24_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c28, CHERI_CR_TSC_OFF, base); \ + RESTORE_U_PCB_CP2REG(treg, $c26, CHERI_CR_C26_OFF, base); \ RESTORE_U_PCB_CP2REG(treg, $c31, CHERI_CR_PCC_OFF, base) #endif /* _MIPS_INCLUDE_CHERIASM_H_ */ ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#5 (text+ko) ==== @@ -39,43 +39,39 @@ * but perhaps it should be. */ #define CHERI_PERM_NON_EPHEMERAL 0x0001 -#define CHERI_PERM_ACCESS_CR31 0x0002 -#define CHERI_PERM_ACCESS_CR30 0x0004 -#define CHERI_PERM_ACCESS_CR29 0x0008 -#define CHERI_PERM_ACCESS_CR28 0x0010 -#define CHERI_PERM_RESERVED1 0x0020 -#define CHERI_PERM_RESERVED2 0x0040 -#define CHERI_PERM_RESERVED3 0x0080 -#define CHERI_PERM_SEAL 0x0100 -#define CHERI_PERM_STORE_EPHEMERAL_CAPABILITY 0x0200 -#define CHERI_PERM_LOAD 0x0400 -#define CHERI_PERM_STORE 0x0800 -#define CHERI_PERM_LOAD_CAP 0x1000 -#define CHERI_PERM_STORE_CAP 0x2000 -#define CHEIR_PERM_EXECUTE 0x4000 +#define CHEIR_PERM_EXECUTE 0x0002 +#define CHERI_PERM_LOAD 0x0004 +#define CHERI_PERM_STORE 0x0008 +#define CHERI_PERM_LOAD_CAP 0x0010 +#define CHERI_PERM_STORE_CAP 0x0020 +#define CHERI_PERM_STORE_EPHEM_CAP 0x0040 +#define CHERI_PERM_SEAL 0x0080 +#define CHERI_PERM_SETTYPE 0x0100 +#define CHERI_PERM_RESERVED1 0x0200 +#define CHERI_PERM_ACCESS_EPCC 0x0400 +#define CHERI_PERM_ACCESS_KDC 0x0800 +#define CHERI_PERM_ACCESS_KCC 0x1000 +#define CHERI_PERM_ACCESS_KR1C 0x2000 +#define CHERI_PERM_ACCESS_KR2C 0x4000 -/* - * XXXRW: Should this include CHERI_UNSEALED? - */ #define CHERI_PERM_PRIV \ - (CHERI_PERM_NON_EPHEMERAL | CHERI_PERM_ACCESS_CR31 | \ - CHERI_PERM_ACCESS_CR30 | CHERI_PERM_ACCESS_CR29 | \ - CHERI_PERM_ACCESS_CR28 | CHERI_PERM_SEAL | \ - CHERI_PERM_STORE_EPHEMERAL_CAPABILITY | CHERI_PERM_LOAD | \ - CHERI_PERM_STORE | CHERI_PERM_LOAD_CAP | CHERI_PERM_STORE_CAP | \ - CHEIR_PERM_EXECUTE) + (CHERI_PERM_NON_EPHEMERAL | CHERI_PERM_EXECUTE | \ + CHERI_PERM_LOAD | CHERI_PERM_STORE | CHERI_PERM_LOAD_CAP | \ + CHERI_PERM_STORE_CAP | CHERI_PERM_STORE_EPHEM_CAP | \ + CHERI_PERM_SEAL | CHERI_PERM_SETTYPE | CHERI_PERM_RESERVED1 | \ + CHERI_PERM_ACCESS_EPCC | CHERI_PERM_ACCESS_KDC | \ + CHERI_PERM_ACCESS_KCC | CHERI_PERM_ACCESS_KR1C | \ + CHERI_PERM_ACCESS_KR2C) #define CHERI_PERM_USER \ - (CHERI_PERM_NON_EPHEMERAL | CHERI_PERM_SEAL | \ - CHERI_PERM_STORE_EPHEMERAL_CAPABILITY | CHERI_PERM_LOAD | \ - CHERI_PERM_STORE | CHERI_PERM_LOAD_CAP | CHERI_PERM_STORE_CAP | \ - CHEIR_PERM_EXECUTE) + (CHERI_PERM_NON_EPHEMERAL | CHERI_PERM_EXECUTE | \ + CHERI_PERM_LOAD | CHERI_PERM_STORE | CHERI_PERM_LOAD_CAP | \ + CHERI_PERM_STORE_CAP | CHERI_PERM_STORE_EPHEM_CAP | \ + CHERI_PERM_SEAL | CHERI_PERM_SETTYPE) /* * Definition for kernel "privileged" capability able to name the entire * address space. - * - * XXXRW: Perhaps CHERI_UCAP_UNPRIV_LENGTH should actually just cover useg. */ #define CHERI_CAP_PRIV_UPERMS CHERI_PERM_PRIV #define CHERI_CAP_PRIV_OTYPE 0x0 @@ -94,6 +90,9 @@ /* * Definition for capability unable to name any resources. This is suitable * for filling capability registers that should hold no privilege. + * + * XXXRW: Probably no longer required in CHERI ISAv2 as we can clear + * registers. */ #define CHERI_CAP_NOPRIV_UPERMS 0x0 #define CHERI_CAP_NOPRIV_OTYPE 0x0 @@ -129,19 +128,32 @@ #define CHERI_CR_C22 22 #define CHERI_CR_C23 23 #define CHERI_CR_C24 24 -#define CHERI_CR_UDC 25 /* UDC: user data capability (saved C0). */ -#define CHERI_CR_KT0 26 /* KT0: temporary kernel capability. */ -#define CHERI_CR_KT1 27 /* KT1: temporary kernel capability. */ -#define CHERI_CR_TSC 28 /* TSC: trusted stack capability. */ -#define CHERI_CR_KCC 29 /* KCC: kernel code capability. */ -#define CHERI_CR_KDC 30 /* KDC: kernel data capability. */ -#define CHERI_CR_EPCC 31 /* EPCC: exception program counter cap. */ +#define CHERI_CR_C25 25 +#define CHERI_CR_C26 26 +#define CHERI_CR_C27 27 +#define CHERI_CR_C28 28 +#define CHERI_CR_C29 29 +#define CHERI_CR_C30 30 +#define CHERI_CR_C31 31 -#define CHERI_CR_CT0 CHERI_CR_C10 /* CT0: temporary capability. */ +/* + * XXXRW: Note that UDC is used by the kernel to hold the saved user data + * capability during kernel execution. In the future, this will change -- + * instead we will swap with KR2C, and save it to a frame to be used as needed + * later. In the mean time, userspace agrees not to use C25. + */ +#define CHERI_CR_RCC CHERI_CR_C24 /* Return code capability. */ +#define CHERI_CR_UDC CHERI_CR_C25 /* User data capability. */ +#define CHERI_CR_IDC CHERI_CR_C26 /* Invoked data capability.*/ +#define CHERI_CR_KR1C CHERI_CR_C27 /* Kernel reserved capability 1. */ +#define CHERI_CR_KR2C CHERI_CR_C28 /* Kernel reserved capability 2. */ +#define CHERI_CR_KCC CHERI_CR_C29 /* Kernel code capability. */ +#define CHERI_CR_KDC CHERI_CR_C30 /* Kernel data capability. */ +#define CHERI_CR_EPCC CHERI_CR_C31 /* Exception program counter cap. */ /* * Offsets of registers in struct cp2_frame -- must match the definition in - * cp2.h. Observe the discontinuity after $udc. + * cheri.h. */ #define CHERI_CR_C0_OFF 0 #define CHERI_CR_C1_OFF 1 @@ -168,7 +180,41 @@ #define CHERI_CR_C22_OFF 22 #define CHERI_CR_C23_OFF 23 #define CHERI_CR_C24_OFF 24 -#define CHERI_CR_TSC_OFF 25 +#define CHERI_CR_C26_OFF 25 #define CHERI_CR_PCC_OFF 26 +/* + * List of CHERI capability cause code constants, which are used to + * disambiguate various CP2 exceptions. + * + * XXXRW: I wonder if we really need different permissions for each exception- + * handling capability. + * + * XXXRW: Curiously non-contiguous. + * + * XXXRW: KDC is listed as 0x1a in the spec, which collides with EPCC. Not + * sure what is actually used. + */ +#define CHERI_EXCCODE_NONE 0x00 +#define CHERI_EXCCODE_LENGTH 0x01 +#define CHERI_EXCCODE_TAG 0x02 +#define CHERI_EXCCODE_SEAL 0x03 +#define CHERI_EXCCODE_TYPE 0x04 +#define CHERI_EXCCODE_CALL 0x05 +#define CHERI_EXCCODE_RETURN 0x06 +#define CHERI_EXCCODE_NON_EPHEM 0x10 +#define CHERI_EXCCODE_PERM_EXEXCUTE 0x11 +#define CHERI_EXCCODE_PERM_LOAD 0x12 +#define CHERI_EXCCODE_PERM_STORE 0x13 +#define CHERI_EXCCODE_PERM_LOADCAP 0x14 +#define CHERI_EXCCODE_PERM_STORECAP 0x15 +#define CHERI_EXCCODE_STORE_EPHEM 0x16 +#define CHERI_EXCCODE_PERM_SEAL 0x17 +#define CHERI_EXCCODE_PERM_SETTYPE 0x18 +#define CHERI_EXCCODE_ACCESS_EPCC 0x1a +#define CHERI_EXCCODE_ACCESS_KDC 0x1b /* XXXRW */ +#define CHERI_EXCCODE_ACCESS_KCC 0x1c +#define CHERI_EXCCODE_ACCESS_KR1C 0x1d +#define CHERI_EXCCODE_ACCESS_KR2C 0x1e + #endif /* _MIPS_INCLUDE_CHERIREG_H_ */ From owner-p4-projects@FreeBSD.ORG Mon Oct 22 08:53:25 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id B0A91FFF; Mon, 22 Oct 2012 08:53:25 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 5B654FFD for ; Mon, 22 Oct 2012 08:53:25 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 3E76F8FC0A for ; Mon, 22 Oct 2012 08:53:25 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M8rOcQ088849 for ; Mon, 22 Oct 2012 08:53:25 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M8rOlL088846 for perforce@freebsd.org; Mon, 22 Oct 2012 08:53:24 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 08:53:24 GMT Message-Id: <201210220853.q9M8rOlL088846@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218892 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 08:53:26 -0000 http://p4web.freebsd.org/@@218892?ac=10 Change 218892 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 08:52:30 Update CheriBSD inline assembly to use CHERI ISAv2 syntax and semantics. Trim some utility functions that we're not actually using (and won't be required once we have compiler support). This inolves a lot of GNU assembler constraints and clobbers, which generally suffer a high likelihood of incorrectness -- follow-up commits are almost certain. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#14 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#7 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#14 (text+ko) ==== @@ -161,290 +161,6 @@ cp2_capability_copy(&cf_destp->cf_pcc, &cf_srcp->cf_pcc); } -/* - * Functions for writing via arbitrary capability registers. The CP2 macros - * cannot be used this way as they require the register number to be available - * at compile-time, not run-time. Once we have improved compiler support for - * capabilities, this problem should go away. - */ -void -cp2_store_hword_via(u_int crn, uint64_t offset, uint16_t h) -{ - - switch (crn) { - case 0: - CP2_STORE_HWORD_VIA(0, offset, h); - break; - - case 1: - CP2_STORE_HWORD_VIA(1, offset, h); - break; - - case 2: - CP2_STORE_HWORD_VIA(2, offset, h); - break; - - case 3: - CP2_STORE_HWORD_VIA(3, offset, h); - break; - - case 4: - CP2_STORE_HWORD_VIA(4, offset, h); - break; - - case 5: - CP2_STORE_HWORD_VIA(5, offset, h); - break; - - case 6: - CP2_STORE_HWORD_VIA(6, offset, h); - break; - - case 7: - CP2_STORE_HWORD_VIA(7, offset, h); - break; - - case 8: - CP2_STORE_HWORD_VIA(8, offset, h); - break; - - case 9: - CP2_STORE_HWORD_VIA(9, offset, h); - break; - - case 10: - CP2_STORE_HWORD_VIA(10, offset, h); - break; - - case 11: - CP2_STORE_HWORD_VIA(11, offset, h); - break; - - case 12: - CP2_STORE_HWORD_VIA(12, offset, h); - break; - - case 13: - CP2_STORE_HWORD_VIA(13, offset, h); - break; - - case 14: - CP2_STORE_HWORD_VIA(14, offset, h); - break; - - case 15: - CP2_STORE_HWORD_VIA(15, offset, h); - break; - - case 16: - CP2_STORE_HWORD_VIA(16, offset, h); - break; - - case 17: - CP2_STORE_HWORD_VIA(17, offset, h); - break; - - case 18: - CP2_STORE_HWORD_VIA(18, offset, h); - break; - - case 19: - CP2_STORE_HWORD_VIA(19, offset, h); - break; - - case 20: - CP2_STORE_HWORD_VIA(20, offset, h); - break; - - case 21: - CP2_STORE_HWORD_VIA(21, offset, h); - break; - - case 22: - CP2_STORE_HWORD_VIA(22, offset, h); - break; - - case 23: - CP2_STORE_HWORD_VIA(23, offset, h); - break; - - case 24: - CP2_STORE_HWORD_VIA(24, offset, h); - break; - - case 25: - CP2_STORE_HWORD_VIA(25, offset, h); - break; - - case 26: - CP2_STORE_HWORD_VIA(26, offset, h); - break; - - case 27: - CP2_STORE_HWORD_VIA(27, offset, h); - break; - - case 28: - CP2_STORE_HWORD_VIA(28, offset, h); - break; - - case 29: - CP2_STORE_HWORD_VIA(29, offset, h); - break; - - case 30: - CP2_STORE_HWORD_VIA(30, offset, h); - break; - - case 31: - CP2_STORE_HWORD_VIA(31, offset, h); - break; - - default: - /* XXXRW: Arguably should panic. */ - break; - } -} - -void -cp2_store_dword_via(u_int crn, uint64_t offset, uint64_t d) -{ - - switch (crn) { - case 0: - CP2_STORE_DWORD_VIA(0, offset, d); - break; - - case 1: - CP2_STORE_DWORD_VIA(1, offset, d); - break; - - case 2: - CP2_STORE_DWORD_VIA(2, offset, d); - break; - - case 3: - CP2_STORE_DWORD_VIA(3, offset, d); - break; - - case 4: - CP2_STORE_DWORD_VIA(4, offset, d); - break; - - case 5: - CP2_STORE_DWORD_VIA(5, offset, d); - break; - - case 6: - CP2_STORE_DWORD_VIA(6, offset, d); - break; - - case 7: - CP2_STORE_DWORD_VIA(7, offset, d); - break; - - case 8: - CP2_STORE_DWORD_VIA(8, offset, d); - break; - - case 9: - CP2_STORE_DWORD_VIA(9, offset, d); - break; - - case 10: - CP2_STORE_DWORD_VIA(10, offset, d); - break; - - case 11: - CP2_STORE_DWORD_VIA(11, offset, d); - break; - - case 12: - CP2_STORE_DWORD_VIA(12, offset, d); - break; - - case 13: - CP2_STORE_DWORD_VIA(13, offset, d); - break; - - case 14: - CP2_STORE_DWORD_VIA(14, offset, d); - break; - - case 15: - CP2_STORE_DWORD_VIA(15, offset, d); - break; - - case 16: - CP2_STORE_DWORD_VIA(16, offset, d); - break; - - case 17: - CP2_STORE_DWORD_VIA(17, offset, d); - break; - - case 18: - CP2_STORE_DWORD_VIA(18, offset, d); - break; - - case 19: - CP2_STORE_DWORD_VIA(19, offset, d); - break; - - case 20: - CP2_STORE_DWORD_VIA(20, offset, d); - break; - - case 21: - CP2_STORE_DWORD_VIA(21, offset, d); - break; - - case 22: - CP2_STORE_DWORD_VIA(22, offset, d); - break; - - case 23: - CP2_STORE_DWORD_VIA(23, offset, d); - break; - - case 24: - CP2_STORE_DWORD_VIA(24, offset, d); - break; - - case 25: - CP2_STORE_DWORD_VIA(25, offset, d); - break; - - case 26: - CP2_STORE_DWORD_VIA(26, offset, d); - break; - - case 27: - CP2_STORE_DWORD_VIA(27, offset, d); - break; - - case 28: - CP2_STORE_DWORD_VIA(28, offset, d); - break; - - case 29: - CP2_STORE_DWORD_VIA(29, offset, d); - break; - - case 30: - CP2_STORE_DWORD_VIA(30, offset, d); - break; - - case 31: - CP2_STORE_DWORD_VIA(31, offset, d); - break; - - default: - /* XXXRW: Arguably should panic. */ - break; - } -} - void cheri_exec_setregs(struct thread *td) { ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#7 (text+ko) ==== @@ -32,7 +32,9 @@ #define _MIPS_INCLUDE_CHERI_H_ #ifdef _KERNEL -#include /* CTASSERT */ +#include /* CTASSERT() */ +#else +#include /* assert() */ #endif #include @@ -40,19 +42,23 @@ /* * Canonical C-language representation of a capability. */ -#define CAPABILITY_SIZE 32 +#define CHERICAP_SIZE 32 struct chericap { uint32_t c_reserved; - uint32_t c_uperms; - union { - uint64_t c_otype; - uint64_t c_eaddr; - } u; +#if BYTE_ORDER == BIG_ENDIAN + /* XXXRW: This definitely needs some testing. */ + uint32_t c_unsealed:1; + uint32_t c_perms:15; + uint32_t _c_padding0:16; +#else +#error "BYTE_ORDER != BIG_ENDIAN not yet supported" +#endif + uint64_t c_otype; uint64_t c_base; uint64_t c_length; -} __packed __aligned(CAPABILITY_SIZE); +} __packed __aligned(CHERICAP_SIZE); #ifdef _KERNEL -CTASSERT(sizeof(struct chericap) == CAPABILITY_SIZE); +CTASSERT(sizeof(struct chericap) == CHERICAP_SIZE); #endif /* @@ -94,228 +100,192 @@ */ struct chericap cf_pcc; }; -CTASSERT(sizeof(struct cp2_frame) == (27 * CAPABILITY_SIZE)); +CTASSERT(sizeof(struct cp2_frame) == (27 * CHERICAP_SIZE)); #endif /* - * CP2 capability register manipulation macros. + * CHERI capability register manipulation macros. */ -#define CP2_CR_GET_BASE(crn, v) do { \ - __asm__ __volatile__ ( \ - "cgetbase %0, $c%1; " : \ - "=r" (v) : "i" (crn)); \ +#define CHERI_CGETBASE(v, cb) do { \ + __asm__ __volatile__ ("cgetbase %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ +} while (0) + +#define CHERI_CGETLEN(v, cb) do { \ + __asm__ __volatile__ ("cgetlen %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ +} while (0) + +#define CHERI_CGETTAG(v, cb) do { \ + __asm__ __volatile__ ("cgettag %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ } while (0) -#define CP2_CR_GET_UPERMS(crn, v) do { \ - __asm__ __volatile__ ( \ - "cgetperm %0, $c%1; " : \ - "=r" (v) : "i" (crn)); \ +#define CHERI_CGETUNSEALED(v, cb) do { \ + __asm__ __volatile__ ("cgetunsealed %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ } while (0) -#define CP2_CR_GET_OTYPE(crn, v) do { \ - __asm__ __volatile__ ( \ - "cgettype %0, $c%1; " : \ - "=r" (v) : "i" (crn)); \ +#define CHERI_CGETPERM(v, cb) do { \ + __asm__ __volatile__ ("cgetperm %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ } while (0) -#define CP2_CR_GET_EADDR(crn, v) CP2_CR_GET_OTYPE(crn, v) +#define CHERI_CGETTYPE(v, cb) do { \ + __asm__ __volatile__ ("cgettype %0, $c%1" : "=r" (v) : \ + "i" (cb)); \ +} while (0) -#define CP2_CR_GET_LENGTH(crn, v) do { \ - __asm__ __volatile__ ( \ - "cgetleng %0, $c%1; " : \ - "=r" (v) : "i" (crn)); \ +#define CHERI_CGETCAUSE(v) do { \ + __asm__ __volatile__ ("cgetcause %0" : "=r" (v)); \ } while (0) -#define CP2_CR_STORE(crn_from, crn_base, offset) do { \ - __asm__ __volatile__ ( \ - "cscr $c%0, %1($c%2); " : \ - : "i" (crn_from), "r" (offset), "i" (crn_base)); \ +/* + * Routines that modify or replace values in capability registers that don't + * affect memory access via the register. These do not require memory + * clobbers. + */ +#define CHERI_CSETTYPE(cd, cb, v) do { \ + __asm__ __volatile__ ("csettype $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v)); \ } while (0) /* - * Routines that modify or replace the values in capability registers. When - * they act on CR0, we need to use a memory clobber so that cached values in - * registers can be written back first, and cached values re-loaded after the - * switch, since effectively we may be changing address space. We do this - * even for permissions modifications and length changes to ensure that a - * writeback disallowed by the update will proceed first. + * Capability store; while this doesn't muck with c0, it does require a memory + * clobber. * - * XXXRW: We don't really need to do this for CP2_CR_SET_OTYPE()? - * - * XXXRW: C macros are named after capability field names -- hence OTYPE - * rather than TYPE. Possibly this is a bug. + * XXXRW: The assembler does not yet support base+offset, just base, so assert + * that offset (for now) is not permitted. + */ +#ifdef _KERNEL +#define CHERI_CSC(cs, cb, regbase, offset) do { \ + KASSERT((offset) == 0, \ + ("CHERI_CSC: non-zero offset not supported")); \ + __asm__ __volatile__ ("csc $c%0, %1($c%2)" : : \ + "i" (cs), "r" (regbase), "i" (cb) : "memory"); \ +} while (0) +#else +#define CHERI_CSC(cs, cb, regbase, offset) do { \ + assert((offset) == 0); \ + __asm__ __volatile__ ("csc $c%0, %1($c%2)" : : \ + "i" (cs), "r" (regbase), "i" (cb) : "memory"); \ +} while (0) +#endif + +/* + * Routines that modify or replace values in capability registers, and that if + * if used on C0, require the compiler to write registers back to memory, and + * reload afterwards, since we may effectively be changing the compiler- + * visible address space. This is also necessary for permissions changes as + * well, to ensure that write-back occurs before a possible loss of store + * permission. */ -#define CP2_CR_MOVE(crn_to, crn_from) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ("cmove $c%0, $c%1" : \ - : "i" (crn_to), "i" (crn_from) : "memory"); \ +#define CHERI_CGETPCC(v, cd) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("cgetpcc %0, %c%1" : "=r" (v) : \ + "i" (cd) : "memory"); \ + else \ + __asm__ __volatile__ ("cgetpcc %0, %c%1" : "=r" (v) : \ + "i" (cd)); \ +} while (0) + +#define CHERI_CINCBASE(cd, cb, v) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("cincbase $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v) : "memory"); \ else \ - __asm__ __volatile__ ("cmove $c%0, $c%1" : \ - : "i" (crn_to), "i" (crn_from)); \ + __asm__ __volatile__ ("cincbase $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v)); \ } while (0) -#define CP2_CR_INC_BASE(crn_to, crn_from, v) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ( \ - "cincbase $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v) : \ - "memory"); \ +#define CHERI_CMOVE(cd, cb) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("cmove $c%0, $c%1" : : \ + "i" (cd), "i" (cb) : "memory"); \ else \ - __asm__ __volatile__ ( \ - "cincbase $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v)); \ + __asm__ __volatile__ ("cmove $c%0, $c%1" : : \ + "i" (cd), "i" (cb)); \ } while (0) -#define CP2_CR_AND_UPERMS(crn_to, crn_from, v) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ( \ - "candperm $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v) : \ - "memory"); \ +#define CHERI_CSETLEN(cd, cb, v) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("csetlen $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v) : "memory"); \ else \ - __asm__ __volatile__ ( \ - "candperm $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v)); \ + __asm__ __volatile__ ("csetlen $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v)); \ } while (0) -#define CP2_CR_SET_OTYPE(crn_to, crn_from, v) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ( \ - "csettype $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v) : \ +#define CHERI_CCLEARTAG(cd) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("ccleartag $c%0" : : "i" (cd) : \ "memory"); \ else \ - __asm__ __volatile__ ( \ - "csettype $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v)); \ + __asm__ __volatile__ ("ccleartag $c%0" : : "i" (cd)); \ } while (0) -#define CP2_CR_SET_LENGTH(crn_to, crn_from, v) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ( \ - "csetlen $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v) : \ - "memory"); \ +#define CHERI_CANDPERM(cd, cb, v) do { \ + if ((cd) == 0) \ + __asm__ __volatile__ ("candperm $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v) : "memory"); \ else \ - __asm__ __volatile__ ( \ - "csetlen $c%0, $c%1, %2; " : \ - : "i" (crn_to), "i" (crn_from), "r" (v)); \ + __asm__ __volatile__ ("candperm $c%0, $c%1, %2" : : \ + "i" (cd), "i" (cb), "r" (v)); \ } while (0) -#define CP2_CR_LOAD(crn_to, crn_base, offset) do { \ - if ((crn_to) == 0) \ - __asm__ __volatile__ ( \ - "clcr $c%0, %1($c%2); " : \ - : "i" (crn_to), "r" (offset), "i" (crn_base) : \ - "memory"); \ +/* + * XXXRW: The assembler does not yet support base+offset, just base, so assert + * that offset (for now) is not permitted. + */ +#ifdef _KERNEL +#define CHERI_CLC(cd, cb, regbase, offset) do { \ + KASSERT((offset) == 0, \ + ("CHERI_CLC: non-zero offset not supported")); \ + if ((cd) == 0) \ + __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ + "i" (cd), "r" (regbase), "i" (cb) : "memory"); \ + else \ + __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ + "i" (cd), "r" (regbase), "i" (cb)); \ +} while (0) +#else +#define CHERI_CLC(cd, cb, regbase, offset) do { \ + assert((offset) == 0); \ + if ((cd) == 0) \ + __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ + "i" (cd), "r" (regbase), "i" (cb) : "memory"); \ else \ - __asm__ __volatile__ ( \ - "clcr $c%0, %1($c%2); " : \ - : "i" (crn_to), "r" (offset), "i" (crn_base)); \ + __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ + "i" (cd), "r" (regbase), "i" (cb)); \ } while (0) +#endif static inline void cp2_capability_load(u_int crn_to, struct chericap *cp) { - CP2_CR_LOAD(crn_to, CHERI_CR_KDC, cp); + CHERI_CLC(crn_to, CHERI_CR_KDC, cp, 0); } static inline void cp2_capability_store(u_int crn_from, struct chericap *cp) { - CP2_CR_STORE(crn_from, CHERI_CR_KDC, cp); + CHERI_CSC(crn_from, CHERI_CR_KDC, cp, 0); } /* * Extract a flattened but useful memory representation of a complete * capability register. - * - * XXXRW: We appear not to have an instruction to extract the unsealed bit. - * It would be nice if this were returned by cp2_cr_get_uperms() as part of - * the permission mask. What are the implications of this for seal - * operations? */ -#define CP2_CR_GET(crn, c) do { \ - CP2_CR_GET_UPERMS((crn), (c).c_uperms); \ - CP2_CR_GET_OTYPE((crn), (c).u.c_otype); \ - CP2_CR_GET_BASE((crn), (c).c_base); \ - CP2_CR_GET_LENGTH((crn), (c).c_length); \ -} while (0) - -#define CP2_CR_SET(crn_to, crn_from, c) do { \ - /* XXXRW: How about the unsealed bit? */ \ - CP2_CR_SET_OTYPE((crn_to), (crn_from), (c).u.c_otype); \ - CP2_CR_INC_BASE((crn_to), (crn_from), (c).c_base); \ - CP2_CR_SET_LENGTH((crn_to), (crn_from), (c).c_length); \ - CP2_CR_AND_UPERMS((crn_to), (crn_from), (c).c_uperms); \ -} while (0) - -/* - * Routines for general-purpose memory loads and stores via capabilities. - * - * XXXRW: We apply memory clobbers rather stringently -- less firm use might - * be required (or possible). One side effect of allowing the compiler - * access to multiple capability-named address spaces is that it is not able - * to reason about overlap... - */ -#define CP2_LOAD_BYTE_VIA(crn, offset, b) do { \ - __asm__ __volatile__ ( \ - "clbr %0, %1($c%2); " : \ - "=r" (b) : "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_LOAD_HWORD_VIA(crn, offset, h) do { \ - __asm__ __volatile__ ( \ - "clhr %0, %1($c%2); " : \ - "=r" (b) : "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_LOAD_WORD_VIA(crn, offset, w) do { \ - __asm__ __volatile__ ( \ - "clwr %0, %1($c%2); " : \ - "=r" (w) : "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_LOAD_DWORD_VIA(crn, offset, d) do { \ - __asm__ __volatile__ ( \ - "cldr %0, %1($c%2); " : \ - "=r" (d) : "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_STORE_BYTE_VIA(crn, offset, b) do { \ - __asm__ __volatile__ ( \ - "csbr %0, %1($c%2); " : \ - : "r" (b), "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_STORE_HWORD_VIA(crn, offset, h) do { \ - __asm__ __volatile__ ( \ - "cshr %0, %1($c%2); " : \ - : "r" (h), "r" (offset), "i" (crn) : "memory"); \ +#define CHERI_GETCAPREG(crn, c) do { \ + CHERI_CGETPERM((c).c_perms, (crn)); \ + CHERI_CGETUNSEALED((c).c_unsealed, (crn)); \ + CHERI_CGETTYPE((c).c_otype, (crn)); \ + CHERI_CGETBASE((c).c_base, (crn)); \ + CHERI_CGETLEN((c).c_length, (crn)); \ } while (0) -#define CP2_STORE_WORD_VIA(crn, offset, w) do { \ - __asm__ __volatile__ ( \ - "cswr %0, %1($c%2); " : \ - : "r" (w), "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -#define CP2_STORE_DWORD_VIA(crn, offset, d) do { \ - __asm__ __volatile__ ( \ - "csdr %0, %1($c%2); " : \ - : "r" (d), "r" (offset), "i" (crn) : "memory"); \ -} while (0) - -/* - * Functions wrapping the above macros in order to allow run-time, rather - * than compile-time, determination of which capability register to use. The - * need for this construction should go away with improved compiler support. - */ -void cp2_store_hword_via(u_int crn, uint64_t offset, uint16_t h); -void cp2_store_dword_via(u_int crn, uint64_t offset, uint64_t d); - /* * APIs that act on C language representations of capabilities -- but not * capabilities themselves. From owner-p4-projects@FreeBSD.ORG Mon Oct 22 08:53:26 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 35578154; Mon, 22 Oct 2012 08:53:26 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id E544B113 for ; Mon, 22 Oct 2012 08:53:25 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id A90F08FC0C for ; Mon, 22 Oct 2012 08:53:25 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9M8rP1W088857 for ; Mon, 22 Oct 2012 08:53:25 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9M8rPcR088853 for perforce@freebsd.org; Mon, 22 Oct 2012 08:53:25 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 08:53:25 GMT Message-Id: <201210220853.q9M8rPcR088853@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218893 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 08:53:26 -0000 http://p4web.freebsd.org/@@218893?ac=10 Change 218893 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 08:52:46 Update CheriBSD's userspace CHERI exercising tool for ISAv2 changes. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/bin/cheritest/cheritest.c#3 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/bin/cheritest/cheritest.c#3 (text+ko) ==== @@ -39,12 +39,12 @@ #include #include -#define CP2_REG_PRINT(crn) do { \ - struct capability c; \ +#define CHERI_CAPREG_PRINT(crn) do { \ + struct chericap c; \ \ - CP2_CR_GET((crn), c); \ - printf("C%u perms %04jx otype %016jx\n", crn, \ - (uintmax_t)c.c_uperms, (uintmax_t)c.u.c_otype); \ + CHERI_GETCAPREG((crn), c); \ + printf("C%u perms %04jx type %016jx\n", crn, \ + (uintmax_t)c.c_perms, (uintmax_t)c.c_otype); \ printf("\tbase %016jx length %016jx\n", (uintmax_t)c.c_base, \ (uintmax_t)c.c_length); \ } while (0) @@ -63,13 +63,13 @@ cheritest_copyregs(void) { - CP2_CR_MOVE(1, 0); - CP2_CR_MOVE(2, 0); - CP2_CR_MOVE(3, 0); - CP2_CR_MOVE(4, 0); - CP2_CR_MOVE(5, 0); - CP2_CR_MOVE(6, 0); - CP2_CR_MOVE(7, 0); + CHERI_CMOVE(1, 0); + CHERI_CMOVE(2, 0); + CHERI_CMOVE(3, 0); + CHERI_CMOVE(4, 0); + CHERI_CMOVE(5, 0); + CHERI_CMOVE(6, 0); + CHERI_CMOVE(7, 0); } static void @@ -81,38 +81,38 @@ * -- register numbers must be available at compile-time. */ printf("CP2 registers:\n"); - CP2_REG_PRINT(0); - CP2_REG_PRINT(1); - CP2_REG_PRINT(2); - CP2_REG_PRINT(3); - CP2_REG_PRINT(4); - CP2_REG_PRINT(5); - CP2_REG_PRINT(6); - CP2_REG_PRINT(7); - CP2_REG_PRINT(8); - CP2_REG_PRINT(9); - CP2_REG_PRINT(10); - CP2_REG_PRINT(11); - CP2_REG_PRINT(12); - CP2_REG_PRINT(13); - CP2_REG_PRINT(14); - CP2_REG_PRINT(15); - CP2_REG_PRINT(16); - CP2_REG_PRINT(17); - CP2_REG_PRINT(18); - CP2_REG_PRINT(19); - CP2_REG_PRINT(20); - CP2_REG_PRINT(21); - CP2_REG_PRINT(22); - CP2_REG_PRINT(23); - CP2_REG_PRINT(24); - CP2_REG_PRINT(25); - CP2_REG_PRINT(26); - CP2_REG_PRINT(27); - CP2_REG_PRINT(28); - CP2_REG_PRINT(29); - CP2_REG_PRINT(30); - CP2_REG_PRINT(31); + CHERI_CAPREG_PRINT(0); + CHERI_CAPREG_PRINT(1); + CHERI_CAPREG_PRINT(2); + CHERI_CAPREG_PRINT(3); + CHERI_CAPREG_PRINT(4); + CHERI_CAPREG_PRINT(5); + CHERI_CAPREG_PRINT(6); + CHERI_CAPREG_PRINT(7); + CHERI_CAPREG_PRINT(8); + CHERI_CAPREG_PRINT(9); + CHERI_CAPREG_PRINT(10); + CHERI_CAPREG_PRINT(11); + CHERI_CAPREG_PRINT(12); + CHERI_CAPREG_PRINT(13); + CHERI_CAPREG_PRINT(14); + CHERI_CAPREG_PRINT(15); + CHERI_CAPREG_PRINT(16); + CHERI_CAPREG_PRINT(17); + CHERI_CAPREG_PRINT(18); + CHERI_CAPREG_PRINT(19); + CHERI_CAPREG_PRINT(20); + CHERI_CAPREG_PRINT(21); + CHERI_CAPREG_PRINT(22); + CHERI_CAPREG_PRINT(23); + CHERI_CAPREG_PRINT(24); + CHERI_CAPREG_PRINT(25); + CHERI_CAPREG_PRINT(26); + CHERI_CAPREG_PRINT(27); + CHERI_CAPREG_PRINT(28); + CHERI_CAPREG_PRINT(29); + CHERI_CAPREG_PRINT(30); + CHERI_CAPREG_PRINT(31); } int From owner-p4-projects@FreeBSD.ORG Mon Oct 22 18:40:12 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 825E2AD4; Mon, 22 Oct 2012 18:40:12 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 3F22FAD2 for ; Mon, 22 Oct 2012 18:40:12 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 23B218FC08 for ; Mon, 22 Oct 2012 18:40:12 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9MIeBxK022411 for ; Mon, 22 Oct 2012 18:40:11 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9MIeB8J022408 for perforce@freebsd.org; Mon, 22 Oct 2012 18:40:11 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 18:40:11 GMT Message-Id: <201210221840.q9MIeB8J022408@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218919 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 18:40:12 -0000 http://p4web.freebsd.org/@@218919?ac=10 Change 218919 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 18:39:25 Update cheriasm.h for upstream changes to CP0 status register constants (good changes even). Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#7 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#7 (text+ko) ==== @@ -46,7 +46,7 @@ */ #define CHERI_EXCEPTION_ENTER(reg) \ mfc0 reg, MIPS_COP_0_STATUS; \ - andi reg, reg, SR_KSU_USER; \ + andi reg, reg, MIPS_SR_KSU_USER; \ beq reg, $0, 64f; \ nop; \ cmove $c27, $c0; \ @@ -68,7 +68,7 @@ */ #define CHERI_EXCEPTION_RETURN(reg) \ mfc0 reg, MIPS_COP_0_STATUS; \ - andi reg, reg, SR_KSU_USER; \ + andi reg, reg, MIPS_SR_KSU_USER; \ beq reg, $0, 65f; \ nop; \ b 66f; \ From owner-p4-projects@FreeBSD.ORG Mon Oct 22 18:42:22 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 00B6DD03; Mon, 22 Oct 2012 18:42:22 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id B3C6ED01 for ; Mon, 22 Oct 2012 18:42:21 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 96EB58FC08 for ; Mon, 22 Oct 2012 18:42:21 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9MIgLdd022811 for ; Mon, 22 Oct 2012 18:42:21 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9MIgLXN022808 for perforce@freebsd.org; Mon, 22 Oct 2012 18:42:21 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 18:42:21 GMT Message-Id: <201210221842.q9MIgLXN022808@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218920 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 18:42:22 -0000 http://p4web.freebsd.org/@@218920?ac=10 Change 218920 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 18:41:28 Update CheriBSD C code for CHERI ISAv2 updates -- no more hardware-defined TSC (for now), and the need to represent null capabilities explicitly is removed (we'll just use a capability register without the tag set). We end up disabling interrupts while constructing temporary capability values in exception reserved registers to prevent preemption, but will want instead to save and restore capabilities for preempted contexts so that the kernel can make use of capability registers more freely in the future. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#15 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#6 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#15 (text+ko) ==== @@ -67,16 +67,37 @@ */ void -cp2_capability_set(struct chericap *cp, uint32_t uperms, +cp2_capability_set(struct chericap *cp, uint32_t perms, void *otypep /* eaddr */, void *basep, uint64_t length) { + register_t s; - CP2_CR_MOVE(CHERI_CR_CT0, CHERI_CR_KDC); - CP2_CR_SET_OTYPE(CHERI_CR_CT0, CHERI_CR_CT0, (uint64_t)otypep); - CP2_CR_INC_BASE(CHERI_CR_CT0, CHERI_CR_CT0, (uint64_t)basep); - CP2_CR_SET_LENGTH(CHERI_CR_CT0, CHERI_CR_CT0, length); - CP2_CR_AND_UPERMS(CHERI_CR_CT0, CHERI_CR_CT0, uperms); - CP2_CR_STORE(CHERI_CR_CT0, CHERI_CR_KDC, (uint64_t)cp); + /* + * XXXRW: For now, we're using an exception handling temporary + * register to construct capabilities to store. Disable interrupts so + * that this is safe. In the future, we'd like to use a general + * temporary preserved during kernel execution to avoid this. + */ + s = intr_disable(); + CHERI_CSETTYPE(CHERI_CR_KR1C, CHERI_CR_KDC, (register_t)otypep); + CHERI_CINCBASE(CHERI_CR_KR1C, CHERI_CR_KR1C, (register_t)basep); + CHERI_CSETLEN(CHERI_CR_KR1C, CHERI_CR_KR1C, (register_t)length); + CHERI_CANDPERM(CHERI_CR_KR1C, CHERI_CR_KR1C, (register_t)perms); + CHERI_CSC(CHERI_CR_KR1C, CHERI_CR_KDC, (register_t)cp, 0); + intr_restore(s); +} + +static void +cp2_capability_clear(struct chericap *cp) +{ + + /* + * While we could construct a non-capability and write it out, simply + * bzero'ing memory is sufficient to clear the tag bit, and easier to + * spell. + */ + bzero(cp, sizeof(*cp)); + } /* @@ -89,7 +110,7 @@ cp2_capability_set_priv(struct chericap *cp) { - cp2_capability_set(cp, CHERI_CAP_PRIV_UPERMS, CHERI_CAP_PRIV_OTYPE, + cp2_capability_set(cp, CHERI_CAP_PRIV_PERMS, CHERI_CAP_PRIV_OTYPE, CHERI_CAP_PRIV_BASE, CHERI_CAP_PRIV_LENGTH); } @@ -97,7 +118,7 @@ cp2_capability_set_user(struct chericap *cp) { - cp2_capability_set(cp, CHERI_CAP_USER_UPERMS, CHERI_CAP_USER_OTYPE, + cp2_capability_set(cp, CHERI_CAP_USER_PERMS, CHERI_CAP_USER_OTYPE, CHERI_CAP_USER_BASE, CHERI_CAP_USER_LENGTH); } @@ -105,9 +126,7 @@ cp2_capability_set_null(struct chericap *cp) { - cp2_capability_set(cp, CHERI_CAP_NOPRIV_UPERMS, - CHERI_CAP_NOPRIV_OTYPE, CHERI_CAP_NOPRIV_BASE, - CHERI_CAP_NOPRIV_LENGTH); + cp2_capability_clear(cp); } /* @@ -123,9 +142,18 @@ void cp2_capability_copy(struct chericap *cp_to, struct chericap *cp_from) { + register_t s; - cp2_capability_load(CHERI_CR_CT0, cp_from); - cp2_capability_store(CHERI_CR_CT0, cp_to); + /* + * XXXRW: For now, we're using an exception handling temporary + * register to construct capabilities to store. Disable interrupts so + * that this is safe. In the future, we'd like to use a general + * temporary preserved during kernel execution to avoid this. + */ + s = intr_disable(); + cp2_capability_load(CHERI_CR_KR1C, cp_from); + cp2_capability_store(CHERI_CR_KR1C, cp_to); + intr_restore(s); } void @@ -157,7 +185,11 @@ cp2_capability_copy(&cf_destp->cf_c22, &cf_srcp->cf_c22); cp2_capability_copy(&cf_destp->cf_c23, &cf_srcp->cf_c23); cp2_capability_copy(&cf_destp->cf_c24, &cf_srcp->cf_c24); - cp2_capability_copy(&cf_destp->cf_tsc, &cf_srcp->cf_tsc); + cp2_capability_copy(&cf_destp->cf_c26, &cf_srcp->cf_c26); + /* + * XXXRW: not in CHERI ISAv2: + * cp2_capability_copy(&cf_destp->cf_tsc, &cf_srcp->cf_tsc); + */ cp2_capability_copy(&cf_destp->cf_pcc, &cf_srcp->cf_pcc); } @@ -198,7 +230,11 @@ cp2_capability_set_null(&cfp->cf_c22); cp2_capability_set_null(&cfp->cf_c23); cp2_capability_set_null(&cfp->cf_c24); - cp2_capability_set_null(&cfp->cf_tsc); + cp2_capability_set_null(&cfp->cf_c26); + /* + * XXXRW: not in CHERI ISAv2: + * cp2_capability_set_null(&cfp->cf_tsc); + */ cp2_capability_set_user(&cfp->cf_pcc); } @@ -206,9 +242,9 @@ #define DB_CP2_REG_PRINT_NUM(crn, num) do { \ struct chericap c; \ \ - CP2_CR_GET((crn), c); \ - db_printf("C%u perms %04jx otype %016jx\n", num, \ - (uintmax_t)c.c_uperms, (uintmax_t)c.u.c_otype); \ + CHERI_GETCAPREG((crn), c); \ + db_printf("C%u u: %u perms %04jx otype %016jx\n", num, \ + c.c_unsealed, (uintmax_t)c.c_perms, (uintmax_t)c.c_otype); \ db_printf("\tbase %016jx length %016jx\n", (uintmax_t)c.c_base, \ (uintmax_t)c.c_length); \ } while (0) @@ -263,6 +299,7 @@ { struct thread *td; struct cp2_frame *cfp; + register_t s; u_int i; if (have_addr) @@ -276,16 +313,22 @@ /* Laboriously load and print each capability. */ for (i = 0; i < 25; i++) { - cp2_capability_load(CHERI_CR_CT0, - (struct chericap *)&cfp->cf_c0 + i); - DB_CP2_REG_PRINT_NUM(CHERI_CR_CT0, i); + s = intr_disable(); + cp2_capability_load(CHERI_CR_KR1C, + (struct chericap *)&cfp->cf_c0 + i); + DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, i); + intr_restore(s); } - db_printf("\nTSC and PCC:\n"); - cp2_capability_load(CHERI_CR_CT0, (struct chericap *)&cfp->cf_c0 + + db_printf("\nPCC:\n"); + s = intr_disable(); +#if 0 + cp2_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + CHERI_CR_TSC_OFF); - DB_CP2_REG_PRINT_NUM(CHERI_CR_CT0, CHERI_CR_TSC); - cp2_capability_load(CHERI_CR_CT0, (struct chericap *)&cfp->cf_c0 + + DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_TSC); +#endif + cp2_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + CHERI_CR_PCC_OFF); - DB_CP2_REG_PRINT_NUM(CHERI_CR_CT0, CHERI_CR_EPCC); + DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_EPCC); + intr_restore(s); } #endif ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#6 (text+ko) ==== @@ -39,7 +39,7 @@ * but perhaps it should be. */ #define CHERI_PERM_NON_EPHEMERAL 0x0001 -#define CHEIR_PERM_EXECUTE 0x0002 +#define CHERI_PERM_EXECUTE 0x0002 #define CHERI_PERM_LOAD 0x0004 #define CHERI_PERM_STORE 0x0008 #define CHERI_PERM_LOAD_CAP 0x0010 @@ -73,7 +73,7 @@ * Definition for kernel "privileged" capability able to name the entire * address space. */ -#define CHERI_CAP_PRIV_UPERMS CHERI_PERM_PRIV +#define CHERI_CAP_PRIV_PERMS CHERI_PERM_PRIV #define CHERI_CAP_PRIV_OTYPE 0x0 #define CHERI_CAP_PRIV_BASE 0x0 #define CHERI_CAP_PRIV_LENGTH 0xffffffffffffffff @@ -82,7 +82,7 @@ * Definition for userspace "unprivileged" capability able to name the user * portion of the address space. */ -#define CHERI_CAP_USER_UPERMS CHERI_PERM_USER +#define CHERI_CAP_USER_PERMS CHERI_PERM_USER #define CHERI_CAP_USER_OTYPE 0x0 #define CHERI_CAP_USER_BASE MIPS_XUSEG_START #define CHERI_CAP_USER_LENGTH (MIPS_XUSEG_END - MIPS_XUSEG_START) @@ -94,7 +94,7 @@ * XXXRW: Probably no longer required in CHERI ISAv2 as we can clear * registers. */ -#define CHERI_CAP_NOPRIV_UPERMS 0x0 +#define CHERI_CAP_NOPRIV_PERMS 0x0 #define CHERI_CAP_NOPRIV_OTYPE 0x0 #define CHERI_CAP_NOPRIV_BASE 0x0 #define CHERI_CAP_NOPRIV_LENGTH 0x0 From owner-p4-projects@FreeBSD.ORG Mon Oct 22 19:55:57 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 452DC70F; Mon, 22 Oct 2012 19:55:57 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 0463A70D for ; Mon, 22 Oct 2012 19:55:57 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id DE3B38FC0C for ; Mon, 22 Oct 2012 19:55:56 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9MJtu3f028990 for ; Mon, 22 Oct 2012 19:55:56 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9MJtu6N028987 for perforce@freebsd.org; Mon, 22 Oct 2012 19:55:56 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 19:55:56 GMT Message-Id: <201210221955.q9MJtu6N028987@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218923 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 19:55:57 -0000 http://p4web.freebsd.org/@@218923?ac=10 Change 218923 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 19:55:24 Merge an additional change from Mike Roe's GNU assembler support for CHERI ISAv2: commit 7075cdbc30f8a12947b9699a8aa05df70c037496 Author: Michael Roe Date: Mon Oct 22 18:16:58 2012 +0100 Added assembler support for immediate offsets with the clc and csc instructions. Immediate offsets are still not supported with clb (etc.) Affected files ... .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#9 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#9 (text+ko) ==== @@ -202,11 +202,12 @@ {"cmove", "+w,+b", 0x48800002, 0xffe007ff, 0, 0, I1}, {"csetlen", "+w,+b,m", 0x48800003, 0xffe0003f, 0, 0, I1}, {"ccleartag", "+w", 0x48800005, 0xffe0ffff, 0, 0, I1}, -{"csc", "+x,d(+w)", 0xf8000000, 0xfc0007ff, 0, 0, I1}, -{"clc", "+x,d(+w)", 0xd8000000, 0xfc0007ff, 0, 0, I1}, - -{"cscr", "+w,m(+b)", 0x49200000, 0xffe0003f, 0, 0, I1 }, -{"clcr", "+w,m(+b)", 0x49400000, 0xffe0003f, 0, 0, I1 }, +{"csc", "+x,d,+o(+w)", 0xf8000000, 0xfc000000, 0, 0, I1}, +{"clc", "+x,d,+o(+w)", 0xd8000000, 0xfc000000, 0, 0, I1}, +{"cscr", "+x,d(+w)", 0xf8000000, 0xfc0007ff, 0, 0, I1}, +{"clcr", "+x,d(+w)", 0xd8000000, 0xfc0007ff, 0, 0, I1}, +{"csci", "+x,+o(+w)", 0xf8000000, 0xfc00f800, 0, 0, I1}, +{"clci", "+x,+o(+w)", 0xd8000000, 0xfc00f800, 0, 0, I1}, /* mask should be 0xfc000007. Because I don't have letters for the * other register and offset argument, temporarily mask them. * Hence mask of 0xfc0007ff. From owner-p4-projects@FreeBSD.ORG Mon Oct 22 21:23:13 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id D9E9F593; Mon, 22 Oct 2012 21:23:12 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 80F52591 for ; Mon, 22 Oct 2012 21:23:12 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 5F03D8FC08 for ; Mon, 22 Oct 2012 21:23:12 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9MLNCgX038997 for ; Mon, 22 Oct 2012 21:23:12 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9MLNCLd038994 for perforce@freebsd.org; Mon, 22 Oct 2012 21:23:12 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Mon, 22 Oct 2012 21:23:12 GMT Message-Id: <201210222123.q9MLNCLd038994@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218927 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Oct 2012 21:23:13 -0000 http://p4web.freebsd.org/@@218927?ac=10 Change 218927 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/22 21:22:46 Now that immediate-indexed notation is supported for CHERI CLC and CSC, use it. It's not quite the syntax documented in the manual, but it still allows us to lose assertions that immediate offsets are 0, which will improve context switch code significantly. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#8 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#8 (text+ko) ==== @@ -153,24 +153,12 @@ /* * Capability store; while this doesn't muck with c0, it does require a memory * clobber. - * - * XXXRW: The assembler does not yet support base+offset, just base, so assert - * that offset (for now) is not permitted. */ -#ifdef _KERNEL #define CHERI_CSC(cs, cb, regbase, offset) do { \ - KASSERT((offset) == 0, \ - ("CHERI_CSC: non-zero offset not supported")); \ - __asm__ __volatile__ ("csc $c%0, %1($c%2)" : : \ - "i" (cs), "r" (regbase), "i" (cb) : "memory"); \ + __asm__ __volatile__ ("csc $c%0, %1, %2($c%3)" : : \ + "i" (cs), "r" (regbase), "i" (offset), "i" (cb) : \ + "memory"); \ } while (0) -#else -#define CHERI_CSC(cs, cb, regbase, offset) do { \ - assert((offset) == 0); \ - __asm__ __volatile__ ("csc $c%0, %1($c%2)" : : \ - "i" (cs), "r" (regbase), "i" (cb) : "memory"); \ -} while (0) -#endif /* * Routines that modify or replace values in capability registers, and that if @@ -233,32 +221,15 @@ "i" (cd), "i" (cb), "r" (v)); \ } while (0) -/* - * XXXRW: The assembler does not yet support base+offset, just base, so assert - * that offset (for now) is not permitted. - */ -#ifdef _KERNEL #define CHERI_CLC(cd, cb, regbase, offset) do { \ - KASSERT((offset) == 0, \ - ("CHERI_CLC: non-zero offset not supported")); \ if ((cd) == 0) \ - __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ - "i" (cd), "r" (regbase), "i" (cb) : "memory"); \ + __asm__ __volatile__ ("clc $c%0, %1, %2($c%3)" : : \ + "i" (cd), "r" (regbase), "i" (offset), "i" (cb) : \ + "memory"); \ else \ - __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ - "i" (cd), "r" (regbase), "i" (cb)); \ + __asm__ __volatile__ ("clc $c%0, %1, %2($c%3)" : : \ + "i" (cd), "r" (regbase), "i" (offset), "i" (cb)); \ } while (0) -#else -#define CHERI_CLC(cd, cb, regbase, offset) do { \ - assert((offset) == 0); \ - if ((cd) == 0) \ - __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ - "i" (cd), "r" (regbase), "i" (cb) : "memory"); \ - else \ - __asm__ __volatile__ ("clc $c%0, %1($c%2)" : : \ - "i" (cd), "r" (regbase), "i" (cb)); \ -} while (0) -#endif static inline void cp2_capability_load(u_int crn_to, struct chericap *cp) From owner-p4-projects@FreeBSD.ORG Tue Oct 23 07:12:06 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id A56BDB2C; Tue, 23 Oct 2012 07:12:06 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 560D1B2A for ; Tue, 23 Oct 2012 07:12:06 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 3A47D8FC0C for ; Tue, 23 Oct 2012 07:12:06 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9N7C5T4069103 for ; Tue, 23 Oct 2012 07:12:06 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9N7C55T069100 for perforce@freebsd.org; Tue, 23 Oct 2012 07:12:05 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Tue, 23 Oct 2012 07:12:05 GMT Message-Id: <201210230712.q9N7C55T069100@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218947 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Oct 2012 07:12:06 -0000 http://p4web.freebsd.org/@@218947?ac=10 Change 218947 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/23 07:11:10 Prefer the name "CHERI" to "CP2" throughout the CHERI code, as it makes it easier to search for, and more clear that it's CHERI-specific rather than a generic COP2 function in MIPS. Use CHERI ISAv2's immediate arguments to clc and csc to avoid treading on a MIPS temporary register during exception handling, embedding offsets into the CHERI register frame structure directly, as is done for native MIPS registers. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#16 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#9 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#8 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#7 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/pcb.h#6 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/exception.S#10 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/genassym.c#4 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/swtch.S#9 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#16 (text+ko) ==== @@ -67,7 +67,7 @@ */ void -cp2_capability_set(struct chericap *cp, uint32_t perms, +cheri_capability_set(struct chericap *cp, uint32_t perms, void *otypep /* eaddr */, void *basep, uint64_t length) { register_t s; @@ -88,7 +88,7 @@ } static void -cp2_capability_clear(struct chericap *cp) +cheri_capability_clear(struct chericap *cp) { /* @@ -107,26 +107,26 @@ * contexts. */ void -cp2_capability_set_priv(struct chericap *cp) +cheri_capability_set_priv(struct chericap *cp) { - cp2_capability_set(cp, CHERI_CAP_PRIV_PERMS, CHERI_CAP_PRIV_OTYPE, + cheri_capability_set(cp, CHERI_CAP_PRIV_PERMS, CHERI_CAP_PRIV_OTYPE, CHERI_CAP_PRIV_BASE, CHERI_CAP_PRIV_LENGTH); } void -cp2_capability_set_user(struct chericap *cp) +cheri_capability_set_user(struct chericap *cp) { - cp2_capability_set(cp, CHERI_CAP_USER_PERMS, CHERI_CAP_USER_OTYPE, + cheri_capability_set(cp, CHERI_CAP_USER_PERMS, CHERI_CAP_USER_OTYPE, CHERI_CAP_USER_BASE, CHERI_CAP_USER_LENGTH); } void -cp2_capability_set_null(struct chericap *cp) +cheri_capability_set_null(struct chericap *cp) { - cp2_capability_clear(cp); + cheri_capability_clear(cp); } /* @@ -140,7 +140,7 @@ * XXXRW: Compiler should be providing us with the temporary register. */ void -cp2_capability_copy(struct chericap *cp_to, struct chericap *cp_from) +cheri_capability_copy(struct chericap *cp_to, struct chericap *cp_from) { register_t s; @@ -151,52 +151,52 @@ * temporary preserved during kernel execution to avoid this. */ s = intr_disable(); - cp2_capability_load(CHERI_CR_KR1C, cp_from); - cp2_capability_store(CHERI_CR_KR1C, cp_to); + cheri_capability_load(CHERI_CR_KR1C, cp_from); + cheri_capability_store(CHERI_CR_KR1C, cp_to); intr_restore(s); } void -cp2_context_copy(struct cp2_frame *cf_destp, struct cp2_frame *cf_srcp) +cheri_context_copy(struct cheri_frame *cf_destp, struct cheri_frame *cf_srcp) { - cp2_capability_copy(&cf_destp->cf_c0, &cf_srcp->cf_c0); - cp2_capability_copy(&cf_destp->cf_c1, &cf_srcp->cf_c1); - cp2_capability_copy(&cf_destp->cf_c2, &cf_srcp->cf_c2); - cp2_capability_copy(&cf_destp->cf_c3, &cf_srcp->cf_c3); - cp2_capability_copy(&cf_destp->cf_c4, &cf_srcp->cf_c4); - cp2_capability_copy(&cf_destp->cf_c5, &cf_srcp->cf_c5); - cp2_capability_copy(&cf_destp->cf_c6, &cf_srcp->cf_c6); - cp2_capability_copy(&cf_destp->cf_c7, &cf_srcp->cf_c7); - cp2_capability_copy(&cf_destp->cf_c8, &cf_srcp->cf_c8); - cp2_capability_copy(&cf_destp->cf_c9, &cf_srcp->cf_c9); - cp2_capability_copy(&cf_destp->cf_c10, &cf_srcp->cf_c10); - cp2_capability_copy(&cf_destp->cf_c11, &cf_srcp->cf_c11); - cp2_capability_copy(&cf_destp->cf_c12, &cf_srcp->cf_c12); - cp2_capability_copy(&cf_destp->cf_c13, &cf_srcp->cf_c13); - cp2_capability_copy(&cf_destp->cf_c14, &cf_srcp->cf_c14); - cp2_capability_copy(&cf_destp->cf_c15, &cf_srcp->cf_c15); - cp2_capability_copy(&cf_destp->cf_c16, &cf_srcp->cf_c16); - cp2_capability_copy(&cf_destp->cf_c17, &cf_srcp->cf_c17); - cp2_capability_copy(&cf_destp->cf_c18, &cf_srcp->cf_c18); - cp2_capability_copy(&cf_destp->cf_c19, &cf_srcp->cf_c19); - cp2_capability_copy(&cf_destp->cf_c20, &cf_srcp->cf_c20); - cp2_capability_copy(&cf_destp->cf_c21, &cf_srcp->cf_c21); - cp2_capability_copy(&cf_destp->cf_c22, &cf_srcp->cf_c22); - cp2_capability_copy(&cf_destp->cf_c23, &cf_srcp->cf_c23); - cp2_capability_copy(&cf_destp->cf_c24, &cf_srcp->cf_c24); - cp2_capability_copy(&cf_destp->cf_c26, &cf_srcp->cf_c26); + cheri_capability_copy(&cf_destp->cf_c0, &cf_srcp->cf_c0); + cheri_capability_copy(&cf_destp->cf_c1, &cf_srcp->cf_c1); + cheri_capability_copy(&cf_destp->cf_c2, &cf_srcp->cf_c2); + cheri_capability_copy(&cf_destp->cf_c3, &cf_srcp->cf_c3); + cheri_capability_copy(&cf_destp->cf_c4, &cf_srcp->cf_c4); + cheri_capability_copy(&cf_destp->cf_c5, &cf_srcp->cf_c5); + cheri_capability_copy(&cf_destp->cf_c6, &cf_srcp->cf_c6); + cheri_capability_copy(&cf_destp->cf_c7, &cf_srcp->cf_c7); + cheri_capability_copy(&cf_destp->cf_c8, &cf_srcp->cf_c8); + cheri_capability_copy(&cf_destp->cf_c9, &cf_srcp->cf_c9); + cheri_capability_copy(&cf_destp->cf_c10, &cf_srcp->cf_c10); + cheri_capability_copy(&cf_destp->cf_c11, &cf_srcp->cf_c11); + cheri_capability_copy(&cf_destp->cf_c12, &cf_srcp->cf_c12); + cheri_capability_copy(&cf_destp->cf_c13, &cf_srcp->cf_c13); + cheri_capability_copy(&cf_destp->cf_c14, &cf_srcp->cf_c14); + cheri_capability_copy(&cf_destp->cf_c15, &cf_srcp->cf_c15); + cheri_capability_copy(&cf_destp->cf_c16, &cf_srcp->cf_c16); + cheri_capability_copy(&cf_destp->cf_c17, &cf_srcp->cf_c17); + cheri_capability_copy(&cf_destp->cf_c18, &cf_srcp->cf_c18); + cheri_capability_copy(&cf_destp->cf_c19, &cf_srcp->cf_c19); + cheri_capability_copy(&cf_destp->cf_c20, &cf_srcp->cf_c20); + cheri_capability_copy(&cf_destp->cf_c21, &cf_srcp->cf_c21); + cheri_capability_copy(&cf_destp->cf_c22, &cf_srcp->cf_c22); + cheri_capability_copy(&cf_destp->cf_c23, &cf_srcp->cf_c23); + cheri_capability_copy(&cf_destp->cf_c24, &cf_srcp->cf_c24); + cheri_capability_copy(&cf_destp->cf_c26, &cf_srcp->cf_c26); /* * XXXRW: not in CHERI ISAv2: - * cp2_capability_copy(&cf_destp->cf_tsc, &cf_srcp->cf_tsc); + * cheri_capability_copy(&cf_destp->cf_tsc, &cf_srcp->cf_tsc); */ - cp2_capability_copy(&cf_destp->cf_pcc, &cf_srcp->cf_pcc); + cheri_capability_copy(&cf_destp->cf_pcc, &cf_srcp->cf_pcc); } void cheri_exec_setregs(struct thread *td) { - struct cp2_frame *cfp; + struct cheri_frame *cfp; /* * XXXRW: Experimental CHERI ABI initialises $c0 with full user @@ -204,42 +204,42 @@ * no rights at all. The runtime linker/compiler/application can * propagate around rights as required. */ - cfp = &td->td_pcb->pcb_cp2frame; - cp2_capability_set_user(&cfp->cf_c0); - cp2_capability_set_null(&cfp->cf_c1); - cp2_capability_set_null(&cfp->cf_c2); - cp2_capability_set_null(&cfp->cf_c3); - cp2_capability_set_null(&cfp->cf_c4); - cp2_capability_set_null(&cfp->cf_c5); - cp2_capability_set_null(&cfp->cf_c6); - cp2_capability_set_null(&cfp->cf_c7); - cp2_capability_set_null(&cfp->cf_c8); - cp2_capability_set_null(&cfp->cf_c9); - cp2_capability_set_null(&cfp->cf_c10); - cp2_capability_set_null(&cfp->cf_c11); - cp2_capability_set_null(&cfp->cf_c12); - cp2_capability_set_null(&cfp->cf_c13); - cp2_capability_set_null(&cfp->cf_c14); - cp2_capability_set_null(&cfp->cf_c15); - cp2_capability_set_null(&cfp->cf_c16); - cp2_capability_set_null(&cfp->cf_c17); - cp2_capability_set_null(&cfp->cf_c18); - cp2_capability_set_null(&cfp->cf_c19); - cp2_capability_set_null(&cfp->cf_c20); - cp2_capability_set_null(&cfp->cf_c21); - cp2_capability_set_null(&cfp->cf_c22); - cp2_capability_set_null(&cfp->cf_c23); - cp2_capability_set_null(&cfp->cf_c24); - cp2_capability_set_null(&cfp->cf_c26); + cfp = &td->td_pcb->pcb_cheriframe; + cheri_capability_set_user(&cfp->cf_c0); + cheri_capability_set_null(&cfp->cf_c1); + cheri_capability_set_null(&cfp->cf_c2); + cheri_capability_set_null(&cfp->cf_c3); + cheri_capability_set_null(&cfp->cf_c4); + cheri_capability_set_null(&cfp->cf_c5); + cheri_capability_set_null(&cfp->cf_c6); + cheri_capability_set_null(&cfp->cf_c7); + cheri_capability_set_null(&cfp->cf_c8); + cheri_capability_set_null(&cfp->cf_c9); + cheri_capability_set_null(&cfp->cf_c10); + cheri_capability_set_null(&cfp->cf_c11); + cheri_capability_set_null(&cfp->cf_c12); + cheri_capability_set_null(&cfp->cf_c13); + cheri_capability_set_null(&cfp->cf_c14); + cheri_capability_set_null(&cfp->cf_c15); + cheri_capability_set_null(&cfp->cf_c16); + cheri_capability_set_null(&cfp->cf_c17); + cheri_capability_set_null(&cfp->cf_c18); + cheri_capability_set_null(&cfp->cf_c19); + cheri_capability_set_null(&cfp->cf_c20); + cheri_capability_set_null(&cfp->cf_c21); + cheri_capability_set_null(&cfp->cf_c22); + cheri_capability_set_null(&cfp->cf_c23); + cheri_capability_set_null(&cfp->cf_c24); + cheri_capability_set_null(&cfp->cf_c26); /* * XXXRW: not in CHERI ISAv2: - * cp2_capability_set_null(&cfp->cf_tsc); + * cheri_capability_set_null(&cfp->cf_tsc); */ - cp2_capability_set_user(&cfp->cf_pcc); + cheri_capability_set_user(&cfp->cf_pcc); } #ifdef DDB -#define DB_CP2_REG_PRINT_NUM(crn, num) do { \ +#define DB_CHERI_REG_PRINT_NUM(crn, num) do { \ struct chericap c; \ \ CHERI_GETCAPREG((crn), c); \ @@ -249,56 +249,57 @@ (uintmax_t)c.c_length); \ } while (0) -#define DB_CP2_REG_PRINT(crn) DB_CP2_REG_PRINT_NUM(crn, crn) +#define DB_CHERI_REG_PRINT(crn) DB_CHERI_REG_PRINT_NUM(crn, crn) /* - * Variation that prints live register state from CP2. + * Variation that prints live register state from the capability coprocessor. */ -DB_SHOW_COMMAND(cp2, ddb_dump_cp2) +DB_SHOW_COMMAND(cheri, ddb_dump_cheri) { - db_printf("CP2 registers\n"); - DB_CP2_REG_PRINT(0); - DB_CP2_REG_PRINT(1); - DB_CP2_REG_PRINT(2); - DB_CP2_REG_PRINT(3); - DB_CP2_REG_PRINT(4); - DB_CP2_REG_PRINT(5); - DB_CP2_REG_PRINT(6); - DB_CP2_REG_PRINT(7); - DB_CP2_REG_PRINT(8); - DB_CP2_REG_PRINT(9); - DB_CP2_REG_PRINT(10); - DB_CP2_REG_PRINT(11); - DB_CP2_REG_PRINT(12); - DB_CP2_REG_PRINT(13); - DB_CP2_REG_PRINT(14); - DB_CP2_REG_PRINT(15); - DB_CP2_REG_PRINT(16); - DB_CP2_REG_PRINT(17); - DB_CP2_REG_PRINT(18); - DB_CP2_REG_PRINT(19); - DB_CP2_REG_PRINT(20); - DB_CP2_REG_PRINT(21); - DB_CP2_REG_PRINT(22); - DB_CP2_REG_PRINT(23); - DB_CP2_REG_PRINT(24); - DB_CP2_REG_PRINT(25); - DB_CP2_REG_PRINT(26); - DB_CP2_REG_PRINT(27); - DB_CP2_REG_PRINT(28); - DB_CP2_REG_PRINT(29); - DB_CP2_REG_PRINT(30); - DB_CP2_REG_PRINT(31); + db_printf("CHERI registers\n"); + DB_CHERI_REG_PRINT(0); + DB_CHERI_REG_PRINT(1); + DB_CHERI_REG_PRINT(2); + DB_CHERI_REG_PRINT(3); + DB_CHERI_REG_PRINT(4); + DB_CHERI_REG_PRINT(5); + DB_CHERI_REG_PRINT(6); + DB_CHERI_REG_PRINT(7); + DB_CHERI_REG_PRINT(8); + DB_CHERI_REG_PRINT(9); + DB_CHERI_REG_PRINT(10); + DB_CHERI_REG_PRINT(11); + DB_CHERI_REG_PRINT(12); + DB_CHERI_REG_PRINT(13); + DB_CHERI_REG_PRINT(14); + DB_CHERI_REG_PRINT(15); + DB_CHERI_REG_PRINT(16); + DB_CHERI_REG_PRINT(17); + DB_CHERI_REG_PRINT(18); + DB_CHERI_REG_PRINT(19); + DB_CHERI_REG_PRINT(20); + DB_CHERI_REG_PRINT(21); + DB_CHERI_REG_PRINT(22); + DB_CHERI_REG_PRINT(23); + DB_CHERI_REG_PRINT(24); + DB_CHERI_REG_PRINT(25); + DB_CHERI_REG_PRINT(26); + DB_CHERI_REG_PRINT(27); + DB_CHERI_REG_PRINT(28); + DB_CHERI_REG_PRINT(29); + DB_CHERI_REG_PRINT(30); + DB_CHERI_REG_PRINT(31); } /* - * Variation that prints the saved userspace CP2 register frame for a thread. + * Variation that prints the saved userspace CHERI register frame for a + * thread. */ -DB_SHOW_COMMAND(cp2frame, ddb_dump_cp2frame) +DB_SHOW_COMMAND(cheriframe, ddb_dump_cheriframe) { struct thread *td; - struct cp2_frame *cfp; + struct cheri_frame *cfp; register_t s; u_int i; @@ -307,28 +308,28 @@ else td = curthread; - cfp = &td->td_pcb->pcb_cp2frame; + cfp = &td->td_pcb->pcb_cheriframe; db_printf("Thread %d at %p\n", td->td_tid, td); - db_printf("CP2 frame at %p\n", cfp); + db_printf("CHERI frame at %p\n", cfp); /* Laboriously load and print each capability. */ for (i = 0; i < 25; i++) { s = intr_disable(); - cp2_capability_load(CHERI_CR_KR1C, + cheri_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + i); - DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, i); + DB_CHERI_REG_PRINT_NUM(CHERI_CR_KR1C, i); intr_restore(s); } db_printf("\nPCC:\n"); s = intr_disable(); #if 0 - cp2_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + + cheri_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + CHERI_CR_TSC_OFF); - DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_TSC); + DB_CHERI_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_TSC); #endif - cp2_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + + cheri_capability_load(CHERI_CR_KR1C, (struct chericap *)&cfp->cf_c0 + CHERI_CR_PCC_OFF); - DB_CP2_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_EPCC); + DB_CHERI_REG_PRINT_NUM(CHERI_CR_KR1C, CHERI_CR_EPCC); intr_restore(s); } #endif ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheri.h#9 (text+ko) ==== @@ -66,10 +66,10 @@ * struct mips_frame. As with mips_frame, the order of save/restore is very * important for both reasons of correctness and security. * - * Must match the register offset definitions (CHERI_*_OFF) in cp2reg.h. + * Must match the register offset definitions (CHERI_*_OFF) in cherireg.h. */ #ifdef _KERNEL -struct cp2_frame { +struct cheri_frame { /* c0 has special properties for MIPS load/store instructions. */ struct chericap cf_c0; @@ -78,7 +78,7 @@ * CHERI ISA spec (ISAv2). * * XXXRW: Currently, C25 is used in-kernel to maintain a saved UDC - * (C0), and so not part of cp2_frame. This will change in the + * (C0), and so not part of cheri_frame. This will change in the * future. */ struct chericap cf_c1, cf_c2, cf_c3, cf_c4; @@ -100,7 +100,7 @@ */ struct chericap cf_pcc; }; -CTASSERT(sizeof(struct cp2_frame) == (27 * CHERICAP_SIZE)); +CTASSERT(sizeof(struct cheri_frame) == (27 * CHERICAP_SIZE)); #endif /* @@ -232,14 +232,14 @@ } while (0) static inline void -cp2_capability_load(u_int crn_to, struct chericap *cp) +cheri_capability_load(u_int crn_to, struct chericap *cp) { CHERI_CLC(crn_to, CHERI_CR_KDC, cp, 0); } static inline void -cp2_capability_store(u_int crn_from, struct chericap *cp) +cheri_capability_store(u_int crn_from, struct chericap *cp) { CHERI_CSC(crn_from, CHERI_CR_KDC, cp, 0); @@ -261,19 +261,20 @@ * APIs that act on C language representations of capabilities -- but not * capabilities themselves. */ -void cp2_capability_copy(struct chericap *cp_to, struct chericap *cp_from); -void cp2_capability_set(struct chericap *cp, uint32_t uperms, +void cheri_capability_copy(struct chericap *cp_to, + struct chericap *cp_from); +void cheri_capability_set(struct chericap *cp, uint32_t uperms, void *otypep /* eaddr */, void *basep, uint64_t length); -void cp2_capability_set_priv(struct chericap *cp); -void cp2_capability_set_user(struct chericap *cp); -void cp2_capability_set_null(struct chericap *cp); +void cheri_capability_set_priv(struct chericap *cp); +void cheri_capability_set_user(struct chericap *cp); +void cheri_capability_set_null(struct chericap *cp); #ifdef _KERNEL /* * Kernel-specific CHERI context management functions. */ -void cp2_context_copy(struct cp2_frame *cf_destp, - struct cp2_frame *cf_srcp); +void cheri_context_copy(struct cheri_frame *cf_destp, + struct cheri_frame *cf_srcp); void cheri_exec_setregs(struct thread *td); #endif ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cheriasm.h#8 (text+ko) ==== @@ -78,90 +78,86 @@ 66: /* - * Macros to save and restore CP2 registers from pcb.pcb_cp2frame, - * individually and in quantity. Explicitly use $kdc ($30), which - * U_PCB_CP2FRAME is assumed to be valid for, but that the userspace $c0 has - * been set aside in $sc0 ($c25). This assumes previous or further calls to - * CHERI_EXECPTION_ENTER() and CHERI_EXCEPTION_RETURN() to manage $c0. - * - * XXXRW: Here, it would be nice if CSCR and CLCR took immediate offsets, not - * just a register offset so that we could avoid using treg. + * Macros to save and restore CHERI capability registers registers from + * pcb.pcb_cheriframe, individually and in quantity. Explicitly use $kdc + * ($30), which U_PCB_CHERIFRAME is assumed to be valid for, but that the + * userspace $c0 has been set aside in $sc0 ($c25). This assumes previous or + * further calls to CHERI_EXECPTION_ENTER() and CHERI_EXCEPTION_RETURN() to + * manage $c0. */ #define SZCAP 32 -#define SAVE_U_PCB_CP2REG(treg, creg, offs, base) \ - daddu treg, base, U_PCB_CP2FRAME + (SZCAP * offs); \ - cscr creg, treg($c30) +#define SAVE_U_PCB_CHERIREG(creg, offs, base) \ + csc creg, base, (U_PCB_CHERIFRAME + (SZCAP * offs))($c30) -#define RESTORE_U_PCB_CP2REG(treg, creg, offs, base) \ - daddu treg, base, U_PCB_CP2FRAME + (SZCAP * offs); \ - clcr creg, treg($c30) +#define RESTORE_U_PCB_CHERIREG(creg, offs, base) \ + clc creg, base, (U_PCB_CHERIFRAME + (SZCAP * offs))($c30) /* - * XXXRW: Update once the assembler supports reserved CP2 register names to + * XXXRW: Update once the assembler supports reserved CHERI register names to * avoid hard-coding here. * - * XXXRW: It woudld be nice to make calls to these conditional on actual CP2 + * XXXRW: It woudld be nice to make calls to these conditional on actual CHERI * coprocessor use, similar to on-demand context management for other MIPS * coprocessors (e.g., FP). * * XXXRW: Note hard-coding of UDC here. */ -#define SAVE_CP2_CONTEXT(treg, base) \ - SAVE_U_PCB_CP2REG(treg, $c25, CHERI_CR_C0_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c1, CHERI_CR_C1_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c2, CHERI_CR_C2_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c3, CHERI_CR_C3_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c4, CHERI_CR_C4_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c5, CHERI_CR_C5_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c6, CHERI_CR_C6_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c7, CHERI_CR_C7_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c8, CHERI_CR_C8_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c9, CHERI_CR_C9_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c10, CHERI_CR_C10_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c11, CHERI_CR_C11_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c12, CHERI_CR_C12_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c13, CHERI_CR_C13_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c14, CHERI_CR_C14_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c15, CHERI_CR_C15_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c16, CHERI_CR_C16_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c17, CHERI_CR_C17_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c18, CHERI_CR_C18_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c19, CHERI_CR_C19_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c20, CHERI_CR_C20_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c21, CHERI_CR_C21_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c22, CHERI_CR_C22_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c23, CHERI_CR_C23_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c24, CHERI_CR_C24_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c26, CHERI_CR_C26_OFF, base); \ - SAVE_U_PCB_CP2REG(treg, $c31, CHERI_CR_PCC_OFF, base) +#define SAVE_CHERI_CONTEXT(base) \ + SAVE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base); \ + SAVE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base); \ + SAVE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base); \ + SAVE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base); \ + SAVE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base); \ + SAVE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base); \ + SAVE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base); \ + SAVE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base); \ + SAVE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base); \ + SAVE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base); \ + SAVE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base); \ + SAVE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base); \ + SAVE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base); \ + SAVE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base); \ + SAVE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base); \ + SAVE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base); \ + SAVE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base); \ + SAVE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base); \ + SAVE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base); \ + SAVE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base); \ + SAVE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base); \ + SAVE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base); \ + SAVE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base); \ + SAVE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base); \ + SAVE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base); \ + SAVE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base); \ + SAVE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base) -#define RESTORE_CP2_CONTEXT(treg, base) \ - RESTORE_U_PCB_CP2REG(treg, $c25, CHERI_CR_C0_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c1, CHERI_CR_C1_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c2, CHERI_CR_C2_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c3, CHERI_CR_C3_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c4, CHERI_CR_C4_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c5, CHERI_CR_C5_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c6, CHERI_CR_C6_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c7, CHERI_CR_C7_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c8, CHERI_CR_C8_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c9, CHERI_CR_C9_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c10, CHERI_CR_C10_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c11, CHERI_CR_C11_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c12, CHERI_CR_C12_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c13, CHERI_CR_C13_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c14, CHERI_CR_C14_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c15, CHERI_CR_C15_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c16, CHERI_CR_C16_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c17, CHERI_CR_C17_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c18, CHERI_CR_C18_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c19, CHERI_CR_C19_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c20, CHERI_CR_C20_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c21, CHERI_CR_C21_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c22, CHERI_CR_C22_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c23, CHERI_CR_C23_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c24, CHERI_CR_C24_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c26, CHERI_CR_C26_OFF, base); \ - RESTORE_U_PCB_CP2REG(treg, $c31, CHERI_CR_PCC_OFF, base) +#define RESTORE_CHERI_CONTEXT(base) \ + RESTORE_U_PCB_CHERIREG($c25, CHERI_CR_C0_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c1, CHERI_CR_C1_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c2, CHERI_CR_C2_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c3, CHERI_CR_C3_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c4, CHERI_CR_C4_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c5, CHERI_CR_C5_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c6, CHERI_CR_C6_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c7, CHERI_CR_C7_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c8, CHERI_CR_C8_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c9, CHERI_CR_C9_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c10, CHERI_CR_C10_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c11, CHERI_CR_C11_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c12, CHERI_CR_C12_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c13, CHERI_CR_C13_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c14, CHERI_CR_C14_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c15, CHERI_CR_C15_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c16, CHERI_CR_C16_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c17, CHERI_CR_C17_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c18, CHERI_CR_C18_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c19, CHERI_CR_C19_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c20, CHERI_CR_C20_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c21, CHERI_CR_C21_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c22, CHERI_CR_C22_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c23, CHERI_CR_C23_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c24, CHERI_CR_C24_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c26, CHERI_CR_C26_OFF, base); \ + RESTORE_U_PCB_CHERIREG($c31, CHERI_CR_PCC_OFF, base) #endif /* _MIPS_INCLUDE_CHERIASM_H_ */ ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/cherireg.h#7 (text+ko) ==== @@ -152,7 +152,7 @@ #define CHERI_CR_EPCC CHERI_CR_C31 /* Exception program counter cap. */ /* - * Offsets of registers in struct cp2_frame -- must match the definition in + * Offsets of registers in struct cheri_frame -- must match the definition in * cheri.h. */ #define CHERI_CR_C0_OFF 0 ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/pcb.h#6 (text+ko) ==== @@ -55,7 +55,7 @@ { struct trapframe pcb_regs; /* saved CPU and registers */ #ifdef CPU_CHERI - struct cp2_frame pcb_cp2frame; /* Userspace capabilities. */ + struct cheri_frame pcb_cheriframe; /* Userspace capabilities. */ #endif __register_t pcb_context[14]; /* kernel context for resume */ void *pcb_onfault; /* for copyin/copyout faults */ ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/exception.S#10 (text+ko) ==== @@ -505,7 +505,7 @@ /* * Note: This saves EPCC, matching the explicit EPC save above. */ - SAVE_CP2_CONTEXT(t0, k1) + SAVE_CHERI_CONTEXT(k1) #endif REG_S a3, CALLFRAME_RA(sp) # for debugging PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP @@ -560,7 +560,7 @@ /* * Note: This restores EPCC, matching the explicit EPC restore below. */ - RESTORE_CP2_CONTEXT(t0, k1) + RESTORE_CHERI_CONTEXT(k1) #endif RESTORE_U_PCB_REG(t0, MULLO, k1) RESTORE_U_PCB_REG(t1, MULHI, k1) @@ -662,10 +662,10 @@ /* * Check for getting interrupts just before wait * - * XXXCHERI: Once we use variable CP2 PCC in the kernel, this check will also - * need to take that into account. In the mean time, the fact that we're in - * the kernel ring is sufficient to imply that PCC matches the kernel address - * space. + * XXXCHERI: Once we use variable CHERI PCC in the kernel, this check will + * also need to take that into account. In the mean time, the fact that we're + * in the kernel ring is sufficient to imply that PCC matches the kernel + * address space. */ MFC0 k0, MIPS_COP_0_EXC_PC ori k0, 0xf @@ -786,7 +786,7 @@ /* * Note: This saves EPCC, matching the explicit EPC save above. */ - SAVE_CP2_CONTEXT(t0, k1) + SAVE_CHERI_CONTEXT(k1) #endif PTR_SUBU sp, k1, CALLFRAME_SIZ # switch to kernel SP PTR_LA gp, _C_LABEL(_gp) # switch to kernel GP @@ -850,7 +850,7 @@ /* * Note: This restores EPCC, matching the explicit EPC restore below. */ - RESTORE_CP2_CONTEXT(t0, k1) + RESTORE_CHERI_CONTEXT(k1) #endif RESTORE_U_PCB_REG(s0, S0, k1) RESTORE_U_PCB_REG(s1, S1, k1) @@ -1056,8 +1056,8 @@ /* * XXXCHERI: This SAVE_CPU preserves a kernel register frame before * entering the kernel debugger on kernel stack overflow. In the - * future, we may want to do something with CP2 EPCC here (e.g., save - * it?). + * future, we may want to do something with CHERI EPCC here (e.g., + * save it?). */ SAVE_CPU ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/genassym.c#4 (text+ko) ==== @@ -75,7 +75,7 @@ ASSYM(U_PCB_REGS, offsetof(struct pcb, pcb_regs.zero)); #ifdef CPU_CHERI -ASSYM(U_PCB_CP2FRAME, offsetof(struct pcb, pcb_cp2frame.cf_c0)); +ASSYM(U_PCB_CHERIFRAME, offsetof(struct pcb, pcb_cheriframe.cf_c0)); #endif ASSYM(U_PCB_CONTEXT, offsetof(struct pcb, pcb_context)); ASSYM(U_PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/swtch.S#9 (text+ko) ==== @@ -124,7 +124,7 @@ /* * Note: This restores EPCC, matching the explicit EPC restore below. */ - RESTORE_CP2_CONTEXT(t0, k1) + RESTORE_CHERI_CONTEXT(k1) #endif RESTORE_U_PCB_REG(t0, MULLO, k1) RESTORE_U_PCB_REG(t1, MULHI, k1) @@ -264,7 +264,7 @@ SAVE_U_PCB_CONTEXT(ra, PREG_PC, a0) # save return address #ifdef CPU_CHERI - /* XXXRW: CP2 state management here. */ + /* XXXRW: CHERI state management here. */ #endif #ifdef CPU_CNMIPS From owner-p4-projects@FreeBSD.ORG Tue Oct 23 07:22:53 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 7AC3CFED; Tue, 23 Oct 2012 07:22:53 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 2B065FEB for ; Tue, 23 Oct 2012 07:22:53 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 107238FC14 for ; Tue, 23 Oct 2012 07:22:53 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9N7MqUP070284 for ; Tue, 23 Oct 2012 07:22:52 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9N7MqoR070281 for perforce@freebsd.org; Tue, 23 Oct 2012 07:22:52 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Tue, 23 Oct 2012 07:22:52 GMT Message-Id: <201210230722.q9N7MqoR070281@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218948 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Oct 2012 07:22:53 -0000 http://p4web.freebsd.org/@@218948?ac=10 Change 218948 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/23 07:22:02 Rename cp2.c to cheri.c to improve clarity. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/beri/files.beri#7 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cheri.c#1 branch .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cp2.c#17 delete Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/beri/files.beri#7 (text+ko) ==== @@ -11,6 +11,6 @@ dev/terasic/mtl/terasic_mtl_syscons.c optional terasic_mtl dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl mips/beri/beri_machdep.c standard -mips/cheri/cp2.c optional cpu_cheri +mips/cheri/cheri.c optional cpu_cheri mips/mips/intr_machdep.c standard mips/mips/tick.c standard From owner-p4-projects@FreeBSD.ORG Tue Oct 23 07:27:13 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id B051119D; Tue, 23 Oct 2012 07:27:13 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 2D3F919B for ; Tue, 23 Oct 2012 07:27:13 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 0A0608FC08 for ; Tue, 23 Oct 2012 07:27:13 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9N7RCXu070388 for ; Tue, 23 Oct 2012 07:27:12 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9N7RCcg070385 for perforce@freebsd.org; Tue, 23 Oct 2012 07:27:12 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Tue, 23 Oct 2012 07:27:12 GMT Message-Id: <201210230727.q9N7RCcg070385@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson Subject: PERFORCE change 218949 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Oct 2012 07:27:14 -0000 http://p4web.freebsd.org/@@218949?ac=10 Change 218949 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/10/23 07:26:19 CHERI capability registers now include a tag, so teach the kernel debugger to print that tag. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cheri.c#2 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/cheri/cheri.c#2 (text+ko) ==== @@ -241,10 +241,13 @@ #ifdef DDB #define DB_CHERI_REG_PRINT_NUM(crn, num) do { \ struct chericap c; \ + u_int ctag; \ \ CHERI_GETCAPREG((crn), c); \ - db_printf("C%u u: %u perms %04jx otype %016jx\n", num, \ - c.c_unsealed, (uintmax_t)c.c_perms, (uintmax_t)c.c_otype); \ + CHERI_CGETTAG(ctag, (crn)); \ + db_printf("C%u t: %u u: %u perms %04jx otype %016jx\n", num, \ + ctag, c.c_unsealed, (uintmax_t)c.c_perms, \ + (uintmax_t)c.c_otype); \ db_printf("\tbase %016jx length %016jx\n", (uintmax_t)c.c_base, \ (uintmax_t)c.c_length); \ } while (0) From owner-p4-projects@FreeBSD.ORG Thu Oct 25 20:36:39 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 9B12166F; Thu, 25 Oct 2012 20:36:39 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 54C6866D for ; Thu, 25 Oct 2012 20:36:39 +0000 (UTC) (envelope-from brooks@freebsd.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 3BE1D8FC1A for ; Thu, 25 Oct 2012 20:36:39 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9PKadqZ052448 for ; Thu, 25 Oct 2012 20:36:39 GMT (envelope-from brooks@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9PKac9v052445 for perforce@freebsd.org; Thu, 25 Oct 2012 20:36:38 GMT (envelope-from brooks@freebsd.org) Date: Thu, 25 Oct 2012 20:36:38 GMT Message-Id: <201210252036.q9PKac9v052445@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to brooks@freebsd.org using -f From: Brooks Davis Subject: PERFORCE change 219084 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Oct 2012 20:36:39 -0000 http://p4web.freebsd.org/@@219084?ac=10 Change 219084 by brooks@brooks_ecr_current on 2012/10/25 20:36:04 Checkpoint the beginnings of a sandboxed PNG reader. The current version is an unsandboxed, threaded reader. Affected files ... .. //depot/projects/ctsrd/beribsd/src/ctsrd/Makefile#11 edit .. //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/Makefile#1 add .. //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/pngsb.c#1 add Differences ... ==== //depot/projects/ctsrd/beribsd/src/ctsrd/Makefile#11 (text+ko) ==== @@ -6,6 +6,7 @@ minifile \ mtlctl \ pictview \ + pngsb \ spinner \ share \ wr From owner-p4-projects@FreeBSD.ORG Thu Oct 25 21:56:09 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id F38BED5B; Thu, 25 Oct 2012 21:56:08 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 9D63FD59 for ; Thu, 25 Oct 2012 21:56:08 +0000 (UTC) (envelope-from brooks@freebsd.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 679268FC14 for ; Thu, 25 Oct 2012 21:56:08 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q9PLu8hR055851 for ; Thu, 25 Oct 2012 21:56:08 GMT (envelope-from brooks@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q9PLu8DG055848 for perforce@freebsd.org; Thu, 25 Oct 2012 21:56:08 GMT (envelope-from brooks@freebsd.org) Date: Thu, 25 Oct 2012 21:56:08 GMT Message-Id: <201210252156.q9PLu8DG055848@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to brooks@freebsd.org using -f From: Brooks Davis Subject: PERFORCE change 219090 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.14 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Oct 2012 21:56:09 -0000 http://p4web.freebsd.org/@@219090?ac=10 Change 219090 by brooks@brooks_zenith on 2012/10/25 21:55:24 Fix pngsb build in the ctsrd tree. Affected files ... .. //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/Makefile#2 edit .. //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/pngsb.c#2 edit Differences ... ==== //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/Makefile#2 (text+ko) ==== @@ -1,13 +1,11 @@ -CC=clang - PROG= pngsb MAN= WARNS= 6 -CFLAGS+= -I/usr/local/include +CFLAGS+= -I${.CURDIR}/../../ctsrd-lib/libvuln_png/ LDFLAGS+= -L/usr/local/lib -LDADD+= -lpthread -lpng -lz +LDADD+= -lpthread -lvuln_png -lz -lm .include ==== //depot/projects/ctsrd/beribsd/src/ctsrd/pngsb/pngsb.c#2 (text+ko) ==== @@ -120,7 +120,9 @@ * Reject the image if the parser finds a different size than * our manual parsing did. */ +#if 0 png_set_user_limits(png_ptr, width, height); +#endif png_set_read_fn(png_ptr, pds, read_png_from_fd); @@ -141,10 +143,11 @@ png_set_gray_to_rgb(png_ptr); pds->ps->passes_remaining = png_set_interlace_handling(png_ptr); - if ((rows = malloc(height*png_sizeof(png_bytep))) == NULL) + if ((rows = malloc(height*sizeof(png_bytep))) == NULL) png_error(png_ptr, "failed to malloc row array"); for (r = 0; r < height; r++) - rows[r] = (png_bytep)(pds->ps->buffer + (width * r)); + rows[r] = __DEVOLATILE(png_bytep, + pds->ps->buffer + (width * r)); png_read_rows(png_ptr, rows, NULL, height); @@ -213,7 +216,7 @@ if ((pds = malloc(sizeof(struct pthr_decode_state))) == NULL) { close(pfd); - free((void*)ps->buffer); + free(__DEVOLATILE(void*, ps->buffer)); free(ps); return (NULL); } @@ -222,7 +225,7 @@ if ((pdp = malloc(sizeof(struct pthr_decode_private))) == NULL) { close(pfd); - free((void*)ps->buffer); + free(__DEVOLATILE(void*, ps->buffer)); free(ps); free(pds); } @@ -230,7 +233,7 @@ if (pthread_create(&(pdp->pthr), NULL, pthr_decode_png, pds) != 0) { close(pfd); - free((void*)ps->buffer); + free(__DEVOLATILE(void*, ps->buffer)); free(ps); free(pds); free(pdp); @@ -260,7 +263,7 @@ if (ps->private != NULL) png_read_finish(ps); - free((void*)ps->buffer); + free(__DEVOLATILE(void*, ps->buffer)); free(ps); }