From owner-freebsd-arm@FreeBSD.ORG Sun Aug 18 01:12:45 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id D16A6C8F for ; Sun, 18 Aug 2013 01:12:45 +0000 (UTC) (envelope-from taguchi.ch@gmail.com) Received: from mail-pa0-x22c.google.com (mail-pa0-x22c.google.com [IPv6:2607:f8b0:400e:c03::22c]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id AC86125DE for ; Sun, 18 Aug 2013 01:12:45 +0000 (UTC) Received: by mail-pa0-f44.google.com with SMTP id fz6so3330756pac.17 for ; Sat, 17 Aug 2013 18:12:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:mime-version:content-type :content-transfer-encoding; bh=AZ3m2PXOBXzoCGKXxnwu1v0/q1MMNJZJ9FjLszdKs04=; b=HyfLrcqx0UFRhoghpM+aBM66EqSXjTTdmFEPL2HdHwvrC5TPyyDmJzsm5hx6j7SbVj iDL+6tAlckt63XnVHk7dB/NnAO3ZvBV48UrICApXqGhskZ3oE1TpfhZHhyjG0+ItCpcH AZC79uMWist9fXYXUQB1iRTN4jZ3N7f/935sef4IiI6mVPBEXpjzoMmSJsrhqtSL4PEW B8gDIfWG+NUtNXcLSvMRaRw28qhzcqX+/Sw2sS590HbbpzydoYszmB90jveFJWa7594B 0T1T9E9rfytQHLUPyoaBdSgbySfAhtl/iIe9PJ8knlKwnmNTuauBSEpfD7jW5O73bXQk oFtQ== X-Received: by 10.68.225.232 with SMTP id rn8mr2528754pbc.32.1376788365334; Sat, 17 Aug 2013 18:12:45 -0700 (PDT) Received: from arty (48.178.30.125.dy.iij4u.or.jp. [125.30.178.48]) by mx.google.com with ESMTPSA id eq5sm6235368pbc.15.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 17 Aug 2013 18:12:44 -0700 (PDT) Date: Sun, 18 Aug 2013 10:12:42 +0900 From: Chie Taguchi To: freebsd-arm@freebsd.org Subject: building document of Xorg Message-Id: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> X-Mailer: Sylpheed 3.3.0 (GTK+ 2.24.19; amd64-portbld-freebsd10.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 Aug 2013 01:12:45 -0000 Hi all, i wrote a building document of x11/Xorg(not minimum) for RaspberryPi. if you want to build Xorg, it will be useful for you! i hope so.:) https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi Thanks. -- Chie Taguchi From owner-freebsd-arm@FreeBSD.ORG Sun Aug 18 07:59:42 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id EEC3D359 for ; Sun, 18 Aug 2013 07:59:42 +0000 (UTC) (envelope-from yom@iaelu.net) Received: from mail.iaelu.net (mail.iaelu.net [88.190.241.77]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 850172411 for ; Sun, 18 Aug 2013 07:59:41 +0000 (UTC) Received: from [192.168.128.11] (nly93-2-82-236-219-130.fbx.proxad.net [82.236.219.130]) (authenticated bits=0) by mail.iaelu.net (8.14.5/8.14.5) with ESMTP id r7I7gCxY004544 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT); Sun, 18 Aug 2013 09:42:14 +0200 (CEST) (envelope-from yom@iaelu.net) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=iaelu.net; s=eienni; t=1376811734; bh=x3Kh0A2Y3N6mKs65qCFDk7bupCSz7iMDsx3orh0bSQo=; h=Subject:From:In-Reply-To:Date:Cc:References:To; b=a5Zs2305KIwI8zTRXVVywWZGHkLQFXQXZE4EzuPv5CzCIq/HqLYtRRYkP5gS3kgIO 5HAFzMY6zrqd2QN69empIQfyv/gXSuyQUM6ZNOhjOVpdiPPmZB0yHtLJVI64Toh2pJ cWMD2wOKHzb4jZOEwNUIfuu8/pTxfk8aYwic5J84= Content-Type: multipart/signed; boundary="Apple-Mail=_6C0B3002-A37D-43A5-9E4F-D2C73862D71C"; protocol="application/pkcs7-signature"; micalg=sha1 Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: building document of Xorg From: Guillaume Bibaut In-Reply-To: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> Date: Sun, 18 Aug 2013 09:42:06 +0200 Message-Id: <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> References: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> To: Chie Taguchi X-Mailer: Apple Mail (2.1508) X-Virus-Scanned: clamav-milter 0.97.8 at mail.iaelu.net X-Virus-Status: Clean Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 Aug 2013 07:59:43 -0000 --Apple-Mail=_6C0B3002-A37D-43A5-9E4F-D2C73862D71C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=iso-8859-1 Very nice, at least that's what I was looking for. There are still patches to apply on some other ports too : - security/libgcrypt : to use GCC - graphics/dri : http://www.freebsd.org/cgi/query-pr.cgi?pr=3Dports/176703= - graphics/libGL : the same as dri since it's based on MesaLib I can't remember if I'm forgetting anything else, but if anyone finds = anything, they could add it here :) Thanks. -- Guillaume Bibaut Le 18 ao=FBt 2013 =E0 03:12, Chie Taguchi a =E9crit= : > Hi all, >=20 > i wrote a building document of x11/Xorg(not minimum) for RaspberryPi. > if you want to build Xorg, it will be useful for you! > i hope so.:) >=20 > https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi >=20 > Thanks. >=20 > --=20 > Chie Taguchi > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" --Apple-Mail=_6C0B3002-A37D-43A5-9E4F-D2C73862D71C Content-Disposition: attachment; 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ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 1FD51B69 for ; Sun, 18 Aug 2013 12:25:12 +0000 (UTC) (envelope-from taguchi.ch@gmail.com) Received: from mail-pd0-x229.google.com (mail-pd0-x229.google.com [IPv6:2607:f8b0:400e:c02::229]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E1017253F for ; Sun, 18 Aug 2013 12:25:11 +0000 (UTC) Received: by mail-pd0-f169.google.com with SMTP id r10so3949934pdi.28 for ; Sun, 18 Aug 2013 05:25:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=1ElNbryU/Id/ZlfJvqRIO5TLvU3ocYr8uFqoFaLuTmk=; b=kcv1BpTaQTjousfQ63hjLICplcS9ctFpqve4LiuxQlH3P9mF0qbv93dSftbDFmosUd Cxk7oVcbj7B/hRGASKHe0lC7c/r3jmXHRrQ87VfC+JAzptNObs/+k0IBuHYphTf/o/q6 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[125.30.178.48]) by mx.google.com with ESMTPSA id w8sm9371617paj.4.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 18 Aug 2013 05:25:10 -0700 (PDT) Date: Sun, 18 Aug 2013 21:25:08 +0900 From: Chie Taguchi To: Guillaume Bibaut Subject: Re: building document of Xorg Message-Id: <20130818212508.beddbf0e04a2f5f9a3a699a1@gmail.com> In-Reply-To: <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> References: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> X-Mailer: Sylpheed 3.3.0 (GTK+ 2.24.19; amd64-portbld-freebsd10.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 18 Aug 2013 12:25:12 -0000 thank you for your infomation. it is useful for many people to make a collection repo of ports fix infomation about Xorg and others. i will push that fixes, security/libgcrypt(ports/181365), graphics/dri(ports/176703), graphics/libGL(ports/176705) to repo later. and i also sended PR x11-fonts/fontconfig issue(ports/181372). but i have a question about ${ARCH} value in ports Makefile. "armv6" or "arm" || "armv6", which is the better way? thanks, C.Taguchi On Sun, 18 Aug 2013 09:42:06 +0200 Guillaume Bibaut wrote: > Very nice, at least that's what I was looking for. > > There are still patches to apply on some other ports too : > - security/libgcrypt : to use GCC > - graphics/dri : http://www.freebsd.org/cgi/query-pr.cgi?pr=ports/176703 > - graphics/libGL : the same as dri since it's based on MesaLib > > I can't remember if I'm forgetting anything else, but if anyone finds anything, they could add it here :) > > Thanks. > > -- > Guillaume Bibaut > > Le 18 aout 2013 a 03:12, Chie Taguchi > > > Hi all, > > > > i wrote a building document of x11/Xorg(not minimum) for RaspberryPi. > > if you want to build Xorg, it will be useful for you! > > i hope so.:) > > > > https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi > > > > Thanks. > > > > -- > > Chie Taguchi > > _______________________________________________ > > freebsd-arm@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > -- Chie Taguchi From owner-freebsd-arm@FreeBSD.ORG Mon Aug 19 07:00:59 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 1FC3196D for ; Mon, 19 Aug 2013 07:00:59 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-oa0-f49.google.com (mail-oa0-f49.google.com [209.85.219.49]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id DB10B26D4 for ; Mon, 19 Aug 2013 07:00:58 +0000 (UTC) Received: by mail-oa0-f49.google.com with SMTP id n10so5167205oag.8 for ; Mon, 19 Aug 2013 00:00:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=gYhZB66W6ZX82uAuk29OyTikNyonQzCgNTNqcin2X0w=; b=ML1DPs2OsraUZHEHtd2h4CjXDc7oZ8Qwc02VbNypNre9qfCmqQYo7QaHRVTAj7EfYE iGUJob4h7z0ppL6zALhUO/JGcxawRQFvSGX6MsZWX8PU6iEfDj6ZfhAJnR9RZaa/Z/uk A6Oc+vRKFKhsChww88demzLpKWNeOIuEioiHxxTnHNrnXzSn1fUapLK6yZKVNsPLBYSu EORKCkl4WXkR98yXlqIAWDwKTyjiKk1n0CbIFD8zV0u/tWtCLbTbEuvm+EQJi++hR7Po LzKjK92EczGJTyg/pAfAwMQbAMvw0lUHqGm7kRoAG3wH413+GIP3t8MVvPyurHa7Oh8j 4A9A== X-Gm-Message-State: ALoCoQkTPY/I4bivXdoEljPZZWdQ4wxc/HdoP5tuLlpfv+mXiDRH+euvkv4efLXbOmHhu9WNk3QU X-Received: by 10.182.50.137 with SMTP id c9mr11684825obo.28.1376895652429; Mon, 19 Aug 2013 00:00:52 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id db17sm14905986oec.2.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Aug 2013 00:00:51 -0700 (PDT) Sender: Warner Losh Subject: Re: pkg repository for ARM? Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: Date: Mon, 19 Aug 2013 01:00:48 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <362C6BD9-C7BB-4000-92B1-11814B982E4D@bsdimp.com> References: <522A0D57-4DD4-4669-BB5A-AFCD81E9F497@netsense.nl> <986E81B3-7AB8-469B-BDBB-37909AAEEFE2@kientzle.com> To: Douglas Beattie X-Mailer: Apple Mail (2.1085) Cc: Tim Kientzle , freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Aug 2013 07:00:59 -0000 On Aug 15, 2013, at 10:01 PM, Douglas Beattie wrote: > Like, I wouldn't expect binaries built on BeagleBone Black to run on = my Atmel ARM9 board. The bbb binaries would be armv6, while the atmel binaries would be plain = arm... Warner From owner-freebsd-arm@FreeBSD.ORG Mon Aug 19 11:06:40 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id CD112D39 for ; Mon, 19 Aug 2013 11:06:40 +0000 (UTC) (envelope-from owner-bugmaster@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:1900:2254:206c::16:87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 9FEEA2506 for ; Mon, 19 Aug 2013 11:06:40 +0000 (UTC) Received: from freefall.freebsd.org (localhost [127.0.0.1]) by freefall.freebsd.org (8.14.7/8.14.7) with ESMTP id r7JB6eoB005948 for ; Mon, 19 Aug 2013 11:06:40 GMT (envelope-from owner-bugmaster@FreeBSD.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.7/8.14.7/Submit) id r7JB6e1a005946 for freebsd-arm@FreeBSD.org; Mon, 19 Aug 2013 11:06:40 GMT (envelope-from owner-bugmaster@FreeBSD.org) Date: Mon, 19 Aug 2013 11:06:40 GMT Message-Id: <201308191106.r7JB6e1a005946@freefall.freebsd.org> X-Authentication-Warning: freefall.freebsd.org: gnats set sender to owner-bugmaster@FreeBSD.org using -f From: FreeBSD bugmaster To: freebsd-arm@FreeBSD.org Subject: Current problem reports assigned to freebsd-arm@FreeBSD.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Aug 2013 11:06:40 -0000 Note: to view an individual PR, use: http://www.freebsd.org/cgi/query-pr.cgi?pr=(number). The following is a listing of current problems submitted by FreeBSD users. These represent problem reports covering all versions including experimental development code and obsolete releases. S Tracker Resp. Description -------------------------------------------------------------------------------- o arm/181220 arm make xdev for arm installation fails o arm/180080 arm Unmapped buffers on ARMv7 big-RAM boards o arm/179688 arm [patch] [rpi] serial console eats some characters at m o arm/179561 arm Compilation issue for lighttpd on raspberry pi o arm/179532 arm wireless networking on ARM o arm/178495 arm buildworld fail on arm/raspberry pi o arm/177687 arm gdb gets installed but does not know the EABI version o arm/177686 arm assertion failed in ld-elf.so.1 when invoking telnet w o arm/177685 arm [kernel] [patch] Correct return type and usage of at91 o arm/177538 arm tunefs(8) and mount(8) can not access a newfs(8)'d fil o arm/176424 arm Compiler warning, TARGET_ARCH=armv6, make MALLOC_PRODU o arm/175803 arm building xdev for arm failing o arm/175605 arm please fix build binutils-2.23.1 in raspberry pi o arm/174461 arm [patch] Fix off-by-one in arm9/arm10 cache maintenance o arm/173617 arm Dreamplug exhibits eSATA file corruption using network o kern/171096 arm [arm][xscale][ixp]Allow 16bit access on PCI bus o arm/166256 arm build fail in pmap.c o arm/162159 arm [panic] USB errors leading to panic on DockStar 9.0-RC o arm/161110 arm /usr/src/sys/arm/include/signal.h is bad o arm/161044 arm devel/icu does not build on arm o arm/158950 arm arm/sheevaplug fails fsx when mmap operations are enab o arm/155894 arm [patch] Enable at91 booting from SDHC (high capacity) p arm/155214 arm [patch] MMC/SD IO slow on Atmel ARM with modern large o arm/154227 arm [geli] using GELI leads to panic on ARM o arm/153380 arm Panic / translation fault with wlan on ARM o arm/150581 arm [irq] Unknown error generates IRQ address decoding err o arm/134368 arm [new driver] [patch] nslu2_led driver for the LEDs on p arm/134338 arm [patch] Lock GPIO accesses on ixp425 28 problems total. From owner-freebsd-arm@FreeBSD.ORG Mon Aug 19 13:04:05 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 09760245 for ; Mon, 19 Aug 2013 13:04:05 +0000 (UTC) (envelope-from taguchi.ch@gmail.com) Received: from mail-pb0-x236.google.com (mail-pb0-x236.google.com [IPv6:2607:f8b0:400e:c01::236]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D4FC42D11 for ; Mon, 19 Aug 2013 13:04:04 +0000 (UTC) Received: by mail-pb0-f54.google.com with SMTP id ro12so4959075pbb.13 for ; Mon, 19 Aug 2013 06:04:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=4usWPr+7XyK2VXSwqIVPirTUUlwyb2ukvY7GJQiZzGk=; b=DXTSX9j/mlDj2ONsy6phZt/83AJwyG9k3/sq/x64DzaZURem0gi50p4+BeszWaz8On zBMiXKsuuoZIUW4g9nmHRvNrKq/T8JxcFzKFlSgwwLunV9vMuLEDp696Dk7TnalX139w 7mhJ9G2IiVsjRax2m+SvRIf1zW0VYi9qzhBOT4qvgKVjhqqOe5F04GVvXRsDgMZnipkL r7QDeKvIRYbXnc1oMkBRkzEaSlkA2rNSaiCorznXNeMIz59+V8ahPyvSk4w3f0hS+UaJ csxloQy0yvRpMPMPTwQxBOjmI9ASPxPF/vPLJnh9lQa9WoUQNj65Yg3TnVnbghmlty3/ SGcw== X-Received: by 10.66.161.38 with SMTP id xp6mr2750511pab.145.1376917444244; Mon, 19 Aug 2013 06:04:04 -0700 (PDT) Received: from arty (48.178.30.125.dy.iij4u.or.jp. [125.30.178.48]) by mx.google.com with ESMTPSA id fk4sm15722811pab.23.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Aug 2013 06:04:03 -0700 (PDT) Date: Mon, 19 Aug 2013 22:04:01 +0900 From: Chie Taguchi To: freebsd-arm@freebsd.org Subject: Re: building document of Xorg Message-Id: <20130819220401.11acd306a94e60a87d6424c9@gmail.com> In-Reply-To: <20130818212508.beddbf0e04a2f5f9a3a699a1@gmail.com> References: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> <20130818212508.beddbf0e04a2f5f9a3a699a1@gmail.com> X-Mailer: Sylpheed 3.3.0 (GTK+ 2.24.19; amd64-portbld-freebsd10.0) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: Guillaume Bibaut X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Aug 2013 13:04:05 -0000 i add security/libgcrypt(ports/181365), graphics/libGL(ports/176705) to repo. and i also added document about security/libgcrypt(ports/181365), graphics/dri(ports/176703), graphics/libGL(ports/176705). regards. C.Taguchi On Sun, 18 Aug 2013 21:25:08 +0900 Chie Taguchi wrote: > thank you for your infomation. > > it is useful for many people to make a collection repo of ports fix infomation about Xorg and others. > > i will push that fixes, security/libgcrypt(ports/181365), graphics/dri(ports/176703), graphics/libGL(ports/176705) to repo later. > > and i also sended PR x11-fonts/fontconfig issue(ports/181372). > > but i have a question about ${ARCH} value in ports Makefile. "armv6" or "arm" || "armv6", which is the better way? > > thanks, > > C.Taguchi > > On Sun, 18 Aug 2013 09:42:06 +0200 > Guillaume Bibaut wrote: > > > Very nice, at least that's what I was looking for. > > > > There are still patches to apply on some other ports too : > > - security/libgcrypt : to use GCC > > - graphics/dri : http://www.freebsd.org/cgi/query-pr.cgi?pr=ports/176703 > > - graphics/libGL : the same as dri since it's based on MesaLib > > > > I can't remember if I'm forgetting anything else, but if anyone finds anything, they could add it here :) > > > > Thanks. > > > > -- > > Guillaume Bibaut > > > > Le 18 aout 2013 a 03:12, Chie Taguchi > > > > > Hi all, > > > > > > i wrote a building document of x11/Xorg(not minimum) for RaspberryPi. > > > if you want to build Xorg, it will be useful for you! > > > i hope so.:) > > > > > > https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi > > > > > > Thanks. > > > > > > -- > > > Chie Taguchi > > > _______________________________________________ > > > freebsd-arm@freebsd.org mailing list > > > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > > > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > > > > > -- > Chie Taguchi -- Chie Taguchi From owner-freebsd-arm@FreeBSD.ORG Mon Aug 19 16:26:14 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 5DE14D18 for ; Mon, 19 Aug 2013 16:26:14 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-ea0-f172.google.com (mail-ea0-f172.google.com [209.85.215.172]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D29B92910 for ; Mon, 19 Aug 2013 16:26:13 +0000 (UTC) Received: by mail-ea0-f172.google.com with SMTP id r16so2401119ead.17 for ; Mon, 19 Aug 2013 09:26:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:message-id:date:from:organization:user-agent :mime-version:to:cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=PiMQz8OCuOwxVhtKS5C4QpMtr25K1VIuUJV8g2qUycA=; b=FTyj/haWDGJjiLfj7GeP1WimP8mIypHiA5Ypik3vBMPctmeyQadzdA91YzaGHUamZW TBQlgQk7JyTmGmx0U2GllbdSakLc5F48fIQCgE1+LxLDdsk5L4xkDfrB5ouRKjdFTL6k sm1iwsjYQrlgTyJWf/Ygsp61zCM4Qdi0sFwmcg6XqY/kwtf/aWXVf216+BZQ3rL8w6GX evc0aEDnyZXOGNttPrZWkfWOLHprEEnLYPYPP4z9V8Fm3HLyazP7acrmCRJJNPLh45Lm zffqPntzAEsrTmysLEQWkb2Qi0i9ucqlxJK8NodQe3OEhYhzqjachfv03SeU4RHn8l1E zjpg== X-Gm-Message-State: ALoCoQkRBgXIqa3/SZ0DSUWTDDl6Ac0YUwnxopC3TCu5p2EpLSe2gCHcLxRJKCdTHYdU4dU3clGA X-Received: by 10.14.246.11 with SMTP id p11mr24256552eer.9.1376929566168; Mon, 19 Aug 2013 09:26:06 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id n48sm18457700eeg.17.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Aug 2013 09:26:05 -0700 (PDT) Message-ID: <52124719.5000104@semihalf.com> Date: Mon, 19 Aug 2013 18:26:01 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: "freebsd-arm@freebsd.org" Subject: Re: New pmap-v6.c features and improvements References: <519B6B1C.9060008@semihalf.com> <20130522184232.GA437@jail.io> <519E0D62.5030708@semihalf.com> <51CC4CC1.4020509@semihalf.com> <51D57456.9080504@semihalf.com> <51F68F58.8060600@semihalf.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: ray@freebsd.org, Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Aug 2013 16:26:14 -0000 On 01.08.2013 16:19, Zbigniew Bodek wrote: > 2013/7/29 Zbyszek Bodek > > > On 04.07.2013 19:34, Warner Losh wrote: > > > > On Jul 4, 2013, at 7:10 AM, Zbyszek Bodek wrote: > > > >> On 27.06.2013 16 :31, Zbyszek Bodek wrote: > >>> On 23.05.2013 14:36, Zbyszek Bodek wrote: > >>>> On 22.05.2013 20:42, Ruslan Bukin wrote: > >>>>> On Tue, May 21, 2013 at 02:39:56PM +0200, Zbyszek Bodek wrote: > >>>>>> Hello Everyone, > >>>>>> > >>>>>> I would like to introduce another pack of patches for > pmap-v6.c and > >>>>>> related, that we created as a part of Semihalf work on Superpages > >>>>>> support. > >>>>>> > >>>>>> The patches include some major changes like: > >>>>>> > >>>>>> - Switch to AP[1:0] access permissions model > >>>>>> - Transition of the mapping related flags to PTE (stop using > PVF_ flags > >>>>>> in pv_entry) > >>>>>> - Rework of the pmap_enter_locked() function > >>>>>> - pmap code optimizations > >>>>>> > >>>>>> And some minor clean-ups: > >>>>>> > >>>>>> - Get rid of the VERBOSE_INIT_ARM option > >>>>>> - Clean-ups, style and naming improvements to pmap > >>>>>> > >>>>>> Please check out the attachment for details. > >>>>>> > >>>>>> I will be happy to answer your questions and doubts if any. > >>>>>> > >>>>>> Best regards > >>>>>> Zbyszek Bodek > >>>>> > >>>>> I tested new patches with exynos5 and everything is OK. > >>>>> (I mean all works as usual) > >>>>> > >>>> > >>>> Hello. > >>>> > >>>> I'm happy to announce that code has been integrated to the > FreeBSD HEAD. > >>>> Great thanks your help! > >>>> > >>> > >>> Hello Everyone, > >>> > >>> We have two micro patches for pmap-v6.c containing fix for > 'modified' > >>> bit emulation and removal of the redundant PGA_WRITEABLE clearing. > >>> > >>> Please check out the attachment. > >>> > >>> These two are minimal changes and we would like to commit them > soon, so > >>> we would be grateful if you could test them on your ARMv6/v7 > platforms > >>> and give us your remarks. > >>> > >> > >> Hello, > >> > >> Because there were no objections, we've integrated the patches: > >> > >> http://svnweb.freebsd.org/base?view=revision&revision=252694 > >> http://svnweb.freebsd.org/base?view=revision&revision=252695 > > > Hello Everyone, > > I'm sending another set of fixes for pmap-v6.c > Please see attachment. > > 0012 - Removal of the costly, frequent sweeping through the > pv_entries whenever pmap_nuke_pv(), pmap_modify_pv(), etc. > are called. This also makes order with clearing PGA_WRITEABLE > aflag as well as with the pmap_statistics related to the > wired_count. > 0013 - Fix for pamp_set_prot() where not all of the protection bits were > cleared before the actual configuration. L2_XN is not icluded to > the L2_S_PROT mask to maintain consistency between PROT_MASKS for > L2 and L1 descriptors - contain only kernel/user and > read/write permissions bits. > 0014 - Fix for pmap_change_wiring() where "wired" indicator of type > boolean was being used as a "wired flag" passed to > pmap_modify_pv() which was obviously not a valid PVF_WIRED flag. > > Please test those patches on your ARM-based machines and send your > feedback. We will also appreciate your reviews and remarks. > > Thank you in advance for your help. > > > Hello, > > Are there any updates in this topic? > In addition, I'm attaching two more minor improvements, this time: > > 0015 - small clean-ups in pmap_clearbit() that in general gives one relevant > improvement which is to skip redundant "dirty" setting for a > page. > 0016 - removal of the unused pv_kva field from the md_page structure > > If there are no objections to that and earlier presented changes we > would like to > integrate them to the HEAD soon. > Hello, The earlier mentioned patches have been integrated to the FreeBSD HEAD. Please check out below: http://svnweb.freebsd.org/base?view=revision&revision=254531 http://svnweb.freebsd.org/base?view=revision&revision=254532 http://svnweb.freebsd.org/base?view=revision&revision=254533 http://svnweb.freebsd.org/base?view=revision&revision=254535 http://svnweb.freebsd.org/base?view=revision&revision=254536 Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Tue Aug 20 05:26:47 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 90D67799 for ; Tue, 20 Aug 2013 05:26:47 +0000 (UTC) (envelope-from tim@kientzle.com) Received: from monday.kientzle.com (99-115-135-74.uvs.sntcca.sbcglobal.net [99.115.135.74]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 709DA234C for ; Tue, 20 Aug 2013 05:26:46 +0000 (UTC) Received: (from root@localhost) by monday.kientzle.com (8.14.4/8.14.4) id r7K5QiOD070267; Tue, 20 Aug 2013 05:26:44 GMT (envelope-from tim@kientzle.com) Received: from [192.168.2.123] (CiscoE3000 [192.168.1.65]) by kientzle.com with SMTP id vwb4vupbj69ugmnm2upqg4pdd2; Tue, 20 Aug 2013 05:26:44 +0000 (UTC) (envelope-from tim@kientzle.com) Subject: Re: building document of Xorg Mime-Version: 1.0 (Apple Message framework v1283) Content-Type: text/plain; charset=us-ascii From: Tim Kientzle In-Reply-To: <20130819220401.11acd306a94e60a87d6424c9@gmail.com> Date: Mon, 19 Aug 2013 22:26:44 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> <20130818212508.beddbf0e04a2f5f9a3a699a1@gmail.com> <20130819220401.11acd306a94e60a87d6424c9@gmail.com> To: Chie Taguchi X-Mailer: Apple Mail (2.1283) Cc: Guillaume Bibaut , freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Aug 2013 05:26:47 -0000 Here's another way to fix libgcrypt on arm. This disables the GCC-specific assembly code. I've verified that this allows libgcrypt to build on FreeBSD/ARM with clang. I haven't done any tests so don't know whether this impacts libgcrypt performance or not: --- work/libgcrypt-1.5.3/mpi/longlong.h.orig 2013-07-25 = 09:10:04.000000000 +0000 +++ work/libgcrypt-1.5.3/mpi/longlong.h 2013-08-19 09:59:28.000000000 = +0000 @@ -184,7 +184,7 @@ /*************************************** ************** ARM ****************** ***************************************/ -#if defined (__arm__) && W_TYPE_SIZE =3D=3D 32 +#if defined (__arm__) && W_TYPE_SIZE =3D=3D 32 && !defined(__FreeBSD__) #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ __asm__ ("adds %1, %4, %5\n" = \ "adc %0, %2, %3" = \ On Aug 19, 2013, at 6:04 AM, Chie Taguchi wrote: > i add security/libgcrypt(ports/181365), graphics/libGL(ports/176705) = to repo. >=20 > and i also added document about security/libgcrypt(ports/181365), = graphics/dri(ports/176703), graphics/libGL(ports/176705). >=20 > regards. >=20 > C.Taguchi >=20 > On Sun, 18 Aug 2013 21:25:08 +0900 > Chie Taguchi wrote: >=20 >> thank you for your infomation. >>=20 >> it is useful for many people to make a collection repo of ports fix = infomation about Xorg and others. >>=20 >> i will push that fixes, security/libgcrypt(ports/181365), = graphics/dri(ports/176703), graphics/libGL(ports/176705) to repo later. >>=20 >> and i also sended PR x11-fonts/fontconfig issue(ports/181372). >>=20 >> but i have a question about ${ARCH} value in ports Makefile. "armv6" = or "arm" || "armv6", which is the better way?=20 >>=20 >> thanks, >>=20 >> C.Taguchi >>=20 >> On Sun, 18 Aug 2013 09:42:06 +0200 >> Guillaume Bibaut wrote: >>=20 >>> Very nice, at least that's what I was looking for. >>>=20 >>> There are still patches to apply on some other ports too : >>> - security/libgcrypt : to use GCC >>> - graphics/dri : = http://www.freebsd.org/cgi/query-pr.cgi?pr=3Dports/176703 >>> - graphics/libGL : the same as dri since it's based on MesaLib >>>=20 >>> I can't remember if I'm forgetting anything else, but if anyone = finds anything, they could add it here :) >>>=20 >>> Thanks. >>>=20 >>> -- >>> Guillaume Bibaut >>>=20 >>> Le 18 aout 2013 a 03:12, Chie Taguchi =20 >>>=20 >>>> Hi all, >>>>=20 >>>> i wrote a building document of x11/Xorg(not minimum) for = RaspberryPi. >>>> if you want to build Xorg, it will be useful for you! >>>> i hope so.:) >>>>=20 >>>> https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi >>>>=20 >>>> Thanks. >>>>=20 >>>> --=20 >>>> Chie Taguchi >>>> _______________________________________________ >>>> freebsd-arm@freebsd.org mailing list >>>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>>> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" >>>=20 >>=20 >>=20 >> --=20 >> Chie Taguchi >=20 >=20 > --=20 > Chie Taguchi > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" From owner-freebsd-arm@FreeBSD.ORG Tue Aug 20 08:21:29 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id A9FCFD35 for ; Tue, 20 Aug 2013 08:21:29 +0000 (UTC) (envelope-from andrew@fubar.geek.nz) Received: from nibbler.fubar.geek.nz (nibbler.fubar.geek.nz [199.48.134.198]) by mx1.freebsd.org (Postfix) with ESMTP id 904752BE5 for ; Tue, 20 Aug 2013 08:21:29 +0000 (UTC) Received: from bender.Home (97e5e46b.skybroadband.com [151.229.228.107]) by nibbler.fubar.geek.nz (Postfix) with ESMTPSA id BC4545DFF7 for ; Tue, 20 Aug 2013 08:15:34 +0000 (UTC) Date: Tue, 20 Aug 2013 09:15:27 +0100 From: Andrew Turner To: freebsd-arm@freebsd.org Subject: Reminder: Removal of WITHOUT_ARM_EABI Message-ID: <20130820091527.42127170@bender.Home> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Aug 2013 08:21:29 -0000 I am planning on removing WITHOUT_ARM_EABI before 10.0 is released. As this is planned on happening soon it this change is likely to happen within the next two weeks, after a short heads up. This is a reminder for people who have not yet moved to the ARM EABI to do so now as their build will break when this option is removed. Andrew From owner-freebsd-arm@FreeBSD.ORG Tue Aug 20 15:13:17 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 593614EF; Tue, 20 Aug 2013 15:13:17 +0000 (UTC) (envelope-from db@db.net) Received: from diana.db.net (unknown [IPv6:2620:64:0:1:223:7dff:fea2:c8f2]) by mx1.freebsd.org (Postfix) with ESMTP id 41D5826B2; Tue, 20 Aug 2013 15:13:17 +0000 (UTC) Received: from night.db.net (localhost [127.0.0.1]) by diana.db.net (Postfix) with ESMTP id CFA502AA443; Tue, 20 Aug 2013 09:13:14 -0600 (MDT) Received: by night.db.net (Postfix, from userid 1000) id 2D5C81CC20; Tue, 20 Aug 2013 10:13:02 -0500 (EST) Date: Tue, 20 Aug 2013 10:13:02 -0500 From: Diane Bruce To: Ganbold Tsagaankhuu Subject: Re: SSHD crash Message-ID: <20130820151302.GA98234@night.db.net> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: "freebsd-arm@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Aug 2013 15:13:17 -0000 On Tue, Jul 23, 2013 at 01:13:58PM +0800, Ganbold Tsagaankhuu wrote: > On Tue, Jul 23, 2013 at 12:48 PM, Tim Kientzle wrote: > > > Hope to find time to dig into this later this week, but am seeing > > a pretty consistent crash in sshd on BeagleBone Black with armv6: > > > > $ sshd -d > > ?. connect from another machine ... > > ?. usual connection messages, then ... > > debug1: Local version string SSH-2.0-OpenSSH_6.2 FreeBSD-20130515 > > debug1: permanently_set_uid: 22/22 [preauth] > > debug1: list_hostkey_types: ssh-rsa,ssh-dss,ecdsa-sha2-nistp256 [preauth] > > debug1: SSH2_MSG_KEXINIT sent [preauth] > > debug1: SSH2_MSG_KEXINIT received [preauth] > > : jemalloc_arena.c:380: Failed assertion: "p[i] == 0" > > > > If I'm not mistaken I've seen this recently on mips board(Routerstation > Pro) too. > > Ganbold I've continued to poke at this. My suspicion is this commit. http://svnweb.freebsd.org/base?view=revision&revision=250991 The failing gdb is using jemalloc, the older revisions are using our older malloc code. I can confirm this using gdb. I note that sshd does not fail with ElectricFence malloc as well. I've suggested the possibility that it is a weird locking error. Tim and Ian also suggest memory layout problem but I think that's now less likely. Ian reports arm6 locking is much simpler than arm4 Ian also reports sshd works fine with arm4 board he has. If it is also confirmed there is a problem on mips, I'd sure love to hear about it. >From IRC it works fine with my pandaboard, with a world from 07/31 I've only tried rpi, bbw, and dreamplug db_: I noticed only once or so in routerstation pro, then didn't +pay much attention to it > > > > > > This is with SVN r253514 > > > > Completely standard build except for the vm_map.c patch. > > > > Tim > > > > - Diane -- - db@FreeBSD.org db@db.net http://www.db.net/~db From owner-freebsd-arm@FreeBSD.ORG Tue Aug 20 20:21:03 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id ADA75B7B for ; Tue, 20 Aug 2013 20:21:03 +0000 (UTC) (envelope-from mailinglists@martinlaabs.de) Received: from relay03.alfahosting-server.de (relay03.alfahosting-server.de [109.237.142.239]) by mx1.freebsd.org (Postfix) with ESMTP id 6BAAA29EA for ; Tue, 20 Aug 2013 20:21:03 +0000 (UTC) Received: by relay03.alfahosting-server.de (Postfix, from userid 1001) id 41A4532CD80E; Tue, 20 Aug 2013 22:10:05 +0200 (CEST) X-Spam-DCC: : X-Spam-Level: X-Spam-Status: No, score=0.0 required=7.0 tests=BAYES_50 autolearn=disabled version=3.2.5 Received: from alfa3018.alfahosting-server.de (alfa3018.alfahosting-server.de [109.237.140.30]) by relay03.alfahosting-server.de (Postfix) with ESMTPS id 85F5932CD80D for ; Tue, 20 Aug 2013 22:10:03 +0200 (CEST) Received: from [192.168.1.55] (p54B30782.dip0.t-ipconnect.de [84.179.7.130]) by alfa3018.alfahosting-server.de (Postfix) with ESMTPSA id 541D2515D2CF for ; Tue, 20 Aug 2013 22:10:03 +0200 (CEST) Message-ID: <5213CD1A.7000506@martinlaabs.de> Date: Tue, 20 Aug 2013 22:10:02 +0200 From: Martin Laabs User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130809 Thunderbird/17.0.8 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: Debug stalling Raspberry Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Virus-Status: No X-Virus-Checker-Version: clamassassin 1.2.4 with ClamAV 0.97.3/17707/Tue Aug 20 18:51:12 2013 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Aug 2013 20:21:03 -0000 Hi, currently I run r254441 on a raspberry pi b and every time I run portsnap the cpu stopps running. This happens during the snapshot verify while around 25k files are gunziped and sha256ed (file after file of cause). I can reproduce this but the Pi does not hang reproducible at the same file but the last processed file is different from try to try. There is, at least at the video console, no kernel panic. The kernel itself still responds to icmp ping packages and echos the keyboard output. But everything else does not work. (I know this behavior from disconnected harddisks containing the kernel/system) The current consumption also dropps around 100mA. It is very interesting that this behavior is not limited to the internal MMC card but also occurs when the data is stored external on an usb stick. My question is how to debug this bug since I have no idea where to start. >From my experience with bare metal arm systems I would start connecting a jtag debugger but I am afraid getting all the symbols mapped correct to the gdb. And even if this works - what should I monitor and what should I test for? There might be however a more simple solution. So any suggestion is welcome. If you can reproduce this bug I also would be very happy. Best regards, Martin Laabs From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 04:00:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id F1F701BD for ; Wed, 21 Aug 2013 04:00:04 +0000 (UTC) (envelope-from tim@kientzle.com) Received: from monday.kientzle.com (99-115-135-74.uvs.sntcca.sbcglobal.net [99.115.135.74]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id B6F60219E for ; Wed, 21 Aug 2013 04:00:04 +0000 (UTC) Received: (from root@localhost) by monday.kientzle.com (8.14.4/8.14.4) id r7L3xuKk077565; Wed, 21 Aug 2013 03:59:56 GMT (envelope-from tim@kientzle.com) Received: from [192.168.2.123] (CiscoE3000 [192.168.1.65]) by kientzle.com with SMTP id 8h7gn6b7wtzeaibkqz4hifbpui; Wed, 21 Aug 2013 03:59:56 +0000 (UTC) (envelope-from tim@kientzle.com) Subject: Re: Debug stalling Raspberry Mime-Version: 1.0 (Apple Message framework v1283) Content-Type: text/plain; charset=windows-1252 From: Tim Kientzle In-Reply-To: <5213CD1A.7000506@martinlaabs.de> Date: Tue, 20 Aug 2013 20:59:55 -0700 Content-Transfer-Encoding: quoted-printable Message-Id: References: <5213CD1A.7000506@martinlaabs.de> To: Martin Laabs X-Mailer: Apple Mail (2.1283) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 04:00:05 -0000 On Aug 20, 2013, at 1:10 PM, Martin Laabs wrote: > Hi, >=20 > currently I run r254441 on a raspberry pi b and every time I run = portsnap > the cpu stopps running. I'm seeing similar stalls on BBB during "buildworld" and "installworld". Often, pressing a key on the keyboard seems to get things going again. Hmmmmm=85=85 Tim From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 06:16:30 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 495B8C7B for ; Wed, 21 Aug 2013 06:16:30 +0000 (UTC) (envelope-from f0andrey@gmail.com) Received: from mail-wi0-x230.google.com (mail-wi0-x230.google.com [IPv6:2a00:1450:400c:c05::230]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D5CD4293B for ; Wed, 21 Aug 2013 06:16:29 +0000 (UTC) Received: by mail-wi0-f176.google.com with SMTP id l12so286710wiv.9 for ; Tue, 20 Aug 2013 23:16:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=VTYvao9mXCKx8VVQrt7fF+JDb/NhGblrJFB6/D9iUC4=; b=BVtVXFioCbSVkMeMT0fhhAyaPZLnkano5MecfI+375ovgkRhfI9gsVB2Sg20dGhBW5 GfyGVLcW0jomu9maL70QDSd2EPZWmcm7GfHD/yq7skemBhy0Cd7KVP7YvLwbUTj5sn4p 6ZrZPbGiI8QF3j5EmRU+i2mbl3MC28/RQ0ay3GpO4CuDw8I7+K5N87HAqb5JBJy4Ua/V xBYjm+IK7v2nNpQ6lps794GiGxlgAFfDma8wR3pCQcxMEGf7ZmFjuOiu5hRpWF0I0xdD uZIMzSwx3tvzcQYgy3DoZDSKyWN7ThayPTBRPMv3vd/7vPkhyZzElkGc2xZEaIc/5u+l pH5w== MIME-Version: 1.0 X-Received: by 10.194.173.163 with SMTP id bl3mr4481122wjc.10.1377065788114; Tue, 20 Aug 2013 23:16:28 -0700 (PDT) Received: by 10.194.57.52 with HTTP; Tue, 20 Aug 2013 23:16:28 -0700 (PDT) In-Reply-To: <5213CD1A.7000506@martinlaabs.de> References: <5213CD1A.7000506@martinlaabs.de> Date: Wed, 21 Aug 2013 10:16:28 +0400 Message-ID: Subject: Re: Debug stalling Raspberry From: Andrey Fesenko To: Martin Laabs Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: "freebsd-arm@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 06:16:30 -0000 On Wed, Aug 21, 2013 at 12:10 AM, Martin Laabs wrote: > Hi, > > currently I run r254441 on a raspberry pi b and every time I run portsnap > the cpu stopps running. > This happens during the snapshot verify while around 25k files are gunzip= ed > and sha256ed (file after file of cause). I can reproduce this but the Pi > does not hang reproducible at the same file but the last processed file i= s > different from try to try. > > There is, at least at the video console, no kernel panic. The kernel itse= lf > still responds to icmp ping packages and echos the keyboard output. But > everything else does not work. (I know this behavior from disconnected > harddisks containing the kernel/system) > The current consumption also dropps around 100mA. > > It is very interesting that this behavior is not limited to the internal > MMC card but also occurs when the data is stored external on an usb stick= . > > My question is how to debug this bug since I have no idea where to start. > >From my experience with bare metal arm systems I would start connecting = a > jtag debugger but I am afraid getting all the symbols mapped correct to t= he > gdb. And even if this works - what should I monitor and what should I tes= t for? > There might be however a more simple solution. So any suggestion is welco= me. > > If you can reproduce this bug I also would be very happy. > it seems this is still not the solution http://lists.freebsd.org/pipermail/freebsd-arm/2013-August/006209.html "crash/freez random time after ~r253751" Nice test, buildkernel crash stable after -------------------------------------------------------------- >>> stage 3.1: making dependencies -------------------------------------------------------------- cd /usr/obj/usr/src/sys/RPI-B; MAKEOBJDIRPREFIX=3D/usr/obj MACHINE_ARCH=3Darmv6 MACHINE=3Darm CPUTYPE=3D GROFF_BIN_PATH=3D/usr/obj/usr/src/tmp/legacy/usr/bin GROFF_FONT_PATH=3D/usr/obj/usr/src/tmp/legacy/usr/share/groff_font GROFF_TMAC_PATH=3D/usr/obj/usr/src/tmp/legacy/usr/share/tmac _SHLIBDIRPREFIX=3D/usr/obj/usr/src/tmp _LDSCRIPTROOT=3D VERSION=3D"FreeBS= D 10.0-CURRENT armv6 1000044" INSTALL=3D"sh /usr/src/tools/install.sh" PATH=3D/usr/obj/usr/src/tmp/legacy/usr/sbin:/usr/obj/usr/src/tmp/legacy/usr= /bin:/usr/obj/usr/src/tmp/legacy/usr/games:/usr/obj/usr/src/tmp/legacy/bin:= /usr/obj/usr/src/tmp/usr/sbin:/usr/obj/usr/src/tmp/usr/bin:/usr/obj/usr/src= /tmp/usr/games:/sbin:/bin:/usr/sbin:/usr/bin CC=3D"cc " CXX=3D"c++ " CPP=3D"cpp " AS=3D"as" AR=3D"ar" LD=3D"ld" NM=3Dn= m OBJDUMP=3D RANLIB=3Dranlib STRINGS=3D COMPILER_TYPE=3Dclang make -m /usr/src/share/mk KERNEL=3Dkernel depend -DNO_MODULES_OBJ machine -> /usr/src/sys/arm/include cc -c -O -pipe -std=3Dc99 -g -Wall -Wredundant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -fformat-extensions -Wmissing-include-dirs -fdiagnostics-show-option -Wno-error-tautological-compare -Wno-error-empty-body -Wno-error-parentheses-equality -nostdinc -I. -I/usr/src/sys -I/usr/src/sys/contrib/altq -I/usr/src/sys/contrib/ipfilter -I/usr/src/sys/dev/ath -I/usr/src/sys/dev/ath/ath_hal -I/usr/src/sys/contrib/dev/ath/ath_hal -I/usr/src/sys/contrib/ngatm -I/usr/src/sys/dev/twa -I/usr/src/sys/dev/cxgb -I/usr/src/sys/dev/cxgbe -I/usr/src/sys/contrib/libfdt -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h -funwind-tables -mllvm -arm-enable-ehabi -ffreestanding /usr/src/sys/arm/arm/genassym.c NM=3D'nm' sh /usr/src/sys/kern/genassym.sh genassym.o > assym.s awk -f /usr/src/sys/tools/vnode_if.awk /usr/src/sys/kern/vnode_if.src -p awk -f /usr/src/sys/tools/vnode_if.awk /usr/src/sys/kern/vnode_if.src -q awk -f /usr/src/sys/tools/vnode_if.awk /usr/src/sys/kern/vnode_if.src -h if [ -f /usr/src/sys/boot/fdt/dts/rpi.dts ]; then dtc -O dtb -o rpi.dtb -b 0 -p 1024 /usr/src/sys/boot/fdt/dts/rpi.dts; fi awk -f /usr/src/sys/tools/miidevs2h.awk /usr/src/sys/dev/mii/miidevs awk -f /usr/src/sys/tools/pccarddevs2h.awk /usr/src/sys/dev/pccard/pccardde= vs From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 07:48:55 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 84FDF950 for ; Wed, 21 Aug 2013 07:48:55 +0000 (UTC) (envelope-from johan@netsense.nl) Received: from mail.netsense.nl (pretsense.xs4all.nl [82.161.36.79]) by mx1.freebsd.org (Postfix) with ESMTP id 9A31020BE for ; Wed, 21 Aug 2013 07:48:53 +0000 (UTC) Received: (qmail 96982 invoked from network); 21 Aug 2013 09:48:44 +0200 Received: from unknown (HELO ?172.16.79.148?) (johan@172.16.79.148) by mail.netsense.nl with AES128-SHA encrypted SMTP; 21 Aug 2013 09:48:44 +0200 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: Debug stalling Raspberry From: Johan Henselmans In-Reply-To: <5213CD1A.7000506@martinlaabs.de> Date: Wed, 21 Aug 2013 09:48:46 +0200 Content-Transfer-Encoding: quoted-printable Message-Id: <81E82602-C147-429A-96BB-7DD7B7AAA38E@netsense.nl> References: <5213CD1A.7000506@martinlaabs.de> To: Martin Laabs X-Mailer: Apple Mail (2.1508) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 07:48:55 -0000 On 20 aug. 2013, at 22:10, Martin Laabs = wrote: > Hi, >=20 > currently I run r254441 on a raspberry pi b and every time I run = portsnap > the cpu stopps running. > This happens during the snapshot verify while around 25k files are = gunziped > and sha256ed (file after file of cause). I can reproduce this but the = Pi > does not hang reproducible at the same file but the last processed = file is > different from try to try. I have exactly the same experience on BBB, also with portsnap. The only = way I could get portsnap to finish is by locating /var/db/portsnap on = NFS.=20 I am still testing what is causing it. I have used class 4 and class 10 = cards, both freeze. =20 I have the serial console connected to screen, and nothing is displayed = during the freeze.=20 I do have an error about the keyboard during startup, as Tim mention = that pressing the keyboard would continue the BBB. I have not tested = that, as I do not see a console on my HDMI monitor on the BBB.=20 (r254571) =3D=3D=3D=3D=3D=3D=3D=3D=3D link_elf: symbol genkbd_get_fkeystr undefined link_elf: symbol genkbd_get_fkeystr undefined aintc0: Spurious interrupt detected (0xffffffff) =3D=3D=3D=3D=3D=3D=3D=3D=3D Another message I got while starting up: =3D=3D=3D=3D=3D=3D=3D=3D=3D lock order reversal: 1st 0xc09aa0bc pmap (pmap) @ /usr/src/sys/arm/arm/pmap-v6.c:2967 2nd 0xc07c5fc0 kmem vm object (kmem vm object) @ = /usr/src/sys/vm/vm_kern.c:344 KDB: stack backtrace: db_trace_self() at db_trace_self pc =3D 0xc05293f8 lr =3D 0xc022db88 = (db_trace_self_wrapper+0x30) sp =3D 0xc2ab4930 fp =3D 0xc2ab4a48 r10 =3D 0xc09aa0bc db_trace_self_wrapper() at db_trace_self_wrapper+0x30 pc =3D 0xc022db88 lr =3D 0xc038d150 (kdb_backtrace+0x38) sp =3D 0xc2ab4a50 fp =3D 0xc2ab4a58 r4 =3D 0xc065ed14 r5 =3D 0xc05a6f1c r6 =3D 0xc058a3b3 r7 =3D 0xc05abd59 kdb_backtrace() at kdb_backtrace+0x38 pc =3D 0xc038d150 lr =3D 0xc03a72c0 (witness_checkorder+0xddc) sp =3D 0xc2ab4a60 fp =3D 0xc2ab4ab0 r4 =3D 0xc05a7fd4 witness_checkorder() at witness_checkorder+0xddc pc =3D 0xc03a72c0 lr =3D 0xc0355768 (_rw_wlock_cookie+0x7c) sp =3D 0xc2ab4ab8 fp =3D 0xc2ab4ae0 r4 =3D 0x00000158 r5 =3D 0xc05a6f19 r6 =3D 0xc07c5fd0 r7 =3D 0xc07c5fc0 r8 =3D 0xc07c5fc0 r9 =3D 0x00000101 r10 =3D 0x00000000 _rw_wlock_cookie() at _rw_wlock_cookie+0x7c pc =3D 0xc0355768 lr =3D 0xc0504794 (kmem_back+0x68) sp =3D 0xc2ab4ae8 fp =3D 0xc2ab4b28 r4 =3D 0xc07c5fc0 r5 =3D 0x00001000 r6 =3D 0x00000000 r7 =3D 0xc07c5fc0 r8 =3D 0x00000101 kmem_back() at kmem_back+0x68 pc =3D 0xc0504794 lr =3D 0xc05046f0 (kmem_malloc+0x6c) sp =3D 0xc2ab4b30 fp =3D 0xc2ab4b48 r4 =3D 0xc0661780 r5 =3D 0x00001000 r6 =3D 0x00000000 r7 =3D 0x00000101 r8 =3D 0xc04fd5e0 r9 =3D 0x00000101 r10 =3D 0x00000000 kmem_malloc() at kmem_malloc+0x6c pc =3D 0xc05046f0 lr =3D 0xc04fd600 (page_alloc+0x20) sp =3D 0xc2ab4b50 fp =3D 0xc2ab4b50 r4 =3D 0xc09d3cc0 r5 =3D 0x00000001 r6 =3D 0x00000000 r7 =3D 0xc09d3cd0 page_alloc() at page_alloc+0x20 pc =3D 0xc04fd600 lr =3D 0xc04fd094 (keg_alloc_slab+0xb4) sp =3D 0xc2ab4b58 fp =3D 0xc2ab4b80 keg_alloc_slab() at keg_alloc_slab+0xb4 pc =3D 0xc04fd094 lr =3D 0xc04fdcd0 (keg_fetch_slab+0x148) sp =3D 0xc2ab4b88 fp =3D 0xc2ab4bc0 r4 =3D 0xc09d3cc0 r5 =3D 0xc09ce408 r6 =3D 0x00000001 r7 =3D 0xc09ce360 r8 =3D 0x00000000 r9 =3D 0xc09ce3f8 r10 =3D 0x00000000 keg_fetch_slab() at keg_fetch_slab+0x148 pc =3D 0xc04fdcd0 lr =3D 0xc04fe0c4 (zone_fetch_slab+0x64) sp =3D 0xc2ab4bc8 fp =3D 0xc2ab4be0 r4 =3D 0x00000001 r5 =3D 0xc09ce360 r6 =3D 0xc09d3cc0 r7 =3D 0xc09d3cc0 r8 =3D 0x00000001 r9 =3D 0xc2ff4fa8 r10 =3D 0x00000002 zone_fetch_slab() at zone_fetch_slab+0x64 pc =3D 0xc04fe0c4 lr =3D 0xc04fe150 (zone_import+0x4c) sp =3D 0xc2ab4be8 fp =3D 0xc2ab4c28 r4 =3D 0xc2ff4fac r5 =3D 0xc05a621a r6 =3D 0x00000001 r7 =3D 0xc09d3cc0 r8 =3D 0x00000000 zone_import() at zone_import+0x4c pc =3D 0xc04fe150 lr =3D 0xc04fbdc0 (uhub2: 4 ports with 4 = removable, self powered uma_zalloc_arg+0x2a0) sp =3D 0xc2ab4c30 fp =3D 0xc2ab4c70 r4 =3D 0x00000001 r5 =3D 0xc05a621a r6 =3D 0xc09b0e0c r7 =3D 0xc04fe104 r8 =3D 0xc09ce360 r9 =3D 0xc09ce418 r10 =3D 0xc09b0e00 uma_zalloc_arg() at uma_zalloc_arg+0x2a0 pc =3D 0xc04fbdc0 lr =3D 0xc053349c = (pmap_alloc_l2_bucket+0x1b4) sp =3D 0xc2ab4c78 fp =3D 0xc2ab4ca0 r4 =3D 0xc05abd56 r5 =3D 0xc09999f8 r6 =3D 0xc09999f4 r7 =3D 0xc07c0de8 r8 =3D 0xc05abd56 r9 =3D 0xc09abaac r10 =3D 0xc09abb38 pmap_alloc_l2_bucket() at pmap_alloc_l2_bucket+0x1b4 pc =3D 0xc053349c lr =3D 0xc0533158 (pmap_copy+0x158) sp =3D 0xc2ab4ca8 fp =3D 0xc2ab4ce0 r4 =3D 0xc09aba9c r5 =3D 0x20049000 r6 =3D 0xc05abd56 r7 =3D 0x2002e000 r8 =3D 0x0001b000 r9 =3D 0xc09964b8 r10 =3D 0x0001b000 pmap_copy() at pmap_copy+0x158 pc =3D 0xc0533158 lr =3D 0xc050a660 (vmspace_fork+0x790) sp =3D 0xc2ab4ce8 fp =3D 0xc2ab4d20 r4 =3D 0xc09aa000 r5 =3D 0x00000000 r6 =3D 0x2002e000 r7 =3D 0xc099c500 r8 =3D 0xc09ab9e0 r9 =3D 0xc099df50 r10 =3D 0x0001b000 vmspace_fork() at vmspace_fork+0x790 pc =3D 0xc050a660 lr =3D 0xc0327004 (fork1+0x1a4) sp =3D 0xc2ab4d28 fp =3D 0xc2ab4d98 r4 =3D 0xc2ffc960 r5 =3D 0x00000000 r6 =3D 0xc2fc5000 r7 =3D 0x0000000c r8 =3D 0xc2fc5320 r9 =3D 0xc2ffcc80 r10 =3D 0xc2ab4dac fork1() at fork1+0x1a4 pc =3D 0xc0327004 lr =3D 0xc0326e40 (sys_fork+0x24) sp =3D 0xc2ab4da0 fp =3D 0xc2ab4db8 r4 =3D 0xc2ffcc80 r5 =3D 0x00000000 r6 =3D 0x00000000 r7 =3D 0x00000000 r8 =3D 0xc2ab4e10 r9 =3D 0xc2fc5320 r10 =3D 0x00000000 sys_fork() at sys_fork+0x24 pc =3D 0xc0326e40 lr =3D 0xc0538ee4 (swi_handler+0x284) sp =3D 0xc2ab4dc0 fp =3D 0xc2ab4e58 r4 =3D 0xc2ffcc80 r5 =3D 0x00000000 swi_handler() at swi_handler+0x284 pc =3D 0xc0538ee4 lr =3D 0xc052aa54 (swi_entry+0x2c) sp =3D 0xc2ab4e60 fp =3D 0xbfffec18 r4 =3D 0x00030998 r5 =3D 0x2080d020 r6 =3D 0x00000000 r7 =3D 0x00000002 r8 =3D 0x00000003 r9 =3D 0x2080d020 swi_entry() at swi_entry+0x2c pc =3D 0xc052aa54 lr =3D 0xc052aa54 (swi_entry+0x2c) sp =3D 0xc2ab4e60 fp =3D 0xbfffec18 Unable to unwind further =3D=3D=3D=3D=3D=3D=3D=3D=3D >=20 > There is, at least at the video console, no kernel panic. The kernel = itself > still responds to icmp ping packages and echos the keyboard output. = But > everything else does not work. (I know this behavior from disconnected > harddisks containing the kernel/system) > The current consumption also dropps around 100mA. >=20 > It is very interesting that this behavior is not limited to the = internal > MMC card but also occurs when the data is stored external on an usb = stick. >=20 > My question is how to debug this bug since I have no idea where to = start. >> =46rom my experience with bare metal arm systems I would start = connecting a > jtag debugger but I am afraid getting all the symbols mapped correct = to the > gdb. And even if this works - what should I monitor and what should I = test for? > There might be however a more simple solution. So any suggestion is = welcome. >=20 > If you can reproduce this bug I also would be very happy. >=20 > Best regards, > Martin Laabs >=20 > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" Johan Henselmans johan@netsense.nl From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 09:58:53 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 1564B48B; Wed, 21 Aug 2013 09:58:53 +0000 (UTC) (envelope-from kibab@olymp.kibab.com) Received: from olymp.kibab.com (olymp6.kibab.com [IPv6:2a01:4f8:160:84c1::2]) by mx1.freebsd.org (Postfix) with ESMTP id EE1972C62; Wed, 21 Aug 2013 09:58:51 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com E38F33F448 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1377079129; bh=H7Xi6qPlIQ7qGA9XKUJz6RiiZWltytYJdpApvl5llnc=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=pUNq765mn4fa+lLYKjTHWyMVbjz4jNcRDyC8Qym1MYKXb9pWKL78dmEY65otNMiP7 KHbiy3pWDULJQp5VA+4WuW77HEwHAg37tr5Kf9HyfTor38Zv4/PLe+jgs/bbnPwrlg 7e2nKNk/KlvIWbJfZIYK0wpKZsuXBlfNAGfpfcVk= Date: Wed, 21 Aug 2013 11:58:49 +0200 From: Ilya Bakulin To: Warner Losh , Alexander Motin , Adrian Chadd Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Message-ID: <20130821095849.GA7322@olymp.kibab.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <51D5FE4C.9060102@bakulin.de> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 09:58:53 -0000 So, after fixing some bugs in my own code and adding a couple of bus methods I am finally able to load the firmware onto the card and receive "Firmare started" message. Next step will be adding support for setting IRQ handlers (SDIO stack) and writing the code to connect mv_sdiowl driver to our net80211 stack (Adrian I hope you will help with this). As SD8787 adapter uses the binary firmware, I had to import it in the tree. As I'm doing all testing without any root FS, I compile the formware blob into the kernel. The patch below is therefore incomplete; full snapshot is kept under [1]. To activate mv_sdiowl driver, add mmc, mv_sdio, mv_sdiowl and mv_sdiowl_fw to the kernel config. [1] https://github.com/kibab/freebsd/compare/master...kibab-dplug#files_bucket I will keep you all updated. -- Ilya diff --git a/sys/arm/mv/files.mv b/sys/arm/mv/files.mv index 116356d..489ac00 100644 --- a/sys/arm/mv/files.mv +++ b/sys/arm/mv/files.mv @@ -32,6 +32,8 @@ arm/mv/mv_sata.c optional ata | atamvsata arm/mv/mv_ts.c standard arm/mv/timer.c standard arm/mv/twsi.c optional iicbus +arm/mv/mv_sdio.c optional mv_sdio +arm/mv/mv_sdiowl.c optional mv_sdiowl dev/cesa/cesa.c optional cesa dev/mge/if_mge.c optional mge @@ -41,3 +43,23 @@ dev/uart/uart_dev_ns8250.c optional uart dev/usb/controller/ehci_mv.c optional ehci kern/kern_clocksource.c standard + +mv_sdiowl_fw.c optional mv_sdiowl_fw \ + compile-with "${AWK} -f $S/tools/fw_stub.awk sd8787_uapsta.bin:sdiowl_fw -msdiowl_fw -c${.TARGET}" \ + no-implicit-rule before-depend local \ + clean "mv_sdiowl_fw.c" +# +# NB: ld encodes the path in the binary symbols generated for the +# firmware image so link the file to the object directory to +# get known values for reference in the _fw.c file. +# +sd8787_uapsta.fwo optional mv_sdiowl_fw \ + dependency "sd8787_uapsta.bin" \ + compile-with "${LD} -b binary -d -warn-common -r -d -o ${.TARGET} sd8787_uapsta.bin" \ + no-implicit-rule \ + clean "sd8787_uapsta.fwo" +sd8787_uapsta.bin optional mv_sdiowl_fw \ + dependency "$S/contrib/dev/mv_sdiowl/sd8787_uapsta.bin.uu" \ + compile-with "uudecode < $S/contrib/dev/mv_sdiowl/sd8787_uapsta.bin.uu" \ + no-obj no-implicit-rule \ + clean "sd8787_uapsta.bin" diff --git a/sys/arm/mv/mv_sdio.c b/sys/arm/mv/mv_sdio.c new file mode 100644 index 0000000..b1c9edc --- /dev/null +++ b/sys/arm/mv/mv_sdio.c @@ -0,0 +1,1684 @@ +/*- + * Copyright (c) 2009 Semihalf, Rafal Czubak + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Driver for Marvell Integrated SDIO Host Controller. + * Works stable in DMA mode. PIO mode has problems with large data transfers + * (timeouts). + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include "mmcbr_if.h" + +#include "mv_sdio.h" + +/* Minimum DMA segment size. */ +#define MV_SDIO_DMA_SEGMENT_SIZE 4096 + +/* Transferred block size. */ +#define MV_SDIO_BLOCK_SIZE 512 + +/* Maximum number of blocks the controller can handle. */ +#define MV_SDIO_BLOCKS_MAX 65535 + +/* Halfword bit masks used for command response extraction. */ +#define MV_SDIO_RSP48_BM2 0x0003 /* Lower 2 bits. */ +#define MV_SDIO_RSP48_BM6 0x003f /* Lower 6 bits. */ +#define MV_SDIO_RSP48_BM16 0xffff /* 16 bits */ + +/* SDIO aggregated command interrupts */ +#define MV_SDIO_IRQS_CMD (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_UNEXPECTED_RSP) +#define MV_SDIO_EIRQS_CMD (MV_SDIO_EIRQ_CMD_TMO | MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_CMD_STARTBIT | MV_SDIO_EIRQ_RSP_TBIT) + +/* SDIO aggregated data interrupts */ +#define MV_SDIO_IRQS_DATA (MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_TX_EMPTY | \ + MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_AUTOCMD12) +#define MV_SDIO_EIRQS_DATA (MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | MV_SDIO_EIRQ_XFER_SIZE | \ + MV_SDIO_EIRQ_CRC_ENDBIT | MV_SDIO_EIRQ_CRC_STARTBIT | \ + MV_SDIO_EIRQ_CRC_STAT) + +/* + * Timing configuration. + */ + +/* SDIO controller base clock frequency. */ +#define MV_SDIO_F_BASE 100000000 /* 200 MHz */ + +/* Maximum SD clock frequency. */ +#define MV_SDIO_F_MAX (MV_SDIO_F_BASE / 2) /* 50 MHz */ + +/* Maximum timeout value. */ +#define MV_SDIO_TMO_MAX 0xf + +/* Reset delay in microseconds. */ +#define MV_SDIO_RESET_DELAY 10000 /* 10 ms */ + +/* Empty FIFO polling delay. */ +#define MV_SDIO_FIFO_EMPTY_DELAY 1000 /* 1 ms */ + +/* Delays between operations on multiple blocks. */ +#define MV_SDIO_RD_DELAY 50 /*50*/ /* Read access time. */ +#define MV_SDIO_WR_DELAY 10 /*10*/ /* Write access time. */ + +/* Maximum clock divider value. */ +#define MV_SDIO_CLK_DIV_MAX 0x7ff + +struct mv_sdio_softc { + device_t sc_dev; + device_t sc_child; + + bus_space_handle_t sc_bsh; + bus_space_tag_t sc_bst; + + int sc_use_dma; + bus_dma_tag_t sc_dmatag; + bus_dmamap_t sc_dmamap; + uint8_t *sc_dmamem; + bus_addr_t sc_physaddr; + int sc_mapped; + size_t sc_dma_size; + + struct resource *sc_mem_res; + int sc_mem_rid; + + struct resource *sc_irq_res; + int sc_irq_rid; + void *sc_ihl; + + struct resource *sc_cd_irq_res; + int sc_cd_irq_rid; + void *sc_cd_ihl; + + uint32_t sc_irq_mask; + uint32_t sc_eirq_mask; + + struct task sc_card_task; + struct callout sc_card_callout; + + struct mtx sc_mtx; + + int sc_bus_busy; + int sc_card_present; + struct mmc_host sc_host; + struct mmc_request *sc_req; + struct mmc_command *sc_curcmd; + + uint32_t sc_data_offset; +}; + +/* Read/write data from/to registers.*/ +static uint32_t MV_SDIO_RD4(struct mv_sdio_softc *, bus_size_t); +static void MV_SDIO_WR4(struct mv_sdio_softc *, bus_size_t, uint32_t); + +static int mv_sdio_probe(device_t); +static int mv_sdio_attach(device_t); + +static int mv_sdio_read_ivar(device_t, device_t, int, uintptr_t *); +static int mv_sdio_write_ivar(device_t, device_t, int, uintptr_t); + +static int mv_sdio_update_ios(device_t, device_t); +static int mv_sdio_request(device_t, device_t, struct mmc_request *); +static int mv_sdio_get_ro(device_t, device_t); +static int mv_sdio_acquire_host(device_t, device_t); +static int mv_sdio_release_host(device_t, device_t); + +/* Finalizes active MMC request. */ +static void mv_sdio_finalize_request(struct mv_sdio_softc *); + +/* Initializes controller's registers. */ +static void mv_sdio_init(device_t); + +/* Initializes host structure. */ +static void mv_sdio_init_host(struct mv_sdio_softc *); + +/* Used to add and handle sysctls. */ +static void mv_sdio_add_sysctls(struct mv_sdio_softc *); +static int mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS); + +/* DMA initialization and cleanup functions. */ +static int mv_sdio_dma_init(struct mv_sdio_softc *); +static void mv_sdio_dma_finish(struct mv_sdio_softc *); + +/* DMA map load callback. */ +static void mv_sdio_getaddr(void *, bus_dma_segment_t *, int, int); + +/* Prepare command/data before transaction. */ +static int mv_sdio_start_command(struct mv_sdio_softc *, struct + mmc_command *); +static int mv_sdio_start_data(struct mv_sdio_softc *, struct mmc_data *); + +/* Finish command after transaction. */ +static void mv_sdio_finish_command(struct mv_sdio_softc *); + +/* Response handling. */ +static void mv_sdio_handle_136bit_resp(struct mv_sdio_softc *); +static void mv_sdio_handle_48bit_resp(struct mv_sdio_softc *, + struct mmc_command *); + +/* Interrupt handler and interrupt helper functions. */ +static void mv_sdio_intr(void *); +static void mv_sdio_cmd_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_data_intr(struct mv_sdio_softc *, uint32_t, uint32_t); +static void mv_sdio_disable_intr(struct mv_sdio_softc *); + +/* Used after card detect interrupt has been handled. */ +static void mv_sdio_card_task(void *, int); + +/* Read/write data from FIFO in PIO mode. */ +static uint32_t mv_sdio_read_fifo(struct mv_sdio_softc *); +static void mv_sdio_write_fifo(struct mv_sdio_softc *, uint32_t); + +/* + * PIO mode handling. + * + * Inspired by sdhci(4) driver routines. + */ +static void mv_sdio_transfer_pio(struct mv_sdio_softc *); +static void mv_sdio_read_block_pio(struct mv_sdio_softc *); +static void mv_sdio_write_block_pio(struct mv_sdio_softc *); + + +static device_method_t mv_sdio_methods[] = { + /* device_if */ + DEVMETHOD(device_probe, mv_sdio_probe), + DEVMETHOD(device_attach, mv_sdio_attach), + + /* Bus interface */ + DEVMETHOD(bus_read_ivar, mv_sdio_read_ivar), + DEVMETHOD(bus_write_ivar, mv_sdio_write_ivar), + + /* mmcbr_if */ + DEVMETHOD(mmcbr_update_ios, mv_sdio_update_ios), + DEVMETHOD(mmcbr_request, mv_sdio_request), + DEVMETHOD(mmcbr_get_ro, mv_sdio_get_ro), + DEVMETHOD(mmcbr_acquire_host, mv_sdio_acquire_host), + DEVMETHOD(mmcbr_release_host, mv_sdio_release_host), + + {0, 0}, +}; + +static driver_t mv_sdio_driver = { + "sdio", + mv_sdio_methods, + sizeof(struct mv_sdio_softc), +}; +static devclass_t mv_sdio_devclass; + +DRIVER_MODULE( sdio, simplebus, mv_sdio_driver, mv_sdio_devclass, 0, 0); + + +static __inline uint32_t +MV_SDIO_RD4(struct mv_sdio_softc *sc, bus_size_t off) +{ + + return (bus_read_4(sc->sc_mem_res, off)); +} + +static __inline void +MV_SDIO_WR4(struct mv_sdio_softc *sc, bus_size_t off, uint32_t val) +{ + + bus_write_4(sc->sc_mem_res, off, val); +} + +static int platform_sdio_slot_signal( int signal ) +{ + switch( signal ) + { + case MV_SDIO_SIG_CD: + { + return -1; + break; + } + case MV_SDIO_SIG_WP: + return 0; + break; + default: + return -1; + break; + } + + return 0; +} + +static int +mv_sdio_probe(device_t dev) +{ + uint32_t device, revision; + + if (!ofw_bus_is_compatible(dev, "mrvl,sdio")) + return (ENXIO); + + + soc_id(&device, &revision); + + switch (device) { + case MV_DEV_88F6281: + break; + default: + return (ENXIO); + } + + device_set_desc(dev, "Marvell Integrated SDIO Host Controller"); + + return (BUS_PROBE_SPECIFIC); +} + +static int +mv_sdio_attach(device_t dev) +{ + struct mv_sdio_softc *sc; + int task_initialized = 0; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); + + /* Allocate memory and interrupt resources. */ + sc->sc_mem_rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, + &sc->sc_mem_rid, RF_ACTIVE); + + if (sc->sc_mem_res == NULL) { + device_printf(dev, "Could not allocate memory!\n"); + goto fail; + } + + sc->sc_irq_rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, + &sc->sc_irq_rid, RF_ACTIVE); + + if (sc->sc_irq_res == NULL) { + device_printf(dev, "Could not allocate IRQ!\n"); + goto fail; + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + + /* Initialize host controller's registers. */ + mv_sdio_init(dev); + + /* Try to setup DMA. */ + sc->sc_mapped = 0; /* No DMA buffer is mapped. */ + sc->sc_use_dma = 1; /* DMA mode is preferred to PIO mode. */ + + if (mv_sdio_dma_init(sc) < 0) { + device_printf(dev, "Falling back to PIO mode.\n"); + sc->sc_use_dma = 0; + } + + /* Add sysctls. */ + mv_sdio_add_sysctls(sc); + + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) { + /* Check if card is present in the slot. */ + if (platform_sdio_slot_signal(MV_SDIO_SIG_CD) == 1) + sc->sc_card_present = 1; + } + + TASK_INIT(&sc->sc_card_task, 0, mv_sdio_card_task, sc); + callout_init(&sc->sc_card_callout, 1); + task_initialized = 1; + + /* Setup interrupt. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | + INTR_MPSAFE, NULL, mv_sdio_intr, sc, &sc->sc_ihl) != 0) { + device_printf(dev, "Could not setup interrupt!\n"); + goto fail; + } + + /* Host can be acquired. */ + sc->sc_bus_busy = 0; + + /* + * Attach MMC bus only if the card is in the slot or card detect is + * not supported on the platform. + */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) == -1) || + sc->sc_card_present) { + sc->sc_child = device_add_child(dev, "mmc", -1); + + if (sc->sc_child == NULL) { + device_printf(dev, "Could not add MMC bus!\n"); + goto fail; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + } + + return (bus_generic_attach(dev)); + +fail: + mv_sdio_dma_finish(sc); + if (task_initialized) { + callout_drain(&sc->sc_card_callout); + taskqueue_drain(taskqueue_swi, &sc->sc_card_task); + } + if (sc->sc_ihl != NULL) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_ihl); + if (sc->sc_cd_ihl != NULL) + bus_teardown_intr(dev, sc->sc_cd_irq_res, sc->sc_cd_ihl); + if (sc->sc_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid, + sc->sc_irq_res); + if (sc->sc_cd_irq_res != NULL) + bus_release_resource(dev, SYS_RES_IRQ, sc->sc_cd_irq_rid, + sc->sc_cd_irq_res); + if (sc->sc_mem_res != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, + sc->sc_mem_res); + mtx_destroy(&sc->sc_mtx); + return (ENXIO); +} + +static int +mv_sdio_update_ios(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + struct mmc_ios *ios; + uint32_t xfer, clk_div, host_cr; + + sc = device_get_softc(brdev); + host = device_get_ivars(reqdev); + ios = &host->ios; + + mtx_lock(&sc->sc_mtx); + + if (ios->power_mode == power_off) + /* Re-initialize the controller. */ + mv_sdio_init(brdev); + + xfer = MV_SDIO_RD4(sc, MV_SDIO_XFER); + + if (ios->clock == 0) { + /* Disable clock. */ + xfer |= MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + /* Set maximum clock divider. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + } else { + /* + * Calculate and set clock divider. + * Clock rate value is: + * clock = MV_SDIO_F_BASE / (clk_div + 1) + * Thus we calculate the divider value as: + * clk_div = (MV_SDIO_F_BASE / clock) - 1 + */ + clk_div = (MV_SDIO_F_BASE / ios->clock) - 1; + if (clk_div > MV_SDIO_CLK_DIV_MAX) + clk_div = MV_SDIO_CLK_DIV_MAX; + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, clk_div); + + /* Enable clock. */ + xfer &= ~MV_SDIO_XFER_STOP_CLK; + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + } + + host_cr = MV_SDIO_RD4(sc, MV_SDIO_HOST_CR); + + /* Set card type. */ + if (host->mode == mode_mmc) + host_cr |= MV_SDIO_HOST_CR_MMC; /* MMC card. */ + else + host_cr &= ~MV_SDIO_HOST_CR_MMC; /* SD card. */ + + /* Set bus width. */ + if (ios->bus_width == bus_width_4) + host_cr |= MV_SDIO_HOST_CR_4BIT; /* 4-bit bus width */ + else + host_cr &= ~MV_SDIO_HOST_CR_4BIT; /* 1-bit bus width */ + + /* Set high/normal speed mode. */ +#if 0 /* Some cards have problems with the highspeed-mode + * Not selecting High-Speed mode enables all cards to work + */ + + if ((ios->timing == bus_timing_hs ) && ( 1 == 0 ) ) + host_cr |= MV_SDIO_HOST_CR_HIGHSPEED; + else +#endif + host_cr &= ~MV_SDIO_HOST_CR_HIGHSPEED; + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static int +mv_sdio_request(device_t brdev, device_t reqdev, struct mmc_request *req) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = EBUSY; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_req != NULL) { + mtx_unlock(&sc->sc_mtx); + return (rv); + } + + sc->sc_req = req; +/* + device_printf(sc->sc_dev, "cmd %d (hw state 0x%04x)\n", + req->cmd->opcode , MV_SDIO_RD4( sc, MV_SDIO_HOST_SR ) ); +*/ + rv = mv_sdio_start_command(sc, req->cmd); + + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_get_ro(device_t brdev, device_t reqdev) +{ + int rv; + + /* Check if card is read only. */ + rv = platform_sdio_slot_signal(MV_SDIO_SIG_WP); + + /* + * Assume that card is not write protected, when platform doesn't + * support WP signal. + */ + if (rv < 0) + rv = 0; + + return (rv); +} + +static int +mv_sdio_acquire_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + int rv; + + sc = device_get_softc(brdev); + rv = 0; + + mtx_lock(&sc->sc_mtx); + while (sc->sc_bus_busy) + rv = mtx_sleep(sc, &sc->sc_mtx, PZERO, "sdioah", 0); + sc->sc_bus_busy++; + mtx_unlock(&sc->sc_mtx); + + return (rv); +} + +static int +mv_sdio_release_host(device_t brdev, device_t reqdev) +{ + struct mv_sdio_softc *sc; + + sc = device_get_softc(brdev); + + mtx_lock(&sc->sc_mtx); + sc->sc_bus_busy--; + wakeup(sc); + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_finalize_request(struct mv_sdio_softc *sc) +{ + struct mmc_request *req; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + if (req) { + /* Finalize active request. */ + /*device_printf(sc->sc_dev, "Finalize request %i\n",req->cmd->opcode);*/ + sc->sc_req = NULL; + sc->sc_curcmd = NULL; + req->done(req); + + + } else + device_printf(sc->sc_dev, "No active request to finalize!\n"); +} + +static void +mv_sdio_init(device_t dev) +{ + struct mv_sdio_softc *sc; + uint32_t host_cr; + + sc = device_get_softc(dev); + + /* Disable interrupts. */ + sc->sc_irq_mask = 0; + sc->sc_eirq_mask = 0; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Clear interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, MV_SDIO_EIRQ_ALL); + + /* Enable interrupt status registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR_EN, MV_SDIO_IRQ_ALL); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR_EN, MV_SDIO_EIRQ_ALL); + + /* Initialize Host Control Register. */ + host_cr = (MV_SDIO_HOST_CR_PUSHPULL | MV_SDIO_HOST_CR_BE | + MV_SDIO_HOST_CR_TMOVAL(MV_SDIO_TMO_MAX) | MV_SDIO_HOST_CR_TMO); + + MV_SDIO_WR4(sc, MV_SDIO_HOST_CR, host_cr); + + /* Stop clock and reset Transfer Mode Register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, MV_SDIO_XFER_STOP_CLK); + + /* Set maximum clock divider value. */ + MV_SDIO_WR4(sc, MV_SDIO_CLK_DIV, MV_SDIO_CLK_DIV_MAX); + + /* Reset status, state machine and FIFOs synchronously. */ + MV_SDIO_WR4(sc, MV_SDIO_SW_RESET, MV_SDIO_SW_RESET_ALL); + DELAY(MV_SDIO_RESET_DELAY); +} + +static void +mv_sdio_init_host(struct mv_sdio_softc *sc) +{ + struct mmc_host *host; + + host = &sc->sc_host; + + /* Clear host structure. */ + bzero(host, sizeof(struct mmc_host)); + + /* Calculate minimum and maximum operating frequencies. */ + host->f_min = MV_SDIO_F_BASE / (MV_SDIO_CLK_DIV_MAX + 1); + host->f_max = MV_SDIO_F_MAX; + + /* Set operation conditions (voltage). */ + host->host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340; + + /* Set additional host controller capabilities. */ + host->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_HSPEED; +} + +static void +mv_sdio_add_sysctls(struct mv_sdio_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid_list *children; + struct sysctl_oid *tree; + + ctx = device_get_sysctl_ctx(sc->sc_dev); + children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); + tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "params", + CTLFLAG_RD, 0, "Driver parameters"); + children = SYSCTL_CHILDREN(tree); + + SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "use_dma", + CTLTYPE_UINT | CTLFLAG_RW, sc, 0, mv_sdio_sysctl_use_dma, + "I", "Use DMA for data transfers (0-1)"); +} + +/* + * This sysctl allows switching between DMA and PIO modes for data transfers: + * + * dev.mv_sdio..params.use_dma + * + * Values: + * + * - 1 sets DMA mode + * - 0 sets PIO mode + * + * Driver uses DMA mode by default. + */ +static int +mv_sdio_sysctl_use_dma(SYSCTL_HANDLER_ARGS) +{ + struct mv_sdio_softc *sc; + uint32_t use_dma; + int error; + + sc = (struct mv_sdio_softc *)arg1; + + use_dma = sc->sc_use_dma; + + error = sysctl_handle_int(oidp, &use_dma, 0, req); + if (error != 0 || req->newptr == NULL) + return (error); + + if (use_dma > 1) + return (EINVAL); + + mtx_lock(&sc->sc_mtx); + + /* Check if requested mode is already being used. */ + if (sc->sc_use_dma == use_dma) { + mtx_unlock(&sc->sc_mtx); + return (EPERM); + } + + if (!(sc->sc_mapped)) { + device_printf(sc->sc_dev, "DMA not initialized!\n"); + mtx_unlock(&sc->sc_mtx); + return (ENOMEM); + } + + /* Set new mode. */ + sc->sc_use_dma = use_dma; + + mtx_unlock(&sc->sc_mtx); + + return (0); +} + +static void +mv_sdio_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + + if (error != 0) + return; + + /* Get first segment's physical address. */ + *(bus_addr_t *)arg = segs->ds_addr; +} + +static int +mv_sdio_dma_init(struct mv_sdio_softc *sc) +{ + device_t dev; + bus_size_t dmabuf_size; + + dev = sc->sc_dev; + dmabuf_size = MAXPHYS; + + /* Create DMA tag. */ + if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ + MV_SDIO_DMA_SEGMENT_SIZE, 0, /* alignment, boundary */ + BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filtfunc, filtfuncarg */ + MAXPHYS, 1, /* maxsize, nsegments */ + MAXPHYS, BUS_DMA_ALLOCNOW, /* maxsegsz, flags */ + NULL, NULL, /* lockfunc, lockfuncarg */ + &sc->sc_dmatag) != 0) { + device_printf(dev, "Could not create DMA tag!\n"); + return (-1); + } + + /* Allocate DMA memory. */ + if (bus_dmamem_alloc(sc->sc_dmatag, (void **)&sc->sc_dmamem, + BUS_DMA_NOWAIT, &sc->sc_dmamap) != 0) { + device_printf(dev, "Could not allocate DMA memory!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + + /* Find the biggest available DMA buffer size. */ + while (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap, + (void *)sc->sc_dmamem, dmabuf_size, mv_sdio_getaddr, + &sc->sc_physaddr, 0) != 0) { + dmabuf_size >>= 1; + if (dmabuf_size < MV_SDIO_BLOCK_SIZE) { + device_printf(dev, "Could not load DMA map!\n"); + mv_sdio_dma_finish(sc); + return (-1); + } + } + + sc->sc_mapped++; + sc->sc_dma_size = dmabuf_size; + + return (0); +} + +static void +mv_sdio_dma_finish(struct mv_sdio_softc *sc) +{ + + /* Free DMA resources. */ + if (sc->sc_mapped) { + bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap); + sc->sc_mapped--; + } + if (sc->sc_dmamem != NULL) + bus_dmamem_free(sc->sc_dmatag, sc->sc_dmamem, sc->sc_dmamap); + if (sc->sc_dmamap != NULL) + bus_dmamap_destroy(sc->sc_dmatag, sc->sc_dmamap); + if (sc->sc_dmatag != NULL) + bus_dma_tag_destroy(sc->sc_dmatag); +} + +static int +mv_sdio_start_command(struct mv_sdio_softc *sc, struct mmc_command *cmd) +{ + struct mmc_request *req; + uint32_t cmdreg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + req = sc->sc_req; + + sc->sc_curcmd = cmd; + + cmd->error = MMC_ERR_NONE; + + /* Check if card is in the slot. */ + if ((platform_sdio_slot_signal(MV_SDIO_SIG_CD) != -1) && + (sc->sc_card_present == 0)) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Check if clock is enabled. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_STOP_CLK) { + cmd->error = MMC_ERR_FAILED; + mv_sdio_finalize_request(sc); + return (-1); + } + + /* Write command argument. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGL, cmd->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_CMD_ARGH, cmd->arg >> 16); + + /* Determine response type. */ + if (cmd->flags & MMC_RSP_136) + cmdreg = MV_SDIO_CMD_RSP_136; + else if (cmd->flags & MMC_RSP_BUSY) + cmdreg = MV_SDIO_CMD_RSP_48_BUSY; + else if (cmd->flags & MMC_RSP_PRESENT) + cmdreg = MV_SDIO_CMD_RSP_48; + else { + /* No response. */ + cmdreg = MV_SDIO_CMD_RSP_NONE; + /* Enable host to detect unexpected response. */ + cmdreg |= MV_SDIO_CMD_UNEXPECTED_RSP; + sc->sc_irq_mask |= MV_SDIO_CMD_UNEXPECTED_RSP; + } + + /* Check command checksum if needed. */ + if (cmd->flags & MMC_RSP_CRC) + cmdreg |= MV_SDIO_CMD_CRC7; + /* Check command opcode if needed. */ + if (cmd->flags & MMC_RSP_OPCODE) + cmdreg |= MV_SDIO_CMD_INDEX_CHECK; + + /* Set commannd opcode. */ + cmdreg |= MV_SDIO_CMD_INDEX(cmd->opcode); + + /* Setup interrupts. */ + sc->sc_irq_mask = MV_SDIO_IRQ_CMD; + sc->sc_eirq_mask = MV_SDIO_EIRQ_ALL; + + /* Prepare data transfer. */ + if (cmd->data) { + cmdreg |= (MV_SDIO_CMD_DATA_PRESENT | MV_SDIO_CMD_DATA_CRC16); + if (mv_sdio_start_data(sc, cmd->data) < 0) { + cmd->error = MMC_ERR_FAILED; + printf("mv_sdio_start_data() failed!\n"); + mv_sdio_finalize_request(sc); + return (-1); + } + } + + /* Write command register. */ + MV_SDIO_WR4(sc, MV_SDIO_CMD, cmdreg); + + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, ~MV_SDIO_IRQ_CARD_EVENT /*MV_SDIO_IRQ_ALL*/); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, 0xffff /*MV_SDIO_EIRQ_ALL*/); + + /* Update interrupt/error interrupt enable registers. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); + + /* Do not complete request, interrupt handler will do this. */ + return (0); +} + +static void +mv_sdio_finish_command(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + struct mmc_data *data; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + data = cmd->data; + + /* Get response. */ + if (cmd->flags & MMC_RSP_PRESENT) { + if(cmd->flags & MMC_RSP_136) + /* 136-bit response. */ + mv_sdio_handle_136bit_resp(sc); + else + /* 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, NULL); + } + + if (data) { + /* + * Disable command complete interrupt. It has already been + * handled. + */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_CMD; + + /* Enable XFER interrupt. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_XFER; + + /* Check which data interrupts we need to activate. */ + if (sc->sc_use_dma) + /* DMA transaction. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_DMA; + else if (data->flags & MMC_DATA_READ) + /* Read transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_RX_FULL; + else + /* Write transaction in PIO mode. */ + sc->sc_irq_mask |= MV_SDIO_IRQ_TX_EMPTY; + + /* Check if Auto-CMD12 interrupt will be needed. */ + if (sc->sc_req->stop) + sc->sc_irq_mask |= MV_SDIO_IRQ_AUTOCMD12; + + /* Update interrupt enable register. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + /* We're done. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static int +mv_sdio_start_data(struct mv_sdio_softc *sc, struct mmc_data *data) +{ + struct mmc_command *stop; + uint32_t autocmd12reg, xfer, host_sr; + size_t blk_size, blk_count; + int retries; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + /* + * No transfer can be started when FIFO_EMPTY bit in MV_SDIO_HOST_SR + * is not set. This bit is sometimes not set instantly after XFER + * interrupt has been asserted. + */ + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + + retries = 10; + while (!(host_sr & MV_SDIO_HOST_SR_FIFO_EMPTY)) { + if (retries == 0) + return (-1); + retries--; + DELAY(MV_SDIO_FIFO_EMPTY_DELAY); + host_sr = MV_SDIO_RD4(sc, MV_SDIO_HOST_SR); + } + + /* Clear data offset. */ + sc->sc_data_offset = 0; + + /* + * Set block size. It can be less than or equal to MV_SDIO_BLOCK_SIZE + * bytes. + */ + blk_size = (data->len < MV_SDIO_BLOCK_SIZE) ? data->len : + MV_SDIO_BLOCK_SIZE; + if (data->flags & MMC_DATA_MULTI) + blk_size = data->blocksz > MV_SDIO_BLOCK_SIZE ? + MV_SDIO_BLOCK_SIZE : data->blocksz; + MV_SDIO_WR4(sc, MV_SDIO_BLK_SIZE, blk_size); + + /* Set block count. */ + blk_count = (data->len + MV_SDIO_BLOCK_SIZE - 1) / MV_SDIO_BLOCK_SIZE; + if (data->flags & MMC_DATA_MULTI) + blk_count = data->len / blk_size; + MV_SDIO_WR4(sc, MV_SDIO_BLK_COUNT, blk_count); +// device_printf(sc->sc_dev, "BLK SIZE: %d, COUNT: %d\n", blk_size, blk_count); + + /* We want to initiate transfer by software. */ + xfer = MV_SDIO_XFER_SW_WR_EN; + + if (sc->sc_use_dma) { + /* Synchronize before DMA transfer. */ + if (data->flags & MMC_DATA_READ) + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREREAD); + else { + memcpy(sc->sc_dmamem, data->data, data->len); + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_PREWRITE); + } + + /* Write DMA buffer address register. */ + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRL, sc->sc_physaddr & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_DMA_ADDRH, sc->sc_physaddr >> 16); + } else + /* Set PIO transfer mode. */ + xfer |= MV_SDIO_XFER_PIO; + + /* + * Prepare Auto-CMD12. This command is automatically sent to the card + * by the host controller to stop multiple-block data transaction. + */ + if (sc->sc_req->stop) { + stop = sc->sc_req->stop; + + /* Set Auto-CMD12 argument. */ + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGL, stop->arg & 0xffff); + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12_ARGH, stop->arg >> 16); + + /* Set Auto-CMD12 opcode. */ + autocmd12reg = MV_SDIO_AUTOCMD12_INDEX(stop->opcode); + + /* Check busy signal if needed. */ + if (stop->flags & MMC_RSP_BUSY) + autocmd12reg |= MV_SDIO_AUTOCMD12_BUSY_CHECK; + /* Check Auto-CMD12 index. */ + if (stop->flags & MMC_RSP_OPCODE) + autocmd12reg |= MV_SDIO_AUTOCMD12_INDEX_CHECK; + + MV_SDIO_WR4(sc, MV_SDIO_AUTOCMD12, autocmd12reg); + + xfer |= MV_SDIO_XFER_AUTOCMD12; + } + + /* Change data direction. */ + if (data->flags & MMC_DATA_READ) + xfer |= MV_SDIO_XFER_TO_HOST; + + /* Write transfer mode register. */ + MV_SDIO_WR4(sc, MV_SDIO_XFER, xfer); + + return (0); +} + +static void +mv_sdio_handle_136bit_resp(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + uint32_t resp[8]; + uint32_t base, extra; + int i, j, off; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + cmd = sc->sc_curcmd; + + /* Collect raw response from the controller. */ + for (i = 0; i < 8; i++) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + + /* Response passed to MMC bus is shifted by one byte. */ + extra = 0; + for (i = 0, j = 7; i < 4; i++, j -= 2) { + off = (i ? 0 : 2); + base = resp[j] | (resp[j - 1] << (16 - off)); + cmd->resp[3 - i] = (base << (6 + off)) + extra; + extra = base >> (26 - off); + } +} + +static void +mv_sdio_handle_48bit_resp(struct mv_sdio_softc *sc, struct mmc_command *stop) +{ + struct mmc_command *cmd; + uint32_t resp[3], word; + uint8_t *rp; + int i; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (stop == NULL) + cmd = sc->sc_curcmd; + else + cmd = stop; + + /* Collect raw response from the controller. */ + for (i = 0; i < 3; i++) { + if (stop == NULL) + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_RSP(i)); + else + resp[i] = MV_SDIO_RD4(sc, MV_SDIO_AUTOCMD12_RSP(i)); + } + + /* Clear MMC bus response buffer. */ + bzero(&cmd->resp[0], 4 * sizeof(uint32_t)); + + /* + * Fill MMC bus response buffer. + */ + + rp = (uint8_t *)&cmd->resp[0]; + + /* Response bits [45:14] */ + word = (resp[1] & MV_SDIO_RSP48_BM16) | + ((resp[0] & MV_SDIO_RSP48_BM16) << 16); + + /* Response bits [15:14] and [13:8] */ + *rp++ = (resp[2] & MV_SDIO_RSP48_BM6) | + ((word & MV_SDIO_RSP48_BM2) << 6); + + /* Response bits [15:14] are already included. */ + word >>= 2; + + /* Response bits [45:16] */ + memcpy(rp, &word, sizeof(uint32_t)); +} + +static void +mv_sdio_intr(void *arg) +{ + struct mv_sdio_softc *sc; + uint32_t irq_stat, eirq_stat; + + sc = (struct mv_sdio_softc *)arg; +#if 0 + device_printf(sc->sc_dev,"intr 0x%04x intr_en 0x%04x hw_state 0x%04x\n", + MV_SDIO_RD4( sc, MV_SDIO_IRQ_SR ) , + MV_SDIO_RD4( sc, MV_SDIO_IRQ_EN ), + MV_SDIO_RD4( sc, MV_SDIO_HOST_SR )); +#endif + + + mtx_lock(&sc->sc_mtx); + + + + irq_stat = MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & sc->sc_irq_mask; + eirq_stat = MV_SDIO_RD4(sc, MV_SDIO_EIRQ_SR) & sc->sc_eirq_mask; + + /* + * In case of error interrupt, interrupt cause will be identified by + * checking bits in error interrupt status register. + */ + irq_stat &= ~MV_SDIO_IRQ_ERR; + + /* Handle command interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_CMD) || + (eirq_stat & MV_SDIO_EIRQS_CMD)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_cmd_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_CMD; + eirq_stat &= ~MV_SDIO_EIRQS_CMD; + } + + /* Handle data interrupts. */ + if ((irq_stat & MV_SDIO_IRQS_DATA) || + (eirq_stat & MV_SDIO_EIRQS_DATA)) { + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + mv_sdio_data_intr(sc, irq_stat, eirq_stat); + irq_stat &= ~MV_SDIO_IRQS_DATA; + eirq_stat &= ~MV_SDIO_EIRQS_DATA; + } + + /* Handle unexpected interrupts. */ + if (irq_stat) { + device_printf(sc->sc_dev, "Unexpected interrupt(s)! " + "IRQ SR = 0x%08x\n", irq_stat); + /* Clear interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_IRQ_SR, irq_stat); + } + if (eirq_stat) { + device_printf(sc->sc_dev, "Unexpected error interrupt(s)! " + "EIRQ SR = 0x%08x\n", eirq_stat); + /* Clear error interrupt status. */ + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_SR, eirq_stat); + } + + mtx_unlock(&sc->sc_mtx); +} + +static void +mv_sdio_cmd_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got command interrupt, but there " + "is no active command!\n"); + return; + } + + /* Handle unexpected response error. */ + if (irq & MV_SDIO_IRQ_UNEXPECTED_RSP) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Unexpected response!\n"); + } + + /* Handle errors. */ + if (eirq & MV_SDIO_EIRQ_CMD_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Error - command %d timeout!\n", + sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_CMD_CRC7) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "checksum!\n", sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_DATA_CRC16) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "DATA checksum!\n", sc->sc_curcmd->opcode); + } else if (eirq & MV_SDIO_EIRQ_DATA_ENDBIT) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Error - bad command %d " + "end bit error!\n", sc->sc_curcmd->opcode); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Command %d error eirq=%d!\n", + sc->sc_curcmd->opcode, eirq); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + if (irq & MV_SDIO_IRQ_CMD) + mv_sdio_finish_command(sc); +} + +static void +mv_sdio_data_intr(struct mv_sdio_softc *sc, uint32_t irq, uint32_t eirq) +{ + struct mmc_command *stop; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + + if (!sc->sc_curcmd) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active command.\n"); + return; + } + if ((!sc->sc_curcmd->data) && ((sc->sc_curcmd->flags & + MMC_RSP_BUSY) == 0)) { + device_printf(sc->sc_dev, "Got data interrupt, but there is " + "no active data transaction.n\n"); + sc->sc_curcmd->error = MMC_ERR_FAILED; + return; + } + + /* Handle errors. */ + if(eirq & MV_SDIO_EIRQ_DATA_TMO) { + sc->sc_curcmd->error = MMC_ERR_TIMEOUT; + device_printf(sc->sc_dev, "Data %s timeout!\n", + (sc->sc_curcmd->data->flags & MMC_DATA_READ) ? "read" : + "write"); + } else if (eirq & (MV_SDIO_EIRQ_DATA_CRC16 | + MV_SDIO_EIRQ_DATA_ENDBIT)) { + sc->sc_curcmd->error = MMC_ERR_BADCRC; + device_printf(sc->sc_dev, "Bad data checksum!\n"); + } else if (eirq) { + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Data error!: 0x%04X \n", + eirq); + + if( 0 != ( eirq & MV_SDIO_EIRQ_CRC_STAT ) ) + { + device_printf(sc->sc_dev, "MV_SDIO_EIRQ_CRC_STAT\n"); + } + } + + /* Handle Auto-CMD12 error. */ + if (eirq & MV_SDIO_EIRQ_AUTOCMD12) { + sc->sc_req->stop->error = MMC_ERR_FAILED; + sc->sc_curcmd->error = MMC_ERR_FAILED; + device_printf(sc->sc_dev, "Auto-CMD12 error!\n"); + } + + if (sc->sc_curcmd->error != MMC_ERR_NONE) { + /* Error. Disable interrupts and finalize request. */ + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + return; + } + + /* Handle PIO interrupt. */ + if (irq & (MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_RX_FULL)) + mv_sdio_transfer_pio(sc); + + /* Handle DMA interrupt. */ + if (irq & (MV_SDIO_IRQ_DMA)) { + /* Synchronize DMA buffer. */ + if (MV_SDIO_RD4(sc, MV_SDIO_XFER) & MV_SDIO_XFER_TO_HOST) { + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTWRITE); + memcpy(sc->sc_curcmd->data->data, sc->sc_dmamem, + sc->sc_curcmd->data->len); + } else + bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, + BUS_DMASYNC_POSTREAD); + + /* Disable DMA interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_DMA; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Handle Auto-CMD12 interrupt. */ + if (irq & (MV_SDIO_IRQ_AUTOCMD12)) { + stop = sc->sc_req->stop; + /* Get 48-bit response. */ + mv_sdio_handle_48bit_resp(sc, stop); + + /* Disable Auto-CMD12 interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_AUTOCMD12; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } + + /* Transfer finished. Disable interrupts and finalize request. */ + if (irq & (MV_SDIO_IRQ_XFER)) { + mv_sdio_disable_intr(sc); + mv_sdio_finalize_request(sc); + } +} + +static void +mv_sdio_disable_intr(struct mv_sdio_softc *sc) +{ + + /* Disable interrupts that were enabled. */ + sc->sc_irq_mask &= ~(sc->sc_irq_mask); + sc->sc_eirq_mask &= ~(sc->sc_eirq_mask); + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + MV_SDIO_WR4(sc, MV_SDIO_EIRQ_EN, sc->sc_eirq_mask); +} + +static void +mv_sdio_card_task(void *arg, int pending) +{ + struct mv_sdio_softc *sc; + + int device_probe_and_attach_ret_val = 0; + + sc = (struct mv_sdio_softc *)arg; + + mtx_lock(&sc->sc_mtx); + + if (sc->sc_card_present) { + if (sc->sc_child) { + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host controller's registers. */ + mv_sdio_init(sc->sc_dev); + + sc->sc_child = device_add_child(sc->sc_dev, "mmc", -1); + if (sc->sc_child == NULL) { + device_printf(sc->sc_dev, "Could not add MMC bus!\n"); + mtx_unlock(&sc->sc_mtx); + return; + } + + /* Initialize host structure for MMC bus. */ + mv_sdio_init_host(sc); + + device_set_ivars(sc->sc_child, &sc->sc_host); + + mtx_unlock(&sc->sc_mtx); + + device_probe_and_attach_ret_val = device_probe_and_attach(sc->sc_child); + + if( 0 != device_probe_and_attach_ret_val ) { + device_printf(sc->sc_dev, "MMC bus failed on probe " + "and attach! %i\n",device_probe_and_attach_ret_val); + device_delete_child(sc->sc_dev, sc->sc_child); + sc->sc_child = NULL; + } + } else { + if (sc->sc_child == NULL) { + mtx_unlock(&sc->sc_mtx); + return; + } + + mtx_unlock(&sc->sc_mtx); + if (device_delete_child(sc->sc_dev, sc->sc_child) != 0) { + device_printf(sc->sc_dev, "Could not delete MMC " + "bus!\n"); + } + sc->sc_child = NULL; + } +} + +static uint32_t +mv_sdio_read_fifo(struct mv_sdio_softc *sc) +{ + uint32_t data; + device_printf(sc->sc_dev, "This is not tested, yet MV_SDIO_FIFO not ensured\n "); + + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data = MV_SDIO_RD4(sc, MV_SDIO_FIFO); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_RX_FULL)); + data |= (MV_SDIO_RD4(sc, MV_SDIO_FIFO) << 16); + return data; +} + +static void +mv_sdio_write_fifo(struct mv_sdio_softc *sc, uint32_t val) +{ + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val & 0xffff); + while (!(MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & MV_SDIO_IRQ_TX_EMPTY)); + MV_SDIO_WR4(sc, MV_SDIO_FIFO, val >> 16); +} + +static void +mv_sdio_transfer_pio(struct mv_sdio_softc *sc) +{ + struct mmc_command *cmd; + + cmd = sc->sc_curcmd; + + if (cmd->data->flags & MMC_DATA_READ) { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_RX_FULL) { + mv_sdio_read_block_pio(sc); + /* + * Assert delay after each block transfer to meet read + * access timing constraint. + */ + DELAY(MV_SDIO_RD_DELAY); + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks read in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_RX_FULL; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } else { + while (MV_SDIO_RD4(sc, MV_SDIO_IRQ_SR) & + MV_SDIO_IRQ_TX_EMPTY) { + mv_sdio_write_block_pio(sc); + /* Wait while card is programming the memory. */ + while ((MV_SDIO_RD4(sc, MV_SDIO_HOST_SR) & + MV_SDIO_HOST_SR_CARD_BUSY)); + /* + * Assert delay after each block transfer to meet + * write access timing constraint. + */ + DELAY(MV_SDIO_WR_DELAY); + + if (sc->sc_data_offset >= cmd->data->len) + break; + } + /* All blocks written in PIO mode. Disable interrupt. */ + sc->sc_irq_mask &= ~MV_SDIO_IRQ_TX_EMPTY; + MV_SDIO_WR4(sc, MV_SDIO_IRQ_EN, sc->sc_irq_mask); + } +} + +static void +mv_sdio_read_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + buffer[0] = data; + buffer[1] = (data >> 8); + buffer[2] = (data >> 16); + buffer[3] = (data >> 24); + buffer += 4; + left -= 4; + } + } else { + while (left > 3) { + data = mv_sdio_read_fifo(sc); + *((uint32_t *)buffer) = data; + buffer += 4; + left -= 4; + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = mv_sdio_read_fifo(sc); + while (left > 0) { + *(buffer++) = data; + data >>= 8; + left--; + } + } +} + +static void +mv_sdio_write_block_pio(struct mv_sdio_softc *sc) +{ + uint32_t data = 0; + char *buffer; + size_t left; + + buffer = sc->sc_curcmd->data->data; + buffer += sc->sc_data_offset; + /* Transfer one block at a time. */ + left = min(MV_SDIO_BLOCK_SIZE, sc->sc_curcmd->data->len - + sc->sc_data_offset); + sc->sc_data_offset += left; + + /* Handle unaligned and aligned buffer cases. */ + if ((intptr_t)buffer & 3) { + while (left > 3) { + data = buffer[0] + + (buffer[1] << 8) + + (buffer[2] << 16) + + (buffer[3] << 24); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } else { + while (left > 3) { + data = *((uint32_t *)buffer); + left -= 4; + buffer += 4; + mv_sdio_write_fifo(sc, data); + } + } + /* Handle uneven size case. */ + if (left > 0) { + data = 0; + while (left > 0) { + data <<= 8; + data += *(buffer++); + left--; + } + mv_sdio_write_fifo(sc, data); + } +} + +static int +mv_sdio_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) +{ + struct mv_sdio_softc *sc; + struct mmc_host *host; + + sc = device_get_softc(dev); + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + *(int *)result = host->ios.bus_mode; + break; + case MMCBR_IVAR_BUS_WIDTH: + *(int *)result = host->ios.bus_width; + break; + case MMCBR_IVAR_CHIP_SELECT: + *(int *)result = host->ios.chip_select; + break; + case MMCBR_IVAR_CLOCK: + *(int *)result = host->ios.clock; + break; + case MMCBR_IVAR_F_MIN: + *(int *)result = host->f_min; + break; + case MMCBR_IVAR_F_MAX: + *(int *)result = host->f_max; + break; + case MMCBR_IVAR_HOST_OCR: + *(int *)result = host->host_ocr; + break; + case MMCBR_IVAR_MODE: + *(int *)result = host->mode; + break; + case MMCBR_IVAR_OCR: + *(int *)result = host->ocr; + break; + case MMCBR_IVAR_POWER_MODE: + *(int *)result = host->ios.power_mode; + break; + case MMCBR_IVAR_VDD: + *(int *)result = host->ios.vdd; + break; + case MMCBR_IVAR_CAPS: + *(int *)result = host->caps; + break; + case MMCBR_IVAR_TIMING: + *(int *)result = host->ios.timing; + break; + case MMCBR_IVAR_MAX_DATA: + mtx_lock(&sc->sc_mtx); + /* Return maximum number of blocks the driver can handle. */ + if (sc->sc_use_dma) + *(int *)result = (sc->sc_dma_size / + MV_SDIO_BLOCK_SIZE); + else + *(int *)result = MV_SDIO_BLOCKS_MAX; + mtx_unlock(&sc->sc_mtx); + break; + default: + return (EINVAL); + } + + return (0); +} + +static int +mv_sdio_write_ivar(device_t dev, device_t child, int index, uintptr_t value) +{ + struct mmc_host *host; + + host = device_get_ivars(child); + + switch (index) { + case MMCBR_IVAR_BUS_MODE: + host->ios.bus_mode = value; + break; + case MMCBR_IVAR_BUS_WIDTH: + host->ios.bus_width = value; + break; + case MMCBR_IVAR_CHIP_SELECT: + host->ios.chip_select = value; + break; + case MMCBR_IVAR_CLOCK: + host->ios.clock = value; + break; + case MMCBR_IVAR_MODE: + host->mode = value; + break; + case MMCBR_IVAR_OCR: + host->ocr = value; + break; + case MMCBR_IVAR_POWER_MODE: + host->ios.power_mode = value; + break; + case MMCBR_IVAR_VDD: + host->ios.vdd = value; + break; + case MMCBR_IVAR_TIMING: + host->ios.timing = value; + break; + case MMCBR_IVAR_CAPS: + case MMCBR_IVAR_HOST_OCR: + case MMCBR_IVAR_F_MIN: + case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: + default: + /* Instance variable not writable. */ + return (EINVAL); + } + + return (0); +} + diff --git a/sys/arm/mv/mv_sdio.h b/sys/arm/mv/mv_sdio.h new file mode 100644 index 0000000..b54b59d --- /dev/null +++ b/sys/arm/mv/mv_sdio.h @@ -0,0 +1,173 @@ +/* + * Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _MVSDMMC_INCLUDE +#define _MVSDMMC_INCLUDE + + +#define MVSDMMC_DMA_SIZE 65536 + + + +/* + * The base MMC clock rate + */ + +#define MVSDMMC_CLOCKRATE_MIN 100000 +#define MVSDMMC_CLOCKRATE_MAX 50000000 + +#define MVSDMMC_BASE_FAST_CLOCK 200000000 + + +/* + * SDIO register + */ + +#define MV_SDIO_DMA_ADDRL 0x000 +#define MV_SDIO_DMA_ADDRH 0x004 +#define MV_SDIO_BLK_SIZE 0x008 +#define MV_SDIO_BLK_COUNT 0x00c +#define MV_SDIO_CMD 0x01c +#define MV_SDIO_CMD_ARGL 0x010 +#define MV_SDIO_CMD_ARGH 0x014 +#define MV_SDIO_XFER 0x018 +#define MV_SDIO_HOST_SR 0x048 +#define MV_SDIO_HOST_CR 0x050 +#define MV_SDIO_SW_RESET 0x05c +#define MV_SDIO_IRQ_SR 0x060 +#define MV_SDIO_EIRQ_SR 0x064 +#define MV_SDIO_IRQ_SR_EN 0x068 +#define MV_SDIO_EIRQ_SR_EN 0x06c +#define MV_SDIO_IRQ_EN 0x070 +#define MV_SDIO_EIRQ_EN 0x074 +#define MV_SDIO_AUTOCMD12_ARGL 0x084 +#define MV_SDIO_AUTOCMD12_ARGH 0x088 +#define MV_SDIO_AUTOCMD12 0x08c +#define MV_SDIO_CLK_DIV 0x128 +#define MV_SDIO_FIFO 0xa2100 /* FIXME!!! */ + +#define MV_SDIO_RSP(i) (0x020 + ((i)<<2)) +#define MV_SDIO_AUTOCMD12_RSP(i) (0x090 + ((i)<<2)) + +/* + * SDIO Status-Register + */ +#define MV_SDIO_HOST_SR_CARD_BUSY (1<<1) +#define MV_SDIO_HOST_SR_FIFO_EMPTY (1<<13) + + + +/* + * SDIO_CMD + */ +#define MV_SDIO_CMD_RSP_NONE (0 << 0) +#define MV_SDIO_CMD_RSP_136 (1 << 0) +#define MV_SDIO_CMD_RSP_48 (2 << 0) +#define MV_SDIO_CMD_RSP_48_BUSY (3 << 0) +#define MV_SDIO_CMD_DATA_CRC16 (1<<2) +#define MV_SDIO_CMD_CRC7 (1<<3) +#define MV_SDIO_CMD_INDEX_CHECK (1<<4) +#define MV_SDIO_CMD_DATA_PRESENT (1<<5) +#define MV_SDIO_CMD_UNEXPECTED_RSP (1<<7) +#define MV_SDIO_CMD_INDEX(x) ( (x) << 8 ) + + +/* + * SDIO_XFER_MODE + */ +#define MV_SDIO_XFER_STOP_CLK (1 << 5) +#define MV_SDIO_XFER_TO_HOST (1 << 4) +#define MV_SDIO_XFER_PIO (1 << 3) +#define MV_SDIO_XFER_AUTOCMD12 (1 << 2) +#define MV_SDIO_XFER_SW_WR_EN (1 << 1) + +/* + * SDIO_HOST_CTRL + */ +#define MV_SDIO_HOST_CR_PUSHPULL (1 << 0) +#define MV_SDIO_HOST_CR_MMC (3 << 1) +#define MV_SDIO_HOST_CR_BE (1 << 3) +#define MV_SDIO_HOST_CR_4BIT (1 << 9) +#define MV_SDIO_HOST_CR_HIGHSPEED (1 << 10) + +#define MV_SDIO_HOST_CR_TMOVAL(x) ((x) << 11) +#define MV_SDIO_HOST_CR_TMO ( 1 << 15 ) + +/* + * NORmal status bits + */ + + +#define MV_SDIO_IRQ_ERR (1<<15) +#define MV_SDIO_IRQ_UNEXPECTED_RSP (1<<14) +#define MV_SDIO_IRQ_AUTOCMD12 (1<<13) +#define MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN (1<<12) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL (1<<11) +#define MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED (1<<10) +#define MV_SDIO_IRQ_READ_WAIT (1<<9) +#define MV_SDIO_IRQ_CARD_EVENT (1<<8) +#define MV_SDIO_IRQ_RX_FULL (1<<5) +#define MV_SDIO_IRQ_TX_EMPTY (1<<4) +#define MV_SDIO_IRQ_DMA (1<<3) +#define MV_SDIO_IRQ_BLOCK_GAP (1<<2) +#define MV_SDIO_IRQ_XFER (1<<1) +#define MV_SDIO_IRQ_CMD (1<<0) + +#define MV_SDIO_IRQ_ALL (MV_SDIO_IRQ_CMD | MV_SDIO_IRQ_XFER | MV_SDIO_IRQ_BLOCK_GAP | MV_SDIO_IRQ_DMA | MV_SDIO_IRQ_RX_FULL | MV_SDIO_IRQ_TX_EMPTY | MV_SDIO_IRQ_CARD_EVENT | MV_SDIO_IRQ_READ_WAIT | MV_SDIO_IRQ_IMB_FIFO_WORD_FILLED | MV_SDIO_IRQ_IMB_FIFO_WORD_AVAIL | MV_SDIO_IRQ_SUSPENSE_ON_IRQ_EN | MV_SDIO_IRQ_AUTOCMD12 | MV_SDIO_IRQ_UNEXPECTED_RSP | MV_SDIO_IRQ_ERR ) + +//#define MV_SDIO_IRQ_SR + + +/* + * ERR status bits + */ +#define MV_SDIO_EIRQ_CRC_STAT (1<<14) +#define MV_SDIO_EIRQ_CRC_STARTBIT (1<<13) +#define MV_SDIO_EIRQ_CRC_ENDBIT (1<<12) +#define MV_SDIO_EIRQ_RSP_TBIT (1<<11) +#define MV_SDIO_EIRQ_XFER_SIZE (1<<10) +#define MV_SDIO_EIRQ_CMD_STARTBIT (1<<9) +#define MV_SDIO_EIRQ_AUTOCMD12 (1<<8) +#define MV_SDIO_EIRQ_DATA_ENDBIT (1<<6) +#define MV_SDIO_EIRQ_DATA_CRC16 (1<<5) +#define MV_SDIO_EIRQ_DATA_TMO (1<<4) +#define MV_SDIO_EIRQ_CMD_INDEX (1<<3) +#define MV_SDIO_EIRQ_CMD_ENDBIT (1<<2) +#define MV_SDIO_EIRQ_CMD_CRC7 (1<<1) +#define MV_SDIO_EIRQ_CMD_TMO (1<<0) + +#define MV_SDIO_EIRQ_ALL (MV_SDIO_EIRQ_CMD_TMO | \ + MV_SDIO_EIRQ_CMD_CRC7 | \ + MV_SDIO_EIRQ_CMD_ENDBIT | \ + MV_SDIO_EIRQ_CMD_INDEX | \ + MV_SDIO_EIRQ_DATA_TMO | \ + MV_SDIO_EIRQ_DATA_CRC16 | \ + MV_SDIO_EIRQ_DATA_ENDBIT | \ + MV_SDIO_EIRQ_AUTOCMD12 | \ + MV_SDIO_EIRQ_CMD_STARTBIT |\ + MV_SDIO_EIRQ_XFER_SIZE |\ + MV_SDIO_EIRQ_RSP_TBIT |\ + MV_SDIO_EIRQ_CRC_ENDBIT |\ + MV_SDIO_EIRQ_CRC_STARTBIT |\ + MV_SDIO_EIRQ_CRC_STAT) + +/* AUTOCMD12 register values */ +#define MV_SDIO_AUTOCMD12_BUSY_CHECK (1<<0) +#define MV_SDIO_AUTOCMD12_INDEX_CHECK (1<<1) +#define MV_SDIO_AUTOCMD12_INDEX(x) (x<<8) + +/* Software reset register */ +#define MV_SDIO_SW_RESET_ALL (1<<8) + +/* */ +#define MV_SDIO_SIG_CD 1 +#define MV_SDIO_SIG_WP 2 + +#endif /* _MVSDMMC_INCLUDE */ + diff --git a/sys/arm/mv/mv_sdiowl.c b/sys/arm/mv/mv_sdiowl.c new file mode 100644 index 0000000..491cd18 --- /dev/null +++ b/sys/arm/mv/mv_sdiowl.c @@ -0,0 +1,455 @@ +/*- + * Copyright (c) 2013 Ilya Bakulin. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Portions of this software may have been developed with reference to + * the SD Simplified Specification. The following disclaimer may apply: + * + * The following conditions apply to the release of the simplified + * specification ("Simplified Specification") by the SD Card Association and + * the SD Group. The Simplified Specification is a subset of the complete SD + * Specification which is owned by the SD Card Association and the SD + * Group. This Simplified Specification is provided on a non-confidential + * basis subject to the disclaimers below. Any implementation of the + * Simplified Specification may require a license from the SD Card + * Association, SD Group, SD-3C LLC or other third parties. + * + * Disclaimers: + * + * The information contained in the Simplified Specification is presented only + * as a standard specification for SD Cards and SD Host/Ancillary products and + * is provided "AS-IS" without any representations or warranties of any + * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD + * Card Association for any damages, any infringements of patents or other + * right of the SD Group, SD-3C LLC, the SD Card Association or any third + * parties, which may result from its use. No license is granted by + * implication, estoppel or otherwise under any patent or other rights of the + * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing + * herein shall be construed as an obligation by the SD Group, the SD-3C LLC + * or the SD Card Association to disclose or distribute any technical + * information, know-how or other confidential information to any third party. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +MALLOC_DECLARE(M_MVSDIOWL); +MALLOC_DEFINE(M_MVSDIOWL, "mv_sdiowl", "Buffers of Marvell SDIO WLAN Driver"); + +#include "mmcbus_if.h" + +#define DN_LD_CARD_RDY (1u << 0) +#define CARD_IO_READY (1u << 3) + +/* Host Control Registers */ +/* Host Control Registers : Host interrupt mask */ +#define HOST_INT_MASK_REG 0x02 +/* Host Control Registers : Upload host interrupt mask */ +#define UP_LD_HOST_INT_MASK (0x1U) +/* Host Control Registers : Download host interrupt mask */ +#define DN_LD_HOST_INT_MASK (0x2U) +/* Enable Host interrupt mask */ +#define HOST_INT_ENABLE (UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK) +/* Disable Host interrupt mask */ +#define HOST_INT_DISABLE 0xff + +/* Host Control Registers : Host interrupt status */ +#define HOST_INTSTATUS_REG 0x03 +/* Host Control Registers : Upload host interrupt status */ +#define UP_LD_HOST_INT_STATUS (0x1U) +/* Host Control Registers : Download host interrupt status */ +#define DN_LD_HOST_INT_STATUS (0x2U) + +/* Host Control Registers : Host interrupt RSR */ +#define HOST_INT_RSR_REG 0x01 +#define SDIO_INT_MASK 0x3F + +/* Host Control Registers : I/O port 0 */ +#define IO_PORT_0_REG 0x78 +/* Host Control Registers : I/O port 1 */ +#define IO_PORT_1_REG 0x79 +/* Host Control Registers : I/O port 2 */ +#define IO_PORT_2_REG 0x7A + +/* Host F1 read base 0 */ +#define HOST_F1_RD_BASE_0 0x0040 +/* Host F1 read base 1 */ +#define HOST_F1_RD_BASE_1 0x0041 + +/* Card Control Registers : Card status register */ +#define CARD_STATUS_REG 0x30 +/* Card Control Registers : Miscellaneous Configuration Register */ +#define CARD_MISC_CFG_REG 0x6C + +/* Firmware status 0 register */ +#define CARD_FW_STATUS0_REG 0x60 +/* Firmware status 1 register */ +#define CARD_FW_STATUS1_REG 0x61 + +/* Misc. Config Register : Auto Re-enable interrupts */ +#define AUTO_RE_ENABLE_INT 1 << 4 + +/* SD block size can not bigger than 64 due to buf size limit in firmware */ +/* define SD block size for data Tx/Rx */ +#define SDIO_BLOCK_SIZE 256 + +#define FIRMWARE_READY_SDIO 0xfedc + +#define BUF_ALIGN 512 + +struct sdiowl_softc { + device_t dev; + struct mtx sc_mtx; + int running; + int sdio_function; + uint32_t ioport; +}; + +/* bus entry points */ +static int sdiowl_attach(device_t dev); +static int sdiowl_detach(device_t dev); +static int sdiowl_probe(device_t dev); + +#define SDIOWL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define SDIOWL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define SDIOWL_LOCK_INIT(_sc) \ + mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ + "sdiowl", MTX_DEF) +#define SDIOWL_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); +#define SDIOWL_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); +#define SDIOWL_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); + +static int +sdiowl_probe(device_t dev) +{ + uint32_t media_size, sdio_vendor, sdio_product; + +// device_quiet(dev); + device_set_desc(dev, "Marvell dummy SDIO WLAN driver"); + + if(BUS_READ_IVAR(device_get_parent(dev), dev, MMC_IVAR_MEDIA_SIZE, + &media_size)) { + device_printf(dev, "Cannot get media size from the bus!\n"); + return (-1); + } + if (media_size > 0) + return(-1); + + if(BUS_READ_IVAR(device_get_parent(dev), dev, MMC_IVAR_SDIO_VENDOR, + &sdio_vendor) || + BUS_READ_IVAR(device_get_parent(dev), dev, MMC_IVAR_SDIO_PRODUCT, + &sdio_product)) { + device_printf(dev, "Cannot get vendor/product/function from the bus!\n"); + return (-1); + } + + if (sdio_vendor == 0x02DF && sdio_product == 0x9119) + return (0); + else + return (-1); +} + +static int +sdiowl_read_1(struct sdiowl_softc *sc, uint32_t reg, uint8_t *val) { + return MMCBUS_IO_READ_1(device_get_parent(sc->dev), sc->dev, + reg, val); +} + +static int +sdiowl_write_1(struct sdiowl_softc *sc, uint32_t reg, uint8_t val) { + return MMCBUS_IO_WRITE_1(device_get_parent(sc->dev), sc->dev, + reg, val); +} + +static int +sdiowl_get_fw_status(struct sdiowl_softc *sc, uint16_t *s) { + uint8_t s0, s1; + + if (sdiowl_read_1(sc, CARD_FW_STATUS0_REG, &s0) || + sdiowl_read_1(sc, CARD_FW_STATUS1_REG, &s1)) + return (-1); + + *s = ((s1 << 8) | s0); + + return 0; +} + +static int +sdiowl_check_fw_status(struct sdiowl_softc *sc) { + uint16_t status, status_ok; + int i, ret; + + status_ok = 0; + ret = -1; + + for (i=0; i < 200; i++) { + ret = sdiowl_get_fw_status(sc, &status); + if (ret) + continue; + if (status == FIRMWARE_READY_SDIO) { + status_ok = status; + ret = 0; + break; + } else { + pause("sdiowl", 10); + ret = -1; + } + } + + return (ret); +} + +static int +sdiowl_disable_host_int(struct sdiowl_softc *sc) { + uint8_t host_int_mask; + + if (sdiowl_read_1(sc, HOST_INT_MASK_REG, &host_int_mask)) + return (-1); + host_int_mask &= (uint8_t) ~HOST_INT_DISABLE; + if (sdiowl_write_1(sc, HOST_INT_MASK_REG, host_int_mask)) { + device_printf(sc->dev, "Disabling host interrupt failed!\n"); + return (-1); + } + + return 0; +} + +static int +sdiowl_enable_host_int(struct sdiowl_softc *sc) { + if (sdiowl_write_1(sc, HOST_INT_MASK_REG, HOST_INT_ENABLE)) { + device_printf(sc->dev, "Enabling host interrupt failed!\n"); + return (-1); + } + + return 0; +} + +static int +sdiowl_attach(device_t dev) +{ + struct sdiowl_softc *sc; + const struct firmware *fw; + uint8_t funcs_enabled; + uint8_t sdio_irq; + + sc = device_get_softc(dev); + sc->dev = dev; + SDIOWL_LOCK_INIT(sc); + sc->running = 1; + BUS_READ_IVAR(device_get_parent(dev), dev, MMC_IVAR_SDIO_FUNCTION, + &sc->sdio_function); + + /* Call FW loader from FreeBSD firmware framework */ + fw = firmware_get("sdiowl_fw"); + if (!fw) { + device_printf(dev, "Firmware request failed!\n"); + return (-1); + } + + device_printf(dev, "Got FW: name=%s, data=%08X, ver=%d, size=%d\n", + fw->name, (uint32_t )fw->data, fw->version, fw->datasize); + + if (MMCBUS_IO_F0_READ_1(device_get_parent(dev), dev, + SD_IO_CCCR_FN_ENABLE, &funcs_enabled)) + return (-1); + + /* + * XXX: We probably should just enable function from the driver code + * and not rely on MMC/SDIO stack to do this! + */ + if (funcs_enabled & (1 << sc->sdio_function)) + device_printf(dev, "My function is enabled, good!\n"); + else { + device_printf(dev, "My func is NOT enabled, bad (mask = %d, func=%d)!\n", funcs_enabled, sc->sdio_function); + return (-1); + } + + /* Set block size */ + device_printf(dev, "Setting block size to %d bytes\n", SDIO_BLOCK_SIZE); + if(MMCBUS_IO_SET_BLOCK_SIZE(device_get_parent(dev), dev, SDIO_BLOCK_SIZE)) + return (-1); + + /* ACK the first interrupt from bootloader, disable host intr mask */ + sdio_irq = 0; + if(sdiowl_read_1(sc, HOST_INTSTATUS_REG, &sdio_irq)) + return (-1); + + /* Disable host interrupts */ + sdiowl_disable_host_int(sc); + + /* Get IO Port */ + uint8_t reg; + if (sdiowl_read_1(sc, IO_PORT_0_REG, ®)) + return (-1); + sc->ioport = reg; + if (sdiowl_read_1(sc, IO_PORT_1_REG, ®)) + return (-1); + sc->ioport |= reg << 8; + if (sdiowl_read_1(sc, IO_PORT_2_REG, ®)) + return (-1); + sc->ioport |= reg << 16; + device_printf(dev, "IO Port: 0x%08X\n", sc->ioport); + + /* Set Host interrupt reset to read to clear */ + if (!sdiowl_read_1(sc, HOST_INT_RSR_REG, ®)) + sdiowl_write_1(sc, HOST_INT_RSR_REG, reg | SDIO_INT_MASK); + else + return (-1); + + /* Dnld/Upld ready set to auto reset */ + if (!sdiowl_read_1(sc, CARD_MISC_CFG_REG, ®)) + sdiowl_write_1(sc, CARD_MISC_CFG_REG, reg | AUTO_RE_ENABLE_INT); + else + return (-1); + + + /* XXX No idea but without this FW upload doesn't work :-( */ + char data[256]; + memset(data, 0, 256); + if (MMCBUS_IO_READ_MULTI(device_get_parent(dev), dev, 0, + data, 256, 1)) { + device_printf(dev, "Cannot read-multi\n"); + } + + /* Now upload FW to the card */ + uint8_t status, base0, base1, tries; + uint32_t len, txlen, tx_blocks, offset; + + uint8_t *fwbuf_ = malloc(2048 + BUF_ALIGN, M_MVSDIOWL, M_WAITOK); + + size_t fwbuf_a = (size_t) fwbuf_; + fwbuf_a &= ~ (BUF_ALIGN - 1) ; + fwbuf_a += BUF_ALIGN; + uint8_t *fwbuf = (uint8_t *) fwbuf_a; + offset = len = 0; + do { + for (tries = 0; tries < 200; tries ++) { + status = 0; + /* Ask card about its status */ + if (sdiowl_read_1(sc, CARD_STATUS_REG, &status)) + return (-1); + if (!(status | CARD_IO_READY | DN_LD_CARD_RDY)) { + device_printf(dev, + "Card NOT ready to accept FW (status %d)\n", + status); + return (-1); + } + + if (sdiowl_read_1(sc, HOST_F1_RD_BASE_0, &base0) > 0 || + sdiowl_read_1(sc, HOST_F1_RD_BASE_1, &base1) > 0) { + device_printf(dev, "Err while reading BASEx\n"); + return (-1); + } + + len = (((base1 & 0xff) << 8) | (base0 & 0xff)); + if (len) + break; + pause("sdiowl", 10); + } + + txlen = len; + + if (!len) + break; + if (len & 0x1) { + device_printf(sc->dev, "CRC error?! len=0x%04X, txlen=%d\n", len, txlen); + break; + } + + if (fw->datasize - offset < txlen) + txlen = fw->datasize - offset; + + tx_blocks = (txlen + SDIO_BLOCK_SIZE - 1) + / SDIO_BLOCK_SIZE; + /* Copy payload to buffer */ + memset(fwbuf_, 0, 2048 + BUF_ALIGN); + memmove(fwbuf, (uint8_t *)((size_t)fw->data + offset), txlen); + + if (MMCBUS_IO_WRITE_FIFO(device_get_parent(dev), dev, sc->ioport, + (uint8_t *) fwbuf, + tx_blocks * SDIO_BLOCK_SIZE)) { + device_printf(dev, "Cannot write-fifo\n"); + break; + } + + offset += txlen; + + if (offset >= fw->datasize) + break; + pause("sdiowl", 2); + + } while (true); + + device_printf(sc->dev, "FW download over, size %d bytes\n", offset); + + /* Check FW status */ + if (sdiowl_check_fw_status(sc)) { + device_printf(sc->dev, "FW did not come up in time\n"); + return (-1); + } else device_printf(sc->dev, "FW READY\n"); + + /* Enable host interrupts */ + sdiowl_enable_host_int(sc); + + return (0); +} + +static int +sdiowl_detach(device_t dev) +{ + /* Not implemented yet */ + return (-1); +} + +static device_method_t sdiowl_methods[] = { + DEVMETHOD(device_probe, sdiowl_probe), + DEVMETHOD(device_attach, sdiowl_attach), + DEVMETHOD(device_detach, sdiowl_detach), + DEVMETHOD_END +}; + +static driver_t sdiowl_driver = { + "sdiowl", + sdiowl_methods, + sizeof(struct sdiowl_softc), +}; +static devclass_t sdiowl_devclass; + +DRIVER_MODULE(sdiowl, mmc, sdiowl_driver, sdiowl_devclass, NULL, NULL); diff --git a/sys/boot/uboot/common/main.c b/sys/boot/uboot/common/main.c index 82c86b2..0a5b368 100644 --- a/sys/boot/uboot/common/main.c +++ b/sys/boot/uboot/common/main.c @@ -122,6 +122,7 @@ main(void) struct api_signature *sig = NULL; int i; struct open_file f; + char *ub_currdev; if (!api_search_sig(&sig)) return (-1); @@ -166,6 +167,7 @@ main(void) printf("(%s, %s)\n", bootprog_maker, bootprog_date); meminfo(); + ub_currdev = ub_env_get("currdev"); /* * March through the device switch probing for things. */ @@ -198,8 +200,13 @@ main(void) if (devsw[i] == NULL) panic("No boot device found!"); - env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), - uboot_setcurrdev, env_nounset); + if (ub_currdev) { + env_setenv("currdev", EV_VOLATILE, ub_currdev, + uboot_setcurrdev, env_nounset); + } else { + env_setenv("currdev", EV_VOLATILE, uboot_fmtdev(&currdev), + uboot_setcurrdev, env_nounset); + } env_setenv("loaddev", EV_VOLATILE, uboot_fmtdev(&currdev), env_noset, env_nounset); diff --git a/sys/dev/mmc/mmc.c b/sys/dev/mmc/mmc.c index f101e65..2da74a7 100644 --- a/sys/dev/mmc/mmc.c +++ b/sys/dev/mmc/mmc.c @@ -67,6 +67,9 @@ __FBSDID("$FreeBSD$"); #include #include #include +#include +#include + #include "mmcbr_if.h" #include "mmcbus_if.h" @@ -76,6 +79,13 @@ struct mmc_softc { struct intr_config_hook config_intrhook; device_t owner; uint32_t last_rca; + uint32_t __sdio_rca; /* XXX Temp; for testng only */ + uint32_t __sdio_cis1_info; + uint8_t sdio_nfunc; + u_char sdio_bus_width; + uint8_t sdio_support_hs; + struct sdio_function sdio_func0; + STAILQ_HEAD(, sdio_function) sdiof_head; }; /* @@ -102,6 +112,7 @@ struct mmc_ivars { uint32_t hs_tran_speed; /* Max speed in high speed mode */ uint32_t erase_sector; /* Card native erase sector size */ char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */ + struct sdio_function *sdiof; }; #define CMD_RETRIES 3 @@ -159,10 +170,16 @@ static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start, int size); static int mmc_highest_voltage(uint32_t ocr); static void mmc_idle_cards(struct mmc_softc *sc); +static int mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn); +static uint8_t mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr); +static int mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, + uint32_t adr, uint8_t *data); static void mmc_ms_delay(int ms); static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard); static void mmc_power_down(struct mmc_softc *sc); static void mmc_power_up(struct mmc_softc *sc); +static int mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, + uint8_t *nfunc, uint8_t *mem_present); static void mmc_rescan_cards(struct mmc_softc *sc); static void mmc_scan(struct mmc_softc *sc); static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, @@ -220,6 +237,8 @@ mmc_attach(device_t dev) sc->dev = dev; MMC_LOCK_INIT(sc); + STAILQ_INIT(&sc->sdiof_head); + /* We'll probe and attach our children later, but before / mount */ sc->config_intrhook.ich_func = mmc_delayed_attach; sc->config_intrhook.ich_arg = sc; @@ -470,6 +489,7 @@ mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode, return (0); } +/* CMD0 */ static void mmc_idle_cards(struct mmc_softc *sc) { @@ -494,6 +514,7 @@ mmc_idle_cards(struct mmc_softc *sc) mmc_ms_delay(1); } +/* CMD41 -> CMD55 */ static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -521,6 +542,7 @@ mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD1 */ static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) { @@ -548,6 +570,7 @@ mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr) return (err); } +/* CMD8 */ static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs) { @@ -600,6 +623,7 @@ mmc_power_down(struct mmc_softc *sc) mmcbr_update_ios(dev); } +/* CMD7 */ static int mmc_select_card(struct mmc_softc *sc, uint16_t rca) { @@ -1042,6 +1066,7 @@ mmc_app_decode_sd_status(uint32_t *raw_sd_status, sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2); } +/* CMD2 */ static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid) { @@ -1162,6 +1187,7 @@ mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp) return (err); } +/* CMD3 */ static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) { @@ -1177,6 +1203,7 @@ mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp) return (err); } +/* CMD13 */ static int mmc_send_status(struct mmc_softc *sc, uint16_t rca, uint32_t *status) { @@ -1223,6 +1250,423 @@ mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard) ivar->read_only ? ", read-only" : ""); } +/* + * Enables the given function on SDIO card. + */ +static int +mmc_io_func_enable(struct mmc_softc *sc, uint32_t fn) +{ + int err, i; + uint8_t funcs; + + if (fn > sc->sdio_nfunc) { + device_printf(sc->dev, "Invalid function to enable: %d\n", fn); + return (MMC_ERR_INVALID); + } + + funcs = mmc_io_read_1(sc, 0, SD_IO_CCCR_FN_READY); + + funcs |= 1 << fn; + err = mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_FN_ENABLE, &funcs); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error writing SDIO func enable %d\n", err); + return (err); + } + + funcs = 0; + for(i=0; i < 10; i++) { + funcs = mmc_io_read_1(sc, 0, SD_IO_CCCR_FN_READY); + + if (funcs & (1 << fn)) + return 0; + mmc_ms_delay(10); + } + + device_printf(sc->dev, "Cannot enable function %d!\n", fn); + return (MMC_ERR_FAILED); +} + +/* CMD52 */ +static int +mmc_io_rw_direct(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *data) +{ + struct mmc_command cmd; + int err; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = SD_IO_RW_DIRECT; + cmd.arg = SD_IO_RW_FUNC(fn) | SD_IO_RW_ADR(adr); + if (wr) + cmd.arg |= SD_IO_RW_WR | SD_IO_RW_RAW | SD_IO_RW_DAT(*data); + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.data = NULL; + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + /* Just for information... */ + if (R5_IO_CURRENT_STATE(cmd.resp[0]) != 1) + printf("!!! SDIO state %d\n", R5_IO_CURRENT_STATE(cmd.resp[0])); + + if (cmd.resp[0] & R5_ERROR) + printf("An error was detected!\n"); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + printf("A CRC error was detected!\n"); + + *data = (uint8_t) (cmd.resp[0] & 0xff); + return (MMC_ERR_NONE); +} + +/* + * CMD53 + * incr = 1 with non-zero block count does not make any sense! +*/ +static int +mmc_io_rw_extended(struct mmc_softc *sc, int wr, uint32_t fn, uint32_t adr, + uint8_t *datap, size_t datalen, uint8_t incr, uint8_t blks) +{ + int err; + struct mmc_command cmd; + struct mmc_data data; + + memset(&cmd, 0, sizeof(cmd)); + memset(&data, 0, sizeof(data)); + + cmd.opcode = SD_IO_RW_EXTENDED; + cmd.flags = MMC_RSP_R5 | MMC_CMD_AC; + cmd.arg = SD_IO_RW_FUNC(fn); + cmd.arg |= SD_IO_RW_ADR(adr); + if (blks) + cmd.arg |= SD_IOE_RW_BLK | SD_IOE_RW_LEN(blks); + else + cmd.arg |= SD_IOE_RW_LEN(datalen); + if (wr) + cmd.arg |= SD_IO_RW_WR; + else + memset(datap, 0, datalen); + + if (incr) + cmd.arg |= SD_IO_RW_INCR; + cmd.data = &data; + + data.data = datap; + data.len = datalen; + data.flags = wr ? MMC_DATA_WRITE : MMC_DATA_READ; + if (blks > 1) { + data.flags |= MMC_DATA_MULTI; + data.blocksz = data.len / blks; + } + + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + + if (err) + return (err); + if (cmd.error) + return (cmd.error); + + if (cmd.resp[0] & R5_COM_CRC_ERROR) + return (MMC_ERR_BADCRC); + if (cmd.resp[0] & (R5_ILLEGAL_COMMAND | R5_FUNCTION_NUMBER)) + return (MMC_ERR_INVALID); + if (cmd.resp[0] & R5_OUT_OF_RANGE) + return (MMC_ERR_FAILED); + + return (MMC_ERR_NONE); +} + +static uint8_t +mmc_io_read_1(struct mmc_softc *sc, uint32_t fn, uint32_t adr) +{ + int err; + uint8_t val = 0; + + err = mmc_io_rw_direct(sc, 0, fn, adr, &val); + if (err) { + device_printf(sc->dev, "Err reading FN %d addr 0x%08X: %d", + fn, adr, err); + return (0xff); + } + return val; +} + +/* + * Parse Card Information Structure of the SDIO card. + * Both Function 0 CIS and Function 1-7 CIS are supported. + */ +static int +mmc_io_parse_cis(struct mmc_softc *sc, uint8_t func, uint32_t cisptr, struct sdio_function *sdio_func) +{ + uint32_t tmp; + + uint8_t tuple_id, tuple_len, func_id; + uint32_t addr, maninfo_p; + + char *cis1_info[4]; + int start, i, ch, count; + char cis1_info_buf[256]; + + sdio_func->number = func; + + cis1_info[0] = NULL; + cis1_info[1] = NULL; + cis1_info[2] = NULL; + cis1_info[3] = NULL; + memset(cis1_info_buf, 0, 256); + + tmp = 0; + addr = cisptr; + + /* + * XXX Some parts of this code are taken + * from sys/dev/pccard/pccard_cis.c. + * Need to think about making it more abstract. + */ + do { + tuple_id = mmc_io_read_1(sc, 0, addr++); + if (tuple_id == SD_IO_CISTPL_END) + break; + tuple_len = mmc_io_read_1(sc, 0, addr++); + if (tuple_len == 0 && tuple_id != 0x00) { + device_printf(sc->dev, + "Parse error: 0-length tuple %02X\n", tuple_id); + break; + } + + switch (tuple_id) { + case SD_IO_CISTPL_VERS_1: + maninfo_p = addr; + + sdio_func->cis1_major = mmc_io_read_1(sc, 0, maninfo_p); + sdio_func->cis1_minor = mmc_io_read_1(sc, 0, maninfo_p + 1); + + /* + * XXX Temp; use this to test if multi-byte read from + * cis1_info will also return crap + */ + sc->__sdio_cis1_info = maninfo_p + 2; + for (count = 0, start = 0, i = 0; + (count < 4) && ((i + 4) < 256); i++) { + ch = mmc_io_read_1(sc, 0, maninfo_p + 2 + i); + if (ch == 0xff) + break; + cis1_info_buf[i] = ch; + if (ch == 0) { + cis1_info[count] = + cis1_info_buf + start; + start = i + 1; + count++; + } + } + device_printf(sc->dev, "Read from %02X using 1-byte read:\n", sc->__sdio_cis1_info); + hexdump(cis1_info_buf, 256, NULL, 0); + + device_printf(sc->dev, "*** Info[0]: %s\n", cis1_info[0]); + device_printf(sc->dev, "*** Info[1]: %s\n", cis1_info[1]); + device_printf(sc->dev, "*** Info[2]: %s\n", cis1_info[2]); + device_printf(sc->dev, "*** Info[3]: %s\n", cis1_info[3]); + break; + + case SD_IO_CISTPL_MANFID: + if (tuple_len < 4) { + device_printf(sc->dev, "MANFID is too short\n"); + break; + } + sdio_func->manufacturer = mmc_io_read_1(sc, 0, addr); + sdio_func->manufacturer |= mmc_io_read_1(sc, 0, addr + 1) << 8; + + sdio_func->product = mmc_io_read_1(sc, 0, addr + 2); + sdio_func->product |= mmc_io_read_1(sc, 0, addr + 3) << 8; + break; + + case SD_IO_CISTPL_FUNCID: + /* Function ID for SDIO devices is always 0x0C */ + if (tuple_len < 1) { + device_printf(sc->dev, "FUNCID is too short\n"); + break; + } + func_id = mmc_io_read_1(sc, 0, addr); + if (func_id != 0x0C) + device_printf(sc->dev, "func_id non-std: %d\n", func_id); + break; + + case SD_IO_CISTPL_FUNCE: + if (tuple_len < 4) { + device_printf(sc->dev, "FUNCE is too short\n"); + break; + } + uint8_t ext_data_type = mmc_io_read_1(sc, 0, addr); + + if (func == 0) { + if (ext_data_type != 0x0) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + sdio_func->max_blksize = + mmc_io_read_1(sc, 0, addr + 1); + sdio_func->max_blksize |= + mmc_io_read_1(sc, 0, addr + 2) << 8; + sdio_func->max_tran_speed = + mmc_io_read_1(sc, 0, addr + 3); + uint8_t max_tran_rate = + sdio_func->max_tran_speed & 0x7; + uint8_t timecode = + (sdio_func->max_tran_speed >> 3) & 0xF; + + device_printf(sc->dev, + "*** Max tran speed: %02X (unit %d, time value code %d\n", + sdio_func->max_tran_speed, max_tran_rate, timecode); + } else { + if (ext_data_type != 0x1) + device_printf(sc->dev, + "funce for func 0 non-std: %d\n", + ext_data_type); + sdio_func->max_blksize = + mmc_io_read_1(sc, 0, addr + 0x0c); + sdio_func->max_blksize |= + mmc_io_read_1(sc, 0, addr + 0x0d) << 8; + + } + + break; + + default: + device_printf(sc->dev, + "*** Skipping tuple ID %02X len %02X\n", + tuple_id, tuple_len); + break; + } + + addr += tuple_len; + tmp++; + } while (tuple_id != SD_IO_CISTPL_END && tmp < 10); + + return 0; +} + +/* + * Parse Card Common Control Register of the SDIO card + */ +static int +mmc_io_parse_cccr(struct mmc_softc *sc) +{ + uint32_t cisptr = 0; + + cisptr = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR); + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in CCCR: %08X\n", cisptr); + return (-1); + } + + return mmc_io_parse_cis(sc, 0, cisptr, &sc->sdio_func0); +} + +/* + * Parse Function Basic Register of the given function + */ +static int +mmc_io_parse_fbr(struct mmc_softc *sc, uint8_t func) +{ + uint32_t fbr_addr, cisptr; + + fbr_addr = SD_IO_FBR_START * func + 0x9; + cisptr = mmc_io_read_1(sc, 0, fbr_addr); + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 1) << 8; + cisptr |= mmc_io_read_1(sc, 0, fbr_addr + 2) << 16; + + if (cisptr < SD_IO_CIS_START || + cisptr > SD_IO_CIS_START + SD_IO_CIS_SIZE) { + device_printf(sc->dev, "Bad CIS pointer in FBR: %08X\n", cisptr); + return (-1); + } + + struct sdio_function *f = malloc(sizeof(struct sdio_function), M_DEVBUF, M_WAITOK); + STAILQ_INSERT_TAIL(&sc->sdiof_head, f, sdiof_list); + + return mmc_io_parse_cis(sc, func, cisptr, f); +} + +static void +mmc_io_get_info(struct mmc_softc *sc) +{ + sc->sdio_bus_width = bus_width_1; + sc->sdio_support_hs = 0; + + uint8_t cardcap = mmc_io_read_1(sc, 0, SD_IO_CCCR_CARDCAP); + uint8_t hs_info = mmc_io_read_1(sc, 0, SD_IO_CCCR_CISPTR + 0x13); + + /* + * If the card is a full-speed card, it supports 4-bit bus width. + * If it is low-speed, we check 4BLS to determine if it + * supports 4-bit width + */ + if (((cardcap & (1 << 6)) && (cardcap & (1 << 7))) || + ((cardcap & (1 << 6)) == 0)) + sc->sdio_bus_width = bus_width_4; + + sc->sdio_support_hs = hs_info & (1 << 0); +} + +/* Set bus width for SDIO card */ +static int +mmc_io_set_bus_width(struct mmc_softc *sc, int width) +{ + uint8_t busctrl = mmc_io_read_1(sc, 0, SD_IO_CCCR_BUS_WIDTH); + + busctrl |= width == bus_width_4 ? CCCR_BUS_WIDTH_4 : 0; + + if (mmc_debug) + device_printf(sc->dev, "Setting SDIO bus width to %d bits\n", + width == bus_width_4 ? 4 : 1); + + return mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_BUS_WIDTH, &busctrl); +} + +static int +mmc_io_set_block_size(struct mmc_softc *sc, struct sdio_function *sdiof, + uint16_t bs) +{ + uint32_t addr; + uint8_t val; + int err; + + addr = SD_IO_FBR_START * sdiof->number + 0x10; + val = bs & 0xFF; + + err = mmc_io_rw_direct(sc, 1, 0, + addr++, &val); + if (err) { + device_printf(sc->dev, "mmc_io_set_block_size: Err %d\n", err); + return (err); + } + + val = (bs >> 8) & 0xFF; + err = mmc_io_rw_direct(sc, 1, 0, + addr++, &val); + if (err) { + device_printf(sc->dev, "mmc_io_set_block_size: Err %d\n", err); + return (err); + } + sdiof->blksize = bs; + + return (err); +} + static void mmc_discover_cards(struct mmc_softc *sc) { @@ -1233,11 +1677,102 @@ mmc_discover_cards(struct mmc_softc *sc) device_t child; uint16_t rca = 2; u_char switch_res[64]; + uint8_t nfunc, mem_present; if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing cards\n"); while (1) { - err = mmc_all_send_cid(sc, raw_cid); + /* + * Probe SDIO first, because SDIO cards don't have + * a CID register and won't respond to the CMD2 + */ + mmc_idle_cards(sc); + err = mmc_probe_sdio(sc, 0, NULL, &nfunc, &mem_present); + sc->sdio_nfunc = nfunc; + if (err != MMC_ERR_NONE && err != MMC_ERR_TIMEOUT) { + device_printf(sc->dev, "Error probing SDIO %d\n", err); + break; + } + + /* The card answered OK -> SDIO */ + if (err == MMC_ERR_NONE) { + device_printf(sc->dev, "Detected SDIO card\n"); + mmc_send_relative_addr(sc, &resp); /* CMD3 */ + uint16_t rca = resp >> 16; + err = mmc_select_card(sc, rca); /* CMD7 */ + sc->__sdio_rca = rca; /* XXX Temp; for testing only */ + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error selecting SDIO %d\n", err); + break; + } + + device_printf(sc->dev, "Get card info\n"); + mmc_io_parse_cccr(sc); + mmc_io_get_info(sc); + for(i=1; i <= nfunc; i++) { + device_printf(sc->dev, + "Get info for function %d\n", i); + mmc_io_parse_fbr(sc, i); + mmc_io_func_enable(sc, i); + } + + device_printf(sc->dev, "=== Functions ===\n"); + struct sdio_function *f; + + STAILQ_FOREACH(f, &sc->sdiof_head, sdiof_list) + device_printf(sc->dev, + "FN %d, vendor %04X, product %04X; blksize %02X\n", + f->number, f->manufacturer, f->product, f->max_blksize); + + /* + * Only set 4-bit width if both the host and the card + * support it. + * The card starts in 1-bit mode by default. + */ + if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA && + sc->sdio_bus_width == bus_width_4) { + mmc_io_set_bus_width(sc, sc->sdio_bus_width); + mmcbr_set_bus_width(sc->dev, sc->sdio_bus_width); + } + + u_char sdio_timing; + uint32_t sdio_tran_speed; + /* Set high speed mode if host and card support it */ + if (mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED && + sc->sdio_support_hs) { + device_printf(sc->dev, "Activating high-speed mode"); + uint8_t hs_info = 1; + err = mmc_io_rw_direct(sc, 1, 0, + SD_IO_CCCR_CISPTR + 0x13, &hs_info); + if (err != MMC_ERR_NONE) { + device_printf(sc->dev, "Error setting HS mode%d\n", err); + return; + } + sdio_timing = bus_timing_hs; + sdio_tran_speed = 50 * 1000 * 1000; + } else { + sdio_tran_speed = 25 * 1000 * 1000; + sdio_timing = bus_timing_normal; + } + + /* Attach children */ + STAILQ_FOREACH(f, &sc->sdiof_head, sdiof_list) { + ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF, + M_WAITOK | M_ZERO); + ivar->sec_count = 0; + ivar->sdiof = f; + ivar->rca = rca; + ivar->timing = sdio_timing; + ivar->tran_speed = + ivar->hs_tran_speed = sdio_tran_speed; + child = device_add_child(sc->dev, NULL, -1); + device_set_ivars(child, ivar); + } + if (!mem_present) + return; + } + + err = mmc_all_send_cid(sc, raw_cid); /* Command 2 */ if (err == MMC_ERR_TIMEOUT) break; if (err != MMC_ERR_NONE) { @@ -1491,9 +2026,45 @@ mmc_delete_cards(struct mmc_softc *sc) return (0); } +/* CMD 5 */ +static int +mmc_probe_sdio(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr, uint8_t *nfunc, uint8_t *mem_present) { + struct mmc_command cmd; + int err = MMC_ERR_NONE, i; + + memset(&cmd, 0, sizeof(cmd)); + cmd.opcode = IO_SEND_OP_COND; + cmd.arg = 0; + cmd.flags = MMC_RSP_R4; + cmd.data = NULL; + + for (i = 0; i < 1000; i++) { + err = mmc_wait_for_cmd(sc, &cmd, CMD_RETRIES); + if (err != MMC_ERR_NONE) + break; + if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) || + (ocr & MMC_OCR_VOLTAGE) == 0) + break; + err = MMC_ERR_TIMEOUT; + mmc_ms_delay(10); + } + + if (err == MMC_ERR_NONE) { + if (rocr) + *rocr = cmd.resp[0]; + if (nfunc) + *nfunc = SD_IO_OCR_NUM_FUNCTIONS(cmd.resp[0]); + if (mem_present) + *mem_present = cmd.resp[0] >> 27 & 0x1; + } + + return (err); +} + static void mmc_go_discovery(struct mmc_softc *sc) { + uint8_t nfunc, mem_present; uint32_t ocr; device_t dev; int err; @@ -1509,17 +2080,24 @@ mmc_go_discovery(struct mmc_softc *sc) if (bootverbose || mmc_debug) device_printf(sc->dev, "Probing bus\n"); mmc_idle_cards(sc); - err = mmc_send_if_cond(sc, 1); + err = mmc_send_if_cond(sc, 1); /* SD_SEND_IF_COND = 8 */ if ((bootverbose || mmc_debug) && err == 0) device_printf(sc->dev, "SD 2.0 interface conditions: OK\n"); - if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_probe_sdio(sc, 0, &ocr, &nfunc, &mem_present) == MMC_ERR_NONE) { + device_printf(dev, "SDIO probe OK (OCR: 0x%08x, %d functions, memory: %d)\n", ocr, nfunc, mem_present); + if (nfunc > 0 && mem_present) { + device_printf(sc->dev, "SDIO combo cards are not supported yet"); + return; + } + } else + if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* retry 55 -> then 41 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "SD probe: failed\n"); /* * Failed, try MMC */ mmcbr_set_mode(dev, mode_mmc); - if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { + if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) { /* command 1 */ if (bootverbose || mmc_debug) device_printf(sc->dev, "MMC probe: failed\n"); ocr = 0; /* Failed both, powerdown. */ @@ -1553,9 +2131,11 @@ mmc_go_discovery(struct mmc_softc *sc) * Reselect the cards after we've idled them above. */ if (mmcbr_get_mode(dev) == mode_sd) { - err = mmc_send_if_cond(sc, 1); - mmc_send_app_op_cond(sc, - (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + if (mem_present) { + err = mmc_send_if_cond(sc, 1); /* CMD 8 */ + mmc_send_app_op_cond(sc, /* 41 -> 55 */ + (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL); + } } else mmc_send_op_cond(sc, mmcbr_get_ocr(dev), NULL); mmc_discover_cards(sc); @@ -1564,6 +2144,30 @@ mmc_go_discovery(struct mmc_softc *sc) mmcbr_set_bus_mode(dev, pushpull); mmcbr_update_ios(dev); mmc_calculate_clock(sc); + + /* XXX TESTING RW_EXTENDED */ + mmc_select_card(sc, sc->__sdio_rca); + + /* Try to do normal CMD52 that should work correctly */ + uint8_t hs_info; + err = mmc_io_rw_direct(sc, 0, 0, SD_IO_CCCR_CISPTR + 0x13, &hs_info); + if (err) + device_printf(sc->dev, "HS INFO read err %d\n", err); + + /* Disable interrupts from all functions */ + hs_info = 0; + err = mmc_io_rw_direct(sc, 1, 0, SD_IO_CCCR_INT_ENABLE, &hs_info); + if (err) + device_printf(sc->dev, "Interrupt disable err %d\n", err); + + /* Now try actual command */ +// mmc_debug = 10; + uint8_t data[100]; + err = mmc_io_rw_extended(sc, 0, 0, sc->__sdio_cis1_info, data, 100, 0, 0); + if (err) + device_printf(sc->dev, "Ext read err %d\n", err); + hexdump(data, 100, NULL, 0); + bus_generic_attach(dev); /* mmc_update_children_sysctl(dev);*/ } @@ -1575,7 +2179,7 @@ mmc_calculate_clock(struct mmc_softc *sc) int nkid, i, f_min, f_max; device_t *kids; struct mmc_ivars *ivar; - + f_min = mmcbr_get_f_min(sc->dev); f_max = mmcbr_get_f_max(sc->dev); max_dtr = max_hs_dtr = f_max; @@ -1583,6 +2187,7 @@ mmc_calculate_clock(struct mmc_softc *sc) max_timing = bus_timing_hs; else max_timing = bus_timing_normal; + if (device_get_children(sc->dev, &kids, &nkid) != 0) panic("can't get children"); for (i = 0; i < nkid; i++) { @@ -1668,6 +2273,15 @@ mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result) case MMC_IVAR_MAX_DATA: *result = mmcbr_get_max_data(bus); break; + case MMC_IVAR_SDIO_VENDOR: + *result = ivar->sdiof ? ivar->sdiof->manufacturer : 0; + break; + case MMC_IVAR_SDIO_PRODUCT: + *result = ivar->sdiof ? ivar->sdiof->product : 0; + break; + case MMC_IVAR_SDIO_FUNCTION: + *result = ivar->sdiof ? ivar->sdiof->number : 0; + break; case MMC_IVAR_CARD_ID_STRING: *(char **)result = ivar->card_id_string; break; @@ -1702,6 +2316,120 @@ mmc_child_location_str(device_t dev, device_t child, char *buf, return (0); } +/* SDIO-related MMC bus methods */ +static int +mmcb_io_set_block_size(device_t dev, device_t child, uint16_t bs) +{ + struct mmc_ivars *ivar = device_get_ivars(child); + + return mmc_io_set_block_size(device_get_softc(dev), ivar->sdiof, bs); +} + +static int +mmcb_io_f0_read_1(device_t dev, device_t child, uint32_t adr, uint8_t *val) +{ + int err; + err = mmc_io_rw_direct(device_get_softc(dev), 0, 0, adr, val); + if (err) + device_printf(dev, "mmc_io_f0_read_1: Err %d", err); + return (err); +} + +static int +mmcb_io_read_1(device_t dev, device_t child, uint32_t adr, uint8_t *val) +{ + int err; + struct mmc_ivars *ivar = device_get_ivars(child); + + err = mmc_io_rw_direct(device_get_softc(dev), 0, ivar->sdiof->number, + adr, val); + if (err) + device_printf(dev, "mmc_io_read_1: Err %d", err); + return (err); +} + +static int +mmcb_io_write_1(device_t dev, device_t child, uint32_t adr, uint8_t val) +{ + int err; + struct mmc_ivars *ivar = device_get_ivars(child); + + err = mmc_io_rw_direct(device_get_softc(dev), 0, ivar->sdiof->number, + adr, &val); + if (err) + device_printf(dev, "mmc_io_write_1: Err %d", err); + return (err); +} + +static int +mmcb_io_write_multi(device_t dev, device_t child, uint32_t adr, + uint8_t *datap, size_t datalen, uint16_t nblocks) +{ + int err; + struct mmc_ivars *ivar = device_get_ivars(child); + + err = mmc_io_rw_extended(device_get_softc(dev), 1, ivar->sdiof->number, + adr, datap, datalen, 1, nblocks); + if (err) + device_printf(dev, "mmcb_io_write_multi: Err %d", err); + return (err); +} + +static int +mmcb_io_read_multi(device_t dev, device_t child, uint32_t adr, + uint8_t *datap, size_t datalen, uint16_t nblocks) +{ + int err; + struct mmc_ivars *ivar = device_get_ivars(child); + + err = mmc_io_rw_extended(device_get_softc(dev), 0, ivar->sdiof->number, + adr, datap, datalen, 1, nblocks); + + if (err) + device_printf(dev, "mmc_io_read_multi: Err %d\n", err); + return (err); +} + +static int +mmcb_io_write_fifo(device_t dev, device_t child, uint32_t adr, + uint8_t *datap, size_t datalen) +{ + int err; + uint32_t b_written = 0; + uint32_t b_to_write = datalen; + uint32_t nblocks = 0; + struct mmc_ivars *ivar = device_get_ivars(child); + +// device_printf(dev, "mmcb_io_write_fifo: func %d, adr=0x%04X, datap=0x%04X, len %d\n", ivar->sdiof->number, adr, (unsigned int) datap, datalen); + err = 0; + +/* + * Linux code takes into account the max block size that is allowed + * by the host controller. Would be nice to be able to get such information. + */ + if (datalen >= ivar->sdiof->blksize) { + nblocks = datalen / ivar->sdiof->blksize; + b_to_write = ivar->sdiof->blksize * nblocks; + err = mmc_io_rw_extended(device_get_softc(dev), 1, + ivar->sdiof->number, adr, datap, b_to_write, 0, nblocks); + if (err) { + device_printf(dev, "mmcb_io_write_fifo: Err %d\n", err); + return (err); + } + + b_written = b_to_write; + } + + if (datalen - b_written > 0) { + b_to_write = datalen - b_written; + err = mmc_io_rw_extended(device_get_softc(dev), 1, + ivar->sdiof->number, adr, datap + b_written, b_to_write, 0, 0); + if (err) + device_printf(dev, "mmcb_io_write_fifo: Err %d\n", err); + } + return (err); +} + static device_method_t mmc_methods[] = { /* device_if */ DEVMETHOD(device_probe, mmc_probe), @@ -1717,6 +2445,13 @@ static device_method_t mmc_methods[] = { /* MMC Bus interface */ DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request), + DEVMETHOD(mmcbus_io_set_block_size, mmcb_io_set_block_size), + DEVMETHOD(mmcbus_io_f0_read_1, mmcb_io_f0_read_1), + DEVMETHOD(mmcbus_io_read_1, mmcb_io_read_1), + DEVMETHOD(mmcbus_io_read_multi, mmcb_io_read_multi), + DEVMETHOD(mmcbus_io_write_1, mmcb_io_write_1), + DEVMETHOD(mmcbus_io_write_multi, mmcb_io_write_multi), + DEVMETHOD(mmcbus_io_write_fifo, mmcb_io_write_fifo), DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus), DEVMETHOD(mmcbus_release_bus, mmc_release_bus), @@ -1735,3 +2470,4 @@ DRIVER_MODULE(mmc, at91_mci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_pci, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_bcm, mmc_driver, mmc_devclass, NULL, NULL); DRIVER_MODULE(mmc, sdhci_fdt, mmc_driver, mmc_devclass, NULL, NULL); +DRIVER_MODULE(mmc, sdio, mmc_driver, mmc_devclass, NULL, NULL); diff --git a/sys/dev/mmc/mmcbus_if.m b/sys/dev/mmc/mmcbus_if.m index 14dc8e9..d62b139 100644 --- a/sys/dev/mmc/mmcbus_if.m +++ b/sys/dev/mmc/mmcbus_if.m @@ -73,6 +73,79 @@ METHOD int wait_for_request { }; # +# SDIO: Set block size for the current function +# Returns: error or 0 +METHOD int io_set_block_size { + device_t brdev; + device_t reqdev; + uint16_t bs; +}; + +# SDIO: read 1 byte from function 0 +# Returns: error or 0 +METHOD int io_f0_read_1 { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t *val; +}; + +# +# SDIO: read 1 byte from current function +# Return: error or 0 +METHOD int io_read_1 { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t *ret; +}; + +# +# SDIO: read multiple bytes from current function +# Return: error or 0 +METHOD int io_read_multi { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t *datap; + size_t datalen; + uint16_t nblocks; +}; + +# +# SDIO: write 1 byte to current function +# Return: error or 0 +METHOD int io_write_1 { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t val; +}; + +# +# SDIO: write multiple bytes to current function +# Return: error or 0 +METHOD int io_write_multi { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t *datap; + size_t datalen; + uint16_t nblocks; +}; + +# +# SDIO: write multiple bytes into the given FIFO +# Return: error or 0 +METHOD int io_write_fifo { + device_t brdev; + device_t reqdev; + uint32_t adr; + uint8_t *datap; + size_t datalen; +}; + +# # Claim the current bridge, blocking the current thread until the host # is no longer busy. # diff --git a/sys/dev/mmc/mmcioreg.h b/sys/dev/mmc/mmcioreg.h new file mode 100644 index 0000000..10e304b --- /dev/null +++ b/sys/dev/mmc/mmcioreg.h @@ -0,0 +1,96 @@ +/* $OpenBSD: sdmmc_ioreg.h,v 1.4 2007/06/02 01:48:37 uwe Exp $ */ +/* $FreeBSD$ */ + +/* + * Copyright (c) 2006 Uwe Stuehler + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SDMMC_IOREG_H +#define _SDMMC_IOREG_H + +/* SDIO commands */ /* response type */ +#define SD_IO_SEND_OP_COND 5 /* R4 */ +#define SD_IO_RW_DIRECT 52 /* R5 */ +#define SD_IO_RW_EXTENDED 53 /* R5? */ + +/* CMD52 arguments */ +#define SD_ARG_CMD52_READ (0<<31) +#define SD_ARG_CMD52_WRITE (1<<31) +#define SD_ARG_CMD52_FUNC_SHIFT 28 +#define SD_ARG_CMD52_FUNC_MASK 0x7 +#define SD_ARG_CMD52_EXCHANGE (1<<27) +#define SD_ARG_CMD52_REG_SHIFT 9 +#define SD_ARG_CMD52_REG_MASK 0x1ffff +#define SD_ARG_CMD52_DATA_SHIFT 0 +#define SD_ARG_CMD52_DATA_MASK 0xff +#define SD_R5_DATA(resp) ((resp)[0] & 0xff) + +/* CMD53 arguments */ +#define SD_ARG_CMD53_READ (0<<31) +#define SD_ARG_CMD53_WRITE (1<<31) +#define SD_ARG_CMD53_FUNC_SHIFT 28 +#define SD_ARG_CMD53_FUNC_MASK 0x7 +#define SD_ARG_CMD53_BLOCK_MODE (1<<27) +#define SD_ARG_CMD53_INCREMENT (1<<26) +#define SD_ARG_CMD53_REG_SHIFT 9 +#define SD_ARG_CMD53_REG_MASK 0x1ffff +#define SD_ARG_CMD53_LENGTH_SHIFT 0 +#define SD_ARG_CMD53_LENGTH_MASK 0x1ff +#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */ + +/* 48-bit response decoding (32 bits w/o CRC) */ +#define MMC_R4(resp) ((resp)[0]) +#define MMC_R5(resp) ((resp)[0]) + +/* SD R4 response (IO OCR) */ +#define SD_IO_OCR_MEM_READY (1<<31) +#define SD_IO_OCR_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3) +/* XXX big fat memory present "flag" because we don't know better */ +#define SD_IO_OCR_MEM_PRESENT (0xf<<24) +#define SD_IO_OCR_MASK 0x00fffff0 + +/* Card Common Control Registers (CCCR) */ +#define SD_IO_CCCR_START 0x00000 +#define SD_IO_CCCR_SIZE 0x100 +#define SD_IO_CCCR_FN_ENABLE 0x02 +#define SD_IO_CCCR_FN_READY 0x03 +#define SD_IO_CCCR_INT_ENABLE 0x04 +#define SD_IO_CCCR_CTL 0x06 +#define CCCR_CTL_RES (1<<3) +#define SD_IO_CCCR_BUS_WIDTH 0x07 +#define CCCR_BUS_WIDTH_4 (1<<1) +#define CCCR_BUS_WIDTH_1 (1<<0) +#define SD_IO_CCCR_CARDCAP 0x08 +#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */ + +/* Function Basic Registers (FBR) */ +#define SD_IO_FBR_START 0x00100 +#define SD_IO_FBR_SIZE 0x00700 + +/* Card Information Structure (CIS) */ +#define SD_IO_CIS_START 0x01000 +#define SD_IO_CIS_SIZE 0x17000 + +/* CIS tuple codes (based on PC Card 16) */ +#define SD_IO_CISTPL_VERS_1 0x15 +#define SD_IO_CISTPL_MANFID 0x20 +#define SD_IO_CISTPL_FUNCID 0x21 +#define SD_IO_CISTPL_FUNCE 0x22 +#define SD_IO_CISTPL_END 0xff + +/* CISTPL_FUNCID codes */ +/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */ +/* #define SDMMC_FUNCTION_WLAN 0x0c */ +#endif diff --git a/sys/dev/mmc/mmciovar.h b/sys/dev/mmc/mmciovar.h new file mode 100644 index 0000000..94d468b --- /dev/null +++ b/sys/dev/mmc/mmciovar.h @@ -0,0 +1,67 @@ +/*- + * Copyright (c) 2013 Ilya Bakulin. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Portions of this software may have been developed with reference to + * the SD Simplified Specification. The following disclaimer may apply: + * + * The following conditions apply to the release of the simplified + * specification ("Simplified Specification") by the SD Card Association and + * the SD Group. The Simplified Specification is a subset of the complete SD + * Specification which is owned by the SD Card Association and the SD + * Group. This Simplified Specification is provided on a non-confidential + * basis subject to the disclaimers below. Any implementation of the + * Simplified Specification may require a license from the SD Card + * Association, SD Group, SD-3C LLC or other third parties. + * + * Disclaimers: + * + * The information contained in the Simplified Specification is presented only + * as a standard specification for SD Cards and SD Host/Ancillary products and + * is provided "AS-IS" without any representations or warranties of any + * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD + * Card Association for any damages, any infringements of patents or other + * right of the SD Group, SD-3C LLC, the SD Card Association or any third + * parties, which may result from its use. No license is granted by + * implication, estoppel or otherwise under any patent or other rights of the + * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing + * herein shall be construed as an obligation by the SD Group, the SD-3C LLC + * or the SD Card Association to disclose or distribute any technical + * information, know-how or other confidential information to any third party. + */ + +#include +__FBSDID("$FreeBSD$"); +#include + +/* CIS structure of SDIO card */ +struct sdio_function { + int number; + uint8_t cis1_major; + uint8_t cis1_minor; + uint16_t manufacturer; + uint16_t product; + uint16_t max_blksize; + uint8_t max_tran_speed; /* only for func0 */ + uint16_t blksize; + STAILQ_ENTRY(sdio_function) sdiof_list; +}; diff --git a/sys/dev/mmc/mmcreg.h b/sys/dev/mmc/mmcreg.h index f454ddb..7a211cb 100644 --- a/sys/dev/mmc/mmcreg.h +++ b/sys/dev/mmc/mmcreg.h @@ -85,6 +85,8 @@ struct mmc_command { #define MMC_RSP_R1B (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY) #define MMC_RSP_R2 (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP_R7 (MMC_RSP_PRESENT | MMC_RSP_CRC) #define MMC_RSP(x) ((x) & MMC_RSP_MASK) @@ -151,6 +153,30 @@ struct mmc_command { #define R1_STATE_PRG 7 #define R1_STATE_DIS 8 +/* + * R5 responses + * + * Types (per SD 2.0 standard) + *e : error bit + *s : status bit + *r : detected and set for the actual command response + *x : Detected and set during command execution. The host can get + * the status by issuing a command with R1 response. + * + * Clear Condition (per SD 2.0 standard) + *a : according to the card current state. + *b : always related to the previous command. reception of a valid + * command will clear it (with a delay of one command). + *c : clear by read + */ +#define R5_COM_CRC_ERROR (1u << 15)/* er, b */ +#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */ +#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */ +#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12) +#define R5_ERROR (1u << 11)/* erx, c */ +#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */ +#define R5_OUT_OF_RANGE (1u << 8)/* er, c */ + struct mmc_data { size_t len; /* size of the data */ size_t xfer_len; @@ -160,6 +186,7 @@ struct mmc_data { #define MMC_DATA_READ (1UL << 1) #define MMC_DATA_STREAM (1UL << 2) #define MMC_DATA_MULTI (1UL << 3) + uint32_t blocksz; /* Size of the data block */ struct mmc_request *mrq; }; @@ -181,7 +208,7 @@ struct mmc_request { #define MMC_SET_RELATIVE_ADDR 3 #define SD_SEND_RELATIVE_ADDR 3 #define MMC_SET_DSR 4 - /* reserved: 5 */ +#define IO_SEND_OP_COND 5 #define MMC_SWITCH_FUNC 6 #define MMC_SWITCH_FUNC_CMDS 0 #define MMC_SWITCH_FUNC_SET 1 @@ -335,6 +362,20 @@ struct mmc_request { #define SD_MAX_HS 50000000 +/* + * SDIO Direct & Extended I/O + */ +#define SD_IO_RW_WR (1u << 31) +#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28) +#define SD_IO_RW_RAW (1u << 27) +#define SD_IO_RW_INCR (1u << 26) +#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9) +#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0) +#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0) + +#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0) +#define SD_IOE_RW_BLK (1u << 27) + /* OCR bits */ /* diff --git a/sys/dev/mmc/mmcsd.c b/sys/dev/mmc/mmcsd.c index 63e0b54..61b6b1f 100644 --- a/sys/dev/mmc/mmcsd.c +++ b/sys/dev/mmc/mmcsd.c @@ -128,8 +128,18 @@ static daddr_t mmcsd_rw(struct mmcsd_softc *sc, struct bio *bp); static int mmcsd_probe(device_t dev) { + uint32_t media_size; - device_quiet(dev); +// device_quiet(dev); + + if(BUS_READ_IVAR(device_get_parent(dev), dev, MMC_IVAR_MEDIA_SIZE, + &media_size)) { + device_printf(dev, "Cannot get media size from bus!\n"); + return (-1); + } + device_printf(dev, "Media size: %d\n", media_size); + if (media_size == 0) + return(-1); device_set_desc(dev, "MMC/SD Memory Card"); return (0); } diff --git a/sys/dev/mmc/mmcvar.h b/sys/dev/mmc/mmcvar.h index b274d32..57a833b 100644 --- a/sys/dev/mmc/mmcvar.h +++ b/sys/dev/mmc/mmcvar.h @@ -69,6 +69,9 @@ enum mmc_device_ivars { MMC_IVAR_BUS_WIDTH, MMC_IVAR_ERASE_SECTOR, MMC_IVAR_MAX_DATA, + MMC_IVAR_SDIO_VENDOR, + MMC_IVAR_SDIO_PRODUCT, + MMC_IVAR_SDIO_FUNCTION, MMC_IVAR_CARD_ID_STRING }; @@ -89,6 +92,9 @@ MMC_ACCESSOR(card_type, CARD_TYPE, int) MMC_ACCESSOR(bus_width, BUS_WIDTH, int) MMC_ACCESSOR(erase_sector, ERASE_SECTOR, int) MMC_ACCESSOR(max_data, MAX_DATA, int) +MMC_ACCESSOR(sdio_vendor, SDIO_VENDOR, int) +MMC_ACCESSOR(sdio_product, SDIO_PRODUCT, int) +MMC_ACCESSOR(sdio_function, SDIO_FUNCTION, int) MMC_ACCESSOR(card_id_string, CARD_ID_STRING, const char *) #endif /* DEV_MMC_MMCVAR_H */ From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 16:36:27 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 6B381C2F for ; Wed, 21 Aug 2013 16:36:27 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-ee0-f51.google.com (mail-ee0-f51.google.com [74.125.83.51]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 000D5283C for ; Wed, 21 Aug 2013 16:36:26 +0000 (UTC) Received: by mail-ee0-f51.google.com with SMTP id c1so387392eek.24 for ; Wed, 21 Aug 2013 09:36:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:message-id:date:from:organization:user-agent :mime-version:to:cc:subject:content-type:content-transfer-encoding; bh=z6INDIzIttxE6wRSAA9AAqp5lPZb1vmiVqozY8pzuNg=; b=F8stn/sbsuj8jSsy4R62/qqzhnC6jwaaPwQO98lK7jUSrkDZtRPTEroCU+r3Cs37m1 jD4PuoYvrSxD9U4hsCUM+UfGL0p5KtjOGkrRnd6DtB1TBvcZzeV/rGKY0c1lLdh8sfRT RhcgSSDjVyzcrRAEaar+kMemu/N8cVGPtc4LMaYm08viCeevyIfEwMPVAhwF9jvPVpI2 U2OnQabFWQBFzoKS+bhbY+n/0K2AXxbHhgddyJid5y00lelwoB3dGTcU98mrs8OJl5Vk 0Bxt0FsQJCzeDLgnyETKleNHCQnzF8L+6JgXmdLY8FpIQ90ylbNvVO7AYTmLn95c3FiI fPmA== X-Gm-Message-State: ALoCoQkM6IJ2wItBPLpx94x+ZTkIBSDaAjOnl4lRkb1Qmt2QqJiur/zO9AeRrX+mzSC/ur8ywOql X-Received: by 10.14.88.65 with SMTP id z41mr11531382eee.38.1377102570082; Wed, 21 Aug 2013 09:29:30 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id z12sm10965108eev.6.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 21 Aug 2013 09:29:29 -0700 (PDT) Message-ID: <5214EAE6.6040300@semihalf.com> Date: Wed, 21 Aug 2013 18:29:26 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130623 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@FreeBSD.org Subject: Introduction to the superpages support for ARMv6/v7 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 16:36:27 -0000 Hello Everyone, I'm happy to announce the preliminary patch adding superpages support for ARMv6/v7 platforms. This code is the core part of the "Superpages for ARMv7" project, sponsored by both Semihalf and The FreeBSD Foundation and developed with the great support of Alan Cox. We'd like to commit these changes before the feature freeze. Therefore, we would greatly appreciate if you could test the patch on your ARM-based platforms and send us your feedback as soon as possible. In addition, please send your remarks and comments if there are any. Please check out this location: http://people.freebsd.org/~raj/patches/arm/superpages/ and files: * 0001-Introduce-preliminary-superpages-support-for-ARMv6-v.patch - patch based on revision 254596 * GUPS.tar.gz - (Giga Updates Per Second) benchmark that can be used to do a quick preview of the functionality. In order to enable superpages utilization one needs to set 'sp_enabled' sysctl variable (in src or loader). Without that, the kernel is supposed to work as it was without SP even so the reservation based allocation mechanism is enabled. One can observe superpages statistics using: sysctl vm.pmap.section We have tested this on Armada XP in SMP environment but the presented support should work on any ARMv6/v7 platform. After committing this code we will send a separate e-mail summing up this work and covering more details. Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 20:42:59 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 1BBD932B for ; Wed, 21 Aug 2013 20:42:59 +0000 (UTC) (envelope-from dave@dogwood.com) Received: from mail-ob0-x233.google.com (mail-ob0-x233.google.com [IPv6:2607:f8b0:4003:c01::233]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D562229A2 for ; Wed, 21 Aug 2013 20:42:58 +0000 (UTC) Received: by mail-ob0-f179.google.com with SMTP id fb19so1837564obc.38 for ; Wed, 21 Aug 2013 13:42:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dogwood.com; s=google; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=2+3piHEF4y9Ap5wuJLgJ0jtm03YV5eRVQaQ/Hdglw0g=; b=NKX/cuQ30tLa4PC6j58TSmMKw+glKuuAgwZPELTB/n0uRanxr1P5LVViJFWFcZ8k5F ddNE3SNilEVr6iwKd/4e2PBJBep3a7NyXXVEi1jeTJt6Zlrp8qRUXcJUeWyM6PE95T9Y Th4RO7RPKfWK6HhysJkEn2mdhdAJFjHubHwxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=2+3piHEF4y9Ap5wuJLgJ0jtm03YV5eRVQaQ/Hdglw0g=; b=VwEF1SCC87h4Afvu46Kah1kQ0+NE27mF4KtMTzr59kWlh7aoguefkB4Oq0x+w6lIdX OjO2gGLgU//erdNPoriUehxTkDLRn9iy1dcbGv54gXamP5+MdrV5T3Zp6t0ByH5vEZ43 1HDVVjcEin+blPTanUxw+Z0rZYFnitXcfNtgH31231eutC9ctMND1oqkmpS8VvPxDbXa XsmIy2KLNapAIXdc36OlUilYHrsFASQ7EveIHal8EkkFWXI82b8e1bHtYLnkY1hx9AUZ pwkQw5GJaBvMf1jKV/rN14qDGah/ipiWRJCG/+IuCWJI8ccm7SHVGFERJlAyIUlLhZft 60OQ== X-Gm-Message-State: ALoCoQnuPDy6jMrfgZNxzprm12Sy0OsbqjW4lYSjiZ/2xRzLplu4fNnMxxEA5iV27aSVZxBQL21f MIME-Version: 1.0 X-Received: by 10.60.15.106 with SMTP id w10mr4562094oec.82.1377117777982; Wed, 21 Aug 2013 13:42:57 -0700 (PDT) Received: by 10.182.236.230 with HTTP; Wed, 21 Aug 2013 13:42:57 -0700 (PDT) In-Reply-To: <81E82602-C147-429A-96BB-7DD7B7AAA38E@netsense.nl> References: <5213CD1A.7000506@martinlaabs.de> <81E82602-C147-429A-96BB-7DD7B7AAA38E@netsense.nl> Date: Wed, 21 Aug 2013 10:42:57 -1000 Message-ID: Subject: Re: Debug stalling Raspberry From: David Cornejo To: Johan Henselmans Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 20:42:59 -0000 On Tue, Aug 20, 2013 at 9:48 PM, Johan Henselmans wrote: > > On 20 aug. 2013, at 22:10, Martin Laabs > wrote: > > > Hi, > > > > currently I run r254441 on a raspberry pi b and every time I run portsnap > > the cpu stopps running. > > This happens during the snapshot verify while around 25k files are > gunziped > > and sha256ed (file after file of cause). I can reproduce this but the Pi > > does not hang reproducible at the same file but the last processed file > is > > different from try to try. > > > I have exactly the same experience on BBB, also with portsnap. The only > way I could get portsnap to finish is by locating /var/db/portsnap on NFS. > > I am still testing what is causing it. I have used class 4 and class 10 > cards, both freeze. > > I have the serial console connected to screen, and nothing is displayed > during the freeze. > > I do have an error about the keyboard during startup, as Tim mention that > pressing the keyboard would continue the BBB. I have not tested that, as I > do not see a console on my HDMI monitor on the BBB. > > (r254571) > > ========= > link_elf: symbol genkbd_get_fkeystr undefined > link_elf: symbol genkbd_get_fkeystr undefined > aintc0: Spurious interrupt detected (0xffffffff) > ========= > > > Another message I got while starting up: > > ========= > lock order reversal: > 1st 0xc09aa0bc pmap (pmap) @ /usr/src/sys/arm/arm/pmap-v6.c:2967 > 2nd 0xc07c5fc0 kmem vm object (kmem vm object) @ > /usr/src/sys/vm/vm_kern.c:344 > KDB: stack backtrace: > db_trace_self() at db_trace_self > pc = 0xc05293f8 lr = 0xc022db88 (db_trace_self_wrapper+0x30) > sp = 0xc2ab4930 fp = 0xc2ab4a48 > r10 = 0xc09aa0bc > db_trace_self_wrapper() at db_trace_self_wrapper+0x30 > pc = 0xc022db88 lr = 0xc038d150 (kdb_backtrace+0x38) > sp = 0xc2ab4a50 fp = 0xc2ab4a58 > r4 = 0xc065ed14 r5 = 0xc05a6f1c > r6 = 0xc058a3b3 r7 = 0xc05abd59 > kdb_backtrace() at kdb_backtrace+0x38 > pc = 0xc038d150 lr = 0xc03a72c0 (witness_checkorder+0xddc) > sp = 0xc2ab4a60 fp = 0xc2ab4ab0 > r4 = 0xc05a7fd4 > witness_checkorder() at witness_checkorder+0xddc > pc = 0xc03a72c0 lr = 0xc0355768 (_rw_wlock_cookie+0x7c) > sp = 0xc2ab4ab8 fp = 0xc2ab4ae0 > r4 = 0x00000158 r5 = 0xc05a6f19 > r6 = 0xc07c5fd0 r7 = 0xc07c5fc0 > r8 = 0xc07c5fc0 r9 = 0x00000101 > r10 = 0x00000000 > _rw_wlock_cookie() at _rw_wlock_cookie+0x7c > pc = 0xc0355768 lr = 0xc0504794 (kmem_back+0x68) > sp = 0xc2ab4ae8 fp = 0xc2ab4b28 > r4 = 0xc07c5fc0 r5 = 0x00001000 > r6 = 0x00000000 r7 = 0xc07c5fc0 > r8 = 0x00000101 > kmem_back() at kmem_back+0x68 > pc = 0xc0504794 lr = 0xc05046f0 (kmem_malloc+0x6c) > sp = 0xc2ab4b30 fp = 0xc2ab4b48 > r4 = 0xc0661780 r5 = 0x00001000 > r6 = 0x00000000 r7 = 0x00000101 > r8 = 0xc04fd5e0 r9 = 0x00000101 > r10 = 0x00000000 > kmem_malloc() at kmem_malloc+0x6c > pc = 0xc05046f0 lr = 0xc04fd600 (page_alloc+0x20) > sp = 0xc2ab4b50 fp = 0xc2ab4b50 > r4 = 0xc09d3cc0 r5 = 0x00000001 > r6 = 0x00000000 r7 = 0xc09d3cd0 > page_alloc() at page_alloc+0x20 > pc = 0xc04fd600 lr = 0xc04fd094 (keg_alloc_slab+0xb4) > sp = 0xc2ab4b58 fp = 0xc2ab4b80 > keg_alloc_slab() at keg_alloc_slab+0xb4 > pc = 0xc04fd094 lr = 0xc04fdcd0 (keg_fetch_slab+0x148) > sp = 0xc2ab4b88 fp = 0xc2ab4bc0 > r4 = 0xc09d3cc0 r5 = 0xc09ce408 > r6 = 0x00000001 r7 = 0xc09ce360 > r8 = 0x00000000 r9 = 0xc09ce3f8 > r10 = 0x00000000 > keg_fetch_slab() at keg_fetch_slab+0x148 > pc = 0xc04fdcd0 lr = 0xc04fe0c4 (zone_fetch_slab+0x64) > sp = 0xc2ab4bc8 fp = 0xc2ab4be0 > r4 = 0x00000001 r5 = 0xc09ce360 > r6 = 0xc09d3cc0 r7 = 0xc09d3cc0 > r8 = 0x00000001 r9 = 0xc2ff4fa8 > r10 = 0x00000002 > zone_fetch_slab() at zone_fetch_slab+0x64 > pc = 0xc04fe0c4 lr = 0xc04fe150 (zone_import+0x4c) > sp = 0xc2ab4be8 fp = 0xc2ab4c28 > r4 = 0xc2ff4fac r5 = 0xc05a621a > r6 = 0x00000001 r7 = 0xc09d3cc0 > r8 = 0x00000000 > zone_import() at zone_import+0x4c > pc = 0xc04fe150 lr = 0xc04fbdc0 (uhub2: 4 ports with 4 > removable, self powered > uma_zalloc_arg+0x2a0) > sp = 0xc2ab4c30 fp = 0xc2ab4c70 > r4 = 0x00000001 r5 = 0xc05a621a > r6 = 0xc09b0e0c r7 = 0xc04fe104 > r8 = 0xc09ce360 r9 = 0xc09ce418 > r10 = 0xc09b0e00 > uma_zalloc_arg() at uma_zalloc_arg+0x2a0 > pc = 0xc04fbdc0 lr = 0xc053349c (pmap_alloc_l2_bucket+0x1b4) > sp = 0xc2ab4c78 fp = 0xc2ab4ca0 > r4 = 0xc05abd56 r5 = 0xc09999f8 > r6 = 0xc09999f4 r7 = 0xc07c0de8 > r8 = 0xc05abd56 r9 = 0xc09abaac > r10 = 0xc09abb38 > pmap_alloc_l2_bucket() at pmap_alloc_l2_bucket+0x1b4 > pc = 0xc053349c lr = 0xc0533158 (pmap_copy+0x158) > sp = 0xc2ab4ca8 fp = 0xc2ab4ce0 > r4 = 0xc09aba9c r5 = 0x20049000 > r6 = 0xc05abd56 r7 = 0x2002e000 > r8 = 0x0001b000 r9 = 0xc09964b8 > r10 = 0x0001b000 > pmap_copy() at pmap_copy+0x158 > pc = 0xc0533158 lr = 0xc050a660 (vmspace_fork+0x790) > sp = 0xc2ab4ce8 fp = 0xc2ab4d20 > r4 = 0xc09aa000 r5 = 0x00000000 > r6 = 0x2002e000 r7 = 0xc099c500 > r8 = 0xc09ab9e0 r9 = 0xc099df50 > r10 = 0x0001b000 > vmspace_fork() at vmspace_fork+0x790 > pc = 0xc050a660 lr = 0xc0327004 (fork1+0x1a4) > sp = 0xc2ab4d28 fp = 0xc2ab4d98 > r4 = 0xc2ffc960 r5 = 0x00000000 > r6 = 0xc2fc5000 r7 = 0x0000000c > r8 = 0xc2fc5320 r9 = 0xc2ffcc80 > r10 = 0xc2ab4dac > fork1() at fork1+0x1a4 > pc = 0xc0327004 lr = 0xc0326e40 (sys_fork+0x24) > sp = 0xc2ab4da0 fp = 0xc2ab4db8 > r4 = 0xc2ffcc80 r5 = 0x00000000 > r6 = 0x00000000 r7 = 0x00000000 > r8 = 0xc2ab4e10 r9 = 0xc2fc5320 > r10 = 0x00000000 > sys_fork() at sys_fork+0x24 > pc = 0xc0326e40 lr = 0xc0538ee4 (swi_handler+0x284) > sp = 0xc2ab4dc0 fp = 0xc2ab4e58 > r4 = 0xc2ffcc80 r5 = 0x00000000 > swi_handler() at swi_handler+0x284 > pc = 0xc0538ee4 lr = 0xc052aa54 (swi_entry+0x2c) > sp = 0xc2ab4e60 fp = 0xbfffec18 > r4 = 0x00030998 r5 = 0x2080d020 > r6 = 0x00000000 r7 = 0x00000002 > r8 = 0x00000003 r9 = 0x2080d020 > swi_entry() at swi_entry+0x2c > pc = 0xc052aa54 lr = 0xc052aa54 (swi_entry+0x2c) > sp = 0xc2ab4e60 fp = 0xbfffec18 > Unable to unwind further > ========= > > > > > > There is, at least at the video console, no kernel panic. The kernel > itself > > still responds to icmp ping packages and echos the keyboard output. But > > everything else does not work. (I know this behavior from disconnected > > harddisks containing the kernel/system) > > The current consumption also dropps around 100mA. > > > > It is very interesting that this behavior is not limited to the internal > > MMC card but also occurs when the data is stored external on an usb > stick. > > > > My question is how to debug this bug since I have no idea where to start. > >> From my experience with bare metal arm systems I would start connecting > a > > jtag debugger but I am afraid getting all the symbols mapped correct to > the > > gdb. And even if this works - what should I monitor and what should I > test for? > > There might be however a more simple solution. So any suggestion is > welcome. > > > > If you can reproduce this bug I also would be very happy. > > > > Best regards, > > Martin Laabs > > > > _______________________________________________ > > freebsd-arm@freebsd.org mailing list > > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > > Johan Henselmans > johan@netsense.nl > > > > _______________________________________________ > freebsd-arm@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org" > Possibly totally irrelevant, but I've noticed on a kernel from yesterday that I was getting CPU percentages in top of over 100% before it hung - earlier kernels did not exhibit this. dave c From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 21:37:03 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id ABEB5EB4; Wed, 21 Aug 2013 21:37:03 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-wg0-x22b.google.com (mail-wg0-x22b.google.com [IPv6:2a00:1450:400c:c00::22b]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E50022E46; Wed, 21 Aug 2013 21:37:02 +0000 (UTC) Received: by mail-wg0-f43.google.com with SMTP id z12so872037wgg.34 for ; Wed, 21 Aug 2013 14:37:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; bh=nwsYbgB+EGagKbJ8m1IU0x+SC8sg4KanRHdTYzgXGNs=; b=AAuNxXrLnV5bnDamirGsO6cM/XDA9UosrxYGU/jvkNwuYajy0y+x5HW9EvLh7/Fd8w SvUaQ8HCastI8TwWu6eGVmyY0zrH0RsoeEvriz4bf5wr5UFinblqc4BrVFq0OJ2xtKos eIqbshtIefohIQFpkzFNom1Fwmg5AM9WTvx2hUOeQEPQKDnTXpe1379ffn6HzLcvEHmv V71d/FYZB0F4eC5T4uRVTcGL6kEG7NKSOM7pkj/g3i0aCXgG0q1qbOYM4ZlMiOq31bYT 6rUkxzQIG6fNWnv0ZR+GCAftCwqJlYiY+Bf8RvGjGmhnKpfMIj5wA6ksyfwQ/pQn8XCG jsVQ== MIME-Version: 1.0 X-Received: by 10.194.122.129 with SMTP id ls1mr7245926wjb.37.1377121021213; Wed, 21 Aug 2013 14:37:01 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.217.116.136 with HTTP; Wed, 21 Aug 2013 14:37:01 -0700 (PDT) In-Reply-To: <20130821095849.GA7322@olymp.kibab.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> Date: Wed, 21 Aug 2013 14:37:01 -0700 X-Google-Sender-Auth: j3I8FHkkKlOKeeRULkhlLc-0AYg Message-ID: Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug From: Adrian Chadd To: Ilya Bakulin Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: Alexander Motin , "freebsd-arm@freebsd.org" , "freebsd-embedded@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 21:37:03 -0000 Hi! The marvell wifi stuff isn't ARM specific, right? So it should live in dev/ rather than arm/ -adrian From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 21:37:36 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 9025AF1D for ; Wed, 21 Aug 2013 21:37:36 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-wi0-x233.google.com (mail-wi0-x233.google.com [IPv6:2a00:1450:400c:c05::233]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 2724C2E4A for ; Wed, 21 Aug 2013 21:37:35 +0000 (UTC) Received: by mail-wi0-f179.google.com with SMTP id hr7so1005133wib.6 for ; Wed, 21 Aug 2013 14:37:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; bh=k+jNR9AEEsuhfZkLp7sT0ezpwhKSFZ1m79Jprk9LCrg=; b=cRn9q9YeBUOSq+Cwi8MRQQZ1MCi6ukU7NejQUZKBjFTxSglBKsCkGbXDIL290E8wmq /sENBXN97ZvUkX77wV/qEIk68ylk0nXAL5NLsH9PkYZHUKCslwq6n932Ygu3RMFXWuJg bKiPRUOAKSeUmJcsK1SfeG17RwvXr6hbY/SI9tzd5499Hp/yeusyVe/vQOiN5eW6BzpJ yBBNtXnqGa2emfgWzfrd4ntbDUaoVx4V7kS0hFa9VJPjk8MdonWpWGOq1DYplLWpms9n /Bjy3B/10cdkZQbk9eH/a4UUuislBrCsUMK3bH98RAPlYFhVUUTGBMF/OaqKY1+/ITtJ zwcQ== MIME-Version: 1.0 X-Received: by 10.180.211.206 with SMTP id ne14mr7087100wic.30.1377121054404; Wed, 21 Aug 2013 14:37:34 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.217.116.136 with HTTP; Wed, 21 Aug 2013 14:37:34 -0700 (PDT) In-Reply-To: <5214EAE6.6040300@semihalf.com> References: <5214EAE6.6040300@semihalf.com> Date: Wed, 21 Aug 2013 14:37:34 -0700 X-Google-Sender-Auth: v3ikuvBbu9TFRLJIglEMlxGnXYg Message-ID: Subject: Re: Introduction to the superpages support for ARMv6/v7 From: Adrian Chadd To: Zbyszek Bodek Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: "freebsd-arm@freebsd.org" , Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 21:37:36 -0000 Hi! I like your ARM work very much. Is there any emulator that we can spin up to actually test this stuff out? -adrian From owner-freebsd-arm@FreeBSD.ORG Wed Aug 21 23:43:30 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 6E79A6EC for ; Wed, 21 Aug 2013 23:43:30 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-qc0-f171.google.com (mail-qc0-f171.google.com [209.85.216.171]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 2E3422751 for ; Wed, 21 Aug 2013 23:43:29 +0000 (UTC) Received: by mail-qc0-f171.google.com with SMTP id n1so627328qcw.2 for ; Wed, 21 Aug 2013 16:43:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=7Lu6PPTfPrldvmObh1jFAq4Bt8KWROOc+myAllHNoiw=; b=B5Ncp7bgYBV2wWnnb5BnLxfHHDgZI6Sk8xJiESdxco/Ds9U1ljWwDtBhtJaelfyUT4 HnbxJGmOuTUhOWqwdbdmOT/gWdtmI7EUmBRrXhU6BZxi6PDvPa7lcMLf5JHsH2KN9sqV uBZg7JTxD2rN+d7CxElyRzsDMrqQzMy7Mtf3Dc+zpA+fr9VE/kNcBF/TmoWEDlhl7Rsx m828maMQhVVekKYXUk2fkvxg7Gjzo0k6TvKwBiE8u1pOJYGoosYPT9JfYUuADPTzYpbn slpbulBJRl9GJWNcQXBcPzEnaIy6pcv/QIs2bdscQRANhOF3mTaO6Dsd2dxGX6cY6C18 uyMg== X-Gm-Message-State: ALoCoQnW8sP9/HfF+Ofrxpxn8zhchx8ZRO7qmBXxPwCHiTZjc5HIYqDxY0l4IBwZ5oHzkgf0Ms8F MIME-Version: 1.0 X-Received: by 10.229.103.73 with SMTP id j9mr2817906qco.33.1377128603635; Wed, 21 Aug 2013 16:43:23 -0700 (PDT) Received: by 10.49.8.20 with HTTP; Wed, 21 Aug 2013 16:43:23 -0700 (PDT) In-Reply-To: References: <5214EAE6.6040300@semihalf.com> Date: Thu, 22 Aug 2013 01:43:23 +0200 Message-ID: Subject: Re: Introduction to the superpages support for ARMv6/v7 From: Zbigniew Bodek To: Adrian Chadd Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: "freebsd-arm@freebsd.org" , Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Aug 2013 23:43:30 -0000 2013/8/21 Adrian Chadd > Hi! > > I like your ARM work very much. Is there any emulator that we can spin up > to actually test this stuff out? > > > > > -adrian > > Hello Adrian, Thank you. If you are referring to some soft that emulates ARMv7 (instead of using HW platform), then there is none that I know about which allows to run FreeBSD in multiuser. Or I misunderstood your question? Regarding HW platforms, then all ARMv6/v7-based devices supported by FreeBSD should be able to take advantage of superpages. Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 05:04:21 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 4B12FD9E for ; Thu, 22 Aug 2013 05:04:21 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-wg0-x231.google.com (mail-wg0-x231.google.com [IPv6:2a00:1450:400c:c00::231]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D49102D24 for ; Thu, 22 Aug 2013 05:04:20 +0000 (UTC) Received: by mail-wg0-f49.google.com with SMTP id y10so1140178wgg.4 for ; Wed, 21 Aug 2013 22:04:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:sender:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; bh=iMZ4X+IzgY1yp/n7Us/p+lCX4/aY0M78s8nkN4OuBC8=; b=wneHvtVgjRWbHmSKCnSfHy3Z1Q6yLwM73vtENlMcyb5xvUBsNRlXhOBlk7W9GpkMBt tkZtle92NPSas4LFaauvrMT6ffDbK0Oc+jf4apviEKT2xYxUfHMbuSM/xRteNm7exW3j PqMv6+RsgPkaXCGkkwbykkGrzlcUFR89RKwqi0utajaRnoOlBMlZQzwmFqdL+wL/I+kI 8Xu9RuUdCsyECibrKaYP/Gi+L0AmXF4JxbeNn20AaX/NBUHx0xUvzJsxvL/U2u2dE14A /P601KvH5L0SyQR9s0HODW086RtH3BZfvQkfi7czgGnMdst2fHSUpAf93vA4VMuoS/mj epxw== MIME-Version: 1.0 X-Received: by 10.180.211.206 with SMTP id ne14mr8182536wic.30.1377147859093; Wed, 21 Aug 2013 22:04:19 -0700 (PDT) Sender: adrian.chadd@gmail.com Received: by 10.217.116.136 with HTTP; Wed, 21 Aug 2013 22:04:19 -0700 (PDT) In-Reply-To: References: <5214EAE6.6040300@semihalf.com> Date: Wed, 21 Aug 2013 22:04:19 -0700 X-Google-Sender-Auth: EdLiG8RUKdENfZAV73O086X2Vkg Message-ID: Subject: Re: Introduction to the superpages support for ARMv6/v7 From: Adrian Chadd To: Zbigniew Bodek Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 Cc: "freebsd-arm@freebsd.org" , Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 05:04:21 -0000 Hi, Yes, I'm much more interested in a software CPU emulator for various ARM platforms. Are there any ARM emulators (eg qemu) that can start booting FreeBSD ARM - but then fail, because we're missing disk/console/net/etc support? Basically - I'd like to finish off the ARM/MIPS/PPC/Sparc emulation environment support for FreeBSD so people like Alan, Jeff and others who hack on things like the VM and memory allocation framework have a chance of testing on these platforms before they commit stuff that may break them.:) -adrian On 21 August 2013 16:43, Zbigniew Bodek wrote: > 2013/8/21 Adrian Chadd > >> Hi! >> >> I like your ARM work very much. Is there any emulator that we can spin up >> to actually test this stuff out? >> >> >> >> >> -adrian >> >> Hello Adrian, > > Thank you. > > If you are referring to some soft that emulates ARMv7 (instead of using HW > platform), then there is none that > I know about which allows to run FreeBSD in multiuser. Or I misunderstood > your question? > > Regarding HW platforms, then all ARMv6/v7-based devices supported by > FreeBSD should be able to take advantage > of superpages. > > Best regards > Zbyszek Bodek > From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 05:18:20 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 90D18C8; Thu, 22 Aug 2013 05:18:20 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-stable.sentex.ca (freebsd-stable.sentex.ca [IPv6:2607:f3e0:0:3::6502:9b]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 64E0A2DA8; Thu, 22 Aug 2013 05:18:20 +0000 (UTC) Received: from freebsd-stable.sentex.ca (localhost [127.0.0.1]) by freebsd-stable.sentex.ca (8.14.5/8.14.5) with ESMTP id r7M5IJGa013726; Thu, 22 Aug 2013 05:18:19 GMT (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-stable.sentex.ca (8.14.5/8.14.5/Submit) id r7M5IIYf013718; Thu, 22 Aug 2013 05:18:18 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 22 Aug 2013 05:18:18 GMT Message-Id: <201308220518.r7M5IIYf013718@freebsd-stable.sentex.ca> X-Authentication-Warning: freebsd-stable.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [releng_9 tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 05:18:20 -0000 TB --- 2013-08-22 04:35:23 - tinderbox 2.10 running on freebsd-stable.sentex.ca TB --- 2013-08-22 04:35:23 - FreeBSD freebsd-stable.sentex.ca 8.3-STABLE FreeBSD 8.3-STABLE #0: Tue Oct 16 17:37:58 UTC 2012 mdtancsa@freebsd-stable.sentex.ca:/usr/obj/usr/src/sys/server amd64 TB --- 2013-08-22 04:35:23 - starting RELENG_9 tinderbox run for arm/arm TB --- 2013-08-22 04:35:23 - cleaning the object tree TB --- 2013-08-22 04:35:23 - /usr/local/bin/svn stat /src TB --- 2013-08-22 04:35:28 - At svn revision 254636 TB --- 2013-08-22 04:35:29 - building world TB --- 2013-08-22 04:35:29 - CROSS_BUILD_TESTING=YES TB --- 2013-08-22 04:35:29 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-22 04:35:29 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-22 04:35:29 - SRCCONF=/dev/null TB --- 2013-08-22 04:35:29 - TARGET=arm TB --- 2013-08-22 04:35:29 - TARGET_ARCH=arm TB --- 2013-08-22 04:35:29 - TZ=UTC TB --- 2013-08-22 04:35:29 - __MAKE_CONF=/dev/null TB --- 2013-08-22 04:35:29 - cd /src TB --- 2013-08-22 04:35:29 - /usr/bin/make -B buildworld >>> World build started on Thu Aug 22 04:35:30 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/bin/ed/undo.c cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o ed buf.o cbc.o glbl.o io.o main.o re.o sub.o undo.o -lcrypto gzip -cn /src/bin/ed/ed.1 > ed.1.gz ===> bin/expr (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c expr.c cc1: warnings being treated as errors expr.c:812: warning: redundant redeclaration of 'yyparse' /src/bin/expr/expr.y:77: warning: previous declaration of 'yyparse' was here *** Error code 1 Stop in /src/bin/expr. *** Error code 1 Stop in /src/bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2013-08-22 05:18:18 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-22 05:18:18 - ERROR: failed to build world TB --- 2013-08-22 05:18:18 - 1691.60 user 375.84 system 2575.39 real http://tinderbox.freebsd.org/tinderbox-freebsd9-build-RELENG_9-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 05:27:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id EE277406 for ; Thu, 22 Aug 2013 05:27:13 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-oa0-f41.google.com (mail-oa0-f41.google.com [209.85.219.41]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id B44B22E26 for ; Thu, 22 Aug 2013 05:27:13 +0000 (UTC) Received: by mail-oa0-f41.google.com with SMTP id j6so2736628oag.28 for ; Wed, 21 Aug 2013 22:27:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=k1Lhm3WxsCoXl45grQxf9DTvxKIweSNmlkExyt7LzIw=; b=HQdDmCRQA5BIvynQ6n+H1Q1Nf5/ILaeYDNvTkAfPLvM9SBG6ieKSIxq3gh51gL04Pt qwUlr9sPZF8TT6Z4zJK2dK8X9KszLXSf9aLeyoSf007jqbO7pZBQtSnf6kmgh6qG3LMK EwYhaJYZ7M2YjevDukAxPxMucT9hR6fS7CGHChfSTrRR75VoInDTZCvW181/PUvCW2Mw jQJ3aCrNw/N2wtjmUUXE/iS1SZqPkfws0e8LtnTH+SKxJn3VKGkPPAoECXisC2NJh1m3 eRu7mGvTRA4EAWee4zhht7kaVOMn8zqSMH6IWCTtbjzSkMy64u4dKhvHq5wvma35RtlW d5xA== X-Gm-Message-State: ALoCoQmMOBHkyw9gCX0RNngN79Bqr8btD/7M03cgKiDlGO3IZWxjTTO1HJhWcRGR48tL/g/SQgzg X-Received: by 10.60.133.71 with SMTP id pa7mr12183978oeb.44.1377149226886; Wed, 21 Aug 2013 22:27:06 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id tz10sm16180965obc.10.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 21 Aug 2013 22:27:05 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <20130821095849.GA7322@olymp.kibab.com> Date: Wed, 21 Aug 2013 23:27:03 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <8D289F43-261C-43F2-A4AC-F027E70558B7@bsdimp.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> To: Ilya Bakulin X-Mailer: Apple Mail (2.1085) Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 05:27:14 -0000 What's the best git repo URL to clone from? Warner On Aug 21, 2013, at 3:58 AM, Ilya Bakulin wrote: > So, after fixing some bugs in my own code and adding a couple of bus = methods > I am finally able to load the firmware onto the card and receive = "Firmare started" message. >=20 > Next step will be adding support for setting IRQ handlers (SDIO stack) = and writing the code > to connect mv_sdiowl driver to our net80211 stack (Adrian I hope you = will help with this). >=20 > As SD8787 adapter uses the binary firmware, I had to import it in the = tree. As I'm doing all testing > without any root FS, I compile the formware blob into the kernel. > The patch below is therefore incomplete; full snapshot is kept under = [1]. > To activate mv_sdiowl driver, add mmc, mv_sdio, mv_sdiowl and = mv_sdiowl_fw to the kernel config. >=20 > [1] = https://github.com/kibab/freebsd/compare/master...kibab-dplug#files_bucket= >=20 > I will keep you all updated. From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 05:39:35 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 6B5E6608 for ; Thu, 22 Aug 2013 05:39:35 +0000 (UTC) (envelope-from ozkan.kirik@gmail.com) Received: from mail-we0-x22c.google.com (mail-we0-x22c.google.com [IPv6:2a00:1450:400c:c03::22c]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 056D22EB9 for ; Thu, 22 Aug 2013 05:39:34 +0000 (UTC) Received: by mail-we0-f172.google.com with SMTP id t60so1230912wes.31 for ; Wed, 21 Aug 2013 22:39:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=PIir83BDDTVVWUnvIDNzUg/jkkC1yZ9+gYVvYG1NXLs=; b=xU/58nzZw1EpHP01Q5ORdT8tYuGF9wWONi4cxtq8b9O0hEigRMvifIzoBcLRi1QQBl ZLXjnPyPK0F4mJt0JjrUfjNYuFjS7LQBEWgxJ0mQjQ/g2+PYWTDykOAx5Z8sPEWkrlX4 TohDYXvxhvofm+FkwQtrBrFuMWLANTYO+/dBb5l8vrwZz/SrolAJZnPI2n/YU5jXxPj1 S5nj5nog9wk/rc7fVgwbhhBcrzx5Mv7YCdcp1h99PYtBy8eHFj5uVgLnBPP9JpIKDD8t 9rsSQvdGKt7/xp8PPKncC5nP7SJIiBc7DIuoo918TgNFrZmi0wbDXd1LqhJo+RRzdgxN K7sQ== MIME-Version: 1.0 X-Received: by 10.194.201.131 with SMTP id ka3mr8528315wjc.22.1377149973133; Wed, 21 Aug 2013 22:39:33 -0700 (PDT) Received: by 10.216.50.140 with HTTP; Wed, 21 Aug 2013 22:39:33 -0700 (PDT) Date: Thu, 22 Aug 2013 08:39:33 +0300 Message-ID: Subject: Is MiraBox working with FreeBSD ARM ? From: =?ISO-8859-1?Q?=D6zkan_KIRIK?= To: freebsd-arm@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.14 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 05:39:35 -0000 Hi , I visited the wiki page. I saw that Marvell Armada 500 and Armada XP CPUs are supported. But MiraBox ( http://www.globalscaletechnologies.com/p-58-mirabox-development-kit.aspx ) has Marvell Armada 370 ( ARMv7 compliant ) cpu. Does it supported ? Best regards, Ozkan KIRIK From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 06:10:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id DF685E51; Thu, 22 Aug 2013 06:10:13 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp6.kibab.com [IPv6:2a01:4f8:160:84c1::2]) by mx1.freebsd.org (Postfix) with ESMTP id A1A1E206E; Thu, 22 Aug 2013 06:10:13 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com AE0C83F432 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1377151811; bh=qEKqtbHReBC9ZAsTmlmoY2JUDlR2yakH8ZZAlGyX5Xs=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=xLdhxXhA0JkAjkR7oAM9C1YICciF67i+wUcvZ4IN2V0zOqocBYT6PPMhOx7koHcbs kaW/+ZaSbnSfcVkE0/p1OBOWa9u/zSVHxbmYMh2QcqFMvlZezkguK+fq46hi0079kn b53QsNanwjNyBeMViPr6ePmqZIro2u0WQr+sgwDU= Message-ID: <5215AB46.90707@bakulin.de> Date: Thu, 22 Aug 2013 08:10:14 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> <8D289F43-261C-43F2-A4AC-F027E70558B7@bsdimp.com> In-Reply-To: <8D289F43-261C-43F2-A4AC-F027E70558B7@bsdimp.com> X-Enigmail-Version: 1.5.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alexander Motin , freebsd-arm@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 06:10:14 -0000 Hi Warner, On 22.08.13 07:27, Warner Losh wrote: > What's the best git repo URL to clone from? > You need https://github.com/kibab/freebsd.git, kibab-dplug branch. -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 06:18:25 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 7210C14A; Thu, 22 Aug 2013 06:18:25 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp6.kibab.com [IPv6:2a01:4f8:160:84c1::2]) by mx1.freebsd.org (Postfix) with ESMTP id 32EC720E8; Thu, 22 Aug 2013 06:18:24 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 931543F432 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1377152303; bh=MmwlGgFENys88KUsp0h0JcsPw8z+qlngyOZuqWtVHbc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=co8KPhTG5CebdOgTpLhMkEc2SguCp1cmZYFj6UOP8WhIXVph4QljZLC818Oh1oZYN JOe5+oXsBkw4mNZXIRy1vUDVLyNu7GYcDo55h/4xUhVH9UfOzJHG4eCe2MdVTqeH4N 0SdIVVCQDEykIwc2orBiLbzKSgFHpNIuj5SZ1KYQ= Message-ID: <5215AD32.3080800@bakulin.de> Date: Thu, 22 Aug 2013 08:18:26 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Adrian Chadd Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> In-Reply-To: X-Enigmail-Version: 1.5.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alexander Motin , "freebsd-arm@freebsd.org" , "freebsd-embedded@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 06:18:25 -0000 Hi Adrian, On 21.08.13 23:37, Adrian Chadd wrote: > Hi! > > The marvell wifi stuff isn't ARM specific, right? So it should live in > dev/ rather than arm/ Furthermore, it's only partly SDIO-specific. The same driver should work for USB- and PCIe-based versions of Marvell Avastar 88W8787 and 88W8797. The Linux driver is split into several files, by the way, for PCIe, USB and SDIO, then for station and AP mode. I think the best way to organize the code is to split it in layers, like it is for ath. I didn't know that the code is going to be universal when I started to code the driver, so that's why if is in sys/arm/mv. The code in Linux driver is clean and understandable, although I would prefer to get the documentation for the chipset and not use Linux as the single source of information. What's with the licensing in this case by the way? -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 07:12:54 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id F41F965C for ; Thu, 22 Aug 2013 07:12:53 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from mail-ob0-f173.google.com (mail-ob0-f173.google.com [209.85.214.173]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id B8A3523F6 for ; Thu, 22 Aug 2013 07:12:53 +0000 (UTC) Received: by mail-ob0-f173.google.com with SMTP id ta17so2898930obb.18 for ; Thu, 22 Aug 2013 00:12:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:sender:subject:mime-version:content-type:from :in-reply-to:date:cc:content-transfer-encoding:message-id:references :to; bh=opaVQiynfFI+/wauTRy0AqpGCIBfQuVF+t3xH80fcLM=; b=kTtQjkldWcn9MAL0HL1GP285hYPRBOQGceYkurfnISHTi2/XrOY+NWpTtiR9XrObAj XNy7LNG6a7kxwiTvWJBGO94TI6xpDWqkjnlU88/fm9qYMYmYnOMUf2p0IObcqD0coW3A rruk0VkewT7DKrT7WPWSWz4HvI0tA+uA9Ntr+Y8Ft54ts0q7/5frmUx760NkTY/dXGPK 2yTuyJOeQvg52Os1HPksH6eIOizOv5+OqbKnLeWp26Phnf4U39G8L7xwgRhWyhXmur3A AS5ho3aFkn4o1NKs5bOjd+ZJmTxnwxfAi/A3Q7tdgdChsDngAUK01ve+aE24mMP2pPaT MYHQ== X-Gm-Message-State: ALoCoQn60dNqeviQaMh2SKvXzUhbf1D8OKax2FYjqgAw5EoyiJf/GUWigZrQaxO5E1uAhmF76Ae9 X-Received: by 10.60.47.76 with SMTP id b12mr891941oen.78.1377155567319; Thu, 22 Aug 2013 00:12:47 -0700 (PDT) Received: from 53.imp.bsdimp.com (50-78-194-198-static.hfc.comcastbusiness.net. [50.78.194.198]) by mx.google.com with ESMTPSA id rr6sm16784006oeb.0.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 00:12:46 -0700 (PDT) Sender: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug Mime-Version: 1.0 (Apple Message framework v1085) Content-Type: text/plain; charset=us-ascii From: Warner Losh In-Reply-To: <5215AD32.3080800@bakulin.de> Date: Thu, 22 Aug 2013 01:12:44 -0600 Content-Transfer-Encoding: quoted-printable Message-Id: <3C9989C8-BB72-4BD6-9246-4AD3790D4732@bsdimp.com> References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> <5215AD32.3080800@bakulin.de> To: Ilya Bakulin X-Mailer: Apple Mail (2.1085) Cc: "freebsd-arm@freebsd.org" , Alexander Motin , "freebsd-embedded@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 07:12:54 -0000 On Aug 22, 2013, at 12:18 AM, Ilya Bakulin wrote: > Hi Adrian, >=20 > On 21.08.13 23:37, Adrian Chadd wrote: >> Hi! >>=20 >> The marvell wifi stuff isn't ARM specific, right? So it should live = in >> dev/ rather than arm/ >=20 > Furthermore, it's only partly SDIO-specific. The same driver should = work > for USB- and PCIe-based versions of Marvell Avastar 88W8787 and = 88W8797. > The Linux driver is split into several files, by the way, for PCIe, = USB > and SDIO, then for station and AP mode. We don't have any drivers in the tree that are this bus agnostic. Would = be cool to grow some :) > I think the best way to organize the code is to split it in layers, = like > it is for ath. > I didn't know that the code is going to be universal when I started to > code the driver, > so that's why if is in sys/arm/mv. Makes sense. > The code in Linux driver is clean and understandable, although I would > prefer to get the documentation for the chipset and not use Linux as = the > single source of information. > What's with the licensing in this case by the way? Copying ideas and facts: no problem. Copying code: you must adhere to the license if you copied enough to be = covered under copyright law.... It's complicated and best avoided. From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 07:19:07 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 43B4A95B for ; Thu, 22 Aug 2013 07:19:07 +0000 (UTC) (envelope-from iz-rpi03@hs-karlsruhe.de) Received: from smtp.hs-karlsruhe.de (smtp.HS-Karlsruhe.DE [193.196.64.25]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 058C9245E for ; Thu, 22 Aug 2013 07:19:07 +0000 (UTC) Received: from iz-wera01.hs-karlsruhe.de ([193.196.65.46]) by smtp.hs-karlsruhe.de with esmtp (Exim 4.80.1) (envelope-from ) id 1VCPAf-008tzu-F9; Thu, 22 Aug 2013 09:19:05 +0200 X-Mailer: exmh version 2.8.0 04/21/2012 with nmh-1.5 From: Ralf Wenk To: Zbyszek Bodek Subject: Re: Introduction to the superpages support for ARMv6/v7 In-reply-to: <5214EAE6.6040300@semihalf.com> References: <5214EAE6.6040300@semihalf.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Thu, 22 Aug 2013 09:18:56 +0200 Message-Id: Cc: freebsd-arm@FreeBSD.org, Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 07:19:07 -0000 Hi, on my 512 MB raspberry pi I had to reduce params.HPLMaxProcMem to 400 MB to avoid killing of the GUPS benchmark. After this small change everything looks fine. FreeBSD raspberry-pi 10.0-CURRENT FreeBSD 10.0-CURRENT #0 r254596M $ ./gups Main table size = 2^25 = 33554432 words Number of updates = 134217728 CPU time used = 40.437500 seconds Real time used = 41.355471 seconds 0.003245465 Billion(10^9) Updates per second [GUP/s] Found 0 errors in 33554432 locations (passed). $ sysctl vm.pmap vm.pmap.sp_enabled: 1 vm.pmap.pv_entry_count: 5396 vm.pmap.pv_entry_max: 946260 vm.pmap.shpgperproc: 200 vm.pmap.section.demotions: 1109 vm.pmap.section.mappings: 0 vm.pmap.section.p_failures: 67 vm.pmap.section.promotions: 1342 $ 2nd run $ ./gups Main table size = 2^25 = 33554432 words Number of updates = 134217728 CPU time used = 40.421875 seconds Real time used = 41.314968 seconds 0.003248647 Billion(10^9) Updates per second [GUP/s] Found 0 errors in 33554432 locations (passed). $ sysctl vm.pmap vm.pmap.sp_enabled: 1 vm.pmap.pv_entry_count: 4274 vm.pmap.pv_entry_max: 946260 vm.pmap.shpgperproc: 200 vm.pmap.section.demotions: 1137 vm.pmap.section.mappings: 0 vm.pmap.section.p_failures: 119 vm.pmap.section.promotions: 1599 $ Tank you for your nice work Ralf From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 07:24:41 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 21802A3A; Thu, 22 Aug 2013 07:24:41 +0000 (UTC) (envelope-from ilya@bakulin.de) Received: from olymp.kibab.com (olymp6.kibab.com [IPv6:2a01:4f8:160:84c1::2]) by mx1.freebsd.org (Postfix) with ESMTP id D5EAF24B2; Thu, 22 Aug 2013 07:24:40 +0000 (UTC) X-DKIM: OpenDKIM Filter v2.5.2 olymp.kibab.com 7B14D3F438 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=bakulin.de; s=default; t=1377156271; bh=ScYSA3RBOkasizG2bu6/kf0D8Z/BqFAPfnsgDVn3gtc=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=pzzoxvNmmWgZexq55EF41bIAv2I7RcpRmR+lDSMEfhYsDuizmFK76G5RF4OL/pjln diAL6i1t4Mcu1FJi2r1OKi+zW/UO4JrwLyNQF6RG48w+CkD0QFtwJo+jrNdd1iPWxl VtWizdksgq6HHr59WvLM3fXgpOjL+/3d5l9rVQ5w= Message-ID: <5215BCB1.4020308@bakulin.de> Date: Thu, 22 Aug 2013 09:24:33 +0200 From: Ilya Bakulin MIME-Version: 1.0 To: Warner Losh Subject: Re: [PATCH] SDIO support for Globalscale Dreamplug References: <20130702145905.GA1847@olymp.kibab.com> <51D3097A.8010601@FreeBSD.org> <51D3282C.1090701@bakulin.de> <20130703222002.GA60491@olymp.kibab.com> <51D50C55.1040300@myspectrum.nl> <51D531CB.3060300@bakulin.de> <51D5FE4C.9060102@bakulin.de> <20130821095849.GA7322@olymp.kibab.com> <5215AD32.3080800@bakulin.de> <3C9989C8-BB72-4BD6-9246-4AD3790D4732@bsdimp.com> In-Reply-To: <3C9989C8-BB72-4BD6-9246-4AD3790D4732@bsdimp.com> X-Enigmail-Version: 1.5.2 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: "freebsd-arm@freebsd.org" , Alexander Motin , "freebsd-embedded@freebsd.org" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 07:24:41 -0000 On 22.08.13 09:12, Warner Losh wrote: > > On Aug 22, 2013, at 12:18 AM, Ilya Bakulin wrote: >> Furthermore, it's only partly SDIO-specific. The same driver should work >> for USB- and PCIe-based versions of Marvell Avastar 88W8787 and 88W8797. >> The Linux driver is split into several files, by the way, for PCIe, USB >> and SDIO, then for station and AP mode. > > We don't have any drivers in the tree that are this bus agnostic. Would be cool to grow some :) So I'll try at least :-) Especially if I manage to get those chips with non-SDIO interface. Otherwise it makes little sense :-) >> The code in Linux driver is clean and understandable, although I would >> prefer to get the documentation for the chipset and not use Linux as the >> single source of information. >> What's with the licensing in this case by the way? > > Copying ideas and facts: no problem. > Copying code: you must adhere to the license if you copied enough to be covered under copyright law.... It's complicated and best avoided. I don't copy any code, only ideas and constants that are nessesary for writing the code. If someone could assist me in getting docs from Marvell, that would be awesome :) -- Regards, Ilya Bakulin From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 08:14:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 002C69AC for ; Thu, 22 Aug 2013 08:14:12 +0000 (UTC) (envelope-from taguchi.ch@gmail.com) Received: from mail-pb0-x229.google.com (mail-pb0-x229.google.com [IPv6:2607:f8b0:400e:c01::229]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id C5C5B27B0 for ; Thu, 22 Aug 2013 08:14:12 +0000 (UTC) Received: by mail-pb0-f41.google.com with SMTP id rp2so1472734pbb.14 for ; Thu, 22 Aug 2013 01:14:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=content-type:mime-version:subject:from:in-reply-to:date:cc :message-id:references:to; bh=qRdx6v3ikxuMGAbYgzuxY1Q65LzwRcH66ePPlPfI5lk=; b=wyfLkjZTChSeeVo87xN6SoyNt9KpzF/Dpa3uhJnLnyH4vtZqT85nNIg++pStnAa1BE LypZSj8aheyZYnkN8yaEvQsXWI2JUbaAvSmb+Ing9O29zD0blREFvtbr8gzeo6JVMxLm qUa1YkHpvDA0VX9eEEYTm8KGM7N0zi0ID2IiIRngdhKlwno2O6gXGDSCCbzBkfWqXi0l qsPV+lY8kzhuiRRxFM/lXP3MhXXFI16x10ueVQFi/ciDgwRKtAIIhA+ZnnWJwFEu8U6n BABL3WPeipIu6KOrbFdVcBBc6ht15LGvI3Mq0HCOGWeDPWw3/ty/qmsZf6OMRjY59BDO ra8g== X-Received: by 10.68.12.134 with SMTP id y6mr12113387pbb.29.1377159252431; Thu, 22 Aug 2013 01:14:12 -0700 (PDT) Received: from [10.0.1.131] (48.178.30.125.dy.iij4u.or.jp. [125.30.178.48]) by mx.google.com with ESMTPSA id uw6sm13321663pbc.8.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 01:14:11 -0700 (PDT) Content-Type: multipart/mixed; boundary="Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF" Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: building document of Xorg From: Chie Taguchi In-Reply-To: Date: Thu, 22 Aug 2013 17:14:08 +0900 Message-Id: <3D90F8CB-14A3-4E9F-AE5A-E970E76AEA5F@gmail.com> References: <20130818101242.b3801b1b97dbe42cb905653c@gmail.com> <0D701E6E-8DE0-45DE-854B-133FCCC35C79@iaelu.net> <20130818212508.beddbf0e04a2f5f9a3a699a1@gmail.com> <20130819220401.11acd306a94e60a87d6424c9@gmail.com> To: Tim Kientzle X-Mailer: Apple Mail (2.1508) Cc: Guillaume Bibaut , freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 08:14:13 -0000 --Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii i try to build both type libgcrypt, and run libcrypt's tests/benchmark = app. uname -a FreeBSD raspberry-pi 10.0-CURRENT FreeBSD 10.0-CURRENT #0: Tue Aug 13 = 03:22:23 JST 2013 = user@PC:/usr/home/user/crochet-freebsd/work/obj/arm.armv6/usr/src.arm/sys/= RPI-B-ELY arm this is a part of result, --------------------------- USE_GCC=3D4.2: MD5 234375ms 625000ms 3984375ms 546875ms 156250ms SHA1 546875ms 781250ms 4218750ms 859375ms 468750ms RIPEMD160 468750ms 859375ms 4140625ms 859375ms 468750ms TIGER192 1093750ms 1484375ms 5156250ms 1328125ms 1171875ms SHA256 781250ms 1484375ms 5000000ms 1171875ms 781250ms SHA384 1953125ms 3046875ms 6250000ms 2265625ms 1875000ms SHA512 1953125ms 3046875ms 6250000ms 2265625ms 1953125ms SHA224 781250ms 1562500ms 5000000ms 1093750ms 937500ms MD4 78125ms 468750ms 3750000ms 546875ms 234375ms CRC32 234375ms 234375ms 4375000ms 468750ms 312500ms CRC32RFC1510 234375ms 156250ms 4375000ms 468750ms 390625ms CRC24RFC2440 1171875ms 1171875ms 5625000ms 1484375ms 1250000ms WHIRLPOOL 6484375ms 6953125ms 14843750ms 6875000ms 6562500ms TIGER 1093750ms 1562500ms 5156250ms 1328125ms 1015625ms TIGER2 1015625ms 1484375ms 5156250ms 1406250ms 1171875ms ---------------------------- clang without assembly code: MD5 234375ms 468750ms 3046875ms 468750ms 390625ms SHA1 468750ms 703125ms 3359375ms 703125ms 390625ms RIPEMD160 468750ms 703125ms 3281250ms 625000ms 390625ms TIGER192 703125ms 1171875ms 3828125ms 1015625ms 625000ms SHA256 781250ms 1328125ms 4062500ms 1015625ms 781250ms SHA384 1328125ms 2187500ms 4687500ms 1562500ms 1328125ms SHA512 1250000ms 2187500ms 4687500ms 1562500ms 1328125ms SHA224 703125ms 1328125ms 4062500ms 937500ms 859375ms MD4 156250ms 468750ms 2968750ms 468750ms 234375ms CRC32 78125ms 156250ms 2578125ms 390625ms 234375ms CRC32RFC1510 156250ms 156250ms 2500000ms 390625ms 312500ms CRC24RFC2440 546875ms 546875ms 2890625ms 781250ms 703125ms WHIRLPOOL 6015625ms 6406250ms 9296875ms 6328125ms 6093750ms TIGER 781250ms 1093750ms 3906250ms 937500ms 859375ms TIGER2 703125ms 1171875ms 3828125ms 937500ms 859375ms ------------------------------- ------------------------------- USE_GCC=3D4.2: Algorithm generate 100*sign 100*verify ------------------------------------------------ RSA 1024 bit 8593750ms 78359375ms 2187500ms RSA 2048 bit 45546875ms 418671875ms 5625000ms RSA 3072 bit 1337109375ms 1147109375ms 10234375ms RSA 4096 bit 881875000ms 2457812500ms 16640625ms DSA 1024/160 - 37343750ms 40156250ms DSA 2048/224 - 139531250ms 132343750ms DSA 3072/256 - 299609375ms 275390625ms ECDSA 192 bit 3437500ms 87734375ms 157812500ms ECDSA 224 bit 4218750ms 107187500ms 192500000ms ECDSA 256 bit 5078125ms 126328125ms 236875000ms ECDSA 384 bit 10078125ms 253593750ms 478984375ms ECDSA 521 bit 24062500ms 596796875ms 1134765625ms powm 2890625ms 7812500ms 21250000ms random 390625ms 468750ms --------------- clang without assembly code: Algorithm generate 100*sign 100*verify ------------------------------------------------ RSA 1024 bit 10000000ms 103359375ms 3125000ms RSA 2048 bit 230468750ms 602031250ms 8437500ms RSA 3072 bit 1168750000ms 1783750000ms 16640625ms RSA 4096 bit 1171875000ms 3805000000ms 27109375ms DSA 1024/160 - 50703125ms 53046875ms DSA 2048/224 - 211640625ms 197968750ms DSA 3072/256 - 489843750ms 439531250ms ECDSA 192 bit 3515625ms 90390625ms 162968750ms ECDSA 224 bit 4453125ms 111093750ms 207421875ms ECDSA 256 bit 5468750ms 134062500ms 254296875ms ECDSA 384 bit 11484375ms 281718750ms 528203125ms ECDSA 521 bit 26640625ms 667500000ms 1300156250ms powm 3671875ms 11015625ms 32031250ms random 390625ms 234375ms ------------------------------ and i will attach both entire-result files. Thanks, C.Taguchi --Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF Content-Disposition: attachment; filename=use-gcc4.2-benchmark.txt Content-Type: text/plain; name="use-gcc4.2-benchmark.txt" Content-Transfer-Encoding: quoted-printable MD5 234375ms 625000ms 3984375ms 546875ms 156250ms SHA1 546875ms 781250ms 4218750ms 859375ms 468750ms RIPEMD160 468750ms 859375ms 4140625ms 859375ms 468750ms TIGER192 1093750ms 1484375ms 5156250ms 1328125ms 1171875ms SHA256 781250ms 1484375ms 5000000ms 1171875ms 781250ms SHA384 1953125ms 3046875ms 6250000ms 2265625ms 1875000ms SHA512 1953125ms 3046875ms 6250000ms 2265625ms 1953125ms SHA224 781250ms 1562500ms 5000000ms 1093750ms 937500ms MD4 78125ms 468750ms 3750000ms 546875ms 234375ms CRC32 234375ms 234375ms 4375000ms 468750ms 312500ms CRC32RFC1510 234375ms 156250ms 4375000ms 468750ms 390625ms CRC24RFC2440 1171875ms 1171875ms 5625000ms 1484375ms 1250000ms WHIRLPOOL 6484375ms 6953125ms 14843750ms 6875000ms 6562500ms TIGER 1093750ms 1562500ms 5156250ms 1328125ms 1015625ms TIGER2 1015625ms 1484375ms 5156250ms 1406250ms 1171875ms ECB/Stream CBC CFB OFB = CTR =20 --------------- --------------- --------------- = --------------- --------------- IDEA 3437500ms 3359375ms 3671875ms 3750000ms 3515625ms 3593750ms = 3593750ms 3593750ms 5468750ms 5468750ms 3DES 7343750ms 7343750ms 7734375ms 7812500ms 7578125ms 7656250ms = 7734375ms 7656250ms 9609375ms 9609375ms CAST5 1796875ms 1875000ms 2031250ms 2109375ms 1953125ms 1953125ms = 2031250ms 2031250ms 3906250ms 3828125ms BLOWFISH 2187500ms 2109375ms 2421875ms 2421875ms 2343750ms 2265625ms = 2421875ms 2343750ms 4218750ms 4296875ms AES 1953125ms 1796875ms 1875000ms 1796875ms 1718750ms 1718750ms = 2265625ms 2109375ms 1718750ms 1796875ms AES192 2187500ms 2109375ms 2187500ms 2031250ms 2031250ms 2031250ms = 2421875ms 2421875ms 2031250ms 2031250ms AES256 2421875ms 2421875ms 2421875ms 2343750ms 2265625ms 2343750ms = 2734375ms 2656250ms 2265625ms 2265625ms TWOFISH 1562500ms 1640625ms 1718750ms 1875000ms 1718750ms 1640625ms = 1796875ms 1718750ms 3515625ms 3515625ms ARCFOUR 390625ms 468750ms DES 2968750ms 3046875ms 3359375ms 3437500ms 3281250ms 3203125ms = 3281250ms 3359375ms 5156250ms 5234375ms TWOFISH128 1562500ms 1640625ms 1796875ms 1796875ms 1718750ms 1640625ms = 1640625ms 1718750ms 3515625ms 3515625ms SERPENT128 1875000ms 1796875ms 2109375ms 2109375ms 2031250ms 2031250ms = 1953125ms 2109375ms 3828125ms 3828125ms SERPENT192 1875000ms 1796875ms 2109375ms 2031250ms 2031250ms 2031250ms = 2109375ms 2031250ms 3828125ms 3828125ms SERPENT256 1875000ms 1796875ms 2109375ms 2031250ms 1953125ms 2031250ms = 2031250ms 2109375ms 3828125ms 3828125ms RFC2268_40 2578125ms 2031250ms 2812500ms 2421875ms 2656250ms 2734375ms = 2656250ms 2734375ms 4609375ms 4609375ms SEED 1875000ms 1875000ms 1953125ms 2187500ms 1953125ms 1953125ms = 1953125ms 2109375ms 3828125ms 3828125ms CAMELLIA128 3359375ms 3359375ms 3593750ms 3671875ms 3515625ms 3437500ms = 3515625ms 3593750ms 5312500ms 5390625ms CAMELLIA192 3828125ms 3828125ms 4062500ms 4140625ms 3984375ms 3984375ms = 4062500ms 3984375ms 5859375ms 5703125ms CAMELLIA256 3828125ms 3828125ms 4062500ms 4140625ms 3984375ms 3984375ms = 4062500ms 4062500ms 5703125ms 5781250ms Algorithm generate 100*sign 100*verify ------------------------------------------------ RSA 1024 bit 8593750ms 78359375ms 2187500ms RSA 2048 bit 45546875ms 418671875ms 5625000ms RSA 3072 bit 1337109375ms 1147109375ms 10234375ms RSA 4096 bit 881875000ms 2457812500ms 16640625ms DSA 1024/160 - 37343750ms 40156250ms DSA 2048/224 - 139531250ms 132343750ms DSA 3072/256 - 299609375ms 275390625ms ECDSA 192 bit 3437500ms 87734375ms 157812500ms ECDSA 224 bit 4218750ms 107187500ms 192500000ms ECDSA 256 bit 5078125ms 126328125ms 236875000ms ECDSA 384 bit 10078125ms 253593750ms 478984375ms ECDSA 521 bit 24062500ms 596796875ms 1134765625ms powm 2890625ms 7812500ms 21250000ms random 390625ms 468750ms --Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF Content-Disposition: attachment; filename=clang-disableasm-benchmark.txt Content-Type: text/plain; name="clang-disableasm-benchmark.txt" Content-Transfer-Encoding: quoted-printable MD5 234375ms 468750ms 3046875ms 468750ms 390625ms SHA1 468750ms 703125ms 3359375ms 703125ms 390625ms RIPEMD160 468750ms 703125ms 3281250ms 625000ms 390625ms TIGER192 703125ms 1171875ms 3828125ms 1015625ms 625000ms SHA256 781250ms 1328125ms 4062500ms 1015625ms 781250ms SHA384 1328125ms 2187500ms 4687500ms 1562500ms 1328125ms SHA512 1250000ms 2187500ms 4687500ms 1562500ms 1328125ms SHA224 703125ms 1328125ms 4062500ms 937500ms 859375ms MD4 156250ms 468750ms 2968750ms 468750ms 234375ms CRC32 78125ms 156250ms 2578125ms 390625ms 234375ms CRC32RFC1510 156250ms 156250ms 2500000ms 390625ms 312500ms CRC24RFC2440 546875ms 546875ms 2890625ms 781250ms 703125ms WHIRLPOOL 6015625ms 6406250ms 9296875ms 6328125ms 6093750ms TIGER 781250ms 1093750ms 3906250ms 937500ms 859375ms TIGER2 703125ms 1171875ms 3828125ms 937500ms 859375ms ECB/Stream CBC CFB OFB = CTR =20 --------------- --------------- --------------- = --------------- --------------- IDEA 2187500ms 2109375ms 2421875ms 2500000ms 2343750ms 2187500ms = 2265625ms 2343750ms 4062500ms 3984375ms 3DES 5000000ms 5000000ms 5234375ms 5312500ms 5156250ms 5156250ms = 5234375ms 5234375ms 6875000ms 6953125ms CAST5 1562500ms 1562500ms 1875000ms 2031250ms 1640625ms 1718750ms = 1718750ms 1718750ms 3515625ms 3515625ms BLOWFISH 1640625ms 1796875ms 2109375ms 2109375ms 1953125ms 1796875ms = 1953125ms 1953125ms 3671875ms 3671875ms AES 1406250ms 1406250ms 1250000ms 1250000ms 1250000ms 1250000ms = 1562500ms 1640625ms 1250000ms 1250000ms AES192 1640625ms 1484375ms 1484375ms 1406250ms 1406250ms 1406250ms = 1796875ms 1875000ms 1406250ms 1484375ms AES256 1796875ms 1718750ms 1718750ms 1562500ms 1640625ms 1640625ms = 2031250ms 2031250ms 1640625ms 1640625ms TWOFISH 1406250ms 1328125ms 1640625ms 1640625ms 1484375ms 1484375ms = 1562500ms 1484375ms 3203125ms 3125000ms ARCFOUR 468750ms 390625ms DES 2265625ms 2265625ms 2500000ms 2656250ms 2343750ms 2421875ms = 2421875ms 2500000ms 4140625ms 4140625ms TWOFISH128 1328125ms 1406250ms 1562500ms 1640625ms 1484375ms 1562500ms = 1484375ms 1640625ms 3125000ms 3125000ms SERPENT128 1718750ms 1640625ms 1875000ms 1875000ms 1796875ms 1796875ms = 1796875ms 1875000ms 3437500ms 3437500ms SERPENT192 1562500ms 1562500ms 1875000ms 1875000ms 1796875ms 1796875ms = 1796875ms 1953125ms 3437500ms 3437500ms SERPENT256 1718750ms 1562500ms 1953125ms 1875000ms 1718750ms 1718750ms = 1796875ms 1875000ms 3437500ms 3359375ms RFC2268_40 1718750ms 2187500ms 2031250ms 2500000ms 1796875ms 1875000ms = 1953125ms 1875000ms 3593750ms 3593750ms SEED 1406250ms 1406250ms 1640625ms 1640625ms 1562500ms 1484375ms = 1562500ms 1562500ms 3125000ms 3125000ms CAMELLIA128 2812500ms 2734375ms 3125000ms 3125000ms 2890625ms 2890625ms = 2890625ms 2890625ms 4531250ms 4609375ms CAMELLIA192 3046875ms 3046875ms 3281250ms 3359375ms 3203125ms 3125000ms = 3203125ms 3203125ms 4843750ms 4843750ms CAMELLIA256 3125000ms 3046875ms 3359375ms 3359375ms 3046875ms 3203125ms = 3203125ms 3281250ms 4843750ms 4765625ms Algorithm generate 100*sign 100*verify ------------------------------------------------ RSA 1024 bit 10000000ms 103359375ms 3125000ms RSA 2048 bit 230468750ms 602031250ms 8437500ms RSA 3072 bit 1168750000ms 1783750000ms 16640625ms RSA 4096 bit 1171875000ms 3805000000ms 27109375ms DSA 1024/160 - 50703125ms 53046875ms DSA 2048/224 - 211640625ms 197968750ms DSA 3072/256 - 489843750ms 439531250ms ECDSA 192 bit 3515625ms 90390625ms 162968750ms ECDSA 224 bit 4453125ms 111093750ms 207421875ms ECDSA 256 bit 5468750ms 134062500ms 254296875ms ECDSA 384 bit 11484375ms 281718750ms 528203125ms ECDSA 521 bit 26640625ms 667500000ms 1300156250ms powm 3671875ms 11015625ms 32031250ms random 390625ms 234375ms --Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii On 2013/08/20, at 14:26, Tim Kientzle wrote: > Here's another way to fix libgcrypt on arm. This disables > the GCC-specific assembly code. I've verified that this allows > libgcrypt to build on FreeBSD/ARM with clang. I haven't done any > tests so don't know whether this impacts libgcrypt > performance or not: >=20 > --- work/libgcrypt-1.5.3/mpi/longlong.h.orig 2013-07-25 = 09:10:04.000000000 +0000 > +++ work/libgcrypt-1.5.3/mpi/longlong.h 2013-08-19 09:59:28.000000000 = +0000 > @@ -184,7 +184,7 @@ > /*************************************** > ************** ARM ****************** > ***************************************/ > -#if defined (__arm__) && W_TYPE_SIZE =3D=3D 32 > +#if defined (__arm__) && W_TYPE_SIZE =3D=3D 32 && = !defined(__FreeBSD__) > #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ > __asm__ ("adds %1, %4, %5\n" = \ > "adc %0, %2, %3" = \ >=20 >=20 > On Aug 19, 2013, at 6:04 AM, Chie Taguchi wrote: >=20 >> i add security/libgcrypt(ports/181365), graphics/libGL(ports/176705) = to repo. >>=20 >> and i also added document about security/libgcrypt(ports/181365), = graphics/dri(ports/176703), graphics/libGL(ports/176705). >>=20 >> regards. >>=20 >> C.Taguchi >>=20 >> On Sun, 18 Aug 2013 21:25:08 +0900 >> Chie Taguchi wrote: >>=20 >>> thank you for your infomation. >>>=20 >>> it is useful for many people to make a collection repo of ports fix = infomation about Xorg and others. >>>=20 >>> i will push that fixes, security/libgcrypt(ports/181365), = graphics/dri(ports/176703), graphics/libGL(ports/176705) to repo later. >>>=20 >>> and i also sended PR x11-fonts/fontconfig issue(ports/181372). >>>=20 >>> but i have a question about ${ARCH} value in ports Makefile. "armv6" = or "arm" || "armv6", which is the better way?=20 >>>=20 >>> thanks, >>>=20 >>> C.Taguchi >>>=20 >>> On Sun, 18 Aug 2013 09:42:06 +0200 >>> Guillaume Bibaut wrote: >>>=20 >>>> Very nice, at least that's what I was looking for. >>>>=20 >>>> There are still patches to apply on some other ports too : >>>> - security/libgcrypt : to use GCC >>>> - graphics/dri : = http://www.freebsd.org/cgi/query-pr.cgi?pr=3Dports/176703 >>>> - graphics/libGL : the same as dri since it's based on MesaLib >>>>=20 >>>> I can't remember if I'm forgetting anything else, but if anyone = finds anything, they could add it here :) >>>>=20 >>>> Thanks. >>>>=20 >>>> -- >>>> Guillaume Bibaut >>>>=20 >>>> Le 18 aout 2013 a 03:12, Chie Taguchi =20 >>>>=20 >>>>> Hi all, >>>>>=20 >>>>> i wrote a building document of x11/Xorg(not minimum) for = RaspberryPi. >>>>> if you want to build Xorg, it will be useful for you! >>>>> i hope so.:) >>>>>=20 >>>>> https://github.com/taguchi-ch/freebsd-ports-xorg-raspberrypi >>>>>=20 >>>>> Thanks. >>>>>=20 >>>>> --=20 >>>>> Chie Taguchi >>>>> _______________________________________________ >>>>> freebsd-arm@freebsd.org mailing list >>>>> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>>>> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" >>>>=20 >>>=20 >>>=20 >>> --=20 >>> Chie Taguchi >>=20 >>=20 >> --=20 >> Chie Taguchi >> _______________________________________________ >> freebsd-arm@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-arm >> To unsubscribe, send any mail to = "freebsd-arm-unsubscribe@freebsd.org" >=20 --Apple-Mail=_E012D13E-7556-4CCA-85F2-4E4026B41EDF-- From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 09:55:41 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 2D0F890D; Thu, 22 Aug 2013 09:55:41 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-stable.sentex.ca (freebsd-stable.sentex.ca [IPv6:2607:f3e0:0:3::6502:9b]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 038F12E0E; Thu, 22 Aug 2013 09:55:40 +0000 (UTC) Received: from freebsd-stable.sentex.ca (localhost [127.0.0.1]) by freebsd-stable.sentex.ca (8.14.5/8.14.5) with ESMTP id r7M9teKE031788; Thu, 22 Aug 2013 09:55:40 GMT (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-stable.sentex.ca (8.14.5/8.14.5/Submit) id r7M9te8e031787; Thu, 22 Aug 2013 09:55:40 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 22 Aug 2013 09:55:40 GMT Message-Id: <201308220955.r7M9te8e031787@freebsd-stable.sentex.ca> X-Authentication-Warning: freebsd-stable.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [releng_9 tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 09:55:41 -0000 TB --- 2013-08-22 09:10:26 - tinderbox 2.10 running on freebsd-stable.sentex.ca TB --- 2013-08-22 09:10:26 - FreeBSD freebsd-stable.sentex.ca 8.3-STABLE FreeBSD 8.3-STABLE #0: Tue Oct 16 17:37:58 UTC 2012 mdtancsa@freebsd-stable.sentex.ca:/usr/obj/usr/src/sys/server amd64 TB --- 2013-08-22 09:10:26 - starting RELENG_9 tinderbox run for arm/arm TB --- 2013-08-22 09:10:26 - cleaning the object tree TB --- 2013-08-22 09:10:48 - /usr/local/bin/svn stat /src TB --- 2013-08-22 09:10:54 - At svn revision 254652 TB --- 2013-08-22 09:10:55 - building world TB --- 2013-08-22 09:10:55 - CROSS_BUILD_TESTING=YES TB --- 2013-08-22 09:10:55 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-22 09:10:55 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-22 09:10:55 - SRCCONF=/dev/null TB --- 2013-08-22 09:10:55 - TARGET=arm TB --- 2013-08-22 09:10:55 - TARGET_ARCH=arm TB --- 2013-08-22 09:10:55 - TZ=UTC TB --- 2013-08-22 09:10:55 - __MAKE_CONF=/dev/null TB --- 2013-08-22 09:10:55 - cd /src TB --- 2013-08-22 09:10:55 - /usr/bin/make -B buildworld >>> World build started on Thu Aug 22 09:10:55 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/bin/ed/undo.c cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o ed buf.o cbc.o glbl.o io.o main.o re.o sub.o undo.o -lcrypto gzip -cn /src/bin/ed/ed.1 > ed.1.gz ===> bin/expr (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c expr.c cc1: warnings being treated as errors expr.c:812: warning: redundant redeclaration of 'yyparse' /src/bin/expr/expr.y:77: warning: previous declaration of 'yyparse' was here *** Error code 1 Stop in /src/bin/expr. *** Error code 1 Stop in /src/bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2013-08-22 09:55:40 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-22 09:55:40 - ERROR: failed to build world TB --- 2013-08-22 09:55:40 - 1676.45 user 378.34 system 2713.48 real http://tinderbox.freebsd.org/tinderbox-freebsd9-build-RELENG_9-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 11:24:29 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 7E34B686; Thu, 22 Aug 2013 11:24:29 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 1C6212415; Thu, 22 Aug 2013 11:24:29 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7MBOFTf049478; Thu, 22 Aug 2013 07:24:20 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <5215F4DF.6000305@m5p.com> Date: Thu, 22 Aug 2013 07:24:15 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: Hans Petter Selasky Subject: Re: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> In-Reply-To: <5105AB16.2000607@m5p.com> Content-Type: multipart/mixed; boundary="------------000204070203050307080704" X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Thu, 22 Aug 2013 07:24:21 -0400 (EDT) Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 11:24:29 -0000 This is a multi-part message in MIME format. --------------000204070203050307080704 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit As I was saying a few minutes ago ... On 01/27/13 17:32, George Mitchell wrote: > On 01/27/13 14:07, Hans Petter Selasky wrote: >> [...] I need output when hw.usb.ulpt.debug=15 to say exactly. >> Could you >> ask the provider of the binaries to compile having USB_DEBUG set, also >> for the >> modules. >> >> --HPS >> > > I'm working on getting a debug build ... Thanks for your help so far. > I notice that there seem to be only trivial differences between the 9.1 > release ulpt and the 10.0 current ulpt driver. -- George (This is on a Raspberry Pi.) It took me a bit longer than anticipated, but here is the output, from an image built over last weekend: --------------000204070203050307080704 Content-Type: text/plain; charset=us-ascii; name="messages" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="messages" Aug 22 11:15:09 pi kernel: ugen0.5: at usbus0 Aug 22 11:15:09 pi kernel: ulpt_probe: Aug 22 11:15:09 pi kernel: ulpt_probe: Aug 22 11:15:09 pi kernel: ulpt_attach: sc=0xc2d43800 Aug 22 11:15:09 pi kernel: ulpt0: on usbus0 Aug 22 11:15:09 pi kernel: ulpt_attach: setting alternate config number: 0 Aug 22 11:15:09 pi kernel: ulpt_attach: error=USB_ERR_INVAL Aug 22 11:15:09 pi kernel: ulpt_detach: sc=0xc2d43800 Aug 22 11:15:09 pi kernel: device_attach: ulpt0 attach returned 12 --------------000204070203050307080704-- From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 11:33:22 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id CC0AEA2B; Thu, 22 Aug 2013 11:33:22 +0000 (UTC) (envelope-from hps@bitfrost.no) Received: from mta.bitpro.no (mta.bitpro.no [92.42.64.202]) by mx1.freebsd.org (Postfix) with ESMTP id 886C124C3; Thu, 22 Aug 2013 11:33:22 +0000 (UTC) Received: from mail.lockless.no (mail.lockless.no [46.29.221.38]) by mta.bitpro.no (Postfix) with ESMTP id 2F2A67A305; Thu, 22 Aug 2013 13:33:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mail.lockless.no (Postfix) with ESMTP id 4D5118F3E47; Thu, 22 Aug 2013 13:33:26 +0200 (CEST) X-Virus-Scanned: by amavisd-new-2.6.4 (20090625) (Debian) at lockless.no Received: from mail.lockless.no ([127.0.0.1]) by localhost (mail.lockless.no [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uSAk0TeTT6Hx; Thu, 22 Aug 2013 13:33:25 +0200 (CEST) Received: from laptop015.hselasky.homeunix.org (cm-176.74.213.204.customer.telag.net [176.74.213.204]) by mail.lockless.no (Postfix) with ESMTPSA id 1770C8F3E46; Thu, 22 Aug 2013 13:33:25 +0200 (CEST) Message-ID: <5215F743.8060403@bitfrost.no> Date: Thu, 22 Aug 2013 13:34:27 +0200 From: Hans Petter Selasky Organization: Bitfrost A/S User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130522 Thunderbird/17.0.6 MIME-Version: 1.0 To: George Mitchell Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> In-Reply-To: <5215F4DF.6000305@m5p.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 11:33:22 -0000 On 08/22/13 13:24, George Mitchell wrote: > As I was saying a few minutes ago ... > > On 01/27/13 17:32, George Mitchell wrote: >> On 01/27/13 14:07, Hans Petter Selasky wrote: >>> [...] I need output when hw.usb.ulpt.debug=15 to say exactly. >>> Could you >>> ask the provider of the binaries to compile having USB_DEBUG set, also >>> for the >>> modules. >>> >>> --HPS >>> >> >> I'm working on getting a debug build ... Thanks for your help so far. >> I notice that there seem to be only trivial differences between the 9.1 >> release ulpt and the 10.0 current ulpt driver. -- George > > (This is on a Raspberry Pi.) It took me a bit longer than anticipated, > but here is the output, from an image built over last weekend: Hi, Could you run: usbdump -i usbusX -f Y -s 65536 To get a dump of the USB activity when you plug the device? The message in question is not important, and might be changed to not cancel the ulpt attach routine. --HPS From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 13:11:27 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id BE0F382F for ; Thu, 22 Aug 2013 13:11:27 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-ee0-f52.google.com (mail-ee0-f52.google.com [74.125.83.52]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 4D8B62C19 for ; Thu, 22 Aug 2013 13:11:27 +0000 (UTC) Received: by mail-ee0-f52.google.com with SMTP id c41so900510eek.25 for ; Thu, 22 Aug 2013 06:11:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:message-id:date:from:organization:user-agent :mime-version:to:cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=7R13iPXP7W1X3Ok3/YgYW4iipKqjRFt0AghL3cAYjmk=; b=iDX6jwpPOKgj1nxu1d1E+k+edQ+6f3oIH4NWsEZh9ntjmH96l1mXptSz2ATUzHx18L D0Agc/dM1K3PIOWcUDe0SqLuuBzncyMhHRcv76ePXDJppF5kI7ZWHeW4Cv3LxHZiUbHZ P2KmXIxbkqWTa3WFy1tkFutIZxZgdLJYqOmwov1nGArmZRVC0pMCYDfgvs9crXJ3aVU5 7w4klHwPTAo9hG3GXRcoM0s5HzsYsZaDhzDv2DwoOal2PapgyVWXj9n1+NTH2yXSMXWY JhXdD12eTDMoSkiSGRvnY89YG4CrtzAYVXBUKTu3Uo1Tg6paZo9xM3U4YdvHy+LlZ8+F t5oQ== X-Gm-Message-State: ALoCoQll0uLwdJ7MN5+ld1IiEEBzepuzFvAOS4Os6ZaCVScfevlMatZ8kVeTE4MNU0MnopIoBmwK X-Received: by 10.14.184.3 with SMTP id r3mr18797570eem.49.1377177085421; Thu, 22 Aug 2013 06:11:25 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id r48sm17462773eev.14.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 06:11:24 -0700 (PDT) Message-ID: <52160DFA.5050909@semihalf.com> Date: Thu, 22 Aug 2013 15:11:22 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130803 Thunderbird/17.0.8 MIME-Version: 1.0 To: Adrian Chadd Subject: Re: Introduction to the superpages support for ARMv6/v7 References: <5214EAE6.6040300@semihalf.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: "freebsd-arm@freebsd.org" , Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 13:11:27 -0000 Hello Adrian, I understand. However I'm not familiar with any free software that could do that. So I'm afraid that I can't really help in that matter :( Best regards Zbyszek Bodek On 22.08.2013 07:04, Adrian Chadd wrote: > Hi, > > Yes, I'm much more interested in a software CPU emulator for various ARM > platforms. > > Are there any ARM emulators (eg qemu) that can start booting FreeBSD ARM > - but then fail, because we're missing disk/console/net/etc support? > > Basically - I'd like to finish off the ARM/MIPS/PPC/Sparc emulation > environment support for FreeBSD so people like Alan, Jeff and others who > hack on things like the VM and memory allocation framework have a chance > of testing on these platforms before they commit stuff that may break > them.:) > > > > -adrian > > > > On 21 August 2013 16:43, Zbigniew Bodek > wrote: > > 2013/8/21 Adrian Chadd > > > Hi! > > I like your ARM work very much. Is there any emulator that we > can spin up to actually test this stuff out? > > > > > -adrian > > Hello Adrian, > > Thank you. > > If you are referring to some soft that emulates ARMv7 (instead of > using HW platform), then there is none that > I know about which allows to run FreeBSD in multiuser. Or I > misunderstood your question? > > Regarding HW platforms, then all ARMv6/v7-based devices supported by > FreeBSD should be able to take advantage > of superpages. > > Best regards > Zbyszek Bodek > > From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 13:12:33 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 9E347878 for ; Thu, 22 Aug 2013 13:12:33 +0000 (UTC) (envelope-from paul@gromit.dlib.vt.edu) Received: from lennier.cc.vt.edu (lennier.cc.vt.edu [198.82.162.213]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 5C59F2C25 for ; Thu, 22 Aug 2013 13:12:33 +0000 (UTC) Received: from mr1.cc.vt.edu (mr1.cc.vt.edu [198.82.141.12]) by lennier.cc.vt.edu (8.13.8/8.13.8) with ESMTP id r7MDC2FQ027660; Thu, 22 Aug 2013 09:12:02 -0400 Received: from auth3.smtp.vt.edu (auth3.smtp.vt.edu [198.82.161.152]) by mr1.cc.vt.edu (8.14.4/8.14.4) with ESMTP id r7MDC1sx005693; Thu, 22 Aug 2013 09:12:01 -0400 Received: from pmather.tower.lib.vt.edu (pmather.tower.lib.vt.edu [128.173.51.28]) (authenticated bits=0) by auth3.smtp.vt.edu (8.13.8/8.13.8) with ESMTP id r7MDC1Wf026150 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Thu, 22 Aug 2013 09:12:01 -0400 Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 6.5 \(1508\)) Subject: Re: pkg repository for ARM? From: Paul Mather In-Reply-To: <34F61A6F-D0D2-4D16-BD70-8206AC19DC37@kientzle.com> Date: Thu, 22 Aug 2013 09:12:00 -0400 Content-Transfer-Encoding: quoted-printable Message-Id: <7485E663-3881-4E0D-9DE2-A00D24ED030E@gromit.dlib.vt.edu> References: <522A0D57-4DD4-4669-BB5A-AFCD81E9F497@netsense.nl> <41577B23-E4DE-451B-B5F7-912024C05AB7@gromit.dlib.vt.edu> <34F61A6F-D0D2-4D16-BD70-8206AC19DC37@kientzle.com> To: Tim Kientzle X-Mailer: Apple Mail (2.1508) Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 13:12:33 -0000 On Aug 15, 2013, at 10:19 PM, Tim Kientzle wrote: >=20 > On Aug 15, 2013, at 4:09 PM, Paul Mather wrote: >=20 >> AFAIK, a native build under clang on arm is still broken. >=20 > I have done full native builds on BBB since the Clang > switch got thrown. I've not tried on the BBB, just Raspberry Pi. I should probably give it = a go on the BBB now I have a cross-built FreeBSD working on there. I = can't think of a good reason why it would work on BBB and not Raspberry = Pi, though. > I haven't been able to do it very consistently, but I > don't think that can be entirely blamed on clang. ;-) Are you doing full native builds with WITHOUT_CLANG_IS_CC set? I have = never managed to do a successful native build using clang; I always have = to set the compilers to point to the native GCC versions in my = /etc/src.conf. (I can, of course, successfully cross-build world and = kernel using clang via crochet.) Do you have a SVN revision number that will successfully build natively = using clang? I tried a native build on my Raspberry Pi yesterday, and I still get the = clang Abort Trap internal compiler error bug triggered where it = complains about unaligned access (Assertion failed: ((PtrVal & ((1 << = PtrTraits::NumLowBitsAvailable)-1)) =3D=3D 0 && "Pointer is not = sufficiently aligned")): =3D=3D=3D=3D=3D c++ -O -pipe = -I/usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/include = -I/usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/tools/clang/incl= ude = -I/usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/lib/Support = -I. = -I/usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/../../lib/clang/= include -DLLVM_ON_UNIX -DLLVM_ON_FREEBSD -D__STDC_LIMIT_MACROS = -D__STDC_CONSTANT_MACROS -fno-strict-aliasing = -DLLVM_DEFAULT_TARGET_TRIPLE=3D\"armv6-gnueabi-freebsd10.0\" = -DLLVM_HOST_TRIPLE=3D\"armv6-unknown-freebsd10.0\" = -DDEFAULT_SYSROOT=3D\"\" -I/usr/obj/usr/src/tmp/legacy/usr/include = -fno-exceptions -fno-rtti -c = /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/lib/Support/APFloa= t.cpp -o APFloat.o Assertion failed: ((PtrVal & ((1 << PtrTraits::NumLowBitsAvailable)-1)) = =3D=3D 0 && "Pointer is not sufficiently aligned"), function = initWithPointer, file = /usr/src/lib/clang/libclangsema/../../../contrib/llvm/include/llvm/ADT/Poi= nterIntPair.h, line 100. Stack dump: 0. Program arguments: /usr/bin/c++ -cc1 -triple = armv6-unknown-freebsd10.0 -S -disable-free -main-file-name APFloat.cpp = -mrelocation-model static -mdisable-fp-elim -relaxed-aliasing = -mconstructor-aliases -target-abi apcs-gnu -target-cpu arm1136jf-s = -msoft-float -mfloat-abi soft -target-feature +soft-float = -target-feature +soft-float-abi -target-feature -neon -coverage-file = /tmp/APFloat-5qvCkz.s -resource-dir /usr/bin/../lib/clang/3.3 -D = LLVM_ON_UNIX -D LLVM_ON_FREEBSD -D __STDC_LIMIT_MACROS -D = __STDC_CONSTANT_MACROS -D = LLVM_DEFAULT_TARGET_TRIPLE=3D"armv6-gnueabi-freebsd10.0" -D = LLVM_HOST_TRIPLE=3D"armv6-unknown-freebsd10.0" -D DEFAULT_SYSROOT=3D"" = -I /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/include -I = /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/tools/clang/includ= e -I /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/lib/Support = -I . -I = /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/../../lib/clang/in= clude -I /usr/obj/usr/src/tmp/legacy/usr/include -O2 -fdeprecated-macro = -fno-dwarf-directory-asm -fdebug-compilation-dir = /usr/obj/usr/src/tmp/usr/src/lib/clang/libllvmsupport -ferror-limit 19 = -fmessage-length 0 -mstackrealign -fno-rtti -fno-signed-char = -fobjc-runtime=3Dgnustep -fobjc-default-synthesize-properties = -fsjlj-exceptions -fdiagnostics-show-option -backend-option = -vectorize-loops -o /tmp/APFloat-5qvCkz.s -x c++ = /usr/src/lib/clang/libllvmsupport/../../../contrib/llvm/lib/Support/APFloa= t.cpp=20 1. /usr/include/c++/4.2/bits/basic_string.tcc:978:43: current = parser token ';' 2. /usr/include/c++/4.2/bits/basic_string.tcc:48:1 = : parsing = namespace 'std' c++: error: unable to execute command: Abort trap (core dumped) c++: error: clang frontend command failed due to signal (use -v to see = invocation) FreeBSD clang version 3.3 (trunk 178860) 20130405 Target: armv6-unknown-freebsd10.0 Thread model: posix c++: note: diagnostic msg: PLEASE submit a bug report to = http://llvm.org/bugs/ and include the crash backtrace, preprocessed = source, and associated run script. c++: note: diagnostic msg: Error generating preprocessed source(s). *** [APFloat.o] Error code 254 bmake[2]: stopped in /usr/src/lib/clang/libllvmsupport 1 error bmake[2]: stopped in /usr/src/lib/clang/libllvmsupport *** [bootstrap-tools] Error code 2 bmake[1]: stopped in /usr/src 1 error bmake[1]: stopped in /usr/src *** [_bootstrap-tools] Error code 2 bmake: stopped in /usr/src 1 error bmake: stopped in /usr/src *** [buildworld] Error code 2 1 error =3D=3D=3D=3D=3D That is with this native version of clang: FreeBSD clang version 3.3 (trunk 178860) 20130405 Target: armv6-unknown-freebsd10.0 Thread model: posix Do you (or anyone else) know whether this bug has been fixed? I'm going = to do a native build using GCC and then see if I can do a native build = using clang. Cheers, Paul. From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 13:19:23 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id B69F0ACE for ; Thu, 22 Aug 2013 13:19:23 +0000 (UTC) (envelope-from zbb@semihalf.com) Received: from mail-ee0-f46.google.com (mail-ee0-f46.google.com [74.125.83.46]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 4913E2C71 for ; Thu, 22 Aug 2013 13:19:22 +0000 (UTC) Received: by mail-ee0-f46.google.com with SMTP id c13so908804eek.19 for ; Thu, 22 Aug 2013 06:19:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:message-id:date:from:organization:user-agent :mime-version:to:cc:subject:references:in-reply-to:content-type :content-transfer-encoding; bh=a2u/HKgLzstls5n/dtyFEsBKj6FjQwxGQWi6TJzH0yM=; b=eyPRC24Cz8bqW7NhzEaQIiCBInqRuMJbpJymEY4xUAlNBRCr/bs/gLnOLtdqrfxK/o oqgCK3tld0JenxwB7pl3ilxHqATSItlJdAWgfsC47YM7CHxLB6Fdk95vL1eAN/AuZ+j1 Ginw1PwDwdTj2BZDrk4RcbQQRV/6Ht5SlGQft0124Cl/1Qs0vIAfW0rgMaWxVKsyPR35 1Ze/PT834449vMPLS9O2gwhHtGKeJ3pskIR/GA74Eb180AqX7yG+QD3RFzDDR72X01Wm /Yyou/7pWE01brjmClGCfrkOxzwF00hY7WHyAv6Y+w42g8HxZSotvx8MHyw4dAg/W3mR 6Tuw== X-Gm-Message-State: ALoCoQmNwyMuyGCeYkJ3e+4ZQq97Y4jy5vWY3FYIvEPD7UlBdbP40UbdIdUcSW9oPNb3m0CAUz0Z X-Received: by 10.14.174.195 with SMTP id x43mr18856215eel.47.1377177555569; Thu, 22 Aug 2013 06:19:15 -0700 (PDT) Received: from [10.0.2.117] (cardhu.semihalf.com. [213.17.239.108]) by mx.google.com with ESMTPSA id j7sm8316305eeo.15.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 06:19:14 -0700 (PDT) Message-ID: <52160FD1.7030302@semihalf.com> Date: Thu, 22 Aug 2013 15:19:13 +0200 From: Zbyszek Bodek Organization: Semihalf User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130803 Thunderbird/17.0.8 MIME-Version: 1.0 To: freebsd-arm@FreeBSD.org Subject: Re: Introduction to the superpages support for ARMv6/v7 References: <5214EAE6.6040300@semihalf.com> In-Reply-To: <5214EAE6.6040300@semihalf.com> Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: Alan Cox X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 13:19:23 -0000 On 21.08.2013 18:29, Zbyszek Bodek wrote: > Hello Everyone, > > I'm happy to announce the preliminary patch adding superpages > support for ARMv6/v7 platforms. > > This code is the core part of the "Superpages for ARMv7" project, > sponsored by both Semihalf and The FreeBSD Foundation and developed with > the great support of Alan Cox. > > We'd like to commit these changes before the feature freeze. > Therefore, we would greatly appreciate if you could test the patch on > your ARM-based platforms and send us your feedback as soon as possible. > In addition, please send your remarks and comments if there are any. > > Please check out this location: > http://people.freebsd.org/~raj/patches/arm/superpages/ > > and files: > * 0001-Introduce-preliminary-superpages-support-for-ARMv6-v.patch > - patch based on revision 254596 > * GUPS.tar.gz > - (Giga Updates Per Second) benchmark that can be used to do a quick > preview of the functionality. > > In order to enable superpages utilization one needs to set 'sp_enabled' > sysctl variable (in src or loader). Without that, the kernel is supposed > to work as it was without SP even so the reservation based allocation > mechanism is enabled. > > One can observe superpages statistics using: > sysctl vm.pmap.section > > We have tested this on Armada XP in SMP environment but the presented > support should work on any ARMv6/v7 platform. > > After committing this code we will send a separate e-mail summing up > this work and covering more details. > Hello again, Please check out the updated patch: http://people.freebsd.org/~raj/patches/arm/superpages/0001-Introduce-preliminary-superpages-support-for-ARMv6-v.patch Short info: - Unified SP related functions names to contain _section suffix instead of _superpage. This is to keep the names in sync with sysctl variables, existing functions and for future development when 64KB superpages arrive. - Removed redundant code - We will also add missing pv_chunk list initialization in the separate commit but here this change included to the overall patch. Best regards Zbyszek Bodek From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 13:27:47 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 48A89F9A for ; Thu, 22 Aug 2013 13:27:47 +0000 (UTC) (envelope-from luiz.souza@ad.com.br) Received: from db9outboundpool.messaging.microsoft.com (mail-db9lp0250.outbound.messaging.microsoft.com [213.199.154.250]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 4D2552CED for ; Thu, 22 Aug 2013 13:27:45 +0000 (UTC) Received: from mail18-db9-R.bigfish.com (10.174.16.228) by DB9EHSOBE006.bigfish.com (10.174.14.69) with Microsoft SMTP Server id 14.1.225.22; Thu, 22 Aug 2013 13:27:38 +0000 Received: from mail18-db9 (localhost [127.0.0.1]) by mail18-db9-R.bigfish.com (Postfix) with ESMTP id 035A92010F for ; Thu, 22 Aug 2013 13:27:38 +0000 (UTC) X-Forefront-Antispam-Report: CIP:132.245.156.37; KIP:(null); UIP:(null); IPV:NLI; H:GRXPRD8010HT001.lamprd80.prod.outlook.com; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: PS3(zz98dI9371Ic85fh1403R1432I4015Ide40hzz1f42h208ch1ee6h1de0h1d18h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h17326ah1de096h8275dh1de097hz30ih2a8h839hd25he5bhf0ah1288h12a5h12bdh137ah139eh1441h1504h1537h162dh1631h1662h1758h1898h18e1h1946h19b5h19ceh1ad9h1b0ah1bceh1cb5h1d0ch1d2eh1d3fh1dfeh1dffh1e23h1fe8h1ff5h2052h34h1307i1155h) Received-SPF: fail (mail18-db9: domain of ad.com.br does not designate 132.245.156.37 as permitted sender) client-ip=132.245.156.37; envelope-from=luiz.souza@ad.com.br; helo=GRXPRD8010HT001.lamprd80.prod.outlook.com ; .outlook.com ; Received: from mail18-db9 (localhost.localdomain [127.0.0.1]) by mail18-db9 (MessageSwitch) id 1377178055621791_4105; Thu, 22 Aug 2013 13:27:35 +0000 (UTC) Received: from DB9EHSMHS015.bigfish.com (unknown [10.174.16.251]) by mail18-db9.bigfish.com (Postfix) with ESMTP id 90FA8180040 for ; Thu, 22 Aug 2013 13:27:35 +0000 (UTC) Received: from GRXPRD8010HT001.lamprd80.prod.outlook.com (132.245.156.37) by DB9EHSMHS015.bigfish.com (10.174.14.25) with Microsoft SMTP Server (TLS) id 14.16.227.3; Thu, 22 Aug 2013 13:27:33 +0000 Received: from [10.10.1.8] (201.72.203.70) by pod51028.outlook.com (10.242.26.34) with Microsoft SMTP Server (TLS) id 14.16.347.3; Thu, 22 Aug 2013 13:27:03 +0000 From: Luiz Otavio O Souza MIME-Version: 1.0 (Apple Message framework v1085) Content-Type: multipart/mixed; boundary="Apple-Mail-225--561141063" Subject: Re: i2c driver for RPi Date: Thu, 22 Aug 2013 10:26:57 -0300 In-Reply-To: To: References: Message-ID: <2FE9A8E0-D64F-4658-AFB5-DECDA99C12CB@ad.com.br> X-Mailer: Apple Mail (2.1085) X-Originating-IP: [201.72.203.70] X-OriginatorOrg: ad.com.br X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 13:27:47 -0000 --Apple-Mail-225--561141063 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="us-ascii" On Aug 15, 2013, at 1:50 PM, Luiz Otavio O Souza wrote: > Hello guys, >=20 > I've written the I2C (BSC - broadcom serial controller) driver for = RPi. >=20 > The test was done by reading the registers of two lm75 on the same I2C = bus (the only one available on my RPi). >=20 > You have to manually switch the I2C pins to alt0 function. There are = two bsc controllers on SoC, the older ones uses the bsc0 and gpio pins 0 = and 1 while the newer boards uses the bsc1 with gpio pins 2 and 3. >=20 > There is a third bsc controller which is used for the HDMI connection. = I have not touched this one (although it should just work). >=20 > So for my basics tests, here is what i did: >=20 > root@raspberry-pi:~ # sysctl dev.gpio.0.pin.0.function=3Dalt0 > dev.gpio.0.pin.0.function: input -> alt0 > root@raspberry-pi:~ # sysctl dev.gpio.0.pin.1.function=3Dalt0 > dev.gpio.0.pin.1.function: input -> alt0 > root@raspberry-pi:~ # cd src/lm75 > root@raspberry-pi:~/src/lm75 # ./lm75 -d 150 -f /dev/iic0 -a > lm75 in comparator mode > O.S. polarity: active low > Fault Queue: 1 > temperature: 17.0C > o.s. temperature: 80.0C > hyst temperature: 75.0C > root@raspberry-pi:~/src/lm75 # ./lm75 -d 158 -f /dev/iic0 -a > lm75 in comparator mode > O.S. polarity: active low > Fault Queue: 1 > temperature: 16.5C > o.s. temperature: 80.0C > hyst temperature: 75.0C >=20 >=20 > The lm75 code is at: http://loos.no-ip.org/lm75.tar.gz >=20 > The BSC driver also exports some knobs under the dev.bsc sysctl: >=20 > root@raspberry-pi:~/src/lm75 # sysctl dev.bsc.0 > dev.bsc.0.%desc: BCM2708/2835 BSC controller > dev.bsc.0.%driver: bsc > dev.bsc.0.%parent: simplebus0 > dev.bsc.0.clock: 100000 > dev.bsc.0.clock_stretch: 64 > dev.bsc.0.fall_edge_delay: 48 > dev.bsc.0.rise_edge_delay: 48 >=20 >=20 > And the dmesg (for bsc part): >=20 > bsc0: mem 0x20205000-0x2020501f irq 61 = on simplebus0 > iicbus0: on bsc0 > iic0: on iicbus0 > bsc1: mem 0x20804000-0x2080401f irq 61 = on simplebus0 > iicbus1: on bsc1 > iic1: on iicbus1 Here is an updated patch which i'm going to ask for approval from my = mentor if there are no objections. It has a few fixes (locks, style) and now it does the gpio pin = configuration (set the alternate pin function) at attachment so it works = right out of the box (thanks to rpaulo). The bcm2835_gpio-alternate.diff add a function to bcm2835 GPIO to set = the alternate pin function. Thanks, Luiz --Apple-Mail-225--561141063 Content-Disposition: attachment; filename="bcm2835_gpio-alternate.diff" Content-Type: application/octet-stream; name="bcm2835_gpio-alternate.diff" Content-Transfer-Encoding: 7bit Index: sys/arm/broadcom/bcm2835/bcm2835_gpio.c =================================================================== --- sys/arm/broadcom/bcm2835/bcm2835_gpio.c (revision 254251) +++ sys/arm/broadcom/bcm2835/bcm2835_gpio.c (working copy) @@ -52,6 +52,8 @@ #include #include +#include + #include "gpio_if.h" #undef DEBUG @@ -87,17 +89,6 @@ struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS]; }; -enum bcm_gpio_fsel { - BCM_GPIO_INPUT, - BCM_GPIO_OUTPUT, - BCM_GPIO_ALT5, - BCM_GPIO_ALT4, - BCM_GPIO_ALT0, - BCM_GPIO_ALT1, - BCM_GPIO_ALT2, - BCM_GPIO_ALT3, -}; - enum bcm_gpio_pud { BCM_GPIO_NONE, BCM_GPIO_PULLDOWN, @@ -257,6 +248,32 @@ BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0); } +void +bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc) +{ + struct bcm_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + BCM_GPIO_LOCK(sc); + + /* Disable pull-up or pull-down on pin. */ + bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE); + + /* And now set the pin function. */ + bcm_gpio_set_function(sc, pin, nfunc); + + /* Update the pin flags. */ + for (i = 0; i < sc->sc_gpio_npins; i++) { + if (sc->sc_gpio_pins[i].gp_pin == pin) + break; + } + if (i < sc->sc_gpio_npins) + sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc); + + BCM_GPIO_UNLOCK(sc); +} + static void bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin, unsigned int flags) @@ -535,7 +552,7 @@ struct bcm_gpio_softc *sc; struct bcm_gpio_sysctl *sc_sysctl; uint32_t nfunc; - int i, error; + int error; sc_sysctl = arg1; sc = sc_sysctl->sc; @@ -552,24 +569,8 @@ if (bcm_gpio_str_func(buf, &nfunc) != 0) return (EINVAL); - BCM_GPIO_LOCK(sc); - - /* Disable pull-up or pull-down on pin. */ - bcm_gpio_set_pud(sc, sc_sysctl->pin, BCM_GPIO_NONE); - - /* And now set the pin function. */ - bcm_gpio_set_function(sc, sc_sysctl->pin, nfunc); - - /* Update the pin flags. */ - for (i = 0; i < sc->sc_gpio_npins; i++) { - if (sc->sc_gpio_pins[i].gp_pin == sc_sysctl->pin) - break; - } - if (i < sc->sc_gpio_npins) - sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc); - - BCM_GPIO_UNLOCK(sc); - + /* Update the pin alternate function. */ + bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc); return (0); } --- /dev/null 2013-08-17 14:22:00.000000000 -0300 +++ sys/arm/broadcom/bcm2835/bcm2835_gpio.h 2013-08-17 14:21:48.098471481 -0300 @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2013 Oleksandr Tymoshenko + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _BCM2835_GPIO_H_ +#define _BCM2835_GPIO_H_ + +enum bcm_gpio_fsel { + BCM_GPIO_INPUT, + BCM_GPIO_OUTPUT, + BCM_GPIO_ALT5, + BCM_GPIO_ALT4, + BCM_GPIO_ALT0, + BCM_GPIO_ALT1, + BCM_GPIO_ALT2, + BCM_GPIO_ALT3, +}; + +void bcm_gpio_set_alternate(device_t, uint32_t, uint32_t); + +#endif /* _BCM2835_GPIO_H_ */ --Apple-Mail-225--561141063 Content-Disposition: attachment; filename="bcm2835_bsc.diff" Content-Type: application/octet-stream; name="bcm2835_bsc.diff" Content-Transfer-Encoding: 7bit Index: sys/arm/broadcom/bcm2835/files.bcm2835 =================================================================== --- sys/arm/broadcom/bcm2835/files.bcm2835 (revision 254251) +++ sys/arm/broadcom/bcm2835/files.bcm2835 (working copy) @@ -1,5 +1,6 @@ # $FreeBSD$ +arm/broadcom/bcm2835/bcm2835_bsc.c optional bcm2835_bsc arm/broadcom/bcm2835/bcm2835_dma.c standard arm/broadcom/bcm2835/bcm2835_fb.c optional sc arm/broadcom/bcm2835/bcm2835_gpio.c optional gpio Index: sys/arm/conf/RPI-B =================================================================== --- sys/arm/conf/RPI-B (revision 254251) +++ sys/arm/conf/RPI-B (working copy) @@ -79,6 +79,11 @@ device gpio device gpioled +# I2C +device iic +device iicbus +device bcm2835_bsc + options KDB options DDB #Enable the kernel debugger options INVARIANTS #Enable calls of extra sanity checking Index: sys/boot/fdt/dts/bcm2835.dtsi =================================================================== --- sys/boot/fdt/dts/bcm2835.dtsi (revision 254251) +++ sys/boot/fdt/dts/bcm2835.dtsi (working copy) @@ -396,6 +396,22 @@ }; }; + bsc0 { + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x205000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + + bsc1 { + compatible = "broadcom,bcm2835-bsc", + "broadcom,bcm2708-bsc"; + reg = <0x804000 0x20>; + interrupts = <61>; + interrupt-parent = <&intc>; + }; + dma: dma { compatible = "broadcom,bcm2835-dma", "broadcom,bcm2708-dma"; Index: sys/conf/files =================================================================== --- sys/conf/files (revision 254251) +++ sys/conf/files (working copy) @@ -1903,6 +1903,7 @@ dev/ofw/ofw_bus_subr.c optional fdt dev/ofw/ofw_fdt.c optional fdt dev/ofw/ofw_if.m optional fdt +dev/ofw/ofw_iicbus.c optional fdt iicbus dev/ofw/openfirm.c optional fdt dev/ofw/openfirmio.c optional fdt dev/patm/if_patm.c optional patm pci Index: sys/conf/files.powerpc =================================================================== --- sys/conf/files.powerpc (revision 254251) +++ sys/conf/files.powerpc (working copy) @@ -44,7 +44,6 @@ dev/ofw/ofw_bus_subr.c optional aim dev/ofw/ofw_console.c optional aim dev/ofw/ofw_disk.c optional ofwd aim -dev/ofw/ofw_iicbus.c optional iicbus aim dev/ofw/ofw_standard.c optional aim powerpc dev/powermac_nvram/powermac_nvram.c optional powermac_nvram powermac dev/quicc/quicc_bfe_fdt.c optional quicc mpc85xx --- /dev/null 2013-08-22 00:44:00.000000000 -0300 +++ sys/arm/broadcom/bcm2835/bcm2835_bsc.c 2013-08-22 00:48:31.380063237 -0300 @@ -0,0 +1,549 @@ +/*- + * Copyright (c) 2001 Tsubai Masanari. + * Copyright (c) 2012 Oleksandr Tymoshenko + * Copyright (c) 2013 Luiz Otavio O Souza + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "iicbus_if.h" + +struct { + uint32_t sda; + uint32_t scl; +} bcm_bsc_pins[] = { + { 0, 1 }, /* BSC0 GPIO pins. */ + { 2, 3 } /* BSC1 GPIO pins. */ +}; + +struct bcm_bsc_softc { + device_t sc_dev; + struct mtx sc_mtx; + struct resource * sc_mem_res; + struct resource * sc_irq_res; + bus_space_tag_t sc_bst; + bus_space_handle_t sc_bsh; + uint16_t sc_resid; + uint8_t *sc_data; + uint8_t sc_flags; + void * sc_intrhand; +}; + +#define BCM_BSC_CORE_CLK 150000000U +#define BCM_BSC_CTRL 0x00 +#define BCM_BSC_CTRL_I2CEN (1 << 15) +#define BCM_BSC_CTRL_INTR (1 << 10) +#define BCM_BSC_CTRL_INTT (1 << 9) +#define BCM_BSC_CTRL_INTD (1 << 8) +#define BCM_BSC_CTRL_ST (1 << 7) +#define BCM_BSC_CTRL_CLEAR1 (1 << 5) +#define BCM_BSC_CTRL_CLEAR0 (1 << 4) +#define BCM_BSC_CTRL_READ (1 << 0) +#define BCM_BSC_STATUS 0x04 +#define BCM_BSC_STATUS_CLKT (1 << 9) +#define BCM_BSC_STATUS_ERR (1 << 8) +#define BCM_BSC_STATUS_RXF (1 << 7) +#define BCM_BSC_STATUS_TXE (1 << 6) +#define BCM_BSC_STATUS_RXD (1 << 5) +#define BCM_BSC_STATUS_TXD (1 << 4) +#define BCM_BSC_STATUS_RXR (1 << 3) +#define BCM_BSC_STATUS_TXW (1 << 2) +#define BCM_BSC_STATUS_DONE (1 << 1) +#define BCM_BSC_STATUS_TA (1 << 0) +#define BCM_BSC_DLEN 0x08 +#define BCM_BSC_SLAVE 0x0c +#define BCM_BSC_DATA 0x10 +#define BCM_BSC_CLOCK 0x14 +#define BCM_BSC_DELAY 0x18 +#define BCM_BSC_CLKT 0x1c + +#define I2C_BUSY 0x01 +#define I2C_READ 0x02 +#define I2C_ERROR 0x04 + +#define BCM_BSC_WRITE(_sc, _off, _val) \ + bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val) +#define BCM_BSC_READ(_sc, _off) \ + bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off) + +#define BCM_BSC_LOCK(_sc) \ + mtx_lock(&(_sc)->sc_mtx) +#define BCM_BSC_UNLOCK(_sc) \ + mtx_unlock(&(_sc)->sc_mtx) + +static void bcm_bsc_intr(void *); + +static void +bcm_bsc_modifyreg(struct bcm_bsc_softc *sc, uint32_t off, uint32_t mask, + uint32_t value) +{ + uint32_t reg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + reg = BCM_BSC_READ(sc, off); + reg &= ~mask; + reg |= value; + BCM_BSC_WRITE(sc, off, reg); +} + +static int +bcm_bsc_clock_proc(SYSCTL_HANDLER_ARGS) +{ + struct bcm_bsc_softc *sc; + uint32_t clk; + int error; + + sc = (struct bcm_bsc_softc *)arg1; + + BCM_BSC_LOCK(sc); + clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); + BCM_BSC_UNLOCK(sc); + clk &= 0xffff; + if (clk == 0) + clk = 32768; + clk = BCM_BSC_CORE_CLK / clk; + error = sysctl_handle_int(oidp, &clk, sizeof(clk), req); + if (error != 0 || req->newptr == NULL) + return (error); + + clk = BCM_BSC_CORE_CLK / clk; + if (clk % 2) + clk--; + if (clk > 0xffff) + clk = 0xffff; + BCM_BSC_LOCK(sc); + BCM_BSC_WRITE(sc, BCM_BSC_CLOCK, clk); + BCM_BSC_UNLOCK(sc); + + return (0); +} + +static int +bcm_bsc_clkt_proc(SYSCTL_HANDLER_ARGS) +{ + struct bcm_bsc_softc *sc; + uint32_t clkt; + int error; + + sc = (struct bcm_bsc_softc *)arg1; + + BCM_BSC_LOCK(sc); + clkt = BCM_BSC_READ(sc, BCM_BSC_CLKT); + BCM_BSC_UNLOCK(sc); + clkt &= 0xffff; + error = sysctl_handle_int(oidp, &clkt, sizeof(clkt), req); + if (error != 0 || req->newptr == NULL) + return (error); + + BCM_BSC_LOCK(sc); + BCM_BSC_WRITE(sc, BCM_BSC_CLKT, clkt & 0xffff); + BCM_BSC_UNLOCK(sc); + + return (0); +} + +static int +bcm_bsc_fall_proc(SYSCTL_HANDLER_ARGS) +{ + struct bcm_bsc_softc *sc; + uint32_t clk, reg; + int error; + + sc = (struct bcm_bsc_softc *)arg1; + + BCM_BSC_LOCK(sc); + reg = BCM_BSC_READ(sc, BCM_BSC_DELAY); + BCM_BSC_UNLOCK(sc); + reg >>= 16; + error = sysctl_handle_int(oidp, ®, sizeof(reg), req); + if (error != 0 || req->newptr == NULL) + return (error); + + BCM_BSC_LOCK(sc); + clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); + clk = BCM_BSC_CORE_CLK / clk; + if (reg > clk / 2) + reg = clk / 2 - 1; + bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff0000, reg << 16); + BCM_BSC_UNLOCK(sc); + + return (0); +} + +static int +bcm_bsc_rise_proc(SYSCTL_HANDLER_ARGS) +{ + struct bcm_bsc_softc *sc; + uint32_t clk, reg; + int error; + + sc = (struct bcm_bsc_softc *)arg1; + + BCM_BSC_LOCK(sc); + reg = BCM_BSC_READ(sc, BCM_BSC_DELAY); + BCM_BSC_UNLOCK(sc); + reg &= 0xffff; + error = sysctl_handle_int(oidp, ®, sizeof(reg), req); + if (error != 0 || req->newptr == NULL) + return (error); + + BCM_BSC_LOCK(sc); + clk = BCM_BSC_READ(sc, BCM_BSC_CLOCK); + clk = BCM_BSC_CORE_CLK / clk; + if (reg > clk / 2) + reg = clk / 2 - 1; + bcm_bsc_modifyreg(sc, BCM_BSC_DELAY, 0xffff, reg); + BCM_BSC_UNLOCK(sc); + + return (0); +} + +static void +bcm_bsc_sysctl_init(struct bcm_bsc_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid *tree_node; + struct sysctl_oid_list *tree; + + /* + * Add system sysctl tree/handlers. + */ + ctx = device_get_sysctl_ctx(sc->sc_dev); + tree_node = device_get_sysctl_tree(sc->sc_dev); + tree = SYSCTL_CHILDREN(tree_node); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_bsc_clock_proc, "IU", "I2C BUS clock frequency"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock_stretch", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_bsc_clkt_proc, "IU", "I2C BUS clock stretch timeout"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "fall_edge_delay", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_bsc_fall_proc, "IU", "I2C BUS falling edge delay"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "rise_edge_delay", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_bsc_rise_proc, "IU", "I2C BUS rising edge delay"); +} + +static void +bcm_bsc_reset(struct bcm_bsc_softc *sc) +{ + + /* Clear pending interrupts. */ + BCM_BSC_WRITE(sc, BCM_BSC_STATUS, BCM_BSC_STATUS_CLKT | + BCM_BSC_STATUS_ERR | BCM_BSC_STATUS_DONE); + /* Clear the FIFO. */ + bcm_bsc_modifyreg(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_CLEAR0, + BCM_BSC_CTRL_CLEAR0); +} + +static int +bcm_bsc_probe(device_t dev) +{ + + if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-bsc")) + return (ENXIO); + + device_set_desc(dev, "BCM2708/2835 BSC controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +bcm_bsc_attach(device_t dev) +{ + struct bcm_bsc_softc *sc; + device_t gpio; + int rid; + + if (device_get_unit(dev) > 1) { + device_printf(dev, "only bsc0 and bsc1 are supported\n"); + return (ENXIO); + } + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + /* + * Configure the GPIO pins to ALT0 function to enable BSC control + * over the pins. + */ + gpio = devclass_get_device(devclass_find("gpio"), 0); + if (!gpio) { + device_printf(dev, "cannot find gpio0\n"); + return (ENXIO); + } + bcm_gpio_set_alternate(gpio, bcm_bsc_pins[device_get_unit(dev)].sda, + BCM_GPIO_ALT0); + bcm_gpio_set_alternate(gpio, bcm_bsc_pins[device_get_unit(dev)].scl, + BCM_GPIO_ALT0); + + rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + RF_ACTIVE); + if (!sc->sc_mem_res) { + device_printf(dev, "cannot allocate memory window\n"); + return (ENXIO); + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE | RF_SHAREABLE); + if (!sc->sc_irq_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot allocate interrupt\n"); + return (ENXIO); + } + + /* Hook up our interrupt handler. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, + NULL, bcm_bsc_intr, sc, &sc->sc_intrhand)) { + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot setup the interrupt handler\n"); + return (ENXIO); + } + + mtx_init(&sc->sc_mtx, "bcm_bsc", NULL, MTX_DEF); + + bcm_bsc_sysctl_init(sc); + + /* Enable the BSC controller. Flush the FIFO. */ + BCM_BSC_LOCK(sc); + BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN); + bcm_bsc_reset(sc); + BCM_BSC_UNLOCK(sc); + + device_add_child(dev, "iicbus", -1); + + return (bus_generic_attach(dev)); +} + +static int +bcm_bsc_detach(device_t dev) +{ + struct bcm_bsc_softc *sc; + + bus_generic_detach(dev); + + sc = device_get_softc(dev); + mtx_destroy(&sc->sc_mtx); + if (sc->sc_intrhand) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); + if (sc->sc_irq_res) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + + return (0); +} + +static void +bcm_bsc_intr(void *arg) +{ + struct bcm_bsc_softc *sc; + uint32_t status; + + sc = (struct bcm_bsc_softc *)arg; + + BCM_BSC_LOCK(sc); + + /* The I2C interrupt is shared among all the BSC controllers. */ + if ((sc->sc_flags & I2C_BUSY) == 0) { + BCM_BSC_UNLOCK(sc); + return; + } + + status = BCM_BSC_READ(sc, BCM_BSC_STATUS); + + /* Check for errors. */ + if (status & (BCM_BSC_STATUS_CLKT | BCM_BSC_STATUS_ERR)) { + /* Disable interrupts. */ + BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN); + sc->sc_flags |= I2C_ERROR; + bcm_bsc_reset(sc); + wakeup(sc->sc_dev); + BCM_BSC_UNLOCK(sc); + return; + } + + if (sc->sc_flags & I2C_READ) { + while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_RXD)) { + *sc->sc_data++ = BCM_BSC_READ(sc, BCM_BSC_DATA); + sc->sc_resid--; + status = BCM_BSC_READ(sc, BCM_BSC_STATUS); + } + } else { + while (sc->sc_resid > 0 && (status & BCM_BSC_STATUS_TXD)) { + BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data++); + sc->sc_resid--; + status = BCM_BSC_READ(sc, BCM_BSC_STATUS); + } + } + + if (status & BCM_BSC_STATUS_DONE) { + /* Disable interrupts. */ + BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN); + bcm_bsc_reset(sc); + wakeup(sc->sc_dev); + } + + BCM_BSC_UNLOCK(sc); +} + +static int +bcm_bsc_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) +{ + struct bcm_bsc_softc *sc; + uint32_t intr, read, status; + int i, err; + + sc = device_get_softc(dev); + BCM_BSC_LOCK(sc); + + if (sc->sc_flags & I2C_BUSY) + mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_bsc", hz); + + if (sc->sc_flags & I2C_BUSY) { + BCM_BSC_UNLOCK(sc); + return (ETIMEDOUT); + } + + sc->sc_flags = I2C_BUSY; + + /* Clear the FIFO and the pending interrupts. */ + bcm_bsc_reset(sc); + + err = 0; + for (i = 0; i < nmsgs; i++) { + + /* Write the slave address. */ + BCM_BSC_WRITE(sc, BCM_BSC_SLAVE, (msgs[i].slave >> 1) & 0x7f); + + /* Write the data length. */ + BCM_BSC_WRITE(sc, BCM_BSC_DLEN, msgs[i].len); + + sc->sc_data = msgs[i].buf; + sc->sc_resid = msgs[i].len; + if ((msgs[i].flags & IIC_M_RD) == 0) { + /* Fill up the TX FIFO. */ + status = BCM_BSC_READ(sc, BCM_BSC_STATUS); + while (sc->sc_resid > 0 && + (status & BCM_BSC_STATUS_TXD)) { + BCM_BSC_WRITE(sc, BCM_BSC_DATA, *sc->sc_data); + sc->sc_data++; + sc->sc_resid--; + status = BCM_BSC_READ(sc, BCM_BSC_STATUS); + } + read = 0; + intr = BCM_BSC_CTRL_INTT; + sc->sc_flags &= ~I2C_READ; + } else { + sc->sc_flags |= I2C_READ; + read = BCM_BSC_CTRL_READ; + intr = BCM_BSC_CTRL_INTR; + } + intr |= BCM_BSC_CTRL_INTD; + + /* Start the transfer. */ + BCM_BSC_WRITE(sc, BCM_BSC_CTRL, BCM_BSC_CTRL_I2CEN | + BCM_BSC_CTRL_ST | read | intr); + + /* Wait for the transaction to complete. */ + err = mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_bsc", hz); + + /* Check if we have a timeout or an I2C error. */ + if ((sc->sc_flags & I2C_ERROR) || err == EWOULDBLOCK) { + device_printf(sc->sc_dev, "I2C error\n"); + err = EIO; + break; + } + } + + /* Clean the controller flags. */ + sc->sc_flags = 0; + + BCM_BSC_UNLOCK(sc); + + return (err); +} + +static phandle_t +bcm_bsc_get_node(device_t bus, device_t dev) +{ + + /* We only have one child, the I2C bus, which needs our own node. */ + return (ofw_bus_get_node(bus)); +} + +static device_method_t bcm_bsc_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, bcm_bsc_probe), + DEVMETHOD(device_attach, bcm_bsc_attach), + DEVMETHOD(device_detach, bcm_bsc_detach), + + /* iicbus interface */ + DEVMETHOD(iicbus_callback, iicbus_null_callback), + DEVMETHOD(iicbus_transfer, bcm_bsc_transfer), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_node, bcm_bsc_get_node), + + DEVMETHOD_END +}; + +static devclass_t bcm_bsc_devclass; + +static driver_t bcm_bsc_driver = { + "iichb", + bcm_bsc_methods, + sizeof(struct bcm_bsc_softc), +}; + +DRIVER_MODULE(iicbus, iichb, iicbus_driver, iicbus_devclass, 0, 0); +DRIVER_MODULE(bcm2835_bsc, simplebus, bcm_bsc_driver, bcm_bsc_devclass, 0, 0); --Apple-Mail-225--561141063-- From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 13:57:59 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id A421FC3A for ; Thu, 22 Aug 2013 13:57:59 +0000 (UTC) (envelope-from loos.br@gmail.com) Received: from mail-yh0-x22e.google.com (mail-yh0-x22e.google.com [IPv6:2607:f8b0:4002:c01::22e]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 5BC5C2EF3 for ; Thu, 22 Aug 2013 13:57:59 +0000 (UTC) Received: by mail-yh0-f46.google.com with SMTP id l109so475768yhq.19 for ; Thu, 22 Aug 2013 06:57:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:content-type:subject:date:message-id:to:mime-version; bh=i2pOWDY+66kpFBqd8wXhx0eqAiK5PEYmeXhxae55KqM=; b=DSbk2xDd2m/lVMSoLMgppU3nHCtTz7Ocs8AoredMpdCf+CHUt+ZgabeyNYmdFIIPQs xBvb/jC12tKDaDOd7b6PqVaSMGHi8pnfy9kiIK6Kk1LXvaH1g6dgvQLpng9oPqs6JBiY NDTVu/5NXHzku4CxYsZDy5cH2b2xrk+cf5Nlw13fiqdRw6u7sbWbRXwI3PS7rc2bE6yT iQnM6j7biLq7JTp0pr+XhoP6UdI7Al1LAq75zC49/wa5Kqv97HyAnS9n0hCzPbPBcEIF CUS50vp+2HhHkrlJm+Bj/V2O5FP/QLeW0sgHHlwBScO5V2GVgzBhVgy8wRhSaiQ1nBJx gfVQ== X-Received: by 10.236.154.101 with SMTP id g65mr534839yhk.90.1377179878576; Thu, 22 Aug 2013 06:57:58 -0700 (PDT) Received: from [10.10.1.8] ([201.72.203.70]) by mx.google.com with ESMTPSA id n9sm14218961yhm.20.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 06:57:57 -0700 (PDT) From: Luiz Otavio O Souza Content-Type: multipart/mixed; boundary=Apple-Mail-247--559286389 Subject: SPI driver for RPi Date: Thu, 22 Aug 2013 10:57:51 -0300 Message-Id: <126AAEEA-1F99-42E4-9620-9CB4F3610671@gmail.com> To: freebsd-arm@freebsd.org Mime-Version: 1.0 (Apple Message framework v1085) X-Mailer: Apple Mail (2.1085) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 13:57:59 -0000 --Apple-Mail-247--559286389 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii Hello, Here is a SPI driver for RPi. It has been tested with a hardware loopback (MOSI wired to MISO) and = with a s25fl032 spansion flash (removed from a wr941nd router). I've tested the reading from the flash up to 10Mhz of clock and = surprisingly my (simple) wiring support it without any fail. At boot the SPI clock is set to 500Khz, not fast and not too slow (as = the 3.814Khz default): # dd if=3D/dev/flash/spi0 of=3Dflash-wr941nd-2 bs=3D64k 64+0 records in 64+0 records out 4194304 bytes transferred in 75.632316 secs (55457 bytes/sec) # diff flash-wr941nd flash-wr941nd-2 # sysctl dev.spi.0.clock=3D1000000 dev.spi.0.clock: 500000 -> 1000000 # dd if=3D/dev/flash/spi0 of=3Dflash-wr941nd-2 bs=3D64k 64+0 records in 64+0 records out 4194304 bytes transferred in 37.896805 secs (110677 bytes/sec) # diff flash-wr941nd flash-wr941nd-2 =20 # sysctl dev.spi.0.clock=3D2000000 =20 dev.spi.0.clock: 1000000 -> 2016129 # dd if=3D/dev/flash/spi0 of=3Dflash-wr941nd-2 bs=3D64k 64+0 records in 64+0 records out 4194304 bytes transferred in 18.879980 secs (222156 bytes/sec) # diff flash-wr941nd flash-wr941nd-2 =20 # sysctl dev.spi.0.clock=3D4000000 =20 dev.spi.0.clock: 2016129 -> 4032258 # dd if=3D/dev/flash/spi0 of=3Dflash-wr941nd-2 bs=3D64k 64+0 records in 64+0 records out 4194304 bytes transferred in 9.642490 secs (434981 bytes/sec) # diff flash-wr941nd flash-wr941nd-2 =20 # sysctl dev.spi.0.clock=3D10000000 =20 dev.spi.0.clock: 4032258 -> 10416666 # dd if=3D/dev/flash/spi0 of=3Dflash-wr941nd-2 bs=3D64k 64+0 records in 64+0 records out 4194304 bytes transferred in 4.317743 secs (971411 bytes/sec) # diff flash-wr941nd flash-wr941nd-2 =20 It export a few handy sysctl knobs: # sysctl dev.spi dev.spi.0.%desc: BCM2708/2835 SPI controller dev.spi.0.%driver: spi dev.spi.0.%parent: simplebus0 dev.spi.0.clock: 500000 dev.spi.0.cpol: 0 dev.spi.0.cpha: 0 dev.spi.0.cspol0: 0 dev.spi.0.cspol1: 0 About the patches: - bcm2835_spi.diff implements the SPI driver, the dts and kernel = changes; - ofw_spibus.diff adds the OFW SPI bus glue to attach the SPI children = as described in the FDT. - mx25l-fdt-intr.diff adds the support for FDT and configure a intr hook = so the device identification runs only when the interrupts are active = (the SPI driver is interrupt based); - rpi-mx25l-dts.diff the change i did to add my mx25l on the rpi dts = (only as reference). Luiz --Apple-Mail-247--559286389 Content-Disposition: attachment; filename=bcm2835_spi.diff Content-Type: application/octet-stream; name="bcm2835_spi.diff" Content-Transfer-Encoding: 7bit --- /dev/null 2013-08-22 00:33:00.000000000 -0300 +++ sys/arm/broadcom/bcm2835/bcm2835_spi.c 2013-08-20 15:57:57.928470462 -0300 @@ -0,0 +1,592 @@ +/*- + * Copyright (c) 2012 Oleksandr Tymoshenko + * Copyright (c) 2013 Luiz Otavio O Souza + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include + +#include "spibus_if.h" + +/* Only the accessible pins are listed here. */ +uint32_t bcm_spi_pins[] = { + 7, /* CS1 */ + 8, /* CS0 */ + 9, /* MISO */ + 10, /* MOSI */ + 11 /* SCLK */ +}; + +struct bcm_spi_softc { + device_t sc_dev; + struct mtx sc_mtx; + struct resource * sc_mem_res; + struct resource * sc_irq_res; + struct spi_command *sc_cmd; + bus_space_tag_t sc_bst; + bus_space_handle_t sc_bsh; + uint32_t sc_len; + uint32_t sc_read; + uint32_t sc_flags; + uint32_t sc_written; + void * sc_intrhand; +}; + +#define SPI_CORE_CLK 250000000U +#define SPI_CS 0x0 +#define SPI_CS_LEN_LONG (1 << 25) +#define SPI_CS_DMA_LEN (1 << 24) +#define SPI_CS_CSPOL2 (1 << 23) +#define SPI_CS_CSPOL1 (1 << 22) +#define SPI_CS_CSPOL0 (1 << 21) +#define SPI_CS_RXF (1 << 20) +#define SPI_CS_RXR (1 << 19) +#define SPI_CS_TXD (1 << 18) +#define SPI_CS_RXD (1 << 17) +#define SPI_CS_DONE (1 << 16) +#define SPI_CS_LEN (1 << 13) +#define SPI_CS_REN (1 << 12) +#define SPI_CS_ADCS (1 << 11) +#define SPI_CS_INTR (1 << 10) +#define SPI_CS_INTD (1 << 9) +#define SPI_CS_DMAEN (1 << 8) +#define SPI_CS_TA (1 << 7) +#define SPI_CS_CSPOL (1 << 6) +#define SPI_CS_CLEAR_RXFIFO (1 << 5) +#define SPI_CS_CLEAR_TXFIFO (1 << 4) +#define SPI_CS_CPOL (1 << 3) +#define SPI_CS_CPHA (1 << 2) +#define SPI_CS_MASK 0x3 +#define SPI_FIFO 0x4 +#define SPI_CLK 0x8 +#define SPI_CLK_MASK 0xffff +#define SPI_DLEN 0xc +#define SPI_DLEN_MASK 0xffff +#define SPI_LTOH 0x10 +#define SPI_LTOH_MASK 0xf +#define SPI_DC 0x14 +#define SPI_DC_RPANIC_SHIFT 24 +#define SPI_DC_RPANIC_MASK (0xff << SPI_DC_RPANIC_SHIFT) +#define SPI_DC_RDREQ_SHIFT 16 +#define SPI_DC_RDREQ_MASK (0xff << SPI_DC_RDREQ_SHIFT) +#define SPI_DC_TPANIC_SHIFT 8 +#define SPI_DC_TPANIC_MASK (0xff << SPI_DC_TPANIC_SHIFT) +#define SPI_DC_TDREQ_SHIFT 0 +#define SPI_DC_TDREQ_MASK 0xff + +#define SPI_BUSY 0x01 + +#define BCM_SPI_WRITE(_sc, _off, _val) \ + bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val) +#define BCM_SPI_READ(_sc, _off) \ + bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off) + +#define BCM_SPI_LOCK(_sc) \ + mtx_lock(&(_sc)->sc_mtx) +#define BCM_SPI_UNLOCK(_sc) \ + mtx_unlock(&(_sc)->sc_mtx) + +static void bcm_spi_intr(void *); + +#undef DEBUG + +#ifdef DEBUG +static void +bcm_spi_printr(device_t dev) +{ + struct bcm_spi_softc *sc; + uint32_t reg; + + sc = device_get_softc(dev); + reg = BCM_SPI_READ(sc, SPI_CS); + device_printf(dev, "CS=%b\n", reg, + "\20\1CS0\2CS1\3CPHA\4CPOL\7CSPOL" + "\10TA\11DMAEN\12INTD\13INTR\14ADCS\15REN\16LEN" + "\21DONE\22RXD\23TXD\24RXR\25RXF\26CSPOL0\27CSPOL1" + "\30CSPOL2\31DMA_LEN\32LEN_LONG"); + reg = BCM_SPI_READ(sc, SPI_CLK) & SPI_CLK_MASK; + if (reg % 2) + reg--; + if (reg == 0) + reg = 65536; + device_printf(dev, "CLK=%uMhz/%d=%luhz\n", + SPI_CORE_CLK / 1000000, reg, SPI_CORE_CLK / reg); + reg = BCM_SPI_READ(sc, SPI_DLEN) & SPI_DLEN_MASK; + device_printf(dev, "DLEN=%d\n", reg); + reg = BCM_SPI_READ(sc, SPI_LTOH) & SPI_LTOH_MASK; + device_printf(dev, "LTOH=%d\n", reg); + reg = BCM_SPI_READ(sc, SPI_DC); + device_printf(dev, "DC=RPANIC=%#x RDREQ=%#x TPANIC=%#x TDREQ=%#x\n", + (reg & SPI_DC_RPANIC_MASK) >> SPI_DC_RPANIC_SHIFT, + (reg & SPI_DC_RDREQ_MASK) >> SPI_DC_RDREQ_SHIFT, + (reg & SPI_DC_TPANIC_MASK) >> SPI_DC_TPANIC_SHIFT, + (reg & SPI_DC_TDREQ_MASK) >> SPI_DC_TDREQ_SHIFT); +} +#endif + +static void +bcm_spi_modifyreg(struct bcm_spi_softc *sc, uint32_t off, uint32_t mask, + uint32_t value) +{ + uint32_t reg; + + mtx_assert(&sc->sc_mtx, MA_OWNED); + reg = BCM_SPI_READ(sc, off); + reg &= ~mask; + reg |= value; + BCM_SPI_WRITE(sc, off, reg); +} + +static int +bcm_spi_clock_proc(SYSCTL_HANDLER_ARGS) +{ + struct bcm_spi_softc *sc; + uint32_t clk; + int error; + + sc = (struct bcm_spi_softc *)arg1; + + BCM_SPI_LOCK(sc); + clk = BCM_SPI_READ(sc, SPI_CLK); + BCM_SPI_UNLOCK(sc); + clk &= 0xffff; + if (clk == 0) + clk = 65536; + clk = SPI_CORE_CLK / clk; + + error = sysctl_handle_int(oidp, &clk, sizeof(clk), req); + if (error != 0 || req->newptr == NULL) + return (error); + + clk = SPI_CORE_CLK / clk; + if (clk < 1) + clk = 2; + if (clk % 2) + clk--; + if (clk > 0xffff) + clk = 0; + BCM_SPI_LOCK(sc); + BCM_SPI_WRITE(sc, SPI_CLK, clk); + BCM_SPI_UNLOCK(sc); + + return (0); +} + +static int +bcm_spi_cs_bit_proc(SYSCTL_HANDLER_ARGS, uint32_t bit) +{ + struct bcm_spi_softc *sc; + uint32_t reg; + int error; + + sc = (struct bcm_spi_softc *)arg1; + BCM_SPI_LOCK(sc); + reg = BCM_SPI_READ(sc, SPI_CS); + BCM_SPI_UNLOCK(sc); + reg = (reg & bit) ? 1 : 0; + + error = sysctl_handle_int(oidp, ®, sizeof(reg), req); + if (error != 0 || req->newptr == NULL) + return (error); + + if (reg) + reg = bit; + BCM_SPI_LOCK(sc); + bcm_spi_modifyreg(sc, SPI_CS, bit, reg); + BCM_SPI_UNLOCK(sc); + + return (0); +} + +static int +bcm_spi_cpol_proc(SYSCTL_HANDLER_ARGS) +{ + + return (bcm_spi_cs_bit_proc(oidp, arg1, arg2, req, SPI_CS_CPOL)); +} + +static int +bcm_spi_cpha_proc(SYSCTL_HANDLER_ARGS) +{ + + return (bcm_spi_cs_bit_proc(oidp, arg1, arg2, req, SPI_CS_CPHA)); +} + +static int +bcm_spi_cspol0_proc(SYSCTL_HANDLER_ARGS) +{ + + return (bcm_spi_cs_bit_proc(oidp, arg1, arg2, req, SPI_CS_CSPOL0)); +} + +static int +bcm_spi_cspol1_proc(SYSCTL_HANDLER_ARGS) +{ + + return (bcm_spi_cs_bit_proc(oidp, arg1, arg2, req, SPI_CS_CSPOL1)); +} + +static void +bcm_spi_sysctl_init(struct bcm_spi_softc *sc) +{ + struct sysctl_ctx_list *ctx; + struct sysctl_oid *tree_node; + struct sysctl_oid_list *tree; + + /* + * Add system sysctl tree/handlers. + */ + ctx = device_get_sysctl_ctx(sc->sc_dev); + tree_node = device_get_sysctl_tree(sc->sc_dev); + tree = SYSCTL_CHILDREN(tree_node); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "clock", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_spi_clock_proc, "IU", "SPI BUS clock frequency"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "cpol", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_spi_cpol_proc, "IU", "SPI BUS clock polarity"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "cpha", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_spi_cpha_proc, "IU", "SPI BUS clock phase"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "cspol0", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_spi_cspol0_proc, "IU", "SPI BUS chip select 0 polarity"); + SYSCTL_ADD_PROC(ctx, tree, OID_AUTO, "cspol1", + CTLFLAG_RW | CTLTYPE_UINT, sc, sizeof(*sc), + bcm_spi_cspol1_proc, "IU", "SPI BUS chip select 1 polarity"); +} + +static int +bcm_spi_probe(device_t dev) +{ + + if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-spi")) + return (ENXIO); + + device_set_desc(dev, "BCM2708/2835 SPI controller"); + + return (BUS_PROBE_DEFAULT); +} + +static int +bcm_spi_attach(device_t dev) +{ + struct bcm_spi_softc *sc; + device_t gpio; + int i, rid; + + if (device_get_unit(dev) != 0) { + device_printf(dev, "only one spi controller supported\n"); + return (ENXIO); + } + + sc = device_get_softc(dev); + sc->sc_dev = dev; + + /* Configure the GPIO pins to ALT0 function to enable SPI the pins. */ + gpio = devclass_get_device(devclass_find("gpio"), 0); + if (!gpio) { + device_printf(dev, "cannot find gpio0\n"); + return (ENXIO); + } + for (i = 0; i < nitems(bcm_spi_pins); i++) + bcm_gpio_set_alternate(gpio, bcm_spi_pins[i], BCM_GPIO_ALT0); + + rid = 0; + sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, + RF_ACTIVE); + if (!sc->sc_mem_res) { + device_printf(dev, "cannot allocate memory window\n"); + return (ENXIO); + } + + sc->sc_bst = rman_get_bustag(sc->sc_mem_res); + sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res); + + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, + RF_ACTIVE); + if (!sc->sc_irq_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot allocate interrupt\n"); + return (ENXIO); + } + + /* Hook up our interrupt handler. */ + if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE, + NULL, bcm_spi_intr, sc, &sc->sc_intrhand)) { + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + device_printf(dev, "cannot setup the interrupt handler\n"); + return (ENXIO); + } + + mtx_init(&sc->sc_mtx, "bcm_spi", NULL, MTX_DEF); + + /* Add sysctl nodes. */ + bcm_spi_sysctl_init(sc); + +#ifdef DEBUG + bcm_spi_printr(dev); +#endif + + /* + * Enable the SPI controller. Clear the rx and tx FIFO. + * Defaults to SPI mode 0. + */ + BCM_SPI_WRITE(sc, SPI_CS, SPI_CS_CLEAR_RXFIFO | SPI_CS_CLEAR_TXFIFO); + + /* Set the SPI clock to 500Khz. */ + BCM_SPI_WRITE(sc, SPI_CLK, SPI_CORE_CLK / 500000); + +#ifdef DEBUG + bcm_spi_printr(dev); +#endif + + device_add_child(dev, "spibus", -1); + + return (bus_generic_attach(dev)); +} + +static int +bcm_spi_detach(device_t dev) +{ + struct bcm_spi_softc *sc; + + bus_generic_detach(dev); + + sc = device_get_softc(dev); + mtx_destroy(&sc->sc_mtx); + if (sc->sc_intrhand) + bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intrhand); + if (sc->sc_irq_res) + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + if (sc->sc_mem_res) + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res); + + return (0); +} + +static void +bcm_spi_fill_fifo(struct bcm_spi_softc *sc) +{ + struct spi_command *cmd; + uint32_t cs, written; + uint8_t *data; + + cmd = sc->sc_cmd; + cs = BCM_SPI_READ(sc, SPI_CS) & (SPI_CS_TA | SPI_CS_TXD); + while (sc->sc_written < sc->sc_len && + cs == (SPI_CS_TA | SPI_CS_TXD)) { + data = (uint8_t *)cmd->tx_cmd; + written = sc->sc_written++; + if (written >= cmd->tx_cmd_sz) { + data = (uint8_t *)cmd->tx_data; + written -= cmd->tx_cmd_sz; + } + BCM_SPI_WRITE(sc, SPI_FIFO, data[written]); + cs = BCM_SPI_READ(sc, SPI_CS) & (SPI_CS_TA | SPI_CS_TXD); + } +} + +static void +bcm_spi_drain_fifo(struct bcm_spi_softc *sc) +{ + struct spi_command *cmd; + uint32_t cs, read; + uint8_t *data; + + cmd = sc->sc_cmd; + cs = BCM_SPI_READ(sc, SPI_CS) & SPI_CS_RXD; + while (sc->sc_read < sc->sc_len && cs == SPI_CS_RXD) { + data = (uint8_t *)cmd->rx_cmd; + read = sc->sc_read++; + if (read >= cmd->rx_cmd_sz) { + data = (uint8_t *)cmd->rx_data; + read -= cmd->rx_cmd_sz; + } + data[read] = BCM_SPI_READ(sc, SPI_FIFO) & 0xff; + cs = BCM_SPI_READ(sc, SPI_CS) & SPI_CS_RXD; + } +} + +static void +bcm_spi_intr(void *arg) +{ + struct bcm_spi_softc *sc; + + sc = (struct bcm_spi_softc *)arg; + BCM_SPI_LOCK(sc); + + /* TX - Fill up the FIFO. */ + bcm_spi_fill_fifo(sc); + + /* RX - Drain the FIFO. */ + bcm_spi_drain_fifo(sc); + + /* Check for end of transfer. */ + if (sc->sc_written == sc->sc_len && sc->sc_read == sc->sc_len) { + /* Disable interrupts and the SPI engine. */ + bcm_spi_modifyreg(sc, SPI_CS, + SPI_CS_TA | SPI_CS_INTR | SPI_CS_INTD, 0); + wakeup(sc->sc_dev); + } + + BCM_SPI_UNLOCK(sc); +} + +static int +bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) +{ + struct bcm_spi_softc *sc; + int cs, err; + + sc = device_get_softc(dev); + + KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz, + ("TX/RX command sizes should be equal")); + KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, + ("TX/RX data sizes should be equal")); + + BCM_SPI_LOCK(sc); + + if (sc->sc_flags & SPI_BUSY) + mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_spi", hz); + + if (sc->sc_flags & SPI_BUSY) { + BCM_SPI_UNLOCK(sc); + return (ETIMEDOUT); + } + + sc->sc_flags = SPI_BUSY; + + /* Clear the FIFO. */ + bcm_spi_modifyreg(sc, SPI_CS, + SPI_CS_CLEAR_RXFIFO | SPI_CS_CLEAR_TXFIFO, + SPI_CS_CLEAR_RXFIFO | SPI_CS_CLEAR_TXFIFO); + + /* Get the proper chip select for this child. */ + spibus_get_cs(child, &cs); + if (cs < 0 || cs > 2) { + device_printf(dev, + "Invalid chip select %d requested by %s\n", cs, + device_get_nameunit(child)); + return (EINVAL); + } + + /* Save a pointer to the SPI command. */ + sc->sc_cmd = cmd; + sc->sc_read = 0; + sc->sc_written = 0; + sc->sc_len = cmd->tx_cmd_sz + cmd->tx_data_sz; + + /* + * Set the CS for this transaction, enable interrupts and announce + * we're ready to tx. This will kick off the first interrupt. + */ + bcm_spi_modifyreg(sc, SPI_CS, + SPI_CS_MASK | SPI_CS_TA | SPI_CS_INTR | SPI_CS_INTD, + cs | SPI_CS_TA | SPI_CS_INTR | SPI_CS_INTD); + + /* Wait for the transaction to complete. */ + err = mtx_sleep(dev, &sc->sc_mtx, 0, "bcm_spi", hz * 2); + + /* + * Check for transfer timeout. The SPI controller doesn't + * return errors. + */ + if (err == EWOULDBLOCK) { + device_printf(sc->sc_dev, "SPI error\n"); + err = EIO; + } + + /* Clean the controller flags. */ + sc->sc_flags = 0; + + BCM_SPI_UNLOCK(sc); + + return (err); +} + +static phandle_t +bcm_spi_get_node(device_t bus, device_t dev) +{ + + /* We only have one child, the SPI bus, which needs our own node. */ + return (ofw_bus_get_node(bus)); +} + +static device_method_t bcm_spi_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, bcm_spi_probe), + DEVMETHOD(device_attach, bcm_spi_attach), + DEVMETHOD(device_detach, bcm_spi_detach), + + /* SPI interface */ + DEVMETHOD(spibus_transfer, bcm_spi_transfer), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_node, bcm_spi_get_node), + + DEVMETHOD_END +}; + +static devclass_t bcm_spi_devclass; + +static driver_t bcm_spi_driver = { + "spi", + bcm_spi_methods, + sizeof(struct bcm_spi_softc), +}; + +DRIVER_MODULE(bcm2835_spi, simplebus, bcm_spi_driver, bcm_spi_devclass, 0, 0); Index: sys/arm/broadcom/bcm2835/files.bcm2835 =================================================================== --- sys/arm/broadcom/bcm2835/files.bcm2835 (revision 253747) +++ sys/arm/broadcom/bcm2835/files.bcm2835 (working copy) @@ -7,6 +7,7 @@ arm/broadcom/bcm2835/bcm2835_machdep.c standard arm/broadcom/bcm2835/bcm2835_mbox.c standard arm/broadcom/bcm2835/bcm2835_sdhci.c optional sdhci +arm/broadcom/bcm2835/bcm2835_spi.c optional bcm2835_spi arm/broadcom/bcm2835/bcm2835_systimer.c standard arm/broadcom/bcm2835/bcm2835_wdog.c standard arm/broadcom/bcm2835/bus_space.c optional fdt Index: sys/boot/fdt/dts/bcm2835.dtsi =================================================================== --- sys/boot/fdt/dts/bcm2835.dtsi (revision 253747) +++ sys/boot/fdt/dts/bcm2835.dtsi (working copy) @@ -396,6 +396,14 @@ }; }; + spi0 { + compatible = "broadcom,bcm2835-spi", + "broadcom,bcm2708-spi"; + reg = <0x204000 0x20>; + interrupts = <62>; + interrupt-parent = <&intc>; + }; + dma: dma { compatible = "broadcom,bcm2835-dma", "broadcom,bcm2708-dma"; Index: sys/arm/conf/RPI-B =================================================================== --- sys/arm/conf/RPI-B (revision 253747) +++ sys/arm/conf/RPI-B (working copy) @@ -102,6 +102,10 @@ device mii device smsc +# SPI +device spibus +device bcm2835_spi + # Flattened Device Tree options FDT # Note: DTB is normally loaded and modified by RPi boot loader, then --Apple-Mail-247--559286389 Content-Disposition: attachment; filename=ofw_spibus.diff Content-Type: application/octet-stream; name="ofw_spibus.diff" Content-Transfer-Encoding: 7bit --- /dev/null 2013-08-22 00:33:00.000000000 -0300 +++ sys/dev/ofw/ofw_spibus.c 2013-08-19 14:50:08.051446131 -0300 @@ -0,0 +1,191 @@ +/*- + * Copyright (c) 2009, Nathan Whitehorn + * Copyright (c) 2013 The FreeBSD Foundation + * All rights reserved. + * + * Portions of this software were developed by Oleksandr Rybalko + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "spibus_if.h" + +struct ofw_spibus_devinfo { + struct spibus_ivar opd_dinfo; + struct ofw_bus_devinfo opd_obdinfo; +}; + +/* Methods */ +static device_probe_t ofw_spibus_probe; +static device_attach_t ofw_spibus_attach; +static device_t ofw_spibus_add_child(device_t dev, u_int order, + const char *name, int unit); +static const struct ofw_bus_devinfo *ofw_spibus_get_devinfo(device_t bus, + device_t dev); + +static int +ofw_spibus_probe(device_t dev) +{ + + if (ofw_bus_get_node(dev) == -1) + return (ENXIO); + device_set_desc(dev, "OFW SPI bus"); + + return (0); +} + +static int +ofw_spibus_attach(device_t dev) +{ + struct spibus_softc *sc = device_get_softc(dev); + struct ofw_spibus_devinfo *dinfo; + phandle_t child; + pcell_t paddr; + device_t childdev; + uint32_t addr; + + sc->dev = dev; + + bus_generic_probe(dev); + bus_enumerate_hinted_children(dev); + + /* + * Attach those children represented in the device tree. + */ + for (child = OF_child(ofw_bus_get_node(dev)); child != 0; + child = OF_peer(child)) { + /* + * Try to get the CS number first from the spi-chipselect + * property, then try the reg property. + */ + if (OF_getprop(child, "spi-chipselect", &paddr, sizeof(paddr)) == -1) + if (OF_getprop(child, "reg", &paddr, sizeof(paddr)) == -1) + continue; + + addr = fdt32_to_cpu(paddr); + /* + * Now set up the SPI and OFW bus layer devinfo and add it + * to the bus. + */ + dinfo = malloc(sizeof(struct ofw_spibus_devinfo), M_DEVBUF, + M_NOWAIT | M_ZERO); + if (dinfo == NULL) + continue; + dinfo->opd_dinfo.cs = addr; + if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, child) != + 0) { + free(dinfo, M_DEVBUF); + continue; + } + childdev = device_add_child(dev, NULL, -1); + device_set_ivars(childdev, dinfo); + } + + return (bus_generic_attach(dev)); +} + +static device_t +ofw_spibus_add_child(device_t dev, u_int order, const char *name, int unit) +{ + device_t child; + struct ofw_spibus_devinfo *devi; + + child = device_add_child_ordered(dev, order, name, unit); + if (child == NULL) + return (child); + devi = malloc(sizeof(struct ofw_spibus_devinfo), M_DEVBUF, + M_NOWAIT | M_ZERO); + if (devi == NULL) { + device_delete_child(dev, child); + return (0); + } + + /* + * NULL all the OFW-related parts of the ivars for non-OFW + * children. + */ + devi->opd_obdinfo.obd_node = -1; + devi->opd_obdinfo.obd_name = NULL; + devi->opd_obdinfo.obd_compat = NULL; + devi->opd_obdinfo.obd_type = NULL; + devi->opd_obdinfo.obd_model = NULL; + + device_set_ivars(child, devi); + + return (child); +} + +static const struct ofw_bus_devinfo * +ofw_spibus_get_devinfo(device_t bus, device_t dev) +{ + struct ofw_spibus_devinfo *dinfo; + + dinfo = device_get_ivars(dev); + return (&dinfo->opd_obdinfo); +} + +static device_method_t ofw_spibus_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, ofw_spibus_probe), + DEVMETHOD(device_attach, ofw_spibus_attach), + + /* Bus interface */ + DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), + DEVMETHOD(bus_add_child, ofw_spibus_add_child), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_devinfo, ofw_spibus_get_devinfo), + DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), + DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), + DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), + DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), + DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), + + DEVMETHOD_END +}; + +static devclass_t ofwspibus_devclass; + +DEFINE_CLASS_1(spibus, ofw_spibus_driver, ofw_spibus_methods, + sizeof(struct spibus_softc), spibus_driver); +DRIVER_MODULE(ofw_spibus, spi, ofw_spibus_driver, ofwspibus_devclass, 0, 0); +MODULE_VERSION(ofw_spibus, 1); +MODULE_DEPEND(ofw_spibus, spibus, 1, 1, 1); Index: sys/dev/spibus/spibus.c =================================================================== --- sys/dev/spibus/spibus.c (revision 253747) +++ sys/dev/spibus/spibus.c (working copy) @@ -23,7 +23,7 @@ spibus_probe(device_t dev) { device_set_desc(dev, "spibus bus"); - return (0); + return (BUS_PROBE_GENERIC); } static int @@ -185,7 +185,7 @@ DEVMETHOD_END }; -static driver_t spibus_driver = { +driver_t spibus_driver = { "spibus", spibus_methods, sizeof(struct spibus_softc) Index: sys/dev/spibus/spibusvar.h =================================================================== --- sys/dev/spibus/spibusvar.h (revision 253747) +++ sys/dev/spibus/spibusvar.h (working copy) @@ -26,3 +26,6 @@ } SPIBUS_ACCESSOR(cs, CS, uint32_t) + +extern driver_t spibus_driver; +extern devclass_t spibus_devclass; Index: sys/conf/files =================================================================== --- sys/conf/files (revision 253747) +++ sys/conf/files (working copy) @@ -1903,6 +1903,7 @@ dev/ofw/ofw_bus_subr.c optional fdt dev/ofw/ofw_fdt.c optional fdt dev/ofw/ofw_if.m optional fdt +dev/ofw/ofw_spibus.c optional fdt spibus dev/ofw/openfirm.c optional fdt dev/ofw/openfirmio.c optional fdt dev/patm/if_patm.c optional patm pci --Apple-Mail-247--559286389 Content-Disposition: attachment; filename=mx25l-fdt-intr.diff Content-Type: application/octet-stream; name="mx25l-fdt-intr.diff" Content-Transfer-Encoding: 7bit Index: sys/dev/flash/mx25l.c =================================================================== --- sys/dev/flash/mx25l.c (revision 253747) +++ sys/dev/flash/mx25l.c (working copy) @@ -43,6 +43,14 @@ #include #include "spibus_if.h" +#include "opt_platform.h" + +#ifdef FDT +#include +#include +#include +#endif + #include #define FL_NONE 0x00 @@ -76,6 +84,7 @@ struct disk *sc_disk; struct proc *sc_p; struct bio_queue_head sc_bio_queue; + struct intr_config_hook sc_intr_hook; unsigned int sc_flags; }; @@ -358,23 +367,27 @@ static int mx25l_probe(device_t dev) { + +#ifdef FDT + if (!ofw_bus_is_compatible(dev, "flash,mx25l")) + return (ENXIO); +#endif device_set_desc(dev, "M25Pxx Flash Family"); return (0); } -static int -mx25l_attach(device_t dev) +static void +mx25l_start(void *arg) { struct mx25l_softc *sc; struct mx25l_flash_ident *ident; - sc = device_get_softc(dev); - sc->sc_dev = dev; - M25PXX_LOCK_INIT(sc); + sc = (struct mx25l_softc *)arg; + config_intrhook_disestablish(&sc->sc_intr_hook); ident = mx25l_get_device_ident(sc); if (ident == NULL) - return (ENXIO); + return; mx25l_wait_for_device_ready(sc->sc_dev); @@ -403,7 +416,27 @@ kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n", ident->name, ident->sectorsize, ident->sectorcount); +} +static int +mx25l_attach(device_t dev) +{ + struct mx25l_softc *sc; + + sc = device_get_softc(dev); + sc->sc_dev = dev; + M25PXX_LOCK_INIT(sc); + + sc->sc_intr_hook.ich_func = mx25l_start; + sc->sc_intr_hook.ich_arg = sc; + + /* + * We have to wait until interrupts are enabled. In some cases SPI + * read and write only works if the interrupts are available. + */ + if (config_intrhook_establish(&sc->sc_intr_hook) != 0) + return (ENOMEM); + return (0); } --Apple-Mail-247--559286389 Content-Disposition: attachment; filename=rpi-mx25l-dts.diff Content-Type: application/octet-stream; name="rpi-mx25l-dts.diff" Content-Transfer-Encoding: 7bit Index: sys/boot/fdt/dts/rpi.dts =================================================================== --- sys/boot/fdt/dts/rpi.dts (revision 253747) +++ sys/boot/fdt/dts/rpi.dts (working copy) @@ -281,6 +281,14 @@ broadcom,function = "ALT3"; }; }; + + spi0 { + flash0 { + compatible = "flash,mx25l"; + spi-chipselect = <0>; + }; + }; + usb { hub { compatible = "usb,hub", "usb,device"; --Apple-Mail-247--559286389-- From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 14:36:59 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id BB8E4B30; Thu, 22 Aug 2013 14:36:59 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-stable.sentex.ca (freebsd-stable.sentex.ca [IPv6:2607:f3e0:0:3::6502:9b]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 8F0B321E7; Thu, 22 Aug 2013 14:36:59 +0000 (UTC) Received: from freebsd-stable.sentex.ca (localhost [127.0.0.1]) by freebsd-stable.sentex.ca (8.14.5/8.14.5) with ESMTP id r7MEav66051961; Thu, 22 Aug 2013 14:36:58 GMT (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-stable.sentex.ca (8.14.5/8.14.5/Submit) id r7MEavwD051952; Thu, 22 Aug 2013 14:36:57 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 22 Aug 2013 14:36:57 GMT Message-Id: <201308221436.r7MEavwD051952@freebsd-stable.sentex.ca> X-Authentication-Warning: freebsd-stable.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [releng_9 tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 14:36:59 -0000 TB --- 2013-08-22 13:50:26 - tinderbox 2.10 running on freebsd-stable.sentex.ca TB --- 2013-08-22 13:50:26 - FreeBSD freebsd-stable.sentex.ca 8.3-STABLE FreeBSD 8.3-STABLE #0: Tue Oct 16 17:37:58 UTC 2012 mdtancsa@freebsd-stable.sentex.ca:/usr/obj/usr/src/sys/server amd64 TB --- 2013-08-22 13:50:26 - starting RELENG_9 tinderbox run for arm/arm TB --- 2013-08-22 13:50:26 - cleaning the object tree TB --- 2013-08-22 13:50:52 - /usr/local/bin/svn stat /src TB --- 2013-08-22 13:50:55 - At svn revision 254656 TB --- 2013-08-22 13:50:56 - building world TB --- 2013-08-22 13:50:56 - CROSS_BUILD_TESTING=YES TB --- 2013-08-22 13:50:56 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-22 13:50:56 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-22 13:50:56 - SRCCONF=/dev/null TB --- 2013-08-22 13:50:56 - TARGET=arm TB --- 2013-08-22 13:50:56 - TARGET_ARCH=arm TB --- 2013-08-22 13:50:56 - TZ=UTC TB --- 2013-08-22 13:50:56 - __MAKE_CONF=/dev/null TB --- 2013-08-22 13:50:56 - cd /src TB --- 2013-08-22 13:50:56 - /usr/bin/make -B buildworld >>> World build started on Thu Aug 22 13:50:59 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/bin/ed/undo.c cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o ed buf.o cbc.o glbl.o io.o main.o re.o sub.o undo.o -lcrypto gzip -cn /src/bin/ed/ed.1 > ed.1.gz ===> bin/expr (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c expr.c cc1: warnings being treated as errors expr.c:812: warning: redundant redeclaration of 'yyparse' /src/bin/expr/expr.y:77: warning: previous declaration of 'yyparse' was here *** Error code 1 Stop in /src/bin/expr. *** Error code 1 Stop in /src/bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2013-08-22 14:36:57 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-22 14:36:57 - ERROR: failed to build world TB --- 2013-08-22 14:36:57 - 1695.56 user 378.28 system 2791.09 real http://tinderbox.freebsd.org/tinderbox-freebsd9-build-RELENG_9-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Thu Aug 22 19:16:18 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 77975DDC; Thu, 22 Aug 2013 19:16:18 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-stable.sentex.ca (freebsd-stable.sentex.ca [IPv6:2607:f3e0:0:3::6502:9b]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 370972753; Thu, 22 Aug 2013 19:16:18 +0000 (UTC) Received: from freebsd-stable.sentex.ca (localhost [127.0.0.1]) by freebsd-stable.sentex.ca (8.14.5/8.14.5) with ESMTP id r7MJGG9E065844; Thu, 22 Aug 2013 19:16:16 GMT (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-stable.sentex.ca (8.14.5/8.14.5/Submit) id r7MJGG6s065842; Thu, 22 Aug 2013 19:16:16 GMT (envelope-from tinderbox@freebsd.org) Date: Thu, 22 Aug 2013 19:16:16 GMT Message-Id: <201308221916.r7MJGG6s065842@freebsd-stable.sentex.ca> X-Authentication-Warning: freebsd-stable.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [releng_9 tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Aug 2013 19:16:18 -0000 TB --- 2013-08-22 18:30:31 - tinderbox 2.10 running on freebsd-stable.sentex.ca TB --- 2013-08-22 18:30:31 - FreeBSD freebsd-stable.sentex.ca 8.3-STABLE FreeBSD 8.3-STABLE #0: Tue Oct 16 17:37:58 UTC 2012 mdtancsa@freebsd-stable.sentex.ca:/usr/obj/usr/src/sys/server amd64 TB --- 2013-08-22 18:30:31 - starting RELENG_9 tinderbox run for arm/arm TB --- 2013-08-22 18:30:31 - cleaning the object tree TB --- 2013-08-22 18:30:58 - /usr/local/bin/svn stat /src TB --- 2013-08-22 18:31:03 - At svn revision 254668 TB --- 2013-08-22 18:31:04 - building world TB --- 2013-08-22 18:31:04 - CROSS_BUILD_TESTING=YES TB --- 2013-08-22 18:31:04 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-22 18:31:04 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-22 18:31:04 - SRCCONF=/dev/null TB --- 2013-08-22 18:31:04 - TARGET=arm TB --- 2013-08-22 18:31:04 - TARGET_ARCH=arm TB --- 2013-08-22 18:31:04 - TZ=UTC TB --- 2013-08-22 18:31:04 - __MAKE_CONF=/dev/null TB --- 2013-08-22 18:31:04 - cd /src TB --- 2013-08-22 18:31:04 - /usr/bin/make -B buildworld >>> World build started on Thu Aug 22 18:31:05 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything [...] cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c /src/bin/ed/undo.c cc -O -pipe -DDES -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -o ed buf.o cbc.o glbl.o io.o main.o re.o sub.o undo.o -lcrypto gzip -cn /src/bin/ed/ed.1 > ed.1.gz ===> bin/expr (all) cc -O -pipe -std=gnu99 -Wsystem-headers -Werror -Wall -Wno-format-y2k -W -Wno-unused-parameter -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Wreturn-type -Wcast-qual -Wwrite-strings -Wswitch -Wshadow -Wunused-parameter -Wcast-align -Wchar-subscripts -Winline -Wnested-externs -Wredundant-decls -Wold-style-definition -Wno-pointer-sign -c expr.c cc1: warnings being treated as errors expr.c:812: warning: redundant redeclaration of 'yyparse' /src/bin/expr/expr.y:77: warning: previous declaration of 'yyparse' was here *** Error code 1 Stop in /src/bin/expr. *** Error code 1 Stop in /src/bin. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. *** Error code 1 Stop in /src. TB --- 2013-08-22 19:16:16 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-22 19:16:16 - ERROR: failed to build world TB --- 2013-08-22 19:16:16 - 1700.80 user 378.74 system 2744.67 real http://tinderbox.freebsd.org/tinderbox-freebsd9-build-RELENG_9-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 00:29:37 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 0DC7B1AB; Fri, 23 Aug 2013 00:29:37 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id B74672116; Fri, 23 Aug 2013 00:29:36 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7N0TPi5055361; Thu, 22 Aug 2013 20:29:31 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <5216ACE5.7000500@m5p.com> Date: Thu, 22 Aug 2013 20:29:25 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-current@freebsd.org, freebsd-arm@freebsd.org, Hans Petter Selasky Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> In-Reply-To: <5215F743.8060403@bitfrost.no> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Thu, 22 Aug 2013 20:29:32 -0400 (EDT) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 00:29:37 -0000 On 08/22/13 07:34, Hans Petter Selasky wrote: > On 08/22/13 13:24, George Mitchell wrote: >> As I was saying a few minutes ago ... >> >> On 01/27/13 17:32, George Mitchell wrote: >>> On 01/27/13 14:07, Hans Petter Selasky wrote: >>>> [...] I need output when hw.usb.ulpt.debug=15 to say exactly. >>>> Could you >>>> ask the provider of the binaries to compile having USB_DEBUG set, also >>>> for the >>>> modules. >>>> >>>> --HPS >>>> >>> >>> I'm working on getting a debug build ... Thanks for your help so far. >>> I notice that there seem to be only trivial differences between the 9.1 >>> release ulpt and the 10.0 current ulpt driver. -- George >> >> (This is on a Raspberry Pi.) It took me a bit longer than anticipated, >> but here is the output, from an image built over last weekend: > > Hi, > > Could you run: > > usbdump -i usbusX -f Y -s 65536 > > To get a dump of the USB activity when you plug the device? The message > in question is not important, and might be changed to not cancel the > ulpt attach routine. > > --HPS > > _______________________________________________ > freebsd-current@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-current > To unsubscribe, send any mail to "freebsd-current-unsubscribe@freebsd.org" Here's the result: root@pi:/ # usbdump -i usbus0 -f 4 -s 65536 00:26:01.592494 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 00:26:01.593117 usbus0.4 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 00:26:01.593209 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0 00:26:01.594146 usbus0.4 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 00:26:01.611621 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.614223 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0,ERR=0 00:26:01.614730 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.617595 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=20,IVAL=0,ERR=0 00:26:01.617758 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.620216 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.620313 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.622219 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.622326 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.624208 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.624305 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.631722 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=16,IVAL=0,ERR=0 00:26:01.631925 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.634217 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.634315 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.637220 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=44,IVAL=0,ERR=0 00:26:01.637334 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.639214 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.639312 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.641585 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=28,IVAL=0,ERR=0 00:26:01.641769 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.644209 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=12,IVAL=0,ERR=0 00:26:01.644316 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.651213 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=32,IVAL=0,ERR=0 00:26:01.651316 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 00:26:01.653219 usbus0.4 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 00:26:01.653321 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 00:26:01.654584 usbus0.4 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 (at which point if I type control-c to stop usbdump, the system gets a fatal kernel mode translation fault, but that's another story.) Hope this helps. -- George From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 06:16:58 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 2C360F4E; Fri, 23 Aug 2013 06:16:58 +0000 (UTC) (envelope-from hps@bitfrost.no) Received: from mta.bitpro.no (mta.bitpro.no [92.42.64.202]) by mx1.freebsd.org (Postfix) with ESMTP id AE0DE2F58; Fri, 23 Aug 2013 06:16:57 +0000 (UTC) Received: from mail.lockless.no (mail.lockless.no [46.29.221.38]) by mta.bitpro.no (Postfix) with ESMTP id 8D42E7A1E8; Fri, 23 Aug 2013 08:16:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mail.lockless.no (Postfix) with ESMTP id F240E8EF99C; Fri, 23 Aug 2013 08:17:06 +0200 (CEST) X-Virus-Scanned: by amavisd-new-2.6.4 (20090625) (Debian) at lockless.no Received: from mail.lockless.no ([127.0.0.1]) by localhost (mail.lockless.no [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qCv327Bv5fbc; Fri, 23 Aug 2013 08:17:06 +0200 (CEST) Received: from laptop015.hselasky.homeunix.org (cm-176.74.213.204.customer.telag.net [176.74.213.204]) by mail.lockless.no (Postfix) with ESMTPSA id E38668EF99B; Fri, 23 Aug 2013 08:17:05 +0200 (CEST) Message-ID: <5216FE9F.2030608@bitfrost.no> Date: Fri, 23 Aug 2013 08:18:07 +0200 From: Hans Petter Selasky Organization: Bitfrost A/S User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130522 Thunderbird/17.0.6 MIME-Version: 1.0 To: George Mitchell Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> <5216ACE5.7000500@m5p.com> In-Reply-To: <5216ACE5.7000500@m5p.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 06:16:58 -0000 On 08/23/13 02:29, George Mitchell wrote: > On 08/22/13 07:34, Hans Petter Selasky wrote: > Here's the result: > > root@pi:/ # usbdump -i usbus0 -f 4 -s 65536 > 00:26:01.592494 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 > 00:26:01.593117 usbus0.4 > DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 > 00:26:01.593209 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0 > 00:26:01.594146 usbus0.4 > DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 > 00:26:01.611621 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.614223 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0,ERR=0 > 00:26:01.614730 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.617595 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=20,IVAL=0,ERR=0 > 00:26:01.617758 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.620216 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.620313 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.622219 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.622326 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.624208 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.624305 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.631722 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=16,IVAL=0,ERR=0 > 00:26:01.631925 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.634217 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.634315 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.637220 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=44,IVAL=0,ERR=0 > 00:26:01.637334 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.639214 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.639312 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.641585 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=28,IVAL=0,ERR=0 > 00:26:01.641769 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.644209 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=12,IVAL=0,ERR=0 > 00:26:01.644316 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.651213 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=32,IVAL=0,ERR=0 > 00:26:01.651316 usbus0.4 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 > 00:26:01.653219 usbus0.4 > DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 > 00:26:01.653321 usbus0.4 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 > 00:26:01.654584 usbus0.4 > DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 > > (at which point if I type control-c to stop usbdump, the system gets a > fatal kernel mode translation fault, but that's another story.) Hope > this helps. -- George I would expect to see some messages ERR != 0 when you plug the device. Can you show both usbdump output and dmesg output which belongs together? --HPS From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 09:54:13 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 695554DF for ; Fri, 23 Aug 2013 09:54:13 +0000 (UTC) (envelope-from ghw@7axu.com) Received: from mail-wi0-f172.google.com (mail-wi0-f172.google.com [209.85.212.172]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E1A842A87 for ; Fri, 23 Aug 2013 09:54:12 +0000 (UTC) Received: by mail-wi0-f172.google.com with SMTP id hj13so1746572wib.17 for ; Fri, 23 Aug 2013 02:54:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:from:date:message-id:subject:to :content-type; bh=UHixStq/m9sqn6RrFtp5IDrI6pche7QneslRKzZp2e4=; b=RIvViIo1LMSDbNxVuuIdUUZD3TPOdQa5am0F+mDEcvph86fDOddmRlxKxybwbO8yN9 zbdB/68Jr034lpiX3NOeL9HQvg9fwcmkTl510jr4+PsouV7o/ToqQmkxX8sx4tCSiOU4 1rdUIophkCzatXPlVYPNa/faVbZ3cTuT5xitmS8oNYTDYmu6vtmZovBQAVv9Gz2tFFWZ r1NIewyGo5hrAbT+C2+LrT+OZ9szPRF2hpKyyus2ggx5vWlI76mfnY+H9YTregMfLPNY WFmm26iUQ5eclHalddZlQObymmx/W27QT3zDBpQWDYZGqSOL0I7nqIKy3IUSjCgKqM44 R/ug== X-Gm-Message-State: ALoCoQm4V3piYQZAu4sn9yiE/E8QXscgBzeSJHJ/zqVZZb98DZLDQ/YkgHKQ4mJEqh48kk/9f3NH X-Received: by 10.180.210.243 with SMTP id mx19mr1490638wic.35.1377251288865; Fri, 23 Aug 2013 02:48:08 -0700 (PDT) MIME-Version: 1.0 Received: by 10.194.175.8 with HTTP; Fri, 23 Aug 2013 02:47:28 -0700 (PDT) X-Originating-IP: [124.90.191.196] From: XiaoQI Ge Date: Fri, 23 Aug 2013 17:47:28 +0800 Message-ID: Subject: My BB-Black boot failure To: freebsd-arm Content-Type: text/plain; charset=UTF-8 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 09:54:13 -0000 My BB-Black boot failure Patched this patch http://people.freebsd.org/ ~ gonzo/arm/patches/bbb-emmc1-fix.diff this patch Yesterday also boot, boot failure today === KDB: current backend: ddb Copyright (c) 1992-2013 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #0 r254628M: Fri Aug 23 02:57:38 CST 2013 root@7axu.com:/crochet-freebsd/work/obj/arm.armv6/usr/src/sys/BB-Black arm FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 WARNING: WITNESS option enabled, expect reduced performance. CPU: Cortex A8-r3 rev 2 (Cortex-A core) Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext WB disabled EABT branch prediction enabled LoUU:2 LoC:2 LoUIS:1 Cache level 1: 32KB/64B 4-way data cache WT WB Read-Alloc 32KB/64B 4-way instruction cache Read-Alloc Cache level 2: 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc real memory = 536870912 (512 MB) avail memory = 515387392 (491 MB) Texas Instruments AM3358 Processor, Revision ES1.1 random device not loaded; using insecure entropy random: initialized simplebus0: on fdtbus0 aintc0: mem 0x48200000-0x48200fff on simplebus0 aintc0: Revision 5.0 ti_scm0: mem 0x44e10000-0x44e11fff on simplebus0 am335x_prcm0: mem 0x44e00000-0x44e012ff on simplebus0 am335x_prcm0: Clocks: System 24.0 MHz, CPU 550 MHz am335x_dmtimer0: mem 0x44e05000-0x44e05fff,0x44e31000-0x44e31fff,0x48040000-0x48040fff,0x48042000-0x48042fff,0x48044000-0x48044fff,0x48046000-0x48046fff,0x48048000-0x48048fff,0x4804a000-0x4804afff irq 66,67,68,69,92,93,94,95 on simplebus0 Timecounter "AM335x Timecounter" frequency 24000000 Hz quality 1000 Event timer "AM335x Eventtimer0" frequency 24000000 Hz quality 1000 gpio0: mem 0x44e07000-0x44e07fff,0x4804c000-0x4804cfff,0x481ac000-0x481acfff,0x481ae000-0x481aefff irq 96,97,98,99,32,33,62,63 on simplebus0 gpioc0: on gpio0 gpiobus0: on gpio0 uart0: mem 0x44e09000-0x44e09fff irq 72 on simplebus0 uart0: console (115384,n,8,1) ti_edma30: mem 0x49000000-0x490fffff,0x49800000-0x498fffff,0x49900000-0x499fffff,0x49a00000-0x49afffff irq 12,13,14 on simplebus0 ti_edma30: EDMA revision 40014c00 sdhci_ti0: mem 0x48060000-0x48060fff irq 64 on simplebus0 mmc0: on sdhci_ti0 sdhci_ti1: mem 0x481d8000-0x481d8fff irq 28 on simplebus0 mmc1: on sdhci_ti1 cpsw0: <3-port Switch Ethernet Subsystem> mem 0x4a100000-0x4a103fff irq 40,41,42,43 on simplebus0 cpsw0: CPSW SS Version 1.12 (0) cpsw0: Initial queue size TX=128 RX=384 cpsw0: Ethernet address: c8:a0:30:b2:e3:cb cpsw0: Failed to read from PHY. cpsw0: attaching PHYs failed vm_fault(0xc08341a0, 0, 1, 0) -> 1 Fatal kernel mode data abort: 'Translation Fault (S)' trapframe: 0xc0932b58 FSR=00000005, FAR=00000018, spsr=80000093 r0 =c2df2780, r1 =00000000, r2 =00000019, r3 =60000193 r4 =00000000, r5 =c2df2780, r6 =00000006, r7 =c05791d4 r8 =c2df2780, r9 =ffffffff, r10=c2db0800, r11=c0932bb8 r12=00000000, ssp=c0932ba8, slr=c0594714, pc =c0394f28 [ thread pid 0 tid 100000 ] Stopped at device_delete_child+0x14: ldr r1, [r4, #0x018] db> bt Tracing pid 0 tid 100000 td 0xc0833e90 db_trace_self() at db_trace_self pc = 0xc057d10c lr = 0xc022bc60 (db_stack_trace+0xf4) sp = 0xc0932860 fp = 0xc0932878 r10 = 0xc06844c0 db_stack_trace() at db_stack_trace+0xf4 pc = 0xc022bc60 lr = 0xc022b5cc (db_command+0x264) sp = 0xc0932880 fp = 0xc0932920 r4 = 0x00000000 r5 = 0x00000000 r6 = 0xc05e05e4 db_command() at db_command+0x264 pc = 0xc022b5cc lr = 0xc022b33c (db_command_loop+0x60) sp = 0xc0932928 fp = 0xc0932938 r4 = 0xc05bf0e2 r5 = 0xc05d9ef9 r6 = 0xc0832f20 r7 = 0xc0932b58 r8 = 0xc0932b58 r9 = 0xc06cfb94 r10 = 0xc0684730 db_command_loop() at db_command_loop+0x60 pc = 0xc022b33c lr = 0xc022dd3c (db_trap+0xdc) sp = 0xc0932940 fp = 0xc0932a60 r4 = 0x00000000 r5 = 0xc0932948 r6 = 0xc06cfbc0 db_trap() at db_trap+0xdc pc = 0xc022dd3c lr = 0xc039f534 (kdb_trap+0xd4) sp = 0xc0932a68 fp = 0xc0932a88 r4 = 0x00000000 r5 = 0x00000005 r6 = 0xc06cfbc0 r7 = 0xc0932b58 kdb_trap() at kdb_trap+0xd4 pc = 0xc039f534 lr = 0xc058c4b0 (dab_fatal+0x174) sp = 0xc0932a90 fp = 0xc0932aa8 r4 = 0xc0932b58 r5 = 0x600001d3 r6 = 0x00000018 r7 = 0x00000005 r8 = 0xc0932b58 r9 = 0x00000001 r10 = 0xc08341a0 dab_fatal() at dab_fatal+0x174 pc = 0xc058c4b0 lr = 0xc058c314 ($d) sp = 0xc0932ab0 fp = 0xc0932b50 r4 = 0xc0833b68 r5 = 0xc0833e90 r6 = 0xc0833c10 r7 = 0xc060b671 $d() at $d pc = 0xc058c314 lr = 0xc057e944 (exception_exit) sp = 0xc0932b58 fp = 0xc0932bb8 r4 = 0x00000000 r5 = 0xc2df2780 r6 = 0x00000006 r7 = 0xc05791d4 r8 = 0xc2df2780 r9 = 0xffffffff r10 = 0xc2db0800 exception_exit() at exception_exit pc = 0xc057e944 lr = 0xc0594714 (cpsw_detach+0x178) sp = 0xc0932bac fp = 0xc0932bb8 r0 = 0xc2df2780 r1 = 0x00000000 r2 = 0x00000019 r3 = 0x60000193 r4 = 0x00000000 r5 = 0xc2df2780 r6 = 0x00000006 r7 = 0xc05791d4 r8 = 0xc2df2780 r9 = 0xffffffff r10 = 0xc2db0800 r12 = 0x00000000 device_delete_child() at device_delete_child+0x14 pc = 0xc0394f28 lr = 0xc0594714 (cpsw_detach+0x178) sp = 0xc0932bc0 fp = 0xc0932be0 r4 = 0xc2e43000 r5 = 0xc2e43000 r6 = 0x00000006 cpsw_detach() at cpsw_detach+0x178 pc = 0xc0594714 lr = 0xc0594300 (cpsw_attach+0x7cc) sp = 0xc0932be8 fp = 0xc0932c60 r4 = 0x00000000 r5 = 0xc2e43000 r6 = 0x00000006 r7 = 0xc05791d4 r8 = 0xc2df2780 r9 = 0xffffffff cpsw_attach() at cpsw_attach+0x7cc pc = 0xc0594300 lr = 0xc039670c (device_attach+0x324) sp = 0xc0932c68 fp = 0xc0932c98 r4 = 0xc2df2780 r5 = 0xc2df2c80 r6 = 0xc2df27b8 r7 = 0x00000000 r8 = 0xc060a939 r9 = 0xc0399f34 r10 = 0xc2e2c214 device_attach() at device_attach+0x324 pc = 0xc039670c lr = 0xc039783c (bus_generic_attach+0x50) sp = 0xc0932ca0 fp = 0xc0932cb0 r4 = 0xc2df2780 r5 = 0xc0834864 r6 = 0xc05dc69f r7 = 0x00000aad r8 = 0xc05c02ae r9 = 0xc2e2c200 bus_generic_attach() at bus_generic_attach+0x50 pc = 0xc039783c lr = 0xc0234910 (simplebus_attach+0x1ac) sp = 0xc0932cb8 fp = 0xc0932cd8 r4 = 0xc2df2c80 r5 = 0x00000000 r6 = 0xc0686c20 r7 = 0xc05c02c8 simplebus_attach() at simplebus_attach+0x1ac pc = 0xc0234910 lr = 0xc039670c (device_attach+0x324) sp = 0xc0932ce0 fp = 0xc0932d10 r4 = 0xc2df2c80 r5 = 0xc2df2d80 r6 = 0xc2df2cb8 r7 = 0x00000000 r8 = 0xc060a939 r9 = 0xc0399f34 r10 = 0x00000025 device_attach() at device_attach+0x324 pc = 0xc039670c lr = 0xc039783c (bus_generic_attach+0x50) sp = 0xc0932d18 fp = 0xc0932d28 r4 = 0xc2df2c80 r5 = 0xc0834864 r6 = 0xc05dc69f r7 = 0x00000aad r8 = 0xc2c790f0 r9 = 0xc0399f34 bus_generic_attach() at bus_generic_attach+0x50 pc = 0xc039783c lr = 0xc02341c4 (fdtbus_attach+0x564) sp = 0xc0932d30 fp = 0xc0932da0 r4 = 0x00000002 r5 = 0x00000000 r6 = 0x000000c4 r7 = 0xc2c71400 fdtbus_attach() at fdtbus_attach+0x564 pc = 0xc02341c4 lr = 0xc039670c (device_attach+0x324) sp = 0xc0932da8 fp = 0xc0932dd8 r4 = 0xc2df2d80 r5 = 0xc2df2dd0 r6 = 0xc2df2db8 r7 = 0x00000000 r8 = 0xc060a939 r9 = 0xc0399f34 r10 = 0x00000025 device_attach() at device_attach+0x324 pc = 0xc039670c lr = 0xc039783c (bus_generic_attach+0x50) sp = 0xc0932de0 fp = 0xc0932df0 r4 = 0xc2df2d80 r5 = 0xc0834864 r6 = 0xc05dc69f r7 = 0x00000aad r8 = 0xc060a939 r9 = 0xc0399f34 bus_generic_attach() at bus_generic_attach+0x50 pc = 0xc039783c lr = 0xc0582bb0 (nexus_attach+0x6c) sp = 0xc0932df8 fp = 0xc0932e00 r4 = 0xc2df3980 r5 = 0xc0831e04 r6 = 0xc2df39b8 r7 = 0x00000000 nexus_attach() at nexus_attach+0x6c pc = 0xc0582bb0 lr = 0xc039670c (device_attach+0x324) sp = 0xc0932e08 fp = 0xc0932e38 r4 = 0xc2df3980 r5 = 0xc2df39d0 device_attach() at device_attach+0x324 pc = 0xc039670c lr = 0xc0397d18 (bus_generic_new_pass+0x118) sp = 0xc0932e40 fp = 0xc0932e58 r4 = 0xc2df3980 r5 = 0xc0692f00 r6 = 0xc0834864 r7 = 0x00000aad r8 = 0xc05dc69f r9 = 0xc0834b60 bus_generic_new_pass() at bus_generic_new_pass+0x118 pc = 0xc0397d18 lr = 0xc0394308 (bus_set_pass+0x84) sp = 0xc0932e60 fp = 0xc0932e78 r4 = 0x7fffffff r5 = 0xc0692f00 r6 = 0xc2c7b000 r7 = 0xc2c7a620 r8 = 0xc06cf320 bus_set_pass() at bus_set_pass+0x84 pc = 0xc0394308 lr = 0xc0399148 (root_bus_configure+0x10) sp = 0xc0932e80 fp = 0xc0932e80 r4 = 0x00000001 r5 = 0xc0833e88 r6 = 0x00000000 r7 = 0xc06119d4 r8 = 0xc0834694 r9 = 0xc0834690 root_bus_configure() at root_bus_configure+0x10 pc = 0xc0399148 lr = 0xc0578004 (configure+0xc) sp = 0xc0932e88 fp = 0xc0932e88 configure() at configure+0xc pc = 0xc0578004 lr = 0xc031a12c (mi_startup+0x11c) sp = 0xc0932e90 fp = 0xc0932ea8 mi_startup() at mi_startup+0x11c pc = 0xc031a12c lr = 0xc0200224 (virt_done+0x34) sp = 0xc0932eb0 fp = 0x00000000 r4 = 0x80200264 r5 = 0x80200158 r6 = 0x88046a88 r7 = 0x8020014c r8 = 0x0000000a r9 = 0xc0921000 virt_done() at virt_done+0x34 pc = 0xc0200224 lr = 0xc0200224 (virt_done+0x34) sp = 0xc0932eb0 fp = 0x00000000 Unable to unwind further db> From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 10:39:26 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 48CADE1B for ; Fri, 23 Aug 2013 10:39:26 +0000 (UTC) (envelope-from ghw@7axu.com) Received: from mail-wi0-f170.google.com (mail-wi0-f170.google.com [209.85.212.170]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D53072CA9 for ; Fri, 23 Aug 2013 10:39:25 +0000 (UTC) Received: by mail-wi0-f170.google.com with SMTP id hi8so1948158wib.5 for ; Fri, 23 Aug 2013 03:39:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:content-type; bh=qXZc3B8P18fGPO9dE/rrotvcRCkHbgn1XKecMx1HfDg=; b=eZf/xJ47JnUcd1xa7x0LWUkDhQgAjxs7+g53LVRpMbDO1rpFm7B5oLVf66l5Si/gSt +HrGOfFKkNx5cNBfuEHDyLkQvDagflyFsbW/VX1IP83iOvs4LXeB5QNv18l6rLDy/PD+ l10lFiJQMGcjFc+lQHiJXDTtdVwPMY48MtBkopO6M1Skobjyv91iuBrMK2o7ZTzxCumR h1vJql9uZ9iWkCICwoamiSFnn+xjCwaHfgcYKtVQlEo17UdooXNBvSWtGVpWL6seFxFy ZhqcLCJ4mfEGth+vT0w8e3DdghgOtVw1KRC7i7YlmWywuvkl50lGhWbHSMnqsxUQfgQn Ndrg== X-Gm-Message-State: ALoCoQkXuPBSKGfFZJOdk7Zp6HTxQCLbJW/XO0zYRCHwISZlhqQ9LHLtHCt6h5D0MoPildJo0ych X-Received: by 10.194.202.230 with SMTP id kl6mr14578898wjc.9.1377254357856; Fri, 23 Aug 2013 03:39:17 -0700 (PDT) MIME-Version: 1.0 Received: by 10.194.175.8 with HTTP; Fri, 23 Aug 2013 03:38:37 -0700 (PDT) X-Originating-IP: [124.90.145.18] In-Reply-To: References: From: XiaoQI Ge Date: Fri, 23 Aug 2013 18:38:37 +0800 Message-ID: Subject: Re: My BB-Black boot failure To: freebsd-arm Content-Type: text/plain; charset=UTF-8 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 10:39:26 -0000 addr2line -e /boot/kernel/kernel c0394f28 /usr/src/sys/kern/subr_bus.c:1868 2013/8/23 XiaoQI Ge : From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 11:12:02 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 61DF375B; Fri, 23 Aug 2013 11:12:02 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 16C462E91; Fri, 23 Aug 2013 11:12:01 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7NBBqG4059850; Fri, 23 Aug 2013 07:11:58 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <52174378.2020101@m5p.com> Date: Fri, 23 Aug 2013 07:11:52 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: Hans Petter Selasky Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> <5216ACE5.7000500@m5p.com> <5216FE9F.2030608@bitfrost.no> In-Reply-To: <5216FE9F.2030608@bitfrost.no> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Fri, 23 Aug 2013 07:11:58 -0400 (EDT) Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 11:12:02 -0000 On 08/23/13 02:18, Hans Petter Selasky wrote: > On 08/23/13 02:29, George Mitchell wrote: >> On 08/22/13 07:34, Hans Petter Selasky wrote: > >> Here's the result: >> [...] >> (at which point if I type control-c to stop usbdump, the system gets a >> fatal kernel mode translation fault, but that's another story.) Hope >> this helps. -- George > > I would expect to see some messages ERR != 0 when you plug the device. > Can you show both usbdump output and dmesg output which belongs together? > > --HPS Not sure exactly how I would get the usbdump output and log output interspersed in the correct order, and the fact that the pi panics when I type control-C at usbdump doesn't help. Subjectively, the "ulpt0 attach returned 12" seemed to occur a fraction of a second later than the others. But I'll see what I can come up with this evening. -- George From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 12:53:50 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 947ECF54 for ; Fri, 23 Aug 2013 12:53:50 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mho-02-ewr.mailhop.org (mho-02-ewr.mailhop.org [204.13.248.72]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 595A92511 for ; Fri, 23 Aug 2013 12:53:49 +0000 (UTC) Received: from c-24-8-230-52.hsd1.co.comcast.net ([24.8.230.52] helo=damnhippie.dyndns.org) by mho-02-ewr.mailhop.org with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1VCqs9-0000f6-6N; Fri, 23 Aug 2013 12:53:49 +0000 Received: from [172.22.42.240] (revolution.hippie.lan [172.22.42.240]) by damnhippie.dyndns.org (8.14.3/8.14.3) with ESMTP id r7NCrku7047759; Fri, 23 Aug 2013 06:53:46 -0600 (MDT) (envelope-from ian@FreeBSD.org) X-Mail-Handler: Dyn Standard SMTP by Dyn X-Originating-IP: 24.8.230.52 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/sendlabs/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX1+yLpTmfP9AybypRb5cpJkk Subject: Re: My BB-Black boot failure From: Ian Lepore To: XiaoQI Ge In-Reply-To: References: Content-Type: text/plain; charset="us-ascii" Date: Fri, 23 Aug 2013 06:53:46 -0600 Message-ID: <1377262426.1111.50.camel@revolution.hippie.lan> Mime-Version: 1.0 X-Mailer: Evolution 2.32.1 FreeBSD GNOME Team Port Content-Transfer-Encoding: 7bit Cc: freebsd-arm X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 12:53:50 -0000 On Fri, 2013-08-23 at 17:47 +0800, XiaoQI Ge wrote: > My BB-Black boot failure > Patched this patch http://people.freebsd.org/ ~ > gonzo/arm/patches/bbb-emmc1-fix.diff this patch > > Yesterday also boot, boot failure today > > === > KDB: current backend: ddb > Copyright (c) 1992-2013 The FreeBSD Project. > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 > The Regents of the University of California. All rights reserved. > FreeBSD is a registered trademark of The FreeBSD Foundation. > FreeBSD 10.0-CURRENT #0 r254628M: Fri Aug 23 02:57:38 CST 2013 > root@7axu.com:/crochet-freebsd/work/obj/arm.armv6/usr/src/sys/BB-Black arm > FreeBSD clang version 3.3 (tags/RELEASE_33/final 183502) 20130610 > WARNING: WITNESS option enabled, expect reduced performance. > CPU: Cortex A8-r3 rev 2 (Cortex-A core) > Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext > WB disabled EABT branch prediction enabled > LoUU:2 LoC:2 LoUIS:1 > Cache level 1: > 32KB/64B 4-way data cache WT WB Read-Alloc > 32KB/64B 4-way instruction cache Read-Alloc > Cache level 2: > 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc > real memory = 536870912 (512 MB) > avail memory = 515387392 (491 MB) > Texas Instruments AM3358 Processor, Revision ES1.1 > random device not loaded; using insecure entropy > random: initialized > simplebus0: on fdtbus0 > aintc0: mem 0x48200000-0x48200fff on simplebus0 > aintc0: Revision 5.0 > ti_scm0: mem 0x44e10000-0x44e11fff on simplebus0 > am335x_prcm0: mem > 0x44e00000-0x44e012ff on simplebus0 > am335x_prcm0: Clocks: System 24.0 MHz, CPU 550 MHz > am335x_dmtimer0: mem > 0x44e05000-0x44e05fff,0x44e31000-0x44e31fff,0x48040000-0x48040fff,0x48042000-0x48042fff,0x48044000-0x48044fff,0x48046000-0x48046fff,0x48048000-0x48048fff,0x4804a000-0x4804afff > irq 66,67,68,69,92,93,94,95 on simplebus0 > Timecounter "AM335x Timecounter" frequency 24000000 Hz quality 1000 > Event timer "AM335x Eventtimer0" frequency 24000000 Hz quality 1000 > gpio0: mem > 0x44e07000-0x44e07fff,0x4804c000-0x4804cfff,0x481ac000-0x481acfff,0x481ae000-0x481aefff > irq 96,97,98,99,32,33,62,63 on simplebus0 > gpioc0: on gpio0 > gpiobus0: on gpio0 > uart0: mem 0x44e09000-0x44e09fff irq 72 > on simplebus0 > uart0: console (115384,n,8,1) > ti_edma30: mem > 0x49000000-0x490fffff,0x49800000-0x498fffff,0x49900000-0x499fffff,0x49a00000-0x49afffff > irq 12,13,14 on simplebus0 > ti_edma30: EDMA revision 40014c00 > sdhci_ti0: mem 0x48060000-0x48060fff irq 64 on simplebus0 > mmc0: on sdhci_ti0 > sdhci_ti1: mem 0x481d8000-0x481d8fff irq 28 on simplebus0 > mmc1: on sdhci_ti1 > cpsw0: <3-port Switch Ethernet Subsystem> mem 0x4a100000-0x4a103fff > irq 40,41,42,43 on simplebus0 > cpsw0: CPSW SS Version 1.12 (0) > cpsw0: Initial queue size TX=128 RX=384 > cpsw0: Ethernet address: c8:a0:30:b2:e3:cb > cpsw0: Failed to read from PHY. > cpsw0: attaching PHYs failed > > vm_fault(0xc08341a0, 0, 1, 0) -> 1 > Fatal kernel mode data abort: 'Translation Fault (S)' > trapframe: 0xc0932b58 > FSR=00000005, FAR=00000018, spsr=80000093 > r0 =c2df2780, r1 =00000000, r2 =00000019, r3 =60000193 > r4 =00000000, r5 =c2df2780, r6 =00000006, r7 =c05791d4 > r8 =c2df2780, r9 =ffffffff, r10=c2db0800, r11=c0932bb8 > r12=00000000, ssp=c0932ba8, slr=c0594714, pc =c0394f28 > > [ thread pid 0 tid 100000 ] > Stopped at device_delete_child+0x14: ldr r1, [r4, #0x018] > db> bt > [snip] The real problem here is the "Failed to read from PHY." The data abort that follows happened because the cpsw driver called device_detach_child() on the phy device that never got attached. I don't know why it failed to read from the PHY, I've never seen a problem like that (but I have BB-White, not Black). I do know that you don't need that patch anymore, because it's patching the ti_mmchs driver, and now (as of a few days ago) BB uses the new sdhci_ti driver. (I forgot to send a heads-up to the list about switching drivers, I'll do that in a minute.) I just updated to r254628 on my BBW and it boots fine. -- Ian From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 13:11:37 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 3C88A8A3 for ; Fri, 23 Aug 2013 13:11:37 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mho-01-ewr.mailhop.org (mho-03-ewr.mailhop.org [204.13.248.66]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 140BA2648 for ; Fri, 23 Aug 2013 13:11:36 +0000 (UTC) Received: from c-24-8-230-52.hsd1.co.comcast.net ([24.8.230.52] helo=damnhippie.dyndns.org) by mho-01-ewr.mailhop.org with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1VCr9L-0004oj-Sm for freebsd-arm@FreeBSD.org; Fri, 23 Aug 2013 13:11:36 +0000 Received: from [172.22.42.240] (revolution.hippie.lan [172.22.42.240]) by damnhippie.dyndns.org (8.14.3/8.14.3) with ESMTP id r7NDBXAX047783 for ; Fri, 23 Aug 2013 07:11:33 -0600 (MDT) (envelope-from ian@FreeBSD.org) X-Mail-Handler: Dyn Standard SMTP by Dyn X-Originating-IP: 24.8.230.52 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/sendlabs/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX19gI8L++B0SJjoFvZwB6rwU Subject: Heads-up: new mmc/sd driver for BeagleBone From: Ian Lepore To: freebsd-arm Content-Type: text/plain; charset="us-ascii" Date: Fri, 23 Aug 2013 07:11:33 -0600 Message-ID: <1377263493.1111.63.camel@revolution.hippie.lan> Mime-Version: 1.0 X-Mailer: Evolution 2.32.1 FreeBSD GNOME Team Port Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 13:11:37 -0000 FYI, a few days ago (as of r254559) I checked in a new mmc/sd driver for BeagleBone (White and Black). We now use the standard sdhci driver, and performance is noticibly better. The new driver supports 8-bit mode for MMC cards. Right now it uses PIO mode only (but still performs better even so). I intend to add DMA support soon. The old driver is still available, and if for some reason you suspect trouble with the new driver, you can quickly switch back by editing src/sys/arm/ti/am335x/files.am335x, comment out the ti_sdhci line and uncomment ti_mmchs and rebuild your kernel. These numbers were with a Lexar class-6 8gb SD card... ti_mmchs driver: root@bb:~ # dd if=/dev/mmcsd0s2b of=/dev/null bs=128k count=100 13107200 bytes transferred in 6.178682 secs (2121359 bytes/sec) root@bb:~ # dd of=/dev/mmcsd0s2b if=/dev/zero bs=128k count=100 13107200 bytes transferred in 59.523976 secs (220200 bytes/sec) ti_sdhci driver: root@bb:~ # dd if=/dev/mmcsd0s2b of=/dev/null bs=128k count=100 13107200 bytes transferred in 0.847354 secs (15468389 bytes/sec) root@bb:~ # dd of=/dev/mmcsd0s2b if=/dev/zero bs=128k count=100 13107200 bytes transferred in 1.287745 secs (10178413 bytes/sec) -- Ian From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 15:26:43 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 955059E3 for ; Fri, 23 Aug 2013 15:26:43 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mho-01-ewr.mailhop.org (mho-03-ewr.mailhop.org [204.13.248.66]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 6C9D62EB8 for ; Fri, 23 Aug 2013 15:26:43 +0000 (UTC) Received: from c-24-8-230-52.hsd1.co.comcast.net ([24.8.230.52] helo=damnhippie.dyndns.org) by mho-01-ewr.mailhop.org with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1VCtG6-000IsJ-98; Fri, 23 Aug 2013 15:26:42 +0000 Received: from [172.22.42.240] (revolution.hippie.lan [172.22.42.240]) by damnhippie.dyndns.org (8.14.3/8.14.3) with ESMTP id r7NFQcqt047995; Fri, 23 Aug 2013 09:26:38 -0600 (MDT) (envelope-from ian@FreeBSD.org) X-Mail-Handler: Dyn Standard SMTP by Dyn X-Originating-IP: 24.8.230.52 X-Report-Abuse-To: abuse@dyndns.com (see http://www.dyndns.com/services/sendlabs/outbound_abuse.html for abuse reporting information) X-MHO-User: U2FsdGVkX1+zO0k10s+lLpemBYZySRNB Subject: Re: Reminder: Removal of WITHOUT_ARM_EABI From: Ian Lepore To: Andrew Turner In-Reply-To: <20130820091527.42127170@bender.Home> References: <20130820091527.42127170@bender.Home> Content-Type: text/plain; charset="us-ascii" Date: Fri, 23 Aug 2013 09:26:38 -0600 Message-ID: <1377271598.1111.78.camel@revolution.hippie.lan> Mime-Version: 1.0 X-Mailer: Evolution 2.32.1 FreeBSD GNOME Team Port Content-Transfer-Encoding: 7bit Cc: freebsd-arm@FreeBSD.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 15:26:43 -0000 On Tue, 2013-08-20 at 09:15 +0100, Andrew Turner wrote: > I am planning on removing WITHOUT_ARM_EABI before 10.0 is released. As > this is planned on happening soon it this change is likely to happen > within the next two weeks, after a short heads up. > > This is a reminder for people who have not yet moved to the ARM EABI to > do so now as their build will break when this option is removed. > It turns out that on DreamPlug (armv5te) the unit won't boot all the way to multiuser mode with EABI, building with gcc or clang. I first discovered this a few days ago when I realized I was still building with OABI on dreamplug and tried to switch. I tried going back to a revision in late July but that didn't make any difference. The before getting any further with bisecting I heard from Ilya Bakulin on irc that the problems I'm seeing (hanging in rc.d/initrandom and rc.d/var) go back to at least April. The rc.d/initrandom problem seems to be while running the 'df' command to "generate entropy." In rc.d/var the problem is while running newfs on /dev/md0, and I can more readily confirm that -- if I use ^C to get past the hangs in rc.d processing it'll limp its way to multiuser mode, and if you manually try to "newfs /dev/md0" it definitely hangs the same way. When it's hung in that state, a ^T gives no info, but a ^C does break out of the hang. I've been unable to get any more info about how/why it's hung. I can understand a desire to not let any 10.0 release get into the wild with OABI support, but I'm not sure that removing the ability to even try OABI to see if it fixes a problem is a good idea. EABI just doesn't have enough testing to declare that it's solid (because clearly it's not yet solid). Can we declare that OABI isn't supported without removing the ability to fall back to it for testing purposes? I wouldn't mind if enabling it requires something like WITH_UNSUPPORTED_OABI_FOR_TESTING. -- Ian From owner-freebsd-arm@FreeBSD.ORG Fri Aug 23 16:31:10 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 58D077C8; Fri, 23 Aug 2013 16:31:10 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-legacy2.sentex.ca (freebsd-legacy2.sentex.ca [IPv6:2607:f3e0:0:3::6502:9c]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E4DCA2264; Fri, 23 Aug 2013 16:31:09 +0000 (UTC) Received: from freebsd-legacy2.sentex.ca (localhost [127.0.0.1]) by freebsd-legacy2.sentex.ca (8.14.5/8.14.5) with ESMTP id r7NGV8Oi055993; Fri, 23 Aug 2013 16:31:08 GMT (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-legacy2.sentex.ca (8.14.5/8.14.5/Submit) id r7NGV8NC055984; Fri, 23 Aug 2013 16:31:08 GMT (envelope-from tinderbox@freebsd.org) Date: Fri, 23 Aug 2013 16:31:08 GMT Message-Id: <201308231631.r7NGV8NC055984@freebsd-legacy2.sentex.ca> X-Authentication-Warning: freebsd-legacy2.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [releng_8 tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Aug 2013 16:31:10 -0000 TB --- 2013-08-23 15:55:13 - tinderbox 2.10 running on freebsd-legacy2.sentex.ca TB --- 2013-08-23 15:55:13 - FreeBSD freebsd-legacy2.sentex.ca 9.1-RELEASE FreeBSD 9.1-RELEASE #0 r243825: Tue Dec 4 09:23:10 UTC 2012 root@farrell.cse.buffalo.edu:/usr/obj/usr/src/sys/GENERIC amd64 TB --- 2013-08-23 15:55:13 - starting RELENG_8 tinderbox run for arm/arm TB --- 2013-08-23 15:55:13 - cleaning the object tree TB --- 2013-08-23 15:55:13 - /usr/local/bin/svn stat /src TB --- 2013-08-23 15:55:17 - At svn revision 254716 TB --- 2013-08-23 15:55:18 - building world TB --- 2013-08-23 15:55:18 - CROSS_BUILD_TESTING=YES TB --- 2013-08-23 15:55:18 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-23 15:55:18 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-23 15:55:18 - SRCCONF=/dev/null TB --- 2013-08-23 15:55:18 - TARGET=arm TB --- 2013-08-23 15:55:18 - TARGET_ARCH=arm TB --- 2013-08-23 15:55:18 - TZ=UTC TB --- 2013-08-23 15:55:18 - __MAKE_CONF=/dev/null TB --- 2013-08-23 15:55:18 - cd /src TB --- 2013-08-23 15:55:18 - /usr/bin/make -B buildworld >>> World build started on Fri Aug 23 15:55:18 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything >>> World build completed on Fri Aug 23 16:30:29 UTC 2013 TB --- 2013-08-23 16:30:29 - cd /src/sys/arm/conf TB --- 2013-08-23 16:30:29 - /usr/sbin/config -m AVILA TB --- 2013-08-23 16:30:29 - building AVILA kernel TB --- 2013-08-23 16:30:29 - CROSS_BUILD_TESTING=YES TB --- 2013-08-23 16:30:29 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-23 16:30:29 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-23 16:30:29 - SRCCONF=/dev/null TB --- 2013-08-23 16:30:29 - TARGET=arm TB --- 2013-08-23 16:30:29 - TARGET_ARCH=arm TB --- 2013-08-23 16:30:29 - TZ=UTC TB --- 2013-08-23 16:30:29 - __MAKE_CONF=/dev/null TB --- 2013-08-23 16:30:29 - cd /src TB --- 2013-08-23 16:30:29 - /usr/bin/make -B buildkernel KERNCONF=AVILA >>> Kernel build for AVILA started on Fri Aug 23 16:30:29 UTC 2013 >>> stage 1: configuring the kernel >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3.1: making dependencies >>> stage 3.2: building everything [...] cc -mbig-endian -c -O -pipe -std=c99 -g -Wall -Wredundant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -fformat-extensions -nostdinc -I. -I/src/sys -I/src/sys/contrib/altq -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h -fno-common -finline-limit=8000 --param inline-unit-growth=100 --param large-function-growth=1000 -mcpu=xscale -ffreestanding -Werror /src/sys/fs/deadfs/dead_vnops.c cc -mbig-endian -c -O -pipe -std=c99 -g -Wall -Wredundant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -fformat-extensions -nostdinc -I. -I/src/sys -I/src/sys/contrib/altq -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h -fno-common -finline-limit=8000 --param inline-unit-growth=100 --param large-function-growth=1000 -mcpu=xscale -ffreestanding -Werror /src/sys/fs/devfs/devfs_devs.c cc -mbig-endian -c -O -pipe -std=c99 -g -Wall -Wredundant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -fformat-extensions -nostdinc -I. -I/src/sys -I/src/sys/contrib/altq -D_KERNEL -DHAVE_KERNEL_OPTION_HEADERS -include opt_global.h -fno-common -finline-limit=8000 --param inline-unit-growth=100 --param large-function-growth=1000 -mcpu=xscale -ffreestanding -Werror /src/sys/fs/devfs/devfs_rule.c cc1: warnings being treated as errors /src/sys/fs/devfs/devfs_rule.c: In function 'devfs_rule_matchpath': /src/sys/fs/devfs/devfs_rule.c:592: warning: implicit declaration of function 'devfs_fqpn' /src/sys/fs/devfs/devfs_rule.c:592: warning: nested extern declaration of 'devfs_fqpn' /src/sys/fs/devfs/devfs_rule.c:592: warning: assignment makes pointer from integer without a cast *** [devfs_rule.o] Error code 1 Stop in /obj/arm/src/sys/AVILA. *** [buildkernel] Error code 1 Stop in /src. *** [buildkernel] Error code 1 Stop in /src. TB --- 2013-08-23 16:31:08 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-23 16:31:08 - ERROR: failed to build AVILA kernel TB --- 2013-08-23 16:31:08 - 1790.38 user 393.21 system 2154.74 real http://tinderbox.freebsd.org/tinderbox-freebsd8-build-RELENG_8-arm-arm.full From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 00:44:32 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id AF6DDB24; Sat, 24 Aug 2013 00:44:32 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 312B12F7F; Sat, 24 Aug 2013 00:44:32 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7O0iL2o065728; Fri, 23 Aug 2013 20:44:26 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <521801E5.9000309@m5p.com> Date: Fri, 23 Aug 2013 20:44:21 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: Hans Petter Selasky Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> <5216ACE5.7000500@m5p.com> <5216FE9F.2030608@bitfrost.no> <52174378.2020101@m5p.com> In-Reply-To: <52174378.2020101@m5p.com> Content-Type: multipart/mixed; boundary="------------060606030503080406090409" X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Fri, 23 Aug 2013 20:44:28 -0400 (EDT) Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 00:44:32 -0000 This is a multi-part message in MIME format. --------------060606030503080406090409 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit On 08/23/13 07:11, George Mitchell wrote: > On 08/23/13 02:18, Hans Petter Selasky wrote: >> On 08/23/13 02:29, George Mitchell wrote: >>> On 08/22/13 07:34, Hans Petter Selasky wrote: >> >>> Here's the result: >>> [...] >>> (at which point if I type control-c to stop usbdump, the system gets a >>> fatal kernel mode translation fault, but that's another story.) Hope >>> this helps. -- George >> >> I would expect to see some messages ERR != 0 when you plug the device. >> Can you show both usbdump output and dmesg output which belongs together? >> >> --HPS > > Not sure exactly how I would get the usbdump output and log output > interspersed in the correct order, and the fact that the pi panics > when I type control-C at usbdump doesn't help. Subjectively, the > "ulpt0 attach returned 12" seemed to occur a fraction of a second > later than the others. But I'll see what I can come up with this > evening. -- George Well, what I ended up doing is turning on ulpt debugging and then piping usbdump into logger, yielding the attachment. But I'm not 100% sure that the output is in the proper sequence. Give that the printer works fine with the same code on my amd64 machines, does this suggest we have a byte-ordering problem in the driver? -- George --------------060606030503080406090409 Content-Type: text/plain; charset=us-ascii; name="ulpt.txt" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="ulpt.txt" Aug 24 00:10:24 pi kernel: ugen0.5: at usbus0 Aug 24 00:10:24 pi kernel: ulpt_probe: Aug 24 00:10:24 pi kernel: ulpt_probe: Aug 24 00:10:24 pi kernel: ulpt_attach: sc=0xc2d46a00 Aug 24 00:10:24 pi kernel: ulpt0: on usbus0 Aug 24 00:10:24 pi kernel: ulpt_attach: setting alternate config number: 0 Aug 24 00:10:24 pi kernel: ulpt_attach: error=USB_ERR_INVAL Aug 24 00:10:24 pi kernel: ulpt_detach: sc=0xc2d46a00 Aug 24 00:10:24 pi kernel: device_attach: ulpt0 attach returned 12 Aug 24 00:10:24 pi george: 00:08:02.619534 usbus0.5 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.620189 usbus0.5 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.620282 usbus0.5 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.621186 usbus0.5 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.638617 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.640299 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.640802 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.643668 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=20,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.643831 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.646289 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.646389 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.648294 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.648404 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.650283 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.650380 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.658667 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=16,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.658783 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.661289 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.661386 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.664291 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=44,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.664404 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.666289 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.666387 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.668663 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=28,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.668850 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.671284 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=12,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.671411 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.678038 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=32,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.678144 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.680296 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:08:02.680394 usbus0.5 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:08:02.681663 usbus0.5 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.899835 usbus0.5 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.900725 usbus0.5 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.900822 usbus0.5 SUBM-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.901733 usbus0.5 DONE-CTRL-EP=00000000,SPD=FULL,NFR=1,SLEN=0,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.918759 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.920837 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.921351 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.924208 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=20,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.924372 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.926830 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.926932 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.928822 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.928932 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.930819 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.930916 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.937950 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=16,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.938104 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 Aug 24 00:10:24 pi george: 00:10:22.939826 usbus0.5 DONE-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=4,IVAL=0,ERR=0 Aug 24 00:10:24 pi george: 00:10:22.939926 usbus0.5 SUBM-CTRL-EP=00000080,SPD=FULL,NFR=2,SLEN=8,IVAL=0 --------------060606030503080406090409-- From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 06:13:38 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 9E446605; Sat, 24 Aug 2013 06:13:38 +0000 (UTC) (envelope-from hps@bitfrost.no) Received: from mta.bitpro.no (mta.bitpro.no [92.42.64.202]) by mx1.freebsd.org (Postfix) with ESMTP id 56FB02DC9; Sat, 24 Aug 2013 06:13:38 +0000 (UTC) Received: from mail.lockless.no (mail.lockless.no [46.29.221.38]) by mta.bitpro.no (Postfix) with ESMTP id 2C1637A261; Sat, 24 Aug 2013 08:13:36 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by mail.lockless.no (Postfix) with ESMTP id BFE308F41FC; Sat, 24 Aug 2013 08:13:47 +0200 (CEST) X-Virus-Scanned: by amavisd-new-2.6.4 (20090625) (Debian) at lockless.no Received: from mail.lockless.no ([127.0.0.1]) by localhost (mail.lockless.no [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id O-sBjsbdhziC; Sat, 24 Aug 2013 08:13:47 +0200 (CEST) Received: from laptop015.hselasky.homeunix.org (cm-176.74.213.204.customer.telag.net [176.74.213.204]) by mail.lockless.no (Postfix) with ESMTPSA id E1DA78F41FB; Sat, 24 Aug 2013 08:13:46 +0200 (CEST) Message-ID: <52184F59.5080100@bitfrost.no> Date: Sat, 24 Aug 2013 08:14:49 +0200 From: Hans Petter Selasky Organization: Bitfrost A/S User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130522 Thunderbird/17.0.6 MIME-Version: 1.0 To: George Mitchell Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> <5216ACE5.7000500@m5p.com> <5216FE9F.2030608@bitfrost.no> <52174378.2020101@m5p.com> <521801E5.9000309@m5p.com> In-Reply-To: <521801E5.9000309@m5p.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 06:13:38 -0000 On 08/24/13 02:44, George Mitchell wrote: > On 08/23/13 07:11, George Mitchell wrote: >> On 08/23/13 02:18, Hans Petter Selasky wrote: >>> On 08/23/13 02:29, George Mitchell wrote: >>>> On 08/22/13 07:34, Hans Petter Selasky wrote: >>> > Give that the printer works fine with the same code on my amd64 > machines, does this suggest we have a byte-ordering problem in the > driver? -- George Hi, I looked at the code and your debug prints, and it looks like the usbd_transfer_setup() function is to blame. To get further debugging here, you need to enable hw.usb.debug=15 and hw.usb.dwcotg.debug=15 or something like that. error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, ulpt_config, ULPT_N_TRANSFER, sc, &sc->sc_mtx); I think this should be trivial to fix one the cause is found. --HPS From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 14:50:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 74F8E726 for ; Sat, 24 Aug 2013 14:50:04 +0000 (UTC) (envelope-from mailinglists@martinlaabs.de) Received: from relay04.alfahosting-server.de (relay04.alfahosting-server.de [109.237.142.240]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id F374221E0 for ; Sat, 24 Aug 2013 14:50:03 +0000 (UTC) Received: by relay04.alfahosting-server.de (Postfix, from userid 1001) id EB7EC32C006E; Sat, 24 Aug 2013 16:36:45 +0200 (CEST) X-Spam-DCC: : X-Spam-Level: X-Spam-Status: No, score=0.0 required=7.0 tests=BAYES_50 autolearn=disabled version=3.2.5 Received: from alfa3018.alfahosting-server.de (alfa3018.alfahosting-server.de [109.237.140.30]) by relay04.alfahosting-server.de (Postfix) with ESMTPS id 6E11832C0046 for ; Sat, 24 Aug 2013 16:36:44 +0200 (CEST) Received: from [192.168.1.55] (p54B3088C.dip0.t-ipconnect.de [84.179.8.140]) by alfa3018.alfahosting-server.de (Postfix) with ESMTPSA id 15165515DDA4 for ; Sat, 24 Aug 2013 16:36:43 +0200 (CEST) Message-ID: <5218C4FB.5050709@martinlaabs.de> Date: Sat, 24 Aug 2013 16:36:43 +0200 From: Martin Laabs User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130809 Thunderbird/17.0.8 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: ARM Deadlock - help debugging Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit X-Virus-Status: No X-Virus-Checker-Version: clamassassin 1.2.4 with ClamAV 0.97.3/17733/Sat Aug 24 12:44:29 2013 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 14:50:04 -0000 Hi, I think the problem with the hanging arm is a deadlock anywhere in the file system. Therefore I added the following into the kernel config file: options INVARIANTS options INVARIANT_SUPPORT options WITNESS options DEBUG_LOCKS options DEBUG_VFS_LOCKS options DIAGNOSTIC >From time to time I get the following output for dmesg: lock order reversal: 1st 0xc2fa0b74 ufs (ufs) @ /usr/home/martin/Rasperry/head/sys/kern/vfs_lookup.c :518 2nd 0xcc4f00d8 bufwait (bufwait) @ /usr/home/martin/Rasperry/head/sys/ufs/ffs/f fs_vnops.c:262 3rd 0xc30f28a4 ufs (ufs) @ /usr/home/martin/Rasperry/head/sys/kern/vfs_subr.c:2 099 KDB: stack backtrace: db_trace_self() at db_trace_self pc = 0xc0474e34 lr = 0xc012e444 (db_trace_self_wrapper+0x30) sp = 0xdc9e6410 fp = 0xdc9e6528 r10 = 0xc04f1881 db_trace_self_wrapper() at db_trace_self_wrapper+0x30 pc = 0xc012e444 lr = 0xc0276910 (kdb_backtrace+0x38) sp = 0xdc9e6530 fp = 0xdc9e6538 r4 = 0xc05c0964 r5 = 0xc04d4338 r6 = 0xc04dc976 r7 = 0xc04f1884 kdb_backtrace() at kdb_backtrace+0x38 pc = 0xc0276910 lr = 0xc0290e14 (witness_checkorder+0xddc) sp = 0xdc9e6540 fp = 0xdc9e6590 r4 = 0xc04c3234 witness_checkorder() at witness_checkorder+0xddc pc = 0xc0290e14 lr = 0xc0225424 (__lockmgr_args+0x698) sp = 0xdc9e6598 fp = 0xdc9e6600 r4 = 0x00080100 r5 = 0x00000833 r6 = 0xc30f28a4 r7 = 0x00080000 r8 = 0x00000100 r9 = 0xc30f2910 r10 = 0xc04dc973 __lockmgr_args() at __lockmgr_args+0x698 pc = 0xc0225424 lr = 0xc042de1c (ffs_lock+0x90) sp = 0xdc9e6608 fp = 0xdc9e6638 r4 = 0xdc9e6658 r5 = 0x00080100 r6 = 0xc30f2870 r7 = 0xc30f28a4 r8 = 0xc04f1af3 r9 = 0xc30f2910 r10 = 0x00000000 ffs_lock() at ffs_lock+0x90 pc = 0xc042de1c lr = 0xc0495ac0 (VOP_LOCK1_APV+0xd8) sp = 0xdc9e6640 fp = 0xdc9e6650 r4 = 0xdc9e6658 r5 = 0xc0594770 r6 = 0x00000000 r7 = 0x00080100 r8 = 0xc2f7f960 r9 = 0x00000833 r10 = 0xc04dc973 VOP_LOCK1_APV() at VOP_LOCK1_APV+0xd8 pc = 0xc0495ac0 lr = 0xc02f1d80 (_vn_lock+0x94) sp = 0xdc9e6658 fp = 0xdc9e6688 r4 = 0xc30f2870 r5 = 0x00000000 r6 = 0x00080100 _vn_lock() at _vn_lock+0x94 pc = 0xc02f1d80 lr = 0xc02e1b48 (vget+0x60) sp = 0xdc9e6690 fp = 0xdc9e66b0 r4 = 0xc30f2870 r5 = 0x00000000 r6 = 0x00080100 r7 = 0x00000000 r8 = 0xc2f7f960 r9 = 0xc04dbb75 r10 = 0x00000000 vget() at vget+0x60 pc = 0xc02e1b48 lr = 0xc02d6000 (vfs_hash_get+0xe4) sp = 0xdc9e66b8 fp = 0xdc9e66e8 r4 = 0xc2e0e2f8 r5 = 0x00000000 r6 = 0x0001d59d r7 = 0x00000000 r8 = 0xc30f2870 vfs_hash_get() at vfs_hash_get+0xe4 pc = 0xc02d6000 lr = 0xc0428e60 (ffs_vgetf+0x3c) sp = 0xdc9e66f0 fp = 0xdc9e6740 r4 = 0x0001d59d r5 = 0xc04ee444 r6 = 0xc30fd140 r7 = 0xdc9e67a8 r8 = 0xc30fd140 r9 = 0x00080000 r10 = 0xc2e0e2f8 ffs_vgetf() at ffs_vgetf+0x3c pc = 0xc0428e60 lr = 0xc0421ac4 (softdep_sync_buf+0x974) sp = 0xdc9e6748 fp = 0xdc9e67c8 r4 = 0x0001d59d r5 = 0xc04ee444 r6 = 0xc30fd140 r7 = 0xc04ee444 r8 = 0xc30fd140 r9 = 0x0000088b r10 = 0x0001d59d softdep_sync_buf() at softdep_sync_buf+0x974 pc = 0xc0421ac4 lr = 0xc042ec04 (ffs_syncvnode+0x2bc) sp = 0xdc9e67d0 fp = 0xdc9e6820 r4 = 0x00000000 r5 = 0x00000000 r6 = 0x00000400 r7 = 0xc2fa0b40 r8 = 0xc04f1881 r9 = 0xcc4f00d8 r10 = 0xcc4f0080 ffs_syncvnode() at ffs_syncvnode+0x2bc pc = 0xc042ec04 lr = 0xc0403f64 (ffs_truncate+0x790) sp = 0xdc9e6828 fp = 0xdc9e69d8 r4 = 0x00000000 r5 = 0xc2fa0b40 r6 = 0x00000200 r7 = 0xc2e17000 r8 = 0x00000000 r9 = 0x00000000 r10 = 0xc2fa0b40 ffs_truncate() at ffs_truncate+0x790 pc = 0xc0403f64 lr = 0xc0436414 (ufs_direnter+0x8a8) sp = 0xdc9e69e0 fp = 0xdc9e6a48 r4 = 0xc2fa0b40 r5 = 0x00000000 r6 = 0xc30f2870 r7 = 0xc2f9e700 r8 = 0x00000014 r9 = 0xc2fa0b40 r10 = 0xcd218134 ufs_direnter() at ufs_direnter+0x8a8 pc = 0xc0436414 lr = 0xc043f6d0 (ufs_makeinode+0x3f4) sp = 0xdc9e6a50 fp = 0xdc9e6bb0 r4 = 0xdc9e6a70 r5 = 0xc2f9d300 r6 = 0xdc9e6d40 r7 = 0x00000000 r8 = 0xc2fa0b40 r9 = 0xdc9e6d28 r10 = 0x000081a4 ufs_makeinode() at ufs_makeinode+0x3f4 pc = 0xc043f6d0 lr = 0xc043bb34 (ufs_create+0x24) sp = 0xdc9e6bb8 fp = 0xdc9e6bb8 r4 = 0xdc9e6c88 r5 = 0xc0594c90 r6 = 0x00000000 r7 = 0x00000602 r8 = 0x00000000 r9 = 0xdc9e6d28 r10 = 0xdc9e6d48 ufs_create() at ufs_create+0x24 pc = 0xc043bb34 lr = 0xc04934d4 (VOP_CREATE_APV+0xec) sp = 0xdc9e6bc0 fp = 0xdc9e6bd0 VOP_CREATE_APV() at VOP_CREATE_APV+0xec pc = 0xc04934d4 lr = 0xc02f1640 (vn_open_cred+0x268) sp = 0xdc9e6bd8 fp = 0xdc9e6cb8 r4 = 0xdc9e6ce8 r5 = 0xdc9e6d28 r6 = 0xc2fa0b40 vn_open_cred() at vn_open_cred+0x268 pc = 0xc02f1640 lr = 0xc02f13d0 (vn_open+0x24) sp = 0xdc9e6cc0 fp = 0xdc9e6cc8 r4 = 0xc2f7f960 r5 = 0xdc9e6d10 r6 = 0xc2decc00 r7 = 0xdc9e6ce8 r8 = 0x00000012 r9 = 0x00000000 r10 = 0x00000000 vn_open() at vn_open+0x24 pc = 0xc02f13d0 lr = 0xc02ea9f8 (kern_openat+0x1a4) sp = 0xdc9e6cd0 fp = 0xdc9e6da8 kern_openat() at kern_openat+0x1a4 pc = 0xc02ea9f8 lr = 0xc02ea7e8 (sys_open+0x28) sp = 0xdc9e6db0 fp = 0xdc9e6db8 r4 = 0xc2f7f960 r5 = 0x00000000 r6 = 0x2092e2ec r7 = 0x00000000 r8 = 0xdc9e6e10 r9 = 0xc2df6320 r10 = 0x00000001 sys_open() at sys_open+0x28 pc = 0xc02ea7e8 lr = 0xc0484c44 (swi_handler+0x284) sp = 0xdc9e6dc0 fp = 0xdc9e6e58 swi_handler() at swi_handler+0x284 pc = 0xc0484c44 lr = 0xc0476490 (swi_entry+0x2c) sp = 0xdc9e6e60 fp = 0xbfffe310 r4 = 0x2091a330 r5 = 0x2083d138 r6 = 0x2092e2ec r7 = 0x00000005 r8 = 0x00000001 r9 = 0x00000000 swi_entry() at swi_entry+0x2c pc = 0xc0476490 lr = 0xc0476490 (swi_entry+0x2c) sp = 0xdc9e6e60 fp = 0xbfffe310 Since I am not familiar with the FreeBSD kernel internals I would like to know if this is something I should try to investigate further. Thank you, Martin PS: Is it possible to display the dmesg continuously like you can have a look to logfiles with tail -f? From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 18:21:17 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 53790277; Sat, 24 Aug 2013 18:21:17 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E54062C45; Sat, 24 Aug 2013 18:21:16 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7OIL73L071830; Sat, 24 Aug 2013 14:21:13 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <5218F993.9050504@m5p.com> Date: Sat, 24 Aug 2013 14:21:07 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: Hans Petter Selasky Subject: Re: ulpt can't attach Lexmark E120 References: <5105527F.3010708@m5p.com> <201301271915.47712.hselasky@c2i.net> <510570C1.1060607@m5p.com> <201301272007.30682.hselasky@c2i.net> <5105AB16.2000607@m5p.com> <5215F4DF.6000305@m5p.com> <5215F743.8060403@bitfrost.no> <5216ACE5.7000500@m5p.com> <5216FE9F.2030608@bitfrost.no> <52174378.2020101@m5p.com> <521801E5.9000309@m5p.com> <52184F59.5080100@bitfrost.no> In-Reply-To: <52184F59.5080100@bitfrost.no> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Sat, 24 Aug 2013 14:21:13 -0400 (EDT) Cc: freebsd-arm@freebsd.org, freebsd-current@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 18:21:17 -0000 On 08/24/13 02:14, Hans Petter Selasky wrote: > On 08/24/13 02:44, George Mitchell wrote: >> On 08/23/13 07:11, George Mitchell wrote: >>> On 08/23/13 02:18, Hans Petter Selasky wrote: >>>> On 08/23/13 02:29, George Mitchell wrote: >>>>> On 08/22/13 07:34, Hans Petter Selasky wrote: >>>> > >> Give that the printer works fine with the same code on my amd64 >> machines, does this suggest we have a byte-ordering problem in the >> driver? -- George > > Hi, > > I looked at the code and your debug prints, and it looks like the > usbd_transfer_setup() function is to blame. To get further debugging > here, you need to enable hw.usb.debug=15 and hw.usb.dwcotg.debug=15 or > something like that. > > error = usbd_transfer_setup(uaa->device, &iface_index, > sc->sc_xfer, ulpt_config, ULPT_N_TRANSFER, > sc, &sc->sc_mtx); > > I think this should be trivial to fix one the cause is found. > > --HPS Setting hw.usb.dwc_otg.debug to any value greater than 0 generates an unending stream of debug output and effectively locks up the chip scrolling the output on the display. Perhaps there are some specific debug messages I could put in ... -- George From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 18:31:05 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id AF53F61D for ; Sat, 24 Aug 2013 18:31:05 +0000 (UTC) (envelope-from george+freebsd@m5p.com) Received: from mailhost.m5p.com (ip-2-1-0-2.r03.asbnva02.us.ce.gin.ntt.net [IPv6:2001:418:0:5000::16]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 69D4C2CC7 for ; Sat, 24 Aug 2013 18:31:05 +0000 (UTC) Received: from wonderland.m5p.com (localhost [IPv6:::1]) by mailhost.m5p.com (8.14.5/8.14.5) with ESMTP id r7OIUwU6071871 for ; Sat, 24 Aug 2013 14:31:03 -0400 (EDT) (envelope-from george+freebsd@m5p.com) Message-ID: <5218FBE2.2000907@m5p.com> Date: Sat, 24 Aug 2013 14:30:58 -0400 From: George Mitchell User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:17.0) Gecko/20130716 Thunderbird/17.0.7 MIME-Version: 1.0 To: freebsd-arm@freebsd.org Subject: Pretty good RPi version? Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Scanned-By: MIMEDefang 2.73 on 10.100.0.3 X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.2.7 (mailhost.m5p.com [IPv6:::1]); Sat, 24 Aug 2013 14:31:04 -0400 (EDT) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 18:31:05 -0000 What's a pretty good recent Raspberry Pi svn checkout version? 254544 doesn't seem to be it -- it crashes as soon as I try to make install in /usr/ports/ports-mgmt/pkg. Although I'm tempted to grab one of the prebuilt images at http://www.db.net/downloads/, I'll have to be doing some recompiling for debug purposes. I see that latest couple of versions there are 252209 and 250580. Are those pretty good? (By "pretty good", I mean capable of running a light load in a fairly stable way over a period of days.) Thanks for your help! -- George From owner-freebsd-arm@FreeBSD.ORG Sat Aug 24 21:13:28 2013 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id 1E3CA4F7; Sat, 24 Aug 2013 21:13:28 +0000 (UTC) (envelope-from tinderbox@freebsd.org) Received: from freebsd-current.sentex.ca (freebsd-current.sentex.ca [64.7.128.98]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D8B8323C1; Sat, 24 Aug 2013 21:13:27 +0000 (UTC) Received: from freebsd-current.sentex.ca (localhost [127.0.0.1]) by freebsd-current.sentex.ca (8.14.5/8.14.5) with ESMTP id r7OLDQWL035014; Sat, 24 Aug 2013 17:13:26 -0400 (EDT) (envelope-from tinderbox@freebsd.org) Received: (from tinderbox@localhost) by freebsd-current.sentex.ca (8.14.5/8.14.5/Submit) id r7OLDQqV035007; Sat, 24 Aug 2013 21:13:26 GMT (envelope-from tinderbox@freebsd.org) Date: Sat, 24 Aug 2013 21:13:26 GMT Message-Id: <201308242113.r7OLDQqV035007@freebsd-current.sentex.ca> X-Authentication-Warning: freebsd-current.sentex.ca: tinderbox set sender to FreeBSD Tinderbox using -f Sender: FreeBSD Tinderbox From: FreeBSD Tinderbox To: FreeBSD Tinderbox , , Subject: [head tinderbox] failure on arm/arm Precedence: bulk X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 24 Aug 2013 21:13:28 -0000 TB --- 2013-08-24 18:00:20 - tinderbox 2.10 running on freebsd-current.sentex.ca TB --- 2013-08-24 18:00:20 - FreeBSD freebsd-current.sentex.ca 8.3-PRERELEASE FreeBSD 8.3-PRERELEASE #0: Mon Mar 26 13:54:12 EDT 2012 des@freebsd-current.sentex.ca:/usr/obj/usr/src/sys/GENERIC amd64 TB --- 2013-08-24 18:00:20 - starting HEAD tinderbox run for arm/arm TB --- 2013-08-24 18:00:20 - cleaning the object tree TB --- 2013-08-24 18:00:20 - /usr/local/bin/svn stat /src TB --- 2013-08-24 18:00:25 - At svn revision 254801 TB --- 2013-08-24 18:00:26 - building world TB --- 2013-08-24 18:00:26 - CROSS_BUILD_TESTING=YES TB --- 2013-08-24 18:00:26 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-24 18:00:26 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-24 18:00:26 - SRCCONF=/dev/null TB --- 2013-08-24 18:00:26 - TARGET=arm TB --- 2013-08-24 18:00:26 - TARGET_ARCH=arm TB --- 2013-08-24 18:00:26 - TZ=UTC TB --- 2013-08-24 18:00:26 - __MAKE_CONF=/dev/null TB --- 2013-08-24 18:00:26 - cd /src TB --- 2013-08-24 18:00:26 - /usr/bin/make -B buildworld >>> Building an up-to-date make(1) >>> World build started on Sat Aug 24 18:00:32 UTC 2013 >>> Rebuilding the temporary build tree >>> stage 1.1: legacy release compatibility shims >>> stage 1.2: bootstrap tools >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3: cross tools >>> stage 4.1: building includes >>> stage 4.2: building libraries >>> stage 4.3: make dependencies >>> stage 4.4: building everything >>> World build completed on Sat Aug 24 21:01:43 UTC 2013 TB --- 2013-08-24 21:01:43 - generating LINT kernel config TB --- 2013-08-24 21:01:43 - cd /src/sys/arm/conf TB --- 2013-08-24 21:01:43 - /usr/bin/make -B LINT TB --- 2013-08-24 21:01:43 - cd /src/sys/arm/conf TB --- 2013-08-24 21:01:43 - /usr/sbin/config -m LINT TB --- 2013-08-24 21:01:43 - building LINT kernel TB --- 2013-08-24 21:01:43 - CROSS_BUILD_TESTING=YES TB --- 2013-08-24 21:01:43 - MAKEOBJDIRPREFIX=/obj TB --- 2013-08-24 21:01:43 - PATH=/usr/bin:/usr/sbin:/bin:/sbin TB --- 2013-08-24 21:01:43 - SRCCONF=/dev/null TB --- 2013-08-24 21:01:43 - TARGET=arm TB --- 2013-08-24 21:01:43 - TARGET_ARCH=arm TB --- 2013-08-24 21:01:43 - TZ=UTC TB --- 2013-08-24 21:01:43 - __MAKE_CONF=/dev/null TB --- 2013-08-24 21:01:43 - cd /src TB --- 2013-08-24 21:01:43 - /usr/bin/make -B buildkernel KERNCONF=LINT >>> Kernel build for LINT started on Sat Aug 24 21:01:43 UTC 2013 >>> stage 1: configuring the kernel >>> stage 2.1: cleaning up the object tree >>> stage 2.2: rebuilding the object tree >>> stage 2.3: build tools >>> stage 3.1: making dependencies >>> stage 3.2: building everything [...] ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /src/sys/sys/mbuf.h:687:50: note: expanded from macro 'MEXTADD' (void )m_extadd((m), (caddr_t)(buf), (size), (free), (arg1), (arg2),\ ^~~~~~ /src/sys/sys/mbuf.h:825:14: note: passing argument to parameter here void (*)(struct mbuf *, void *, void *), void *, void *, ^ 1 error generated. *** Error code 1 Stop. bmake[1]: stopped in /obj/arm.arm/src/sys/LINT *** Error code 1 Stop. bmake: stopped in /src *** Error code 1 Stop in /src. TB --- 2013-08-24 21:13:26 - WARNING: /usr/bin/make returned exit code 1 TB --- 2013-08-24 21:13:26 - ERROR: failed to build LINT kernel TB --- 2013-08-24 21:13:26 - 9180.51 user 1654.37 system 11585.92 real http://tinderbox.freebsd.org/tinderbox-head-build-HEAD-arm-arm.full