From owner-freebsd-ppc@freebsd.org Sun Dec 4 02:54:11 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 3247FC66267 for ; Sun, 4 Dec 2016 02:54:11 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-4.reflexion.net [208.70.210.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id DA60C1C8F for ; Sun, 4 Dec 2016 02:54:10 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 16975 invoked from network); 4 Dec 2016 02:54:03 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 4 Dec 2016 02:54:03 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Sat, 03 Dec 2016 21:54:14 -0500 (EST) Received: (qmail 14088 invoked from network); 4 Dec 2016 02:54:14 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 4 Dec 2016 02:54:14 -0000 Received: from [192.168.1.106] (c-76-115-7-162.hsd1.or.comcast.net [76.115.7.162]) by iron2.pdx.net (Postfix) with ESMTPSA id DD783EC8AF4; Sat, 3 Dec 2016 18:54:02 -0800 (PST) From: Mark Millard Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: head -r309179 powerpc64 WITH_LIB32= buildworld only works on powerpc64, not on cross build from amd64 Message-Id: Date: Sat, 3 Dec 2016 18:54:02 -0800 Cc: Justin Hibbits , Kevin Bowling , Roman Divacky To: Dimitry Andric , FreeBSD Toolchain , FreeBSD PowerPC ML X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Dec 2016 02:54:11 -0000 I just discovered that, even though I could not build WITH_LIB32=3D for TARGET_ARCH=3Dpowerpc64 from amd64, after booting the cross built system I was able to buildworld using WITH_LIB32=3D based on the SRC_ENV_CONF that I list later. Installing, booting, and testing it works: # ldd32 /usr/lib32/libgcc_s.so.1=20 /usr/lib32/libgcc_s.so.1: libc.so.7 =3D> /usr/lib32/libc.so.7 (0x41841000) # file `which ldd32` /usr/bin/ldd32: ELF 32-bit MSB executable, PowerPC or cisco 4500, = version 1 (FreeBSD), dynamically linked, interpreter = /libexec/ld-elf.so.1, for FreeBSD 12.0 (1200017), FreeBSD-style, = stripped The blocking issue on amd64's cross build was rejection of assembler notation used in lib32's build. Turns out from the message text details that the compiler was in either the ATT or the Intel instruction set parsing code when it rejected the notation. I have submitted a bugzilla report for this: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D215037 Supporting details for the on powerpc64 build: -r416639 devel/binutils -r407342 devel/powerpc-binutils (slave port so tracks devel/binutils in various ways) (The above avoids 2.47 vintages.) # head = ~/sys_typescripts/typescript_make_powerpc64vtsc_nodebug_clang_altbinutils_= world-powerpc64-host-2016-12-03:17:42:59=20 Script started on Sat Dec 3 17:42:59 2016 Command: env __MAKE_CONF=3D/root/src.configs/make.conf SRCCONF=3D/dev/null= = SRC_ENV_CONF=3D/root/src.configs/src.conf.powerpc64-clang_altbinutils.powe= rpc64-host WITH_META_MODE=3Dyes = MAKEOBJDIRPREFIX=3D/usr/obj/powerpc64vtsc_clang_altbinutils_world/powerpc.= powerpc64 make -j 5 buildworld . . . # more = /root/src.configs/src.conf.powerpc64-clang_altbinutils.powerpc64-host TO_TYPE=3Dpowerpc64 TOOLS_TO_TYPE=3D${TO_TYPE} VERSION_CONTEXT=3D12.0 # KERNCONF=3DGENERIC64vtsc-NODBG TARGET=3Dpowerpc .if ${.MAKE.LEVEL} =3D=3D 0 TARGET_ARCH=3D${TO_TYPE} .export TARGET_ARCH .endif # WITHOUT_CROSS_COMPILER=3D WITH_SYSTEM_COMPILER=3D # WITH_LIBCPLUSPLUS=3D WITHOUT_BINUTILS_BOOTSTRAP=3D WITH_CLANG_BOOTSTRAP=3D WITH_CLANG=3D WITH_CLANG_IS_CC=3D WITH_CLANG_FULL=3D WITH_CLANG_EXTRAS=3D WITH_LLDB=3D # WITH_BOOT=3D WITH_LIB32=3D # WITHOUT_ELFTOOLCHAIN_BOOTSTRAP=3D WITHOUT_GCC_BOOTSTRAP=3D WITHOUT_GCC=3D WITHOUT_GCC_IS_CC=3D WITHOUT_GNUCXX=3D # NO_WERROR=3D #WERROR=3D MALLOC_PRODUCTION=3D # WITH_DEBUG_FILES=3D # CROSS_BINUTILS_PREFIX=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/ .if ${.MAKE.LEVEL} =3D=3D 0 CC=3D/usr/bin/clang -B ${CROSS_BINUTILS_PREFIX} CXX=3D/usr/bin/clang++ -B ${CROSS_BINUTILS_PREFIX} CPP=3D/usr/bin/clang-cpp -B ${CROSS_BINUTILS_PREFIX} .export CC .export CXX .export CPP AS=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/as AR=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/ar LD=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/ld NM=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/nm OBJCOPY=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/objcopy OBJDUMP=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/objdump RANLIB=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/ranlib XSIZE=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/size #NO-SUCH: STRINGS=3D/usr/local/${TOOLS_TO_TYPE}-freebsd/bin/strings STRINGS=3D/usr/local/bin/${TOOLS_TO_TYPE}-freebsd-strings .export AS .export AR .export LD .export NM .export OBJCOPY .export OBJDUMP .export RANLIB .export SIZE .export STRINGS .endif =3D=3D=3D Mark Millard markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Sun Dec 4 04:36:00 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0FCC3C666C2 for ; Sun, 4 Dec 2016 04:36:00 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-5.reflexion.net [208.70.210.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B85371719 for ; Sun, 4 Dec 2016 04:35:58 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 18186 invoked from network); 4 Dec 2016 04:35:58 -0000 Received: from unknown (HELO mail-cs-02.app.dca.reflexion.local) (10.81.19.2) by 0 (rfx-qmail) with SMTP; 4 Dec 2016 04:35:58 -0000 Received: by mail-cs-02.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Sat, 03 Dec 2016 23:35:59 -0500 (EST) Received: (qmail 13855 invoked from network); 4 Dec 2016 04:35:59 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 4 Dec 2016 04:35:59 -0000 Received: from [192.168.1.106] (c-76-115-7-162.hsd1.or.comcast.net [76.115.7.162]) by iron2.pdx.net (Postfix) with ESMTPSA id 3703BEC9143; Sat, 3 Dec 2016 20:35:51 -0800 (PST) From: Mark Millard Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-Id: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> Date: Sat, 3 Dec 2016 20:35:50 -0800 Cc: FreeBSD PowerPC ML , FreeBSD Toolchain To: Justin Hibbits X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Dec 2016 04:36:00 -0000 [Note: At present I can buildworld using WITH_LIB32=3D on powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a minor variant of head -r309179 . That does not work for amd64 cross compiling to powerpc64 due to assembler notation rejections.] When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's clang 3.9.0 I get the following sorts of error reports, *even building on powerpc64* : --- hwpmc_e500.o --- /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 3,400 ^ . . . When I look up these instructions I find that they are not classic powerpc instructions: ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) > Whereas the classic architecture defines special-purpose registers = (SPRs) and > two instructions to access them (Move to Special-Purpose Register = (mtspr) and > Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines > optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and > the EIS-defined performance monitor APU defines performance monitor = registers > (PMRs) and mtpmr and mfpmr instructions, all based on models provided = by the > UISA. . . . Does this imply that clang 3.9.0 needs to support more instructions when it is targeting FreeBSD for GENERIC64 based builds? (I include GENERIC64 and then override some items for my build activity.) If yes, then someone probably needs to make a list of what instructions need to be present and have someone submit the list into llvm's bugzilla and have the submittal listed in: [META] Using Clang as the FreeBSD/ppc system compiler (25780). If GENERIC64 does not need the likes of hwpmc_e500.o built then some work on the build environment to avoid GENERIC64 including things with non-classic instruction use would appear to be needed. (No llvm involvement for this case.) I doubt this is the case as it would seem that the problem would reoccur when alternate KERNCONF's were in use instead that do require something like of hwpmc_e500.o to be built. Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about this issue from the FreeBSD side of things. I just noticed the status of the specific instructions involved and also that the cross-build and on-powerpc64 build get the same result (unlike the recent WITH_LIB32=3D discovery). =3D=3D=3D Mark Millard markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Sun Dec 4 07:31:41 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id DAF01C66EF2 for ; Sun, 4 Dec 2016 07:31:41 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-6.reflexion.net [208.70.210.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8D49B1EE for ; Sun, 4 Dec 2016 07:31:41 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 18274 invoked from network); 4 Dec 2016 07:31:39 -0000 Received: from unknown (HELO rtc-sm-01.app.dca.reflexion.local) (10.81.150.1) by 0 (rfx-qmail) with SMTP; 4 Dec 2016 07:31:39 -0000 Received: by rtc-sm-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Sun, 04 Dec 2016 02:31:39 -0500 (EST) Received: (qmail 12799 invoked from network); 4 Dec 2016 07:31:39 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 4 Dec 2016 07:31:39 -0000 Received: from [192.168.1.106] (c-76-115-7-162.hsd1.or.comcast.net [76.115.7.162]) by iron2.pdx.net (Postfix) with ESMTPSA id DE4D0EC8AF4; Sat, 3 Dec 2016 23:31:38 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: WITH_LLVM_LIBUNWIND vs. WITHOUT_LLVM_LIBUNWIND [ WITH_LLVM_LIBUNWIND= based buildworld fails on powerpc64 for TARGET_ARCH=powerpc64 ] From: Mark Millard In-Reply-To: Date: Sat, 3 Dec 2016 23:31:38 -0800 Cc: FreeBSD Toolchain , FreeBSD PowerPC ML , Dimitry Andric Content-Transfer-Encoding: 7bit Message-Id: <09B0D6F7-F2F3-4AA3-9EE6-5D51655549BE@dsl-only.net> References: <750FCE4D-F25B-46E1-9383-B8A94AAA8792@dsl-only.net> To: Ed Maste X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Dec 2016 07:31:42 -0000 On 2016-Nov-29, at 2:56 PM, Ed Maste wrote: > On 29 November 2016 at 16:46, Mark Millard wrote: >> >> >> Summary: Does using clang 3.9.0 as the system compiler imply one should or >> must (eventually?) use WITH_LLVM_LIBUNWIND to have C++ exceptions work? >> >> Do WITH_LLVM_LIBUNWIND and WITHOUT_LLVM_LIBUNWIND have the same criteria >> for what dwarfdump should show for the exception information (if the >> information to be shown is to be correct/sufficient for libunwind)? > > It does not. It should be possible to build a functional system both > WITH_ and WITHOUT_LLVM_LIBUNWIND. The compiler is unaware of the > _LLVM_LIBUNWIND setting. Both unwind libraries use the same unwind > data. > > Eventually new features may show up in Clang and LLVM's libunwind (and > new versions of GNU's unwinder) that won't work with the old unwinder. > >> Your answer's detail might indicate that I've misdirected the llvm folks >> in submittals like https://llvm.org/bugs/show_bug.cgi?id=26844 . >> >> There is also the question of if/when llvm's libunwind is ready to be used >> for powerpc64 or powerpc (or . . .) if there are architecture specifics >> involved. That answer might determine when C++ exceptions work (and so >> when devel/kyua might have a chance to work) and is sort of separate from >> the main question here but is still of interest overall. >> >> Should powerpc64 and powerpc clang 3.9.0 testing be using >> WITH_LLVM_LIBUNWIND ? WITHOUT_LLVM_LIBUNWIND ? Both? > > For testing I think WITH_LLVM_LIBUNWIND is the interesting case. My > eventual goal is to have a functioning Clang, LLD, LLDB, libunwind, > and ELF Tool Chain on all of our supported architectures. I tried adding WITH_LLVM_LIBUNWIND= to the SRC_CONF_ENV file that I use on powerpc64 for TARGET_ARCH=powerpc64 for (a minor variation of) head -r309179 based on clang 3.9.0. It failed to complete buildworld: A) An assert failed in libunwind/src/UnwindCursor.hpp . B) Two .S files got massive numbers of error messages ( libgcc_eh/UnwindRegisterRestore.S and libgcc_eh/UnwindRegisterSave.S ) And those points stopped the build. See: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=215039 Note: using WITHOUT_LLVM_LIBUNWIND= (implicit) I've done buildworld using WITH_LIB32= just fine and rebooted with it installed and then did more buildworld experiments. The above started from a working environment for such things. Unfortunately for gcc's libunwind clang's code generation is broken (counting .eh dwarf information as code). C++ exceptions are one area that does not even do simple things correctly for powerpc64 (or for powerpc): I have to avoid using programs that depend on C++ exceptions happening. === Mark Millard markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Mon Dec 5 08:33:02 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B55CBC6614B for ; Mon, 5 Dec 2016 08:33:02 +0000 (UTC) (envelope-from andy.silva@snsresearchreports.com) Received: from mailer238.gate85.rs.smtp.com (mailer238.gate85.rs.smtp.com [74.91.85.238]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7481B2CE for ; Mon, 5 Dec 2016 08:33:01 +0000 (UTC) (envelope-from andy.silva@snsresearchreports.com) X-MSFBL: ZuBM1Iqt3HEQiOeE3wSOusAIjBRcfH73ePoVs5+c96E=|eyJiIjoiNzRfOTFfODV fMjM4IiwiciI6ImZyZWVic2QtcHBjQGZyZWVic2Qub3JnIiwiZyI6IlNuc3RlbGV jb21fZGVkaWNhdGVkX3Bvb2wifQ== Received: from [192.168.80.22] ([192.168.80.22:56586] helo=rs-ord-mta02-in2.smtp.com) by rs-ord-mta03-4.smtp.com (envelope-from ) (ecelerity 4.2.1.55028 r(Core:4.2.1.12)) with ESMTP id 15/08-22704-D2625485; Mon, 05 Dec 2016 08:32:45 +0000 DKIM-Signature: v=1; a=rsa-sha256; d=smtp.com; s=smtpcomcustomers; c=relaxed/simple; q=dns/txt; i=@smtp.com; t=1480926765; h=From:Subject:To:Date:MIME-Version:Content-Type; bh=AE+xNCgt02G+h1Laxwjbt4c8yU5DC+o6ixcE8GpH04c=; b=oxaromm3nWGtvkmRXjid+BNi/dcNBlSa3aDmoV7ySz7oHUwvX6MtBHbbzdvd4bR8 jMasdezgedhMrWtzmdcgbgjmiAJ3hFacgQJY2SQ2AMkOZKw3mO1V6X/rAZtPrngg APfgnz+JaCgKHyQG94SUVqO8Zc00sTq/AkM1W52YQsA=; Received: from [70.79.69.78] ([70.79.69.78:46144] helo=S01061c1b689e28c7.vc.shawcable.net) by rs-ord-mta02-in2.smtp.com (envelope-from ) (ecelerity 4.1.0.46749 r(Core:4.1.0.4)) with ESMTPA id AB/9E-21992-D2625485; Mon, 05 Dec 2016 08:32:45 +0000 MIME-Version: 1.0 From: "Andy Silva" Reply-To: andy.silva@snsresearchreports.com To: freebsd-ppc@freebsd.org Subject: The LPWA (Low Power Wide Area) Networks Ecosystem: 2017 - 2030 - Opportunities, Challenges, Strategies, Industry Verticals & Forecasts (Report) X-Mailer: Smart_Send_2_0_138 Date: Mon, 5 Dec 2016 00:32:38 -0800 Message-ID: <31764235274402187017633@Ankur> X-Report-Abuse: SMTP.com is an email service provider. Our abuse team cares about your feedback. Please contact abuse@smtp.com for further investigation. X-SMTPCOM-Tracking-Number: ff80a8f0-5833-4e6e-b5a8-dc291c0b12ab X-SMTPCOM-Sender-ID: 6008902 Feedback-ID: 6008902:SMTPCOM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.23 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Dec 2016 08:33:02 -0000 The LPWA (Low Power Wide Area) Networks Ecosystem: 2017 =96 2030 =96 Opport= unities, Challenges, Strategies, Industry Verticals & Forecasts (Report) Hello Let me offer you the latest SNS Research report to you and your team, "The = LPWA (Low Power Wide Area) Networks Ecosystem: 2017 =96 2030 =96 Opportunit= ies, Challenges, Strategies, Industry Verticals & Forecasts" Below is the r= eport highlight and if you like I can send you sample pages for your detail= s inside.=20 LPWA networks are optimized to provide wide area coverage with minimal powe= r consumption. Typically reliant on unlicensed frequencies, LPWA profile Io= T devices have low data rates, long battery lives and can operate unattende= d for long periods of time. Licensed LPWA technologies such as NB-IoT and L= TE Cat-M1 are also beginning to gain traction. Already prevalent in IoT applications such as smart metering, lighting cont= rol and parking management, LPWA networks are expected to make a significan= t contribution to the M2M and IoT ecosystem, with an estimated $23 Billion = in service revenue by 2020. Report Information: Release Date: Nov 2016 Number of Pages: 239 Number of Tables and Figures: 63 Key Questions Answered: How big is the LPWA networks opportunity=3F What trends, challenges and barriers are influencing its growth=3F How is the ecosystem evolving by segment and region=3F What will the market size be in 2020 and at what rate will it grow=3F Which regions and submarkets will see the highest percentage of growth=3F How are smart city initiatives driving LPWA network investments=3F What are the key performance characteristics of LPWA technologies such as S= igfox, LoRa, NB-IoT, LTE Cat-M1 and EC-GSM-IoT=3F How does regulation impact the adoption of LPWA networks=3F Do cellular LPWA networks pose a threat to proprietary LPWA technologies=3F Who are the key market players and what are their strategies=3F What strategies should LPWA technology providers, mobile operators, MVNOs, = aggregators, IoT platform providers and other ecosystem players adopt to re= main competitive=3F Key Findings: The report has the following key findings: Already prevalent in IoT applications such as smart metering, lighting cont= rol and parking management, LPWA networks are expected to make a significan= t contribution to the M2M and IoT ecosystem, with an estimated $23 Billion = in service revenue by 2020. At present, a majority of LPWA networks are based on proprietary technologi= es and operate in license-exempt spectrum primarily in sub-GHz bands. With the recent completion of the NB-IoT, LTE Cat-M1 and EC-GSM-IoT standar= ds by the 3GPP, mobile operators are aggressively investing in software upg= rades to build their own carrier-grade LPWA networks. By 2020, SNS Research estimates that more than 35% of all LPWA profile IoT = devices will be served by NB-IoT, LTE Cat-M1 and EC-GSM-IoT networks. As of Q4=922016, SNS Research estimates the cost of a typical LPWA module t= o be $4-18, depending on the specific technology. As LPWA network deploymen= ts mature, we expect that the cost per module can drop down to as low as $1= -2 in volume quantities. The report covers the following topics: LPWA networks ecosystem Market drivers and barriers LPWA technologies, spectrum bands and key trends Assessment of competing cellular, satellite, wireline and short range netwo= rking technologies Vertical market applications, opportunities and deployment case studies Regulatory landscape and standardization Industry roadmap and value chain Profiles and strategies of over 100 leading ecosystem players Strategic recommendations for ecosystem players Market analysis and forecasts from 2017 till 2030 Forecast Segmentation: VoLTE subscription, service revenue and infrastructure revenue forecasts ar= e provided for each of the following submarkets and their subcategories: Technology Submarkets Proprietary LPWA Technologies NB-IoT (Narrowband Internet of Things) LTE Cat-M1 (eMTC/LTE-M) EC-GSM-IoT (Enhanced Coverage GSM for the Internet of Things) Vertical Markets Agriculture Asset Management & Logistics Automotive & Transportation Consumer Applications & Home Automation Energy & Utilities Healthcare Intelligent Buildings & Infrastructure Public Safety, Security & Surveillance Retail & Vending Others Regional Markets Asia Pacific Eastern Europe Middle East & Africa Latin & Central America North America Western Europe Report Pricing: =20 Single User License: USD 2,500 Company Wide License: USD 3,500 =20 Ordering Process: =20 Please provide the following information: Report Title - Report License - (Single User/Company Wide) Name - Email - Job Title - Company - Invoice Address - Please contact me if you have any questions, or wish to purchase a copy. Ta= ble of contents and List of figures mentioned in report are given below for= more inside. I look forward to hearing from you. =20 Kind Regards =20 Andy Silva Marketing Executive Signals and Systems Telecom andy.silva@snsresearchreports.com =20 _________________________________________________________________________ Table of Contents: =20 Chapter 1: Introduction 1.1 Executive Summary 1.2 Topics Covered 1.3 Forecast Segmentation 1.4 Key Questions Answered 1.5 Key Findings 1.6 Methodology 1.7 Target Audience 1.8 Companies & Organizations Mentioned =20 Chapter 2: An Overview of LPWA Networks 2.1 M2M Networks & the IoT Vision 2.1.1 What is M2M Technology=3F 2.1.2 The IoT Vision 2.1.3 M2M & IoT Architecture 2.2 The Limitations of Traditional M2M Networking Technologies 2.3 What are LPWA Networks=3F 2.4 Key Characteristics of LPWA Networks 2.4.1 Long Range & Strong Propagation 2.4.2 Star Network Topology 2.4.3 Low Data Rates 2.4.4 Low Power Consumption 2.4.5 Battery Life Requirements 2.4.6 Scalability 2.4.7 Low Cost Modules & Infrastructure 2.4.8 Supplementary Features 2.5 Market Growth Drivers 2.5.1 Addressing Low Throughput IoT Use Cases 2.5.2 Cost Saving Potential 2.5.3 Energy Saving: Towards Green IoT Networks 2.5.4 The 2G Sunset 2.5.5 Regulatory Initiatives & Mandates 2.5.6 Interest from Vertical Markets 2.5.7 Commitments by Industry Giants 2.6 Market Barriers 2.6.1 Lack of Standardization 2.6.2 Interference Concerns 2.6.3 Low Revenue per Connection 2.6.4 Integration Complexities =20 Chapter 3: LPWA Networking Technologies 3.1 UNB (Ultra Narrow Band) 3.1.1 Sigfox 3.1.2 Telensa 3.2 LoRa Alliance 3.2.1 Semtech=92s LoRA RF Platform 3.2.2 LoRaWAN 3.2.3 Link Labs=92 Symphony Link 3.3 Weightless SIG 3.3.1 Weightless-W 3.3.2 Weightless-N 3.3.3 Weightless-P 3.4 Ingenu=92s RPMA (Random Phase Multiple Access) 3.5 Xylem's FlexNet 3.6 Aclara's Synergize 3.7 Standardized 3GPP Technologies 3.7.1 LTE Cat-M1 3.7.2 NB-IoT (Narrow Band Internet of Things) 3.7.3 EC-GSM-IoT (Extended Coverage GSM for the Internet of Things) 3.7.4 Key Enhancements & Simplifications to Enable LPWA Operation 3.7.5 The Future: 5G NB-IoT 3.8 IEEE 802.11 ah & af 3.9 Spectrum Options for LPWA Networks 3.9.1 ISM (Industrial, Scientific, and Medical Radio) Bands 3.9.2 TVWS (TV White Spaces) 3.9.3 Licensed Spectrum 3.10 Competing M2M Networking Technologies 3.10.1 Conventional Cellular Technologies 3.10.1.1 2G & 3G 3.10.1.2 LTE 3.10.1.3 5G 3.10.2 Satellite Communications 3.10.3 Wireline Networks 3.10.4 Short Range Networks 3.10.4.1 Wi-Fi 3.10.4.2 Bluetooth 3.10.4.3 ZigBee 3.10.5 Others =20 Chapter 4: Vertical Market Applications, Opportunities & Case Studies 4.1 Agriculture 4.1.1 Precision Agriculture 4.1.2 Livestock Management 4.1.3 Agricultural Equipment Monitoring 4.2 Asset Management & Logistics 4.2.1 Maintaining Real-Time Asset Inventories 4.2.2 Supply Chain Visibility 4.2.3 Tracking Containers & Goods 4.2.4 Monitoring of Shipment Conditions 4.2.5 Other Applications 4.3 Automotive & Transportation 4.3.1 Tracking & Location Services 4.3.2 Remote Vehicle Management 4.3.3 Safety & Security 4.3.4 Other Applications 4.4 Consumer Applications & Home Automation 4.4.1 Wide Area Tracking 4.4.2 Sports & Fitness 4.4.3 Smart Homes & Intelligent Appliances 4.5 Energy & Utilities 4.5.1 Smart Metering 4.5.2 Applications in the Oil & Gas Sector 4.6 Healthcare 4.6.1 Health & Wellness Monitoring 4.6.2 Diagnostic Tools 4.6.3 Connected Prescription Reminders 4.6.4 Other Applications 4.7 Intelligent Buildings & Infrastructure 4.7.1 Intelligent Buildings 4.7.2 Public Infrastructure Management 4.7.3 Parking Management 4.7.4 Lighting Control 4.7.5 Waste Management 4.7.6 Environmental Monitoring & Other Applications 4.8 Public Safety, Security & Surveillance 4.8.1 Perimeter Access Control 4.8.2 Connected Security Alarms 4.8.3 Other Applications 4.9 Retail & Vending 4.9.1 POS (Point of Sale) Applications 4.9.2 Intelligent Shopping 4.9.3 Smart Restocking 4.9.4 Other Applications 4.10 Other Verticals 4.11 LPWA Deployment Case Studies 4.11.1 AT&T: Targeting New IoT Markets with LTE Cat-M1 4.11.2 BT: Creating the UK=92s First IoT Enabled Smart City 4.11.3 Enevo: Waste Logistics Optimization with LoRaWAN 4.11.4 KT Corporation & LG-Uplus: Collaborating to Accelerate the Adoption = of NB-IoT 4.11.5 Orange: Capitalizing on Multiple LPWA Technologies 4.11.6 Securitas: LPWA Powered Home Security Monitoring 4.11.7 Senet: Optimizing Fuel Delivery with LoRaWAN 4.11.8 Smarteo Water: Enabling Smart Metering with Sigfox 4.11.9 Telensa: Powering Smart Parking & Street Lighting with UNB Technology 4.11.10 The Things Network: Crowdsouring IoT Networks 4.11.11 Vodafone Group: Establishing a Global NB-IoT Network =20 Chapter 5: Regulatory Landscape 5.1 3GPP (3rd Generation Partnership Project) 5.1.1 Release 12 5.1.2 Release 13 5.1.3 Release 14 & Beyond 5.2 ETSI (European Telecommunications Standards Institute) 5.2.1 IoT LTN (Low Throughput Networks) Initiative 5.3 LoRa Alliance 5.4 Weightless SIG 5.5 IEEE (Institute of Electrical and Electronics Engineers) 5.6 Wireless IoT Forum 5.7 GSMA 5.7.1 Mobile IoT (LPWA) Initiative 5.7.2 NB-IoT Forum 5.7.3 LTE-M Task Force 5.7.4 EC-GSM-IoT Group =20 Chapter 6: Industry Roadmap & Value Chain 6.1 Industry Roadmap 6.1.1 2017 =96 2020: Initial Rollouts to Support Smart City Applications 6.1.2 2020 =96 2025: Growing Proliferation of NB-IoT and Licensed LPWA Tech= nologies 6.1.3 2025 =96 2030 & Beyond: Cannibalizing Legacy Cellular M2M Connections 6.2 Value Chain 6.2.1 Enabling Technology 6.2.1.1 Hardware Providers 6.2.1.2 Software Providers 6.2.2 Connectivity 6.2.2.1 Mobile Operators 6.2.2.2 MVNOs & Aggregators 6.2.3 Service Enablement 6.2.3.1 CDP (Connected Device Platform) Providers 6.2.3.2 Application Platform Providers 6.2.4 Vertical Solutions 6.2.4.1 System Integrators 6.2.4.2 Vertical Market Specialists 6.2.5 Other Ecosystem Players 6.2.5.1 Cloud Platform Providers 6.2.5.2 Big Data & Analytics Specialists 6.2.5.3 Supplementary Service Providers =20 Chapter 7: Key Market Players 7.1 Accellus Communication Networks 7.2 Aclara Technologies 7.3 Actility 7.4 Adeunis RF 7.5 Aerea 7.6 Altair Semiconductor 7.7 AM Telecom 7.8 AMBER Wireless 7.9 Arkessa 7.10 Arqiva 7.11 AT&T 7.12 Atim 7.13 Atmel Corporation 7.14 Augtek 7.15 Bouygues Telecom 7.16 BT Group 7.17 Cellnex Telecom 7.18 CG-Wireless 7.19 Cisco Systems 7.20 Digi International 7.21 DT (Deutsche Telekom) 7.22 Du (Emirates Integrated Telecommunications Company) 7.23 Elster Group 7.24 Encore Networks 7.25 Endetec Homerider Systems 7.26 Eolane 7.27 Ericsson 7.28 Etisalat Group 7.29 Eutelsat 7.30 FLASHNET 7.31 Gemalto 7.32 Helium Systems 7.33 Hope RF (Hope Microelectronics) 7.34 Huawei 7.35 IBM 7.36 IMST 7.37 Ingenu 7.38 Intel Corporation 7.39 KCCS (Kyocera Communication Systems) 7.40 KDDI Corporation 7.41 Kerlink 7.42 KPN 7.43 LG Innotek 7.44 Libelium 7.45 Link Labs 7.46 M2COMM (M=B2Communication) 7.47 M2M Spectrum Networks 7.48 MediaTek 7.49 Microchip Technology 7.50 Multi-Tech Systems 7.51 Nemeus 7.52 Nettrotter 7.53 NimbeLink 7.54 NNNCo (National Narrowband Network Communications) 7.55 Nokia 7.56 NTT DoCoMo 7.57 Nwave Technologies 7.58 ON Semiconductor 7.59 Orange 7.60 OrbiWise 7.61 Oviphone 7.62 PicoWAN 7.63 Plextek 7.64 Proximus Group 7.65 Qowiso 7.66 Qualcomm 7.67 Quectel Wireless Solutions 7.68 Radiocrafts 7.69 Sagemcom 7.70 Samsara Networks 7.71 Samsung Electronics 7.72 Semtech Corporation 7.73 Senet 7.74 Sequans Communications 7.75 Sierra Wireless 7.76 Sigfox 7.77 Silicon Labs (Silicon Laboratories) 7.78 SimpleCell Networks 7.79 Singtel Group 7.80 SK Telecom 7.81 SoftBank Group 7.82 Stream Technologies 7.83 Swisscom 7.84 Tata Communications 7.85 TechPLEX 7.86 Tele2 7.87 Telecom Design 7.88 Telecom Italia 7.89 Telef=F3nica Group 7.90 Telensa 7.91 Telit Communications 7.92 Telkom SA Group 7.93 Telstra 7.94 The Things Network 7.95 TI (Texas Instruments) 7.96 Ubiik 7.97 U-blox 7.98 Verizon Communications 7.99 Vodafone Group 7.100 WAVIoT 7.101 WNC (Wistron NeWeb Corporation) 7.102 Xirgo Technologies 7.103 Xylem 7.104 ZiFiSense =20 Chapter 8: Market Analysis & Forecasts 8.1 Global Outlook of LPWA Networks 8.1.1 LPWA Network Connections 8.1.2 LPWA Network IoT Service Revenue 8.2 Connectivity vs. Application Services 8.2.1 Connectivity Revenue 8.2.2 IoT Application Service Revenue 8.3 Technology Submarket Segmentation 8.3.1 Proprietary LPWA Technologies 8.3.2 NB-IoT 8.3.3 LTE Cat-M1 8.3.4 EC-GSM-IoT 8.4 Vertical Market Segmentation 8.4.1 Agriculture 8.4.2 Asset Management & Logistics 8.4.3 Automotive & Transportation 8.4.4 Consumer Applications & Home Automation 8.4.5 Energy & Utilities 8.4.6 Healthcare 8.4.7 Intelligent Buildings & Infrastructure 8.4.8 Public Safety, Security & Surveillance 8.4.9 Retail & Vending 8.4.10 Others 8.5 Regional Segmentation 8.5.1 Asia Pacific 8.5.2 Eastern Europe 8.5.3 Middle East & Africa 8.5.4 Latin & Central America 8.5.5 North America 8.5.6 Western Europe =20 Chapter 9: Conclusion & Strategic Recommendations 9.1 Why is the Market Poised to Grow=3F 9.2 Competitive Industry Landscape: Acquisitions, Alliances & Consolidation 9.3 Prospects of Licensed Spectrum for LPWA Networks 9.3.1 Uncertainty for Proprietary Technologies 9.3.2 Spectrum Allocation Strategies for NB-IoT, LTE-M and EC-GSM-IoT 9.4 SWOT Analysis: LPWA vs. Competing Technologies 9.5 Geographic Outlook: Which Regions Offer the Highest Growth Potential=3F 9.6 Reducing LPWA Module Costs 9.7 Smart City Infrastructure Projects: Driving LPWA Network Rollouts 9.8 Impact on Mobile Operators: Opportunities & Challenges 9.9 Future Prospects for Proprietary LPWA Technologies 9.1 How Are Vendors Differentiating Their Offerings=3F 9.11 Strategic Recommendations 9.11.1 LPWA Technology Providers 9.11.2 Other Enabling Technology Providers 9.11.3 Mobile Operators 9.11.4 MVNOs & Aggregators 9.11.5 IoT Platform Providers 9.11.6 System Integrators & Vertical Market Specialists =20 List of Figures: =20 Figure 1: The IoT Vision Figure 2: M2M & IoT Network Architecture Figure 3: Global Wide Area M2M Connections by Technology: 2017 =96 2030 (Mi= llions) Figure 4: Telensa=92s Smart Lighting Solution Figure 5: LoRaWAN Architecture Figure 6: Comparison of Weightless Open LPWA Standards Figure 7: Key Performance Characteristics of 3GPP LPWA Technologies Figure 8: NB-IoT Deployment Options Figure 9: LPWA Networks Industry Roadmap Figure 10: LPWA Networks Value Chain Figure 11: Global LPWA Network Connections: 2017 =96 2030 (Millions) Figure 12: Global LPWA Network IoT Service Revenue: 2017 =96 2030 ($ Billio= n) Figure 13: Global LPWA Network IoT Service Revenue by Submarket: 2017 =96 2= 030 ($ Billion) Figure 14: Global LPWA Network Connectivity Revenue: 2017 =96 2030 ($ Billi= on) Figure 15: Global LPWA Network IoT Application Service Revenue: 2017 =96 20= 30 ($ Billion) Figure 16: Global LPWA Network Connections by Technology: 2017 =96 2030 (Mi= llions) Figure 17: Global LPWA Network IoT Service Revenue by Technology: 2017 =96 = 2030 ($ Billion) Figure 18: Global Proprietary LPWA Network Connections: 2017 =96 2030 (Mill= ions) Figure 19: Global Proprietary LPWA Network IoT Service Revenue: 2017 =96 20= 30 ($ Billion) Figure 20: Global NB-IoT Network Connections: 2017 =96 2030 (Millions) Figure 21: Global NB-IoT Network IoT Service Revenue: 2017 =96 2030 ($ Bill= ion) Figure 22: Global LTE Cat-M1 Network Connections: 2017 =96 2030 (Millions) Figure 23: Global LTE Cat-M1 Network IoT Service Revenue: 2017 =96 2030 ($ = Billion) Figure 24: Global EC-GSM-IoT Network Connections: 2017 =96 2030 (Millions) Figure 25: Global EC-GSM-IoT Network IoT Service Revenue: 2017 =96 2030 ($ = Billion) Figure 26: Global LPWA Network Connections by Vertical: 2017 =96 2030 (Mill= ions) Figure 27: Global LPWA Network IoT Service Revenue by Vertical: 2017 =96 20= 30 ($ Billion) Figure 28: Global LPWA Network Connections in Agriculture: 2017 =96 2030 (M= illions) Figure 29: Global LPWA Network IoT Service Revenue in Agriculture: 2017 =96= 2030 ($ Billion) Figure 30: Global LPWA Network Connections in Asset Management & Logistics:= 2017 =96 2030 (Millions) Figure 31: Global LPWA Network IoT Service Revenue in Asset Management & Lo= gistics: 2017 =96 2030 ($ Billion) Figure 32: Global LPWA Network Connections in Automotive & Transportation: = 2017 =96 2030 (Millions) Figure 33: Global LPWA Network IoT Service Revenue in Automotive & Transpor= tation: 2017 =96 2030 ($ Billion) Figure 34: Global LPWA Network Connections in Consumer Applications & Home = Automation: 2017 =96 2030 (Millions) Figure 35: Global LPWA Network IoT Service Revenue in Consumer Applications= & Home Automation: 2017 =96 2030 ($ Billion) Figure 36: Global LPWA Network Connections in Energy & Utilities: 2017 =96 = 2030 (Millions) Figure 37: Global LPWA Network IoT Service Revenue in Energy & Utilities: 2= 017 =96 2030 ($ Billion) Figure 38: Global LPWA Network Connections in Healthcare: 2017 =96 2030 (Mi= llions) Figure 39: Global LPWA Network IoT Service Revenue in Healthcare: 2017 =96 = 2030 ($ Billion) Figure 40: Global LPWA Network Connections in Intelligent Buildings & Infra= structure: 2017 =96 2030 (Millions) Figure 41: Global LPWA Network IoT Service Revenue in Intelligent Buildings= & Infrastructure: 2017 =96 2030 ($ Billion) Figure 42: Global LPWA Network Connections in Public Safety, Security & Sur= veillance: 2017 =96 2030 (Millions) Figure 43: Global LPWA Network IoT Service Revenue in Public Safety, Securi= ty & Surveillance: 2017 =96 2030 ($ Billion) Figure 44: Global LPWA Network Connections in Retail & Vending: 2017 =96 20= 30 (Millions) Figure 45: Global LPWA Network IoT Service Revenue in Retail & Vending: 201= 7 =96 2030 ($ Billion) Figure 46: Global LPWA Network Connections in Other Verticals: 2017 =96 203= 0 (Millions) Figure 47: Global LPWA Network IoT Service Revenue in Other Verticals: 2017= =96 2030 ($ Billion) Figure 48: LPWA Network Connections by Region: 2017 =96 2030 (Millions) Figure 49: LPWA Network IoT Service Revenue by Region: 2017 =96 2030 ($ Bil= lion) Figure 50: Asia Pacific LPWA Network Connections: 2017 =96 2030 (Millions) Figure 51: Asia Pacific LPWA Network IoT Service Revenue: 2017 =96 2030 ($ = Billion) Figure 52: Eastern Europe LPWA Network Connections: 2017 =96 2030 (Millions) Figure 53: Eastern Europe LPWA Network IoT Service Revenue: 2017 =96 2030 (= $ Billion) Figure 54: Middle East & Africa LPWA Network Connections: 2017 =96 2030 (Mi= llions) Figure 55: Middle East & Africa LPWA Network IoT Service Revenue: 2017 =96 = 2030 ($ Billion) Figure 56: Latin & Central America LPWA Network Connections: 2017 =96 2030 = (Millions) Figure 57: Latin & Central America LPWA Network IoT Service Revenue: 2017 = =96 2030 ($ Billion) Figure 58: North America LPWA Network Connections: 2017 =96 2030 (Millions) Figure 59: North America LPWA Network IoT Service Revenue: 2017 =96 2030 ($= Billion) Figure 60: Western Europe LPWA Network Connections: 2017 =96 2030 (Millions) Figure 61: Western Europe LPWA Network IoT Service Revenue: 2017 =96 2030 (= $ Billion) Figure 62: SWOT Matrix: LPWA vs. Competing M2M Networking Technologies Figure 63: Price Breakdown of an LPWA Module =20 Thank you once again and looking forward to hearing from you. =20 Kind Regards =20 Andy Silva Marketing Executive Signals and Systems Telecom andy.silva@snsresearchreports.com =20 =20 To unsubscribe please click on the link below or send an email with unsubsc= ribe in the subject line to: remove@snsreports.com =20 From owner-freebsd-ppc@freebsd.org Mon Dec 5 16:27:13 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 97DB9C68503; Mon, 5 Dec 2016 16:27:13 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (mail.vlakno.cz [91.217.96.224]) by mx1.freebsd.org (Postfix) with ESMTP id 29F4C106F; Mon, 5 Dec 2016 16:27:12 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: by vlakno.cz (Postfix, from userid 1002) id 503AEA35642; Mon, 5 Dec 2016 17:19:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=vlakno.cz; s=mail; t=1480954745; bh=E1KmZY+c9aRqJBBWpfR4XjDFEXTf8EqaCsyi39U/SaQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=Z0jQCaVVoJaEGDuHW2+x2YD1RgM2+tCVk8DHLaJn1kVDbw7HZWsJew5isxxLC2I9/ u3bf1f0UWF1X7ScJEf9JvOdZ20bM2og3dem1Ujf/qed1n2X7Sa75w3+1g1lC9yH16P n5vUUo9gALDtMV3Ke0lvc+AC5dl0RE93Lj0qImkw= Date: Mon, 5 Dec 2016 17:19:05 +0100 From: Roman Divacky To: Mark Millard Cc: Justin Hibbits , FreeBSD Toolchain , FreeBSD PowerPC ML Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-ID: <20161205161904.GA7889@vlakno.cz> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> User-Agent: Mutt/1.7.1 (2016-10-04) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Dec 2016 16:27:13 -0000 Can you try this patch? Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td =================================================================== --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) @@ -2373,6 +2373,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle counter // on a 32-bit target. let hasSideEffects = 1, usesCustomInserter = 1 in On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > [Note: At present I can buildworld using WITH_LIB32= on > powerpc64 for TARGET_ARCH=powerpc64 via clang 3.9.0 from a > minor variant of head -r309179 . That does not work for > amd64 cross compiling to powerpc64 due to assembler > notation rejections.] > > When I attempt to buildkernel (with WERROR= ) via FreeBSD's > clang 3.9.0 I get the following sorts of error > reports, *even building on powerpc64* : > > --- hwpmc_e500.o --- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: unrecognized instruction mnemonic > uint32_t pmgc0 = mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=r"(val) : "K"(reg)); \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > . . . > > When I look up these instructions I find that they are not > classic powerpc instructions: > ( http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pdf ) > > > Whereas the classic architecture defines special-purpose registers (SPRs) and > > two instructions to access them (Move to Special-Purpose Register (mtspr) and > > Move from Special-Purpose Register (mfspr)), Book E takes that model and defines > > optional device control registers (DCRs) and mtdcr and mfdcr instructions, and > > the EIS-defined performance monitor APU defines performance monitor registers > > (PMRs) and mtpmr and mfpmr instructions, all based on models provided by the > > UISA. > > . . . > > Does this imply that clang 3.9.0 needs to support more instructions when > it is targeting FreeBSD for GENERIC64 based builds? (I include GENERIC64 > and then override some items for my build activity.) > > If yes, then someone probably needs to make a list of what instructions > need to be present and have someone submit the list into llvm's bugzilla > and have the submittal listed in: > > [META] Using Clang as the FreeBSD/ppc system compiler > > (25780). > > > If GENERIC64 does not need the likes of hwpmc_e500.o built then some > work on the build environment to avoid GENERIC64 including things with > non-classic instruction use would appear to be needed. (No llvm > involvement for this case.) I doubt this is the case as it would > seem that the problem would reoccur when alternate KERNCONF's were > in use instead that do require something like of hwpmc_e500.o to be > built. > > > Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=214903 is about > this issue from the FreeBSD side of things. I just noticed the status > of the specific instructions involved and also that the cross-build > and on-powerpc64 build get the same result (unlike the recent > WITH_LIB32= discovery). > > === > Mark Millard > markmi at dsl-only.net > > _______________________________________________ > freebsd-toolchain@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-toolchain > To unsubscribe, send any mail to "freebsd-toolchain-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Tue Dec 6 00:32:01 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 29FA0C59342 for ; Tue, 6 Dec 2016 00:32:01 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-10.reflexion.net [208.70.210.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E31AF18BE for ; Tue, 6 Dec 2016 00:31:59 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 22596 invoked from network); 6 Dec 2016 00:05:19 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 6 Dec 2016 00:05:19 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Mon, 05 Dec 2016 19:05:30 -0500 (EST) Received: (qmail 2149 invoked from network); 6 Dec 2016 00:05:30 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 6 Dec 2016 00:05:30 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 947ABEC91F9; Mon, 5 Dec 2016 16:05:18 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <20161205161904.GA7889@vlakno.cz> Date: Mon, 5 Dec 2016 16:05:17 -0800 Cc: Justin Hibbits , FreeBSD Toolchain , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Dec 2016 00:32:01 -0000 On 2016-Dec-5, at 8:19 AM, Roman Divacky wrote: > Can you try this patch? >=20 > Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2373,6 +2373,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Direct use of the patch (put into a file) was rejected: # patch -p0 < llvmPPCInstrInfo_td.patch=20 Hmm... Looks like a unified diff to me... The text leading up to this was: -------------------------- |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) -------------------------- Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, = (outs gprc:$RT), (ins i32imm:$SPR), So I hand put in the extra lines. I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 the MFTB line is at line number 2300 while your patch listed: @@ -2373,6 +2373,12 @@ My edit shows as: # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision = 309179) +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; =20 +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Unfortunately the buildkernel still gets the same errors: (This was tried after a kernel-toolchain .) # Meta data file = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc/hwpmc_e500.o.met= a CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target = powerpc64-unknown-freebsd12.0 = --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerp= c64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O2 -pipe = -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc = -DHAVE_KERNEL_OPTION_HEADERS -include = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/src/sys -fno-common -g = -fno-omit-frame-pointer = -I/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/sr= c/sys/GENERIC64vtsc-NODBG -mno-altivec -ffreestanding -fwrapv = -fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs = -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline = -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__freebsd_kprintf__ = -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas = -Wno-error-tautological-compare -Wno-error-empty-body = -Wno-error-parentheses-equality -Wno-error-unused-function = -Wno-error-pointer-sign -Wno-error-shift-negative-value -msoft-float = -std=3Diso9899:1999 -c = /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o CMD ctfconvert -L VERSION -g hwpmc_e500.o CWD = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc TARGET hwpmc_e500.o -- command output -- /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 3,400 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, pmgc0); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic pmc_pmlc =3D mfpmr(PMR_PMLCa0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 10,144 ^ . . . =3D=3D=3D Mark Millard markmi at dsl-only.net Older content: On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > [Note: At present I can buildworld using WITH_LIB32=3D on > powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a > minor variant of head -r309179 . That does not work for > amd64 cross compiling to powerpc64 due to assembler > notation rejections.] >=20 > When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's > clang 3.9.0 I get the following sorts of error > reports, *even building on powerpc64* : >=20 > --- hwpmc_e500.o --- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > . . . >=20 > When I look up these instructions I find that they are not > classic powerpc instructions: > ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) >=20 >> Whereas the classic architecture defines special-purpose registers = (SPRs) and >> two instructions to access them (Move to Special-Purpose Register = (mtspr) and >> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines >> optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and >> the EIS-defined performance monitor APU defines performance monitor = registers >> (PMRs) and mtpmr and mfpmr instructions, all based on models provided = by the >> UISA. >=20 > . . . >=20 > Does this imply that clang 3.9.0 needs to support more instructions = when > it is targeting FreeBSD for GENERIC64 based builds? (I include = GENERIC64 > and then override some items for my build activity.) >=20 > If yes, then someone probably needs to make a list of what = instructions > need to be present and have someone submit the list into llvm's = bugzilla > and have the submittal listed in: >=20 > [META] Using Clang as the FreeBSD/ppc system compiler >=20 > (25780). >=20 >=20 > If GENERIC64 does not need the likes of hwpmc_e500.o built then some > work on the build environment to avoid GENERIC64 including things with > non-classic instruction use would appear to be needed. (No llvm > involvement for this case.) I doubt this is the case as it would > seem that the problem would reoccur when alternate KERNCONF's were > in use instead that do require something like of hwpmc_e500.o to be > built. >=20 >=20 > Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about > this issue from the FreeBSD side of things. I just noticed the status > of the specific instructions involved and also that the cross-build > and on-powerpc64 build get the same result (unlike the recent > WITH_LIB32=3D discovery). >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Tue Dec 6 01:16:11 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5448CC6626F for ; Tue, 6 Dec 2016 01:16:11 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-10.reflexion.net [208.70.210.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 184CE137A for ; Tue, 6 Dec 2016 01:16:10 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 26793 invoked from network); 6 Dec 2016 01:16:58 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 6 Dec 2016 01:16:58 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Mon, 05 Dec 2016 20:16:20 -0500 (EST) Received: (qmail 6195 invoked from network); 6 Dec 2016 01:16:20 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 6 Dec 2016 01:16:20 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 39960EC7977; Mon, 5 Dec 2016 17:16:08 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> Date: Mon, 5 Dec 2016 17:16:07 -0800 Cc: Justin Hibbits , FreeBSD Toolchain , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Dec 2016 01:16:11 -0000 [Top post of a retry using a different SRC_CONF_ENV file.] Well it looks like: WITHOUT_CROSS_COMPILER=3D WITH_SYSTEM_COMPILER=3D ignores the .td file change but WITH_CROSS_COMPILER=3D WITHOUT_SYSTEM_COMPILER=3D may use it. I had accidentally used a SRC_CONF_ENV file that was of the first form. So I've got a build going based on the 2nd form. . . =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-5, at 4:05 PM, Mark Millard wrote: On 2016-Dec-5, at 8:19 AM, Roman Divacky wrote: > Can you try this patch? >=20 > Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2373,6 +2373,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Direct use of the patch (put into a file) was rejected: # patch -p0 < llvmPPCInstrInfo_td.patch=20 Hmm... Looks like a unified diff to me... The text leading up to this was: -------------------------- |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) -------------------------- Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, = (outs gprc:$RT), (ins i32imm:$SPR), So I hand put in the extra lines. I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 the MFTB line is at line number 2300 while your patch listed: @@ -2373,6 +2373,12 @@ My edit shows as: # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision = 309179) +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Unfortunately the buildkernel still gets the same errors: (This was tried after a kernel-toolchain .) # Meta data file = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc/hwpmc_e500.o.met= a CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target = powerpc64-unknown-freebsd12.0 = --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerp= c64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O2 -pipe = -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc = -DHAVE_KERNEL_OPTION_HEADERS -include = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/src/sys -fno-common -g = -fno-omit-frame-pointer = -I/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/sr= c/sys/GENERIC64vtsc-NODBG -mno-altivec -ffreestanding -fwrapv = -fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs = -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline = -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__freebsd_kprintf__ = -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas = -Wno-error-tautological-compare -Wno-error-empty-body = -Wno-error-parentheses-equality -Wno-error-unused-function = -Wno-error-pointer-sign -Wno-error-shift-negative-value -msoft-float = -std=3Diso9899:1999 -c = /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o CMD ctfconvert -L VERSION -g hwpmc_e500.o CWD = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc TARGET hwpmc_e500.o -- command output -- /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 3,400 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, pmgc0); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic pmc_pmlc =3D mfpmr(PMR_PMLCa0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 10,144 ^ . . . =3D=3D=3D Mark Millard markmi at dsl-only.net Older content: On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > [Note: At present I can buildworld using WITH_LIB32=3D on > powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a > minor variant of head -r309179 . That does not work for > amd64 cross compiling to powerpc64 due to assembler > notation rejections.] >=20 > When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's > clang 3.9.0 I get the following sorts of error > reports, *even building on powerpc64* : >=20 > --- hwpmc_e500.o --- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > . . . >=20 > When I look up these instructions I find that they are not > classic powerpc instructions: > ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) >=20 >> Whereas the classic architecture defines special-purpose registers = (SPRs) and >> two instructions to access them (Move to Special-Purpose Register = (mtspr) and >> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines >> optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and >> the EIS-defined performance monitor APU defines performance monitor = registers >> (PMRs) and mtpmr and mfpmr instructions, all based on models provided = by the >> UISA. >=20 > . . . >=20 > Does this imply that clang 3.9.0 needs to support more instructions = when > it is targeting FreeBSD for GENERIC64 based builds? (I include = GENERIC64 > and then override some items for my build activity.) >=20 > If yes, then someone probably needs to make a list of what = instructions > need to be present and have someone submit the list into llvm's = bugzilla > and have the submittal listed in: >=20 > [META] Using Clang as the FreeBSD/ppc system compiler >=20 > (25780). >=20 >=20 > If GENERIC64 does not need the likes of hwpmc_e500.o built then some > work on the build environment to avoid GENERIC64 including things with > non-classic instruction use would appear to be needed. (No llvm > involvement for this case.) I doubt this is the case as it would > seem that the problem would reoccur when alternate KERNCONF's were > in use instead that do require something like of hwpmc_e500.o to be > built. >=20 >=20 > Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about > this issue from the FreeBSD side of things. I just noticed the status > of the specific instructions involved and also that the cross-build > and on-powerpc64 build get the same result (unlike the recent > WITH_LIB32=3D discovery). >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Tue Dec 6 01:42:41 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 12EF9C66F59 for ; Tue, 6 Dec 2016 01:42:41 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-10.reflexion.net [208.70.210.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id CB8EB31B for ; Tue, 6 Dec 2016 01:42:40 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 3984 invoked from network); 6 Dec 2016 01:42:39 -0000 Received: from unknown (HELO mail-cs-02.app.dca.reflexion.local) (10.81.19.2) by 0 (rfx-qmail) with SMTP; 6 Dec 2016 01:42:39 -0000 Received: by mail-cs-02.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Mon, 05 Dec 2016 20:42:46 -0500 (EST) Received: (qmail 22349 invoked from network); 6 Dec 2016 01:42:37 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 6 Dec 2016 01:42:37 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 24F39EC7977; Mon, 5 Dec 2016 17:42:29 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: Date: Mon, 5 Dec 2016 17:42:28 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Dec 2016 01:42:41 -0000 On 2016-Dec-5, at 5:16 PM, Mark Millard wrote: > Well it looks like: >=20 > WITHOUT_CROSS_COMPILER=3D > WITH_SYSTEM_COMPILER=3D >=20 > ignores the .td file change but >=20 > WITH_CROSS_COMPILER=3D > WITHOUT_SYSTEM_COMPILER=3D >=20 > may use it. >=20 > I had accidentally used a SRC_CONF_ENV file that > was of the first form. >=20 > So I've got a build going based on the 2nd form. . . No such luck: same type of failure at the same point. =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-5, at 4:05 PM, Mark Millard wrote: On 2016-Dec-5, at 8:19 AM, Roman Divacky wrote: > Can you try this patch? >=20 > Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2373,6 +2373,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Direct use of the patch (put into a file) was rejected: # patch -p0 < llvmPPCInstrInfo_td.patch=20 Hmm... Looks like a unified diff to me... The text leading up to this was: -------------------------- |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) -------------------------- Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, = (outs gprc:$RT), (ins i32imm:$SPR), So I hand put in the extra lines. I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 the MFTB line is at line number 2300 while your patch listed: @@ -2373,6 +2373,12 @@ My edit shows as: # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision = 309179) +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in Unfortunately the buildkernel still gets the same errors: (This was tried after a kernel-toolchain .) # Meta data file = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc/hwpmc_e500.o.met= a CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target = powerpc64-unknown-freebsd12.0 = --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerp= c64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O2 -pipe = -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc = -DHAVE_KERNEL_OPTION_HEADERS -include = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/src/sys -fno-common -g = -fno-omit-frame-pointer = -I/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/sr= c/sys/GENERIC64vtsc-NODBG -mno-altivec -ffreestanding -fwrapv = -fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs = -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline = -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__freebsd_kprintf__ = -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas = -Wno-error-tautological-compare -Wno-error-empty-body = -Wno-error-parentheses-equality -Wno-e rror-unused-function -Wno-error-pointer-sign = -Wno-error-shift-negative-value -msoft-float -std=3Diso9899:1999 -c = /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o CMD ctfconvert -L VERSION -g hwpmc_e500.o CWD = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc TARGET hwpmc_e500.o -- command output -- /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 3,400 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, pmgc0); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: = unrecognized instruction mnemonic mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); ^ ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) ^ :1:2: note: instantiated into assembly here mtpmr 400,3 ^ /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic pmc_pmlc =3D mfpmr(PMR_PMLCa0); ^ ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ ^ :1:2: note: instantiated into assembly here mfpmr 10,144 ^ . . . =3D=3D=3D Mark Millard markmi at dsl-only.net Older content: On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > [Note: At present I can buildworld using WITH_LIB32=3D on > powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a > minor variant of head -r309179 . That does not work for > amd64 cross compiling to powerpc64 due to assembler > notation rejections.] >=20 > When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's > clang 3.9.0 I get the following sorts of error > reports, *even building on powerpc64* : >=20 > --- hwpmc_e500.o --- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > . . . >=20 > When I look up these instructions I find that they are not > classic powerpc instructions: > ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) >=20 >> Whereas the classic architecture defines special-purpose registers = (SPRs) and >> two instructions to access them (Move to Special-Purpose Register = (mtspr) and >> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines >> optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and >> the EIS-defined performance monitor APU defines performance monitor = registers >> (PMRs) and mtpmr and mfpmr instructions, all based on models provided = by the >> UISA. >=20 > . . . >=20 > Does this imply that clang 3.9.0 needs to support more instructions = when > it is targeting FreeBSD for GENERIC64 based builds? (I include = GENERIC64 > and then override some items for my build activity.) >=20 > If yes, then someone probably needs to make a list of what = instructions > need to be present and have someone submit the list into llvm's = bugzilla > and have the submittal listed in: >=20 > [META] Using Clang as the FreeBSD/ppc system compiler >=20 > (25780). >=20 >=20 > If GENERIC64 does not need the likes of hwpmc_e500.o built then some > work on the build environment to avoid GENERIC64 including things with > non-classic instruction use would appear to be needed. (No llvm > involvement for this case.) I doubt this is the case as it would > seem that the problem would reoccur when alternate KERNCONF's were > in use instead that do require something like of hwpmc_e500.o to be > built. >=20 >=20 > Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about > this issue from the FreeBSD side of things. I just noticed the status > of the specific instructions involved and also that the cross-build > and on-powerpc64 build get the same result (unlike the recent > WITH_LIB32=3D discovery). >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net _______________________________________________ freebsd-ppc@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-ppc To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Tue Dec 6 13:20:02 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D8497C69DBB for ; Tue, 6 Dec 2016 13:20:02 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id C7C4233C for ; Tue, 6 Dec 2016 13:20:02 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id uB6DK2nQ073974 for ; Tue, 6 Dec 2016 13:20:02 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-ppc@FreeBSD.org Subject: [Bug 200020] [patch] editors/libreoffice: enable build on powerpc64 Date: Tue, 06 Dec 2016 13:20:02 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Ports & Packages X-Bugzilla-Component: Individual Port(s) X-Bugzilla-Version: Latest X-Bugzilla-Keywords: patch X-Bugzilla-Severity: Affects Some People X-Bugzilla-Who: hamiltcl@verizon.net X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: office@FreeBSD.org X-Bugzilla-Flags: maintainer-feedback? X-Bugzilla-Changed-Fields: cc attachments.created Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 06 Dec 2016 13:20:02 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D200020 Curtis Hamilton changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |hamiltcl@verizon.net --- Comment #7 from Curtis Hamilton --- Created attachment 177718 --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=3D177718&action= =3Dedit Patches to provide full powerpc64 support and fix menu and toolbar issues. This is a set of patches that add support for building editors/libreoffice4= on powerpc64. The patches provide a fix for the issues of with missing icons = on menus, toolbars and graphics gallery. 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Wed, 7 Dec 2016 16:10:52 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 42158817 for ; Wed, 7 Dec 2016 16:10:52 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id uB7GApXl019058 for ; Wed, 7 Dec 2016 16:10:52 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-ppc@FreeBSD.org Subject: [Bug 200020] [patch] editors/libreoffice: enable build on powerpc64 Date: Wed, 07 Dec 2016 16:10:52 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Ports & Packages X-Bugzilla-Component: Individual Port(s) X-Bugzilla-Version: Latest X-Bugzilla-Keywords: patch X-Bugzilla-Severity: Affects Some People X-Bugzilla-Who: jhibbits@FreeBSD.org X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: office@FreeBSD.org X-Bugzilla-Flags: maintainer-feedback? X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2016 16:10:52 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D200020 --- Comment #8 from Justin Hibbits --- Curtis, this is fantastic. Do you think you could make this into a ports patch? --=20 You are receiving this mail because: You are on the CC list for the bug.= From owner-freebsd-ppc@freebsd.org Wed Dec 7 19:00:16 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id F1611C6C3E9 for ; Wed, 7 Dec 2016 19:00:16 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E0ACB1452 for ; Wed, 7 Dec 2016 19:00:16 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id uB7J0Gln006891 for ; Wed, 7 Dec 2016 19:00:16 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-ppc@FreeBSD.org Subject: [Bug 200020] [patch] editors/libreoffice: enable build on powerpc64 Date: Wed, 07 Dec 2016 19:00:16 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Ports & Packages X-Bugzilla-Component: Individual Port(s) X-Bugzilla-Version: Latest X-Bugzilla-Keywords: patch X-Bugzilla-Severity: Affects Some People X-Bugzilla-Who: hamiltcl@verizon.net X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: office@FreeBSD.org X-Bugzilla-Flags: maintainer-feedback? X-Bugzilla-Changed-Fields: attachments.isobsolete attachments.created Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2016 19:00:17 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D200020 Curtis Hamilton changed: What |Removed |Added ---------------------------------------------------------------------------- Attachment #177718|0 |1 is obsolete| | --- Comment #9 from Curtis Hamilton --- Created attachment 177763 --> https://bugs.freebsd.org/bugzilla/attachment.cgi?id=3D177763&action= =3Dedit Libreoffice4 ports patch I'm not sure what you mean. Here's a revised patch. But as-is, you can drop the patch file into "libreoffice4/files". You will need to add powerpc64 to the "ONLY_FOR_ARCHS" line in Makefile. --=20 You are receiving this mail because: You are on the CC list for the bug.= From owner-freebsd-ppc@freebsd.org Wed Dec 7 19:03:33 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id AC4A7C6C6A8; Wed, 7 Dec 2016 19:03:33 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (mail.vlakno.cz [91.217.96.224]) by mx1.freebsd.org (Postfix) with ESMTP id 3E26919B0; Wed, 7 Dec 2016 19:03:32 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: by vlakno.cz (Postfix, from userid 1002) id 12999A35642; Wed, 7 Dec 2016 20:00:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=vlakno.cz; s=mail; t=1481137257; bh=LSHzhVjJ37HcNPKj3GP6Igcwd4+Wg7AuqVrye5L8fMk=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=gGwcOSriYdgBQ0uHRe6wglrmT3GTHGrRAarp/YjlTG9PsFsdsRjtCqw/fX4nOnMAO PXfcRIDde15c4w5O3Xc9v+oJkJgwMxadqt7LC6xT1IM6zeWwA4+oZSo8ay9Vop8ZOV xY6af6KuxjwMBmq5Do2nf/tOjOu/KHgNtCQhf6vI= Date: Wed, 7 Dec 2016 20:00:57 +0100 From: Roman Divacky To: Mark Millard Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-ID: <20161207190057.GA58950@vlakno.cz> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: User-Agent: Mutt/1.7.1 (2016-10-04) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2016 19:03:33 -0000 Can the compiler you built with the patch process this file: typedef int register_t; #define mtpmr(reg, val) \ __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) #define mfpmr(reg) \ ( { register_t val; \ __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ val; } ) #define PMR_PMC0 16 int foo() { return mfpmr(PMR_PMC0); } I can compile it just fine locally. Not sure why it wouldnt work in your ca= se. On Mon, Dec 05, 2016 at 05:42:28PM -0800, Mark Millard wrote: > On 2016-Dec-5, at 5:16 PM, Mark Millard wrote: >=20 > > Well it looks like: > >=20 > > WITHOUT_CROSS_COMPILER=3D > > WITH_SYSTEM_COMPILER=3D > >=20 > > ignores the .td file change but > >=20 > > WITH_CROSS_COMPILER=3D > > WITHOUT_SYSTEM_COMPILER=3D > >=20 > > may use it. > >=20 > > I had accidentally used a SRC_CONF_ENV file that > > was of the first form. > >=20 > > So I've got a build going based on the 2nd form. . . >=20 > No such luck: same type of failure at the same point. >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > On 2016-Dec-5, at 4:05 PM, Mark Millard wrote: >=20 > On 2016-Dec-5, at 8:19 AM, Roman Divacky wrote: >=20 > > Can you try this patch? > >=20 > > Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > > +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > > @@ -2373,6 +2373,12 @@ > > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > > "mftb $RT, $SPR", IIC_SprMFTB>; > >=20 > > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > > + > > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > > + > > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > > // on a 32-bit target. > > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 > Direct use of the patch (put into a file) was rejected: >=20 > # patch -p0 < llvmPPCInstrInfo_td.patch=20 > Hmm... Looks like a unified diff to me... > The text leading up to this was: > -------------------------- > |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > -------------------------- > Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... > patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, (out= s gprc:$RT), (ins i32imm:$SPR), >=20 > So I hand put in the extra lines. >=20 > I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 > the MFTB line is at line number 2300 while your patch listed: >=20 > @@ -2373,6 +2373,12 @@ >=20 > My edit shows as: >=20 > # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 309179) > +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2300,6 +2300,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle co= unter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 >=20 > Unfortunately the buildkernel still gets the same errors: > (This was tried after a kernel-toolchain .) >=20 > # Meta data file /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.= powerpc64/usr/src/sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc= /hwpmc_e500.o.meta > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target powerpc64= -unknown-freebsd12.0 --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_k= ernel/powerpc.powerpc64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O= 2 -pipe -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc -DHAVE_KER= NEL_OPTION_HEADERS -include /usr/obj/powerpc64vtsc_clang_altbinutils_kernel= /powerpc.powerpc64/usr/src/sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/= src/sys -fno-common -g -fno-omit-frame-pointer -I/usr/obj/powerpc64vtsc_cla= ng_altbinutils_kernel/powerpc.powerpc64/usr/src/sys/GENERIC64vtsc-NODBG -m= no-altivec -ffreestanding -fwrapv -fstack-protector -gdwarf-2 -Wall -Wredun= dant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpoin= ter-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__f= reebsd_kprintf__ -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unkn= own-pragmas -Wno-error-tautological-compare -Wno-error-empty-body -Wno-erro= r-parentheses-equality -Wno-e > rror-unused-function -Wno-error-pointer-sign -Wno-error-shift-negative-va= lue -msoft-float -std=3Diso9899:1999 -c /usr/src/sys/modules/hwpmc/../../= dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o > CMD ctfconvert -L VERSION -g hwpmc_e500.o > CWD /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr= /src/sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc > TARGET hwpmc_e500.o > -- command output -- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: un= recognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: unr= ecognized instruction mnemonic > mtpmr(PMR_PMGC0, pmgc0); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: unr= ecognized instruction mnemonic > mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: un= recognized instruction mnemonic > pmc_pmlc =3D mfpmr(PMR_PMLCa0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 10,144 > ^ > . . . >=20 >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > Older content: >=20 > On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > > [Note: At present I can buildworld using WITH_LIB32=3D on > > powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a > > minor variant of head -r309179 . That does not work for > > amd64 cross compiling to powerpc64 due to assembler > > notation rejections.] > >=20 > > When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's > > clang 3.9.0 I get the following sorts of error > > reports, *even building on powerpc64* : > >=20 > > --- hwpmc_e500.o --- > > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > > ^ > > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > > ^ > > :1:2: note: instantiated into assembly here > > mfpmr 3,400 > > ^ > > . . . > >=20 > > When I look up these instructions I find that they are not > > classic powerpc instructions: > > ( http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRM= RM.pdf ) > >=20 > >> Whereas the classic architecture defines special-purpose registers (SP= Rs) and > >> two instructions to access them (Move to Special-Purpose Register (mts= pr) and > >> Move from Special-Purpose Register (mfspr)), Book E takes that model a= nd defines > >> optional device control registers (DCRs) and mtdcr and mfdcr instructi= ons, and > >> the EIS-defined performance monitor APU defines performance monitor re= gisters > >> (PMRs) and mtpmr and mfpmr instructions, all based on models provided = by the > >> UISA. > >=20 > > . . . > >=20 > > Does this imply that clang 3.9.0 needs to support more instructions when > > it is targeting FreeBSD for GENERIC64 based builds? (I include GENERIC64 > > and then override some items for my build activity.) > >=20 > > If yes, then someone probably needs to make a list of what instructions > > need to be present and have someone submit the list into llvm's bugzilla > > and have the submittal listed in: > >=20 > > [META] Using Clang as the FreeBSD/ppc system compiler > >=20 > > (25780). > >=20 > >=20 > > If GENERIC64 does not need the likes of hwpmc_e500.o built then some > > work on the build environment to avoid GENERIC64 including things with > > non-classic instruction use would appear to be needed. (No llvm > > involvement for this case.) I doubt this is the case as it would > > seem that the problem would reoccur when alternate KERNCONF's were > > in use instead that do require something like of hwpmc_e500.o to be > > built. > >=20 > >=20 > > Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is abo= ut > > this issue from the FreeBSD side of things. I just noticed the status > > of the specific instructions involved and also that the cross-build > > and on-powerpc64 build get the same result (unlike the recent > > WITH_LIB32=3D discovery). > >=20 > > =3D=3D=3D > > Mark Millard > > markmi at dsl-only.net >=20 >=20 > _______________________________________________ > freebsd-ppc@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-ppc > To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Wed Dec 7 20:02:15 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2ED3EC6C91C for ; Wed, 7 Dec 2016 20:02:15 +0000 (UTC) (envelope-from gabriel.diaz@vgtelecomreports.com) Received: from smtp.vgtelecomreports.com (smtp.vgtelecomreports.com [202.0.103.19]) by mx1.freebsd.org (Postfix) with ESMTP id 8EE041D19 for ; Wed, 7 Dec 2016 20:02:05 +0000 (UTC) (envelope-from gabriel.diaz@vgtelecomreports.com) X-SmarterMail-Authenticated-As: admin@vgtelecomreports.com DomainKey-Signature: a=rsa-sha1; c=nofws; q=dns; d=vgtelecomreports.com; s=smtp; h=received:from:to:message-id:subject:date:mime-version:reply-to :content-type; b=B550RwaltlzI5x+H3GQyYdXbvUIoMVT5+5NCmvHE8geVEVo7xHeUgyDBPEBj70eDd PEJ0E+StOTrCjERgPO0CTMqI+SCbHMaYgZy5/RFrJiP3noqhZK2jNHgV/9tiKCfJo kfuVxCuzH6DUYsawL5yY64nfB/9N9wLuucSk6PivM= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vgtelecomreports.com; s=smtp; h= content-type:reply-to:mime-version:date:subject:message-id:to:from; bh=MPFq7aZ/5T8Hhl4vzEZVnicrlJSkK6IEp/nvm0C418Y=; b=mzpTChJI3IarTiTmxRo9TtlLXXE+iYeTxp7nmqWErsbcpDplCFeYtEhcgjnacdyCA Uu/cRsD05y9ltqqYOnCvSyu4SRKo/XRcLhIlMlLHi/7kWJwbb3NqWCyzAUtqxIU/g nhnFb0ZBHrChjoH6oPwNYlfM3sIiSQBcIcgxkIP2U= Received: from WIN-ASQ29B6R1EP (WIN-ASQ29B6R1EP [202.0.103.127]) by smtp.vgtelecomreports.com with SMTP; Wed, 7 Dec 2016 19:45:49 +0000 From: Gabriel Diaz To: freebsd-ppc@freebsd.org Message-Id: <20161207194549.-547562650@vgtelecomreports.com> Subject: Cyber Security Market Report 2016-2021 Date: Wed, 7 Dec 2016 19:45:49 +0000 MIME-Version: 1.0 Reply-To: gabriel.diaz@vgtelecomreports.com Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 8bit X-Content-Filtered-By: Mailman/MimeDel 2.1.23 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2016 20:02:15 -0000 Visiongain - Business Report Updates Speak to our consultant now: +44 (0)20 7549 9933 Cyber Security Market Report 2016-2021 Forecasts, Analysis & Profiles of Top Companies in Network, Data, Endpoint, Application and Cloud Security, and Identity & Access Management The cyber security market is set to be worth $81.4 billion in 2016, as high demand drives growth. Cyber security is a vast concept comprising many ideas, from ensuring national security to protecting an electronic wristband. However, in the cyber space, everything is linked through a global network, the internet. Therefore, cyber security is not something that can simply by implemented by Information Technology (IT) professionals to a network infrastructure. Today, we live in an extremely interconnected world and under constant threat of cyber attacks. For that reason, cyber security is a mindset, and as cyber threats evolve, so should our mindset. How This 402 Page Report Delivers: * The analysis is underpinned by our 3 exclusive interviews with leading Cyber Security experts- James Hanlon and Laurence Pitt, Security Strategist and Product Management, Symantec.- Martin Roesch, Vice President and Chief Architect, Cisco- Florian Schtz, Business Development, RUAG * Provides detailed profiles of 15 leading companies operating within the Cyber Security market: - Blue Coat Systems- Check Point Technologies- Cisco- EMC- Fortinet- Hewlett-Packard Company- IBM- Intel Corporation- Kaspersky- Lockheed Martin Corporation- Northrop Grumman Corporation- Optiv- Palo Alto Networks- Symantec Corporation- Trend Micro * Reveals where and how companies are investing in Cyber Security. We show you the prospects for the following 9 leading nations with forecasts and analysis - China- France- Israel- Japan- Russia- Saudi Arabia- South Korea- US- UK- RoW. * Forecasts these 7 cyber security submarkets from 2016-2021 - Network security- Data Security- Endpoint security- Application security- Cloud security- Identity and Access Management - Other. * Details 54 significant cyber security contracts, with 185 tables and 226 figures examining the cyber security market space. Buy this report How to purchase our reports Select the license from the list below and send your details Licensing options: Single User GBP 1999 Dept. (5 Users) GBP 2999 Site GBP 4999 Global GBP 6999 For more information and orders please contact gabriel.diaz@vgtelecomreports.com Table of Contents - Cyber Security Market Report 2016-2021 1. Report Overview 2. Introduction to the Cyber Security Market 2.1 Global Cyber Security Market Structure Overview 2.2 Cyber Security Market Definition 2.3 Cyber Security Submarkets Definition 2.3.1 Network Security (NetSec) Submarket Definition 2.3.2 Data Security (DataSec) Submarket Definition 2.3.3 Identity and Access Management (IAM) Submarket Definition 2.3.4 Endpoint Security (EndSec) Submarket Definition 2.3.5 Application Security (AppSec) Submarket Definition 2.3.6 Cloud Security (CloudSec) Submarket Definition 2.4 Most Common Methods of Cyber Attacks 2.5 Main Objectives of Cyber Attackers 2.6 Most Important Mechanisms of Cyber Attacks 2.7 Stage of Cyber Attacks 2.8 The Evolving Surface of Cyber Attack 2015-2020 2.9 Recent Notable Cyber Attacks & Incidents 3. Global Cyber Security Market 2016-2021 3.1 Global Cyber Security Market Forecast 2016-2021 3.2 Regional Cyber Security Market Forecast 2016-2021 3.3 Regional Cyber Security Market Share Breakdowns 2016-2021 3.2 Global Cyber Security Drivers & Restraints 2016 4. Global Cyber Security Submarket Forecast 2016-2021 5. Leading 9 National Cyber Security Markets Forecast 2016-2021 5.1 Leading 9 National Cyber Security Markets Share Forecast 2016-2021 5.2 China Cyber Security Market Forecast 2016-2021 5.2.1 Cyber Security in China 5.2.1.1 Chinese Military Cyber Strategy 5.2.1.2 Chinese National Cyber Strategy 5.2.2 China Cyber Security Market Drivers & Restraints 5.3 France Cyber Security Market Forecast 2016-2021 5.3.1 French Cyber Security Agency: ANSSI 5.3.2 Cyber Security in France 5.3.3 France Cyber Security Market Drivers & Restraints 5.4 Israel Cyber Security Market Forecast 2016-2021 5.4.1 Israeli Defence Contracts Value 2007-2014 5.4.2 Cyber Security in Israel 5.4.3 Israel Cyber Security Market Drivers & Restraints 5.5 Japan Cyber Security Market Forecast 2016-2021 5.5.1 Japan Spending on IT Software and Services 2012-2014 5.5.2 Japan Ministry of Defence Spending on Cyber Security 2012-2016 5.5.3 Cyber Security in Japan 5.5.4 Japan Cyber Security Market Drivers & Restraints 5.6 Russia Cyber Security Market Forecast 2016-2021 5.6.1 Cyber Security in Russia 5.6.2 Russia Cyber Security Market Drivers & Restraints 5.7 Saudi Arabia Cyber Security Market Forecast 2016-2021 5.7.1 Cyber Security in Saudi Arabia 5.7.2 Saudi Arabia Cyber Security Market Drivers & Restraints 5.8 South Korea Cyber Security Market Forecast 2016-2021 5.8.1 Cyber Security in South Korea 5.8.2 South Korea Cyber Security Market Drivers & Restraints 5.9 United States Cyber Security Market Forecast 2016-2021 5.9.1 United States Cyber Security Market Contracts & Programmes 5.9.2 United States Federal Government’s Budget for Cyber Security 5.9.3 United States Federal Departments Spending on Cyber Security by Departments 5.9.4 United States Federal Spending on Cyber Security by States 5.9.5 Cyber Security in United States 5.9.5.1 Essential Components of the U.S. Cyber Security Power 5.9.5.2 The United States Department of Defense 5.9.5.3 The United States Department of Homeland Security 5.9.5.4 The United States Department of Justice 5.9.5.5 The United States Overall Budget 5.9.6 United States Cyber Security Market Drivers & Restraints 5.10 United Kingdom Cyber Security Market Forecast 2016-2021 5.10.1 United Kingdom Government Spending on Cyber Security 5.10.2 United Kingdom Cyber Security Export 5.10.3 Cyber Security in the United Kingdom 5.10.4 United Kingdom Cyber Security Market Drivers & Restraints 6. SWOT Analysis of the Cyber Security Market 2016-2021 7. Expert Opinion 7.1 Florian Schütz, Business Development, Cyber & Intelligence, RUAG 7.2.1 RUAG’s view on the Cyber Security Market 7.1.2 Presence of RUAG in the Cyber Security Market 7.2 James Hanlon, Security Strategist, Office of the CTO and Laurence Pitt, Director, Product Management EMEA, Symantec 7.2.1 Symantec’s view on the Cyber Security Market 7.2.2 Presence of Symantec in the Cyber Security Market 7.3 Martin Roesch, Vice President and Chief Architect, Cisco’s Security Business Group 7.3.1 Presence of Cisco in the Cyber Security Market 8. Leading 15 Cyber Security Companies 8.1 Leading 15 Cyber Security Company Sales Share Analysis 2015 8.2 Blue Coat Systems, Inc 8.2.1 Blue Coat Systems Total Company Sales 2007-2011 8.2.2 Blue Coat Systems Sales by Segment of Business 2007-2011 8.2.3 Blue Coat Systems Net Profit / Loss 2007-2011 8.2.4 Blue Coat Systems Cost of Research & Development 2007-2011 8.2.5 Blue Coat Systems Regional Emphasis / Focus 8.2.6 Blue Coat Systems Organisational Structure / Subsidiaries / Number of Employees 8.2.7 Blue Coat Systems Primary Market Competitors 2015 8.2.8 Blue Coat Systems Mergers & Acquisitions (M&A) Activity 8.2.9 Blue Coat Systems’ Role in the Cyber Security Market 8.3 Check Point Software Technologies Ltd 8.3.1 Check Point Software Technologies Ltd Total Company Sales 2005-2014 8.3.2 Check Point Software Technologies Ltd Net Income 2005-2014 8.3.3 Check Point Software Technologies Ltd Net Capital Expenditure 2011-2014 8.3.4 Check Point Software Technologies Ltd Net Cost of Research & Development 2005-2014 8.3.5 Check Point Software Technologies Ltd Regional Emphasis / Focus 8.3.6 Check Point Software Technologies Ltd Organisational Structure / Subsidiaries / Number of Employees 8.3.7 Check Point Software Technologies Ltd Primary Market Competitors 8.3.8 Check Point Software Technologies Ltd Mergers & Acquisitions (M&A) Activity 8.3.9 Check Point Software Technologies’ Role in the Cyber Security Market 8.4 Cisco Systems 8.4.1 Cisco Total Company Sales 2008-2015 8.4.2 Cisco Net Profit 2010-2015 8.4.3 Cisco Cost of Research & Development 2010-2015 8.4.5 Cisco Sales by Segment of Business 2010-2015 8.4.6 Cisco Regional Emphasis / Focus 8.4.7 Cisco Organisational Structure / Subsidiaries / Number of Employees 8.4.8 Cisco Primary Market Competitors 2015 8.4.9 Cisco Mergers & Acquisitions (M&A) Activity 8.4.10 Cisco’s Role in the Cyber Security Market 8.5 EMC 8.5.1 EMC Total Company Sales 2008-2014 8.5.2 EMC Net Profit 2010-2014 8.5.3 EMC Cost of Research & Development 2010-2014 8.5.4 EMC Sales by Segment of Business 2010-2014 8.5.5 EMC Regional Emphasis / Focus 8.5.6 EMC Organisational Structure / Subsidiaries / Number of Employees 8.5.7 EMC Primary Market Competitors 8.5.8 EMC Mergers & Acquisitions (M&A) Activity 8.5.9 EMC’s Role in the Cyber Security Market 8.6 Fortinet Inc 8.6.1 Fortinet Inc Total Company Sales 2009-2014 8.6.2 Fortinet Inc Net Income 2010-2014 8.6.3 Fortinet Inc Net Capital Expenditure 2010-2014 8.6.4 Fortinet Inc Sales by Segment of Business 2009-2014 8.6.5 Fortinet Inc Regional Emphasis / Focus 8.6.6 Fortinet Inc Organisational Structure / Subsidiaries / Number of Employees 8.6.7 Fortinet Inc Primary Market Competitors 8.6.8 Fortinet Inc Mergers & Acquisitions (M&A) Activity 8.6.9 Fortinet Inc’s Role in the Cyber Security Market 8.7 Hewlett-Packard (HP) 8.7.1 Hewlett-Packard (HP) Cyber Security Selected Recent Contracts / Projects / Programmes 8.7.2 Hewlett-Packard (HP) Total Company Sales 2010-2015 8.7.3 Hewlett-Packard (HP) Net Income / Loss 2010-2015 8.7.4 Hewlett-Packard (HP) Sales by Segment of Business 2010-2015 8.7.5 The Hewlett-Packard Company (HP) Regional Emphasis / Focus 8.7.6 The Hewlett-Packard Company (HP) Organisational Structure / Subsidiaries 8.7.7 Hewlett-Packard (HP) Primary Market Competitors 8.7.8 Hewlett-Packard (HP) Mergers & Acquisitions (M&A) Activity 8.7.9 Hewlett-Packard (HP)’s Role in the Cyber Security Market 8.8 Intel Corporation 8.8.1 Intel Corporation Total Company Sales 2008-2014 8.8.2 Intel Corporation Net Profit 2010-2014 8.8.3 Intel Corporation Cost of Research & Development 2010-2014 8.8.4 Intel Corporation Sales by Segment of Business 2010-2014 8.8.5 Intel Corporation Regional Emphasis / Focus 8.8.6 Intel Corporation Organisational Structure / Subsidiaries / Number of Employees 8.8.7 Intel Corporation Primary Market Competitors 8.8.8 Intel Corporation Mergers & Acquisitions (M&A) Activity 8.8.9 Intel Corporation’s Role in the Cyber Security Market 8.9 International Business Machines (IBM) Corporation 8.9.1 IBM Cyber Security Selected Recent Contracts / Projects / Programmes 8.9.2 IBM Total Company Sales 2008-2014 8.9.3 IBM Net Profit 2010-2014 8.9.4 IBM Cost of Research & Development 2010-2014 8.9.5 IBM Sales by Segment of Business 2010-2014 8.9.6 IBM Regional Emphasis / Focus 8.9.7 IBM Organisational Structure / Subsidiaries / Number of Employees 8.9.8 IBM Primary Market Competitors 2015 8.9.9 IBM Mergers & Acquisitions (M&A) Activity 8.9.10 IBM’s Role in the Cyber Security Market 8.10 Kaspersky Lab 8.10.1 Kaspersky Lab Total Company Sales 2008-2014 8.10.2 Kaspersky Lab Regional Emphasis / Focus 8.10.3 Kaspersky Lab Organisational Structure / Subsidiaries 8.10.4 Kaspersky Lab Primary Market Competitors 8.10.5 Kaspersky Lab Mergers & Acquisitions (M&A) Activity 8.10.6 Kaspersky‘s Role in the Cyber Security Market 8.11 Lockheed Martin Corporation 8.11.1 Lockheed Martin Corporation Cyber Security Selected Recent Contracts / Projects / Programmes 8.11.2 Lockheed Martin Corporation Total Company Sales 2010-2014 8.11.3 Lockheed Martin Corporation Net Income 2010-2014 8.11.4 Lockheed Martin Corporation Net Capital Expenditure 2010-2014 8.11.5 Lockheed Martin Corporation Sales by Segment of Business 2010-2014 8.11.6 Lockheed Martin Corporation Regional Emphasis / Focus 8.11.7 Lockheed Martin Corporation Organisational Structure / Subsidiaries / Number of Employees 8.11.8 Lockheed Martin Corporation Primary Market Competitors 8.11.9 Lockheed Martin Corporation Mergers & Acquisitions (M&A) Activity 8.11.10 Lockheed Martin Corporation’s Role in the Cyber Security Market 8.12 Northrop Grumman Corporation 8.12.1 Northrop Grumman Corporation Cyber Security Selected Recent Contracts / Projects / Programmes 8.12.2 Northrop Grumman Corporation Total Company Sales 2008-2014 8.12.3 Northrop Grumman Corporation Net Profit 2009-2014 8.12.4 Northrop Grumman Corporation Sales by Segment of Business 2010-2014 8.12.5 Northrop Grumman Corporation Regional Emphasis / Focus 8.12.6 Northrop Grumman Corporation Organisational Structure / Subsidiaries / Number of Employees 8.12.7 Northrop Grumman Corporation Primary Market Competitors 8.12.8 Northrop Grumman Corporation Mergers & Acquisitions (M&A) Activity 8.12.9 Northrop Grumman Corporation’s Role in the Cyber Security Market 8.13 Optiv 8.13.1 Optiv Regional Emphasis / Focus 8.13.2 Optiv Organisational Structure / Subsidiaries / Number of Employees 8.13.3 Optiv Primary Market Competitors 2015 8.13.4 Optiv Mergers & Acquisitions (M&A) Activity 8.13.5 Optiv’s Role in the Cyber Security Market 8.14 Palo Alto Networks 8.14.1 Palo Alto Networks Total Company Sales 2008-2015 8.14.2 Palo Alto Networks Net Profit/Loss 2010-2015 8.14.3 Palo Alto Networks Cost of Research & Development 2010-2015 8.14.4 Palo Alto Networks Sales by Segment of Business 2010-2015 8.14.5 Palo Alto Networks Regional Emphasis / Focus 8.14.6 Palo Alto Networks Organisational Structure / Subsidiaries / Number of Employees 8.14.7 Palo Alto Networks Primary Market Competitors 8.14.8 Palo Alto Networks Mergers & Acquisitions (M&A) Activity 8.14.9 Palo Alto Networks’ Role in the Cyber Security Market 8.15 Symantec Corporation 8.15 1 Symantec Total Company Sales 2008-2015 8.15.2 Symantec Net Profit 2010-2015 8.15.3 Symantec Cost of Research & Development 2010-2015 8.15.4 Symantec Sales by Segment of Business 2014-2015 8.15.5 Symantec Regional Emphasis / Focus 8.15.6 Symantec Organisational Structure / Subsidiaries / Number of Employees 8.15.7 Symantec Primary Market Competitors 8.15.8 Symantec Mergers & Acquisitions (M&A) Activity 8.15.9 Symantec’s Role in the Cyber Security Market 8.16 Trend Micro 8.16.1 Trend Micro Total Company Sales 2008-2014 8.16.2 Trend Micro Net Profit 2010-2015 8.16.3 Trend Micro Cost of Research & Development 2011-2014 8.16.4 Trend Micro Regional Emphasis / Focus 8.16.5 Trend Micro Organisational Structure / Subsidiaries 8.16.6 Trend Micro Primary Market Competitors 8.16.7 Trend Micro Mergers & Acquisitions (M&A) Activity 8.16.8 Trend Micro’s Role in the Cyber Security Market 8.17 Other Companies Involved in the Cyber Security Market 2016 9. Conclusions and Predictions 9.1 Conclusion 9.2 Predictions 10. Glossary List of Tables Table 1.1 Example of Cyber Security Market by Regional Market Forecast 2016-2021 (US$m, AGR%, Cumulative) Table 1.2 Example of Leading National Cyber Security Market Forecast by Submarket 2016-2021 (US$m, AGR%, Cumulative) Table 2.1 Methods of Cyber Attacks (Type, Description) Table 2.2 Objectives of Cyber Attackers (Type, Description) Table 2.3 Mechanisms of Cyber Attacks (Type, Description) Table 2.4 Cyber Attack Surface 2015-2020 Table 2.5 Notable Cyber Attacks and Incidents worldwide 1988-2015 (Date, Name of the Attack / Incident, Description) Table 3.1 Global Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 3.2 Regional Cyber Security Market Forecast 2015-2021 (Sales US$m, AGR%, Cumulative) Table 3.3 Regional Cyber Security Market Percentage Change in Market Share 2016-2021 (% Change) Table 3.4 Global Cyber Security Market Drivers & Restraints 2016 Table 4.1 Global Cyber Security Submarket Forecast 2016-2021 (US$m, AGR%, Cumulative) Table 4.2 Global Cyber Security Submarket Cumulative Sales Forecast 2016-2021 ($USm) Table 5.1 Leading 9 National Cyber Security Markets Forecast 2016-2021 (US$m, Global AGR%, Cumulative) Table 5.2 Leading 9 National Cyber Security Markets CAGR Forecast 2016-2021 (CAGR %) Table 5.3 China Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.4 China Cyber Security Market Drivers & Restraints 2016 Table 5.5 France Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.6 France Cyber Security Agency (ANSSI) Budget 2010-2014 (US$m) Table 5.7 France Cyber Security Market Drivers & Restraints 2016 Table 5.8 Israel Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.9 Israeli Defence Contracts Total Value 2007-2014 (US$m) Table 5.10 Israel Cyber Security Market Drivers & Restraints 2016 Table 5.11 Japan Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.12 Japan Spending on IT Software and Services 2012-2014 (US$m) Table 5.13 Japan Ministry of Defence Spending on Cyber Security 2012-2016(US$m, AGR %) Table 5.14 Japan Cyber Security Market Drivers & Restraints 2016 Table 5.15 Russia Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.16 Russia Cyber Security Market Drivers & Restraints 2016 Table 5.17 Saudi Arabia Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.18 Saudi Arabia Cyber Security Market Drivers & Restraints 2016 Table 5.19 South Korea Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.20 South Korea Cyber Security Market Drivers & Restraints 2016 Table 5.21 U.S. Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.22 U.S. Cyber Security Market Major Contracts & Programmes 2015 (Date, Organisation, Contractor, Value US$m, Product, Details) Table 5.23 U.S. Federal Government’s Global Budget for Cyber Security 2013-2016 (US$m, AGR %) Table 5.24 U.S. Federal Government’s Budget for Cyber Security by Departments 2015-2016 (US$m) Table 5.25 U.S. Federal Spending on Cyber Security by Departments 2010-2015 (US$m, AGR %) Table 5.26 U.S. Federal Spending on Cyber Security by States 2010-2015 (US$m, AGR %) Table 5.27 U.S. Government and Military Cyber Security Organisations’ Role (US Code, Title, Focus, Organisation, Role) Table 5.28 U.S. Cyber Security Market Drivers & Restraints 2016 Table 5.29 UK Cyber Security Market Forecast 2016-2021 (US$m, AGR %, CAGR%, Cumulative) Table 5.30 UK National Cyber Security Programme Total Spending Forecast 2011-2020 (US$m) Table 5.31 UK National Cyber Security Programme Spending by Segments Share 2014-2015 (US$m) Table 5.32 UK Cyber Security Export in the Security Sector 2012-2015 (US$m, AGR %) Table 5.33 UK Cyber Security Market Drivers & Restraints 2016 Table 6.1 Global Cyber Security Market SWOT Analysis 2016-2021 Table 8.1 Leading 15 Cyber Security Companies Sales Share 2015 ( Company, FY2014/2015 Total Company Sales US$m, FY2014/2015 Estimated Sales in the Market US$m, Share of FY2015 Total Sales from Sales in the Market US$m, Primary Market Specialisation) Table 8.2 Blue Coat Systems Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, HQ, Founded, No. of Employees, IR Contact, Website) Table 8.2.1 Blue Coat Systems Total Company Sales 2007-2011 (US$m, AGR %) Table 8.2.2 Blue Coat Systems Sales by Segment of Business 2007-2011 (US$m, AGR %) Table 8.2.3 Blue Coat Systems Net Profit / Loss 2007-2011 (US$m, AGR %) Table 8.2.4 Blue Coat Systems Cost of Research & Development 2007-2011 (US$m, AGR %) Table 8.2.5 Blue Coat Systems Sales by Geographical Location 2007-2011 (US$m, AGR %) Table 8.2.6 Blue Coat Systems Subsidiaries 2015 (Subsidiary, Location) Table 8.2.7 Blue Coat Systems Number of Employees 2007-2011 (No. of Employees, AGR %) Table 8.2.8 Blue Coat Systems Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.2.9 Blue Coat Systems Merger (Date, Company Involved, Value US$m, Details) Table 8.3 Check Point Software Technologies Ltd Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market (%), Net Income US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.3.1Check Point Software Technologies Ltd Total Company Sales 2005-2014 (US$m, AGR %) Table 8.3.2 Check Point Software Technologies Ltd Net Income 2005-2014 (US$m, AGR %) Table 8.3.3 Check Point Software Technologies Ltd Net Capital Expenditure 2011-2014 (US$m, AGR %) Table 8.3.4 Check Point Software Technologies Ltd Net Capital Expenditure 2005-2014 (US$m, AGR %) Table 8.3.5 Check Point Software Technologies Ltd Sales by Geographical Location 2009-2014 (US$m, AGR %) Table 8.3.6 Check Point Software Technologies Ltd Subsidiaries (Subsidiary, Location) Table 8.3.7 Check Point Software Technologies Ltd Number of Employees 2009-2014 (Number, AGR %) Table 8.3.8 Check Point Software Technologies Ltd Acquisitions (Date, Company Involved, Value US$m, Details) Table 4.3.9 Check Point Software Technologies Ltd Partnerships 2015 (Date, Company Involved, Details) Table 8.4 Cisco Systems Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.4.1 Cisco Total Company Sales 2008-2015 ($m, AGR %) Table 8.4.2 Cisco Net Profit 2010-2015 (US$m, AGR %) Table 8.4.3 Cisco Cost of Research & Development 2010-2015 (US$m, AGR %) Table 8.4.4 Cisco Sales by Segment of Business 2010-2015 (US$m, AGR %) Table 8.4.5 Cisco Sales by Geographical Location 2010-2015 (US$m, AGR %) Table 8.4.6 Cisco Primary International Subsidiaries 2015 (Region, Subsidiary, Location) Table 8.4.7 Cisco Number of Employees 2012-2015 (No. of Employees, AGR %) Table 8.4.8 Cisco Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.5 EMC Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, Net Capital Expenditure US$m, Submarket Involvement, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.5.1 EMC Total Company Sales 2008-2014 ($m, AGR %) Table 8.5.2 EMC Net Profit 2010-2014 (US$m, AGR %) Table 8.5.3 EMC Cost of Research & Development 2010-2014 (US$m, AGR %) Table 8.5.4 EMC Sales by Segment of Business 2010-2014 (US$m, AGR %) Table 8.5.5 EMC Sales by Geographical Location 2008-2014 (US$m, AGR %) Table 8.5.6 EMC Primary International Subsidiaries 2016 (Region, Subsidiary, Location) Table 8.5.7 EMC Number of Employees 2010-2014 (No. of Employees, AGR %) Table 8.5.8 EMC Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.5.9 EMC Divestitures 2015 (Date, Details) Table 8.5.10 EMC Mergers/Partnerships 2015 (Date, Details) Table 8.6 Fortinet Inc Profile 2016 ( CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Income US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.6.1 Fortinet Inc Total Company Sales 2009-2014 (US$m, AGR %) Table 8.6.2 Fortinet Inc Net Income 2010-2014 (US$m, AGR %) Table 8.6.3 Fortinet Inc Net Capital Expenditure 2010-2014 (US$m, AGR %) Table 8.6.4 Fortinet Inc Net Sales by Segment of Business 2009-2014 (US$m, AGR %) Table 8.6.5 Fortinet Inc Sales by Geographical Location 2010-2014 (US$m, AGR %) Table 8.6.6 Fortinet Primary International Subsidiaries 2016 (Subsidiary, Location) Table 8.6.7 Fortinet Inc Number of Employees 2011-2014 (Number, AGR %) Table 8.6.8 Fortinet Inc Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.6.9 Fortinet Inc Partnerships (Date, Company Involved, Details) Table 8.7 Hewlett-Packard (HP) Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Net Income US$m, Share in the Cyber Security Market %, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.7.1 Selected Recent Hewlett-Packard (HP) Cyber Security Contracts / Projects / Programmes (Date, Country, Subcontractor, Value US$m, Product, Details) Table 8.7.2 Hewlett-Packard (HP) Total Company Sales 2010-2015 (US$m, AGR %) Table 8.7.3 Hewlett-Packard (HP) Net Income / Loss 2010-2015 (US$m) Table 8.7.4 Hewlett-Packard (HP) Sales by Segment of Business 2010-2015 (US$m, AGR %) Table 8.7.5 Hewlett-Packard (HP) Acquisitions 2011-2015 (Date, Company Involved, Value US$m, Details) Table 8.7.6 Hewlett-Packard (HP) Joint Venture 2015 (Date, Company Involved, Value US$m, Details) Table 8.7.7 Hewlett-Packard (HP) Partnerships 2015 (Date, Company Involved, Details) Table 8.7.8 Hewlett-Packard (HP) Divestitures 2015 (Date, Company Involved, Details) Table 8.8 Intel Corporation Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, No. of Employees, Ticker, Website) Table 8.8.1 Intel Corporation Total Company Sales 2008-2014 ($m, AGR %) Table 8.8.2 Intel Corporation Net Profit 2010-2014 (US$m, AGR %) Table 8.8.3 Intel Corporation Cost of Research & Development 2010-2014 (US$m, AGR %) Table 8.8.4 Intel Corporation Sales by Segment of Business 2010-2014 (US$m, AGR %) Table 8.8.5 Intel Corporation Sales by Geographical Location 2010-2014 (US$m, AGR %) Table 8.8.6 Intel Corporation Primary International Subsidiaries 2015 ( Subsidiary, Location) Table 8.8.7 Intel Corporation Number of Employees 2010-2014 (No. of Employees, AGR %) Table 8.8.8 Intel Corporation Acquisitions 2011-2015 (Date, Company Involved, Value US$m, Details) Table 8.8.9 Intel Corporation Divestiture 2015 (Date, Details) Table 8.9 IBM Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.9.1 Selected Recent International Business Machines (IBM) Corporation Cyber Security Contracts / Projects / Programmes (Date, Country, Value US$m, Product, Details) Table 8.9.2 IBM Total Company Sales 2008-2014 ($m, AGR %) Table 8.9.3 IBM Net Profit 2010-2014 (US$m, AGR %) Table 8.9.4 IBM Cost of Research & Development 2010-2014 (US$m, AGR %) Table 8.9.5 IBM Sales by Segment of Business 2010-2014 (US$m, AGR %) Table 8.9.6 IBM Sales by Geographical Location 2010-2014 (US$m, AGR %) Table 8.9.7 IBM Primary International Subsidiaries 2016 (Region, Subsidiary, Location) Table 8.9.8 IBM Number of Employees 2010-2014 (No. of Employees, AGR %) Table 8.9.9 IBM Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.9.10 IBM Recent Divestiture 2014 (Date, Details) Table 8.10 Kaspersky Lab Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, HQ, Founded, Website) Table 8.10.1 Kaspersky Lab Total Company Sales 2008-2014 ($m, AGR %) Table 8.10.2 Kaspersky Lab Primary International Subsidiaries 2015 (Region, Subsidiary, Location) Table 8.10.3 Kaspersky Lab Acquisitions 2005-2012 (Date, Details) Table 8.10.4 Kaspersky Lab Divestiture 2011 (Date, Details) Table 8.11 Lockheed Martin Corporation Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Net Income US$m, Share in the cyber Security Market %, HQ, No. of Countries Present Worldwide, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.11.1 Selected Recent Lockheed Martin Corporation Cyber Security Contracts / Projects / Programmes (Date, Country , Value US$m, Product, Details) Table 8.11.2 Lockheed Martin Corporation Total Company Sales 2010-2014 (US$m, AGR %) Table 8.11.3 Lockheed Martin Corporation Net Income 2010-2014 (US$m, AGR %) Table 8.11.4 Lockheed Martin Corporation Net Capital Expenditure 2010-2014 (US$m, AGR %) Table 8.11.5 Lockheed Martin Corporation Sales by Segment of Business 2010-2014 (US$m, AGR %) Table 8.11.6 Lockheed Martin Corporation Sales by Geographical Location 2010-2014 (US$m, AGR %) Table 8.11.7 Lockheed Martin Corporation Subsidiaries (Subsidiary, Location) Table 8.11.8 Lockheed Martin Corporation Number of Employees 2010-2014 (Number, AGR %) Table 8.11.9 Lockheed Martin Corporation Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.11.10 Lockheed Martin Corporation Divestitures (Date, Company Involved, Value US$m, Details) Table 8.12 Northrop Grumman Corporation Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Income US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.12.1 Selected Recent Northrop Grumman Corporation Cyber Security Contracts / Projects / Programmes (Date, Country, Value US$m, Details) Table 8.12.2 Northrop Grumman Corporation Total Company Sales 2008-2014 (US$m, AGR %) Table 8.12.3 Northrop Grumman Corporation Net Profit 2009-2014 (US$m, AGR %) Table 8.12.4 Northrop Grumman Corporation Sales by Segment of Business 2010-2014 (US$m, AGR %) Table 8.12.5 Northrop Grumman Corporation Sales by Geographical Location 2010-2014 (US$m, AGR %) Table 8.12.6 Northrop Grumman Corporation Subsidiaries (Subsidiary, Location) Table 8.12.7 Northrop Grumman Corporation Number of Employees 2010-2014 (Number, AGR %) Table 8.12.8 Northrop Grumman Corporation Mergers and Acquisitions (Date, Company Involved, Details) Table 8.12.9 Northrop Grumman Corporation Divestitures (Date, Company Involved, Details) Table 8.13 Optiv Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.13.1 Northrop Grumman Corporation Divestitures (Date, Company Involved, Details) Table 8.14 Palo Alto Networks Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.14.1 Palo Alto Networks Total Company Sales 2008-2015 ($m, AGR %) Table 8.14.2 Palo Alto Networks Net Profit/Loss 2010-2015 (US$m) Table 8.14.3 Palo Alto Networks Cost of Research & Development 2010-2015 (US$m, AGR %) Table 8.14.4 Palo Alto Networks Sales by Segment of Business 2010-2015 (US$m, AGR %) Table 8.14.5 Palo Alto Networks Sales by Geographical Location 2010-2015 (US$m, AGR %) Table 8.14.6 Palo Alto Networks Primary International Subsidiaries 2015 (Region, Subsidiary, Location) Table 8.14.7 Palo Alto Networks Number of Employees 2012-2015 (No. of Employees, AGR %) Table 8.14.8 Palo Alto Networks Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.15 Symantec Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, No. of Employees, IR Contact, Ticker, Website) Table 8.15.1 Symantec Total Company Sales 2008-2015 ($m, AGR %) Table 8.15.2 Symantec Net Profit 2010-2015 (US$m, AGR %) Table 8.15.3 Symantec Cost of Research & Development 2010-2015 (US$m, AGR %) Table 8.15.4 Symantec Sales by Segment of Business 2014-2015 (US$m, AGR %) Table 8.15.5 Symantec Sales by Geographical Location 2008-2015 (US$m, AGR %) Table 8.15.6 Symantec Primary International Subsidiaries 2015 (Region, Subsidiary, Location) Table 8.15.7 Symantec Number of Employees 2010-2015 (No. of Employees, AGR %) Table 8.15.8 Symantec Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.15.9 Symantec Divestitures 2015 (Date, Details) Table 8.15.10 Symantec Mergers 2004 (Date, Details) Table 8.16 Trend Micro Profile 2016 (CEO, Total Company Sales US$m, Sales in the Market US$m, Share in the Cyber Security Market %, Net Profit US$m, HQ, Founded, IR Contact, Ticker, Website) Table 8.16.1 Trend Micro Total Company Sales 2008-2015 ($m, AGR %) Table 8.16.2 Trend Micro Net Profit 2010-2015 (US$m, AGR %) Table 8.16.3 Trend Micro Cost of Research & Development 2011-2014 (US$m, AGR %) Table 8.16.4 Trend Micro Sales by Geographical Location 2008-2014 (US$m, AGR %) Table 8.16.5 Trend Micro Primary International Subsidiaries 2015 (Region, Subsidiary, Location) Table 8.16.6 Trend Micro Acquisitions (Date, Company Involved, Value US$m, Details) Table 8.16.7 Trend Micro Divestitures 2015 (Date, Details) Table 8.17 Other Companies Involved in the Cyber Security Market 2016 (Company, Estimated Sales in the Market $USm, Location) List of Figures Figure 1.1 Global Cyber Security Market Segmentation Overview Figure 1.2 Example of Cyber Security Market by Regional Market Share Forecast 2016, 2021 (% Share) Figure 1.3 Example of National vs. Global Cyber Security Market CAGR Forecast 2016-2021 (CAGR %) Figure 1.4 Example of National Cyber Security Market by Submarket Forecast 2016-2021 (US$m, AGR %) Figure 2.1 Global Cyber Security Market Segmentation Overview Figure 2.2 Common Stages of Cyber Attacks Figure 3.1 Global Cyber Security Market Forecast 2015-2021 (US$m, AGR %) Figure 3.2 Cyber Security Regional Coverage (Region) Figure 3.3 Regional Cyber Security Market Sales Forecast 2016-2021(US$m, AGR%,) Figure 3.4 Regional Cyber Security Market AGR Forecast 2016-2021(AGR%,) Figure 3.5 Regional Cyber Security Market Percentage Change in Market Share 2016-2021 (% Change) Figure 3.6 Regional Cyber Security Market Cumulative Sales 2016-2021 ($US$m) Figure 3.7 Regional Cyber Security Market Share Forecast 2016 (%,) Figure 3.8 Regional Cyber Security Market Share Forecast 2021 (%,) Figure 4.1 Global Cyber Security Submarket Forecast 2016-2021 (US$m, Global AGR %) Figure 4.2 Global Cyber Security Submarket AGR Forecast 2016-2021 (AGR %) Figure 4.3 Global Cyber Security Submarket Share Forecast 2016 (% Share) Figure 4.4 Global Cyber Security Submarket Share Forecast 2021 (% Share) Figure 4.5 Global Cyber Security Submarket Cumulative Sales Forecast 2016-2021 ($USm) Figure 5.1 Leading 9 National Cyber Security Markets Sales Forecast 2016-2021 (US$m, Global AGR %) Figure 5.2 Global Cyber Security Market Leading 9 National Markets AGR Forecast 2016-2021 (AGR %) Figure 5.3 Leading 9 National Cyber Security Markets CAGR Forecast 2016-2021 (CAGR %) Figure 5.4 Leading 9 National Cyber Security Markets Share Forecast 2016 (% Share) Figure 5.5 Leading 9 National Cyber Security Markets Share Forecast 2021 (% Share) Figure 5.6 Leading 9 National Cyber Security Markets Cumulative Sales Share Forecast 2016-2021 (% Share) Figure 5.7 China Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.8 China vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.9 China Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.10 France Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.11 France vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.12 France Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.13 France Cyber Security Agency (ANSSI) Budget 2010-2014 (US$m, AGR %) Figure 5.14 France Cyber Security Agency (ANSSI) Organisational Structure 2016 Figure 5.15 Israel Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.16 Israel vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.17 Israel Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.18 Israeli Defence Contracts Total Value 2007-2014 (US$m, AGR %) Figure 5.19 Japan Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.20 Japan vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.21 Japan Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.22 Japan Spending on IT Software and Services 2012-2014 (US$m) Figure 5.23 Japan Ministry of Defence Spending on Cyber Security 2012-2016 (US$m, AGR %) Figure 5.24 Russia Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.25 Russia vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.26 Russia Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.27 Saudi Arabia Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.28 Saudi Arabia vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.29 Saudi Arabia Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.30 South Korea Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.31 South Korea vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.32 South Korea Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.33 U.S. Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.34 U.S. vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.35 U.S. Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.36 U.S. Federal Government’s Global Budget for Cyber Security 2013-2016 (US$m, AGR %) Figure 5.37 U.S. Federal Government’s Budget for Cyber Security by Departments 2015-2016 (US$m) Figure 5.38 U.S. Total Federal Spending on Cyber Security 2010-2015 (US$m, AGR %) Figure 5.39 U.S. Federal Spending on Cyber Security by Departments 2010-2015 (US$m, AGR %) Figure 5.40 U.S. Federal Spending on Cyber Security by Departments Share 2015 (Share %) Figure 5.41 U.S. Federal Spending on Cyber Security by Departments Cumulative Share 2010 2015 (Share %) Figure 5.42 U.S. Federal Spending on Cyber Security by States 2010-2015 (US$m, AGR %) Figure 5.43 U.S. Federal Spending on Cyber Security by States Share 2015 (Share %) Figure 5.44 U.S. Federal Spending on Cyber Security by States Cumulative Share 2010-2015 (Share %) Figure 5.45 U.S. Government and Military Cyber Security Organisations Figure 5.46 UK Cyber Security Market Forecast 2016-2021 (US$m, AGR %) Figure 5.47 UK vs. Global Cyber Security Market Forecast 2016-2021 ($USm) Figure 5.48 UK Cyber Security Market Share Forecast 2016, 2021 (% Share) Figure 5.49 UK National Cyber Security Programme Total Spending Forecast 2011-2020 (US$m, AGR %) Figure 5.50 UK National Cyber Security Programme Spending by Segments Share 2014-2015 (Share %) Figure 5.51 UK Cyber Security Export in the Security Sector 2012-2015 (US$m, AGR %) Figure 8.1 Global Cyber Security Market Share 2015 (% Market Share) Figure 8.2 Blue Coat Systems Cyber Security Market Share 2015 (% Market Share) Figure 8.2.1 Blue Coat Systems Total Company Sales 2007-2011 (US$m, AGR %) Figure 8.2.2 Blue Coat Systems Sales by Segment of Business 2007-2011 (US$m, Total Company Sales AGR %) Figure 8.2.3 Blue Coat Systems Sales AGR by Segment of Business 2008-2011 (%) Figure 8.2.4 Blue Coat Systems Net Profit / Loss 2007-2011 (US$m) Figure 8.2.5 Blue Coat Systems Cost of Research & Development 2007-2011 (US$m, AGR %) Figure 8.2.6 Blue Coat Systems Primary International Operations 2016 Figure 8.2.7 Blue Coat Systems Sales AGR by Geographical Location 2008-2011 (%) Figure 8.2.8 Blue Coat Systems Sales by Geographical Location 2007-2011 (US$m, Total Company Sales AGR %) Figure 8.2.9 Blue Coat Systems Organisational Structure 2015 Figure 8.2.10 Blue Coat Systems Number of Employees 2007-2011 (No. of Employees, AGR %) Figure 8.2.11 Blue Coat Systems Primary Market Competitors 2015 Figure 8.3 Check Point Software Technologies Ltd Cyber Security Market Share 2015 (% Market Share) Figure 8.3.1 Check Point Software Technologies Ltd Total Company Sales 2005-2014 (US$m, AGR %) Figure 8.3.2 Check Point Software Technologies Ltd Net Income 2005-2014 (US$m, AGR %) Figure 8.3.3 Check Point Software Technologies Ltd Net Capital Expenditure 2011-2014 (US$m, AGR %) Figure 8.3.4 Check Point Software Technologies Ltd Cost of Research & Development 2005-2014 (US$m, AGR %) Figure 8.3.5 Check Point Software Technologies Ltd Primary International Operations 2015 (Headquarters, Primary International Operations) Figure 8.3.6 Check Point Software Technologies Ltd Sales by Geographical Location 2009-2014 (US$m, Total Company Sales AGR %) Figure 8.3.7 Check Point Software Technologies Ltd Sales AGR by Geographical Location 2010-2014 (AGR %) Figure 8.3.8 Check Point Software Technologies Ltd Organisational Structure 2015 Figure 8.3.9 Check Point Software Technologies Ltd Number of Employees 2010-2014 (Number, AGR %) Figure 8.3.10 Check Point Software Technologies Ltd Primary Market Competitors Figure 8.4 Cisco Cyber Security Market Share 2015 (% Market Share) Figure 8.4.1 Cisco Total Company Sales 2008-2015 (US$m, AGR %) Figure 8.4.2 Cisco Net Profit 2010-2015 (US$m, AGR %) Figure 8.4.3 Cisco Cost of Research & Development 2010-2015 (US$m, AGR %) Figure 8.4.4 Cisco Sales by Segment of Business 2011-2015 (US$m, AGR %) Figure 8.4.5 Cisco Sales by Segment of Business 2010-2015 (US$m, AGR %) Figure 8.4.6 Cisco Primary International Operations 2015 Figure 8.4.7 Cisco Sales AGR by Geographical Location 2011-2015 (%) Figure 8.4.8 Cisco Sales by Geographical Location 2010-2015 (US$m, Total Company Sales AGR %) Figure 8.4.9 Cisco Organisational Structure 2015 Figure 8.4.10 Cisco Number of Employees 2012-2015 (No. of Employees, AGR %) Figure 8.4.11 Cisco Primary Market Competitors 2015 Figure 8.5 EMC Cyber Security Market Share 2015 (% Market Share) Figure 8.5.1 EMC Total Company Sales 2008-2014 (US$m, AGR %) Figure 8.5.2 EMC Net Profit 2010-2014 (US$m, AGR %) Figure 8.5.3 EMC Cost of Research & Development 2010-2014 (US$m, AGR %) Figure 8.5.4 EMC Sales AGR by Segment of Business 2011-2014 (AGR %) Figure 8.5.5 EMC Sales by Segment of Business 2010-2014 (US$m, AGR %) Figure 8.5.6 EMC Primary International Operations 2015 Figure 8.5.7 EMC Sales AGR by Geographical Location 2009-2014 (AGR %) Figure 8.5.8 EMC Sales by Geographical Location 2008-2014 (US$m, Total Company Sales AGR %) Figure 8.5.9 EMC Organisational Structure 2015 Figure 8.5.10 EMC Number of Employees 2010-2014 (No of Employees, AGR %) Figure 8.5.11 EMC Primary Market Competitors Figure 8.6 Fortinet Inc Cyber Security Market Share 2015 (% Market Share) Figure 8.6.1 Fortinet Inc Total Company Sales 2009-2014 (US$m, AGR %) Figure 8.6.2 Fortinet Inc Net Income 2010-2014 (US$m, AGR %) Figure 8.6.3 Fortinet Inc Net Capital Expenditure 2010-2014 (US$m, AGR %) Figure 8.6.4 Fortinet Inc Sales by Segment of Business 2009-2014 (US$m, Total Company Sales AGR %) Figure 8.6.5 Fortinet Inc Sales AGR by Segment of Business 2010-2014 (%) Figure 8.6.6 Fortinet Inc Primary International Operations 2015 (Headquarters, Primary International Operations) Figure 8.6.7 Fortinet Inc Sales AGR by Geographical Location 2010-2014 (%) Figure 8.6.8 Fortinet Inc Sales by Geographical Location 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.6.9 Fortinet Inc Organisational Structure 2015 Figure 8.6.10 Fortinet Inc Number of Employees 2011-2014 (Number, AGR %) Figure 8.6.11 Fortinet Inc Primary Market Competitors Figure 8.7 Hewlett-Packard (HP) Cyber Security Market Share 2015 (% Market Share) Figure 8.7.1 Hewlett-Packard (HP) Total Company Sales 2010-2015 (US$m, AGR %) Figure 8.7.2 Hewlett-Packard (HP) Net Income / Loss 2010-2015 (US$m) Figure 8.7.3 Hewlett-Packard (HP) Sales AGR by Segment of Business 2011-2015 (AGR %) Figure 8.7.4 Hewlett-Packard (HP) Sales by Segment of Business 2010-2015 (US$m, AGR %) Figure 8.7.5 Hewlett-Packard (HP) Primary International Operations 2015 (Headquarters, Primary International Operations) Figure 8.7.6 Hewlett-Packard (HP) Organisational Structure 2015 Figure 8.7.7 Hewlett-Packard (HP) Primary Market Competitors Figure 8.8 Intel Corporation Cyber Security Market Share 2015 (% Market Share) Figure 8.8.1 Intel Corporation Total Company Sales 2008-2014 (US$m, AGR %) Figure 8.8.2 Intel Corporation Net Profit 2010-2014 (US$m, AGR %) Figure 8.8.3 Intel Corporation Cost of Research & Development 2010-2014 (US$m, AGR %) Figure 8.8.4 Intel Corporation Sales AGR by Segment of Business 2011-2014 (AGR %) Figure 8.8.5 Intel Corporation Sales by Segment of Business 2010-2014 (US$m, AGR %) Figure 8.8.6 Intel Corporation Primary International Operations 2015 Figure 8.8.7 Intel Corporation Sales AGR by Geographical Location 2011-2014 (AGR %) Figure 8.8.8 Intel Corporation Sales by Geographical Location 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.8.9 Intel Corporation Organisational Structure 2015 Figure 8.8.10 Intel Corporation Number of Employees 2010-2014 (No of Employees, AGR %) Figure 8.8.11 Intel Corporation Primary Market Competitors Figure 8.9 International Business Machines (IBM) Corporation Cyber Security Market Share 2015 (% Market Share) Figure 8.9.1 IBM Total Company Sales 2008-2014 (US$m, AGR %) Figure 8.9.2 IBM Net Profit 2010-2014 (US$m, AGR %) Figure 8.9.3 IBM Cost of Research & Development 2010-2014 (US$m, AGR %) Figure 8.9.4 IBM Sales AGR by Segment of Business 2011-2014 (AGR %) Figure 8.9.5 IBM Sales by Segment of Business 2010-2014 (AGR %) Figure 8.9.6 IBM Primary International Operations 2015 Figure 8.9.7 IBM Sales AGR by Geographical Location 2011-2014 (AGR %) Figure 8.9.8 IBM Sales by Geographical Location 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.9.9 IBM Organisational Structure 2015 Figure 8.9.10 IBM Number of Employees 2010-2014 (No Of Employees, AGR %) Figure 8.9.11 IBM Primary Market Competitors 2015 Figure 8.10 Kaspersky Cyber Security Market Share 2015 (% Market Share) Figure 8.10.1 Kaspersky Lab Total Company Sales 2008-2014 (US$m, AGR %) Figure 8.10.2 Kaspersky Lab Primary International Operations 2015 Figure 8.10.3 Kaspersky Lab Organisational Structure 2015 Figure 8.10.4 Kaspersky Lab Primary Market Competitors Figure 8.11 Lockheed Martin Corporation Cyber Security Market Share 2015 (% Market Share) Figure 8.11.1 Lockheed Martin Corporation Total Company Sales 2010-2014 (US$m, AGR %) Figure 8.11.2 Lockheed Martin Corporation Net Income 2010-2014 (US$m, AGR %) Figure 8.11.3 Lockheed Martin Corporation Net Capital Expenditure 2010-2014 (US$m, AGR %) Figure 8.11.4 Lockheed Martin Corporation Sales by Segment of Business 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.11.5 Lockheed Martin Corporation Sales AGR by Segment of Business 2011-2014 (%) Figure 8.11.6 Lockheed Martin Corporation Primary International Operations 2015 (Headquarters, Primary International Operations) Figure 8.11.7 Lockheed Martin Corporation Sales AGR by Geographical Location 2010-2014 (%) Figure 8.11.8 Lockheed Martin Corporation Sales by Geographical Location 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.11.9 Lockheed Martin Corporation Organisational Structure 2015 Figure 8.11.10 Lockheed Martin Corporation Number of Employees 2010-2014 (Number, AGR %) Figure 8.11.11 Lockheed Martin Corporation Primary Market Competitors Figure 8.12 Northrop Grumman Corporation Cyber Security Market Share 2015 (% Market Share) Figure 8.12.1 Northrop Grumman Corporation Total Company Sales 2008-2014 (US$m, AGR %) Figure 8.12.2 Northrop Grumman Corporation Net Profit 2009-2014 (US$m, AGR %) Figure 8.12.3 Northrop Grumman Corporation Sales by Segment of Business 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.12.4 Northrop Grumman Corporation Sales AGR by Segment of Business 2011-2014 (%) Figure 8.12.5 Northrop Grumman Corporation Primary International Operations 2015 (Headquarters, Primary International Operations) Figure 8.12.6 Northrop Grumman Corporation Sales AGR by Geographical Location 2011-2014 (%) Figure 8.12.7 Northrop Grumman Corporation Sales by Geographical Location 2010-2014 (US$m, Total Company Sales AGR %) Figure 8.12.8 Northrop Grumman Corporation Organisational Structure 2015 Figure 8.12.9 Northrop Grumman Corporation Number of Employees 2010-2014 (Number, AGR %) Figure 8.12.10 Northrop Grumman Corporation Primary Market Competitors Figure 8.13 Optiv Cyber Security Market Share 2015 (% Market Share) Figure 8.13.1 Optiv Primary International Operations 2015 Figure 8.13.2 Optiv Organisational Structure 2016 Figure 8.13.3 Optiv Primary Market Competitors 2015 Figure 8.14 Palo Alto Networks Cyber Security Market Share 2015 (% Market Share) Figure 8.14.1 Palo Alto Networks Total Company Sales 2008-2015 (US$m, AGR %) Figure 8.14.2 Palo Alto Networks Net Profit/Loss 2010-2015 (US$m) Figure 8.14.3 Palo Alto Networks Cost of Research & Development 2010-2015 (US$m, AGR %) Figure 8.14.4 Palo Alto Networks Sales AGR by Segment of Business 2011-2015 (AGR %) Figure 8.14.5 Palo Alto Networks Sales by Segment of Business 2010-2015 (US$m, AGR %) Figure 8.14.6 Palo Alto Networks Primary International Operations 2016 Figure 8.14.7 Palo Alto Networks Sales AGR by Geographical Location 2011-2015 (AGR %) Figure 8.14.8 Palo Alto Networks Sales by Geographical Location 2010-2015 (US$m, Total Company Sales AGR %) Figure 8.14.9 Palo Alto Networks Organisational Structure 2015 Figure 8.14.10 Palo Alto Networks Number of Employees 2012-2015 (No of Employees, AGR %) Figure 8.14.11 Palo Alto Networks Primary Market Competitors Figure 8.15 Symantec Corporation Cyber Security Market Share 2015 (% Market Share) Figure 8.15.1 Symantec Total Company Sales 2008-2015 (US$m, AGR %) Figure 8.15.2 Symantec Net Profit 2010-2015 (US$m, AGR %) Figure 8.15.3 Symantec Cost of Research & Development 2010-2015 (US$m, AGR %) Figure 8.15.4 Symantec Sales by Segment of Business 2014-2015 (US$m) Figure 8.15.5 Symantec Primary International Operations 2015 Figure 8.15.6 Symantec Sales AGR by Geographical Location 2009-2015 (AGR %) Figure 8.15.7 Symantec Sales by Geographical Location 2008-2015 (US$m, Total Company Sales AGR %) Figure 8.15.8 Symantec Organisational Structure 2015 Figure 8.15.9 Symantec Number of Employees 2010-2015 (No. of Employees, AGR %) Figure 8.15.10 Symantec Primary Market Competitors Figure 8.16 Trend Micro Cyber Security Market Share 2015 (% Market Share) Figure 8.16.1 Trend Micro Total Company Sales 2010-2015 (US$m, AGR %) Figure 8.16.2 Trend Micro Net Profit 2010-2015 (US$m, AGR %) Figure 8.16.3 Trend Micro Cost of Research & Development 2011-2014 (US$m, AGR %) Figure 8.16.4 Trend Micro Primary International Operations 2015 Figure 8.16.5 Trend Micro Sales AGR by Geographical Location 2009-2014 (AGR %) Figure 8.16.6 Trend Micro Sales by Geographical Location 2008-2014 (US$m, Total Company Sales AGR %) Figure 8.16.7 Trend Micro Organisational Structure 2015 Figure 8.16.8 Trend Micro Primary Market Competitors Companies Mentioned in this Report @Stake 1 Mainstream Inc 3001 International Inc 4FrontSecurity Acano Limited Accuvant ACS Actona Technologies Ltd Adaptivity AffirmTrust Airbus Defence and Space Airbus Group Aironet Canada Inc. Aironet Canada Limited Airspace Wireless Networks Private Limited Akamai Technologies Alcatel-Lucent Alchemy API Algosec AlienVault Alion Science and Technology Allied Holdings Inc Altera Altiris Amazon Amazon Web Services (AWS) Americas HQ Amor Group Anthem Applied Research Corporation AppStream Arista Networks Arroyo Video Solutions LLC Aruba Networks Ashley Madison AsiaInfo Technologies Aspera Assemblage Astrotech Corporation Astrotech Space Operations AT&T Atos Autonomy Corporation Avast Aveksa Aveos Fleet Performance AVG Technologies AXENT BAE Systems Baidu Bain Capital Baraccuda Networks Barbaricum LLC BarcoNet Pty. Ltd. Baum, Romstedt Technology Research Corp Belgacom Bindview Development Corporation Bit9 + Carbon Black BitDefender Blackfin Security Blackstone Bloomberg Blue Box Group Blue Coat Netherlands B.V. Blue Coat Systems Blue Coat Systems Australia Pty. Ltd. Blue Coat Systems Canada, Inc. Blue Coat Systems Hong Kong Ltd. Blue Coat Systems International, Inc. Blue Coat Systems K.K. Blue Coat Systems Latvia, SIA Blue Coat Systems Ltd. (UK) Blue Coat Systems Malaysia SDN. BHD. Blue Coat Systems SARL Blue Coat Systems, Belgium B.V.B.A. Boeing Defense, Space & Security Boleto Bancário Booz Allen Hamilton Booz Allen Hamilton Inc Brightmail Broadware Technologies LLC Broadweb BT Group Bull Business Week California Microwave Inc Canada Inc. Capita Carlyle Group CDL Systems Ltd CDW Government LLC CenturyLink Cerberian, Inc. CGI Group Inc Chandler / May Inc. Check Point Holding (Singapore) PTE Ltd Check Point Holding (Singapore) PTE Ltd – US Branch Check Point Holding (Singapore) PTE Ltd. (Representative Office) Check Point Holding AB Check Point Software (Canada) Technologies Inc Check Point Software Technologies (Japan) Ltd Check Point Software Technologies (Netherlands) B.V Check Point Software Technologies Inc Check Point Software Technologies Ltd. China Telecom CirroSecure Cisco Albania SHPK Cisco Bahrain (SPC) Cisco Cameroon Limited Cisco Capital (Dubai) Limited Cisco Comercio E Servicos De Hardware E Software Do Brasil LTDA Cisco Development India Private Limited Cisco Do Brasil Ltda Cisco Fast Data, LLC Cisco International Limited Cisco Iris, Inc. Cisco IronPort Systems LLC Cisco ISH BV Cisco ISH II BV Cisco Linksys Kiss ApS Cisco Malaysia Managed Services Sdn. Bhd Cisco Managed Solutions, Inc. Cisco Media Solutions, Inc. Cisco MO BV Cisco Photonics Italy Srl Cisco QSTP-LLC Cisco Ravenscourt LLC Cisco RZ LLC (formerly Richard Zeta Intelligence, Inc.) Cisco SBAIF III, Inc. Cisco Serbia doo Beograd Cisco Services Malaysia Sdn Bhd Cisco Systems Cisco Systems (Argentina) SA Cisco Systems (Bermuda) Holdings Ltd Cisco Systems (Bermuda) Ltd Cisco Systems (China) Information Technology Services Limited Cisco Systems (China) Networking Technology Co., Ltd. Cisco Systems (China) Research and Development Co., Ltd. Cisco Systems (Colombia) Ltda Cisco Systems (Czech Republic) SRO Cisco Systems (Ethiopia) PLC Cisco Systems (HK) Limited Cisco Systems (India) Ltd. Cisco Systems (India) Private Limited Cisco Systems (Italy) Srl Cisco Systems (Jordan) Cisco Systems (Korea) Limited Cisco Systems (Malaysia) Sdn Bhd Cisco Systems (Nigeria) Limited Cisco Systems (Puerto Rico) Corp Cisco Systems (Scotland) Limited Cisco Systems (Senegal) SUARL Cisco Systems (South Africa) (Proprietary) Limited Cisco Systems (Spain) SL Cisco Systems (Sweden) AB Cisco Systems (Switzerland) GmbH Cisco Systems (Switzerland) Investments Ltd Cisco Systems (Thailand) Limited Cisco Systems (Trinidad & Tobago) Limited Cisco Systems (USA) Pte Ltd Cisco Systems Algeria EURL Cisco Systems Australia Pty Limited Cisco Systems Austria GmbH Cisco Systems Belgium BVBA/SPRL Cisco Systems Bulgaria EOOD Cisco Systems Canada Co./Les Systemes Cisco Canada Cie Cisco Systems Capital (Australia) Pty Limited Cisco Systems Capital (India) Private Limited Cisco Systems Capital (Korea) Limited Cisco Systems Capital (Thailand) Limited Cisco Systems Capital Asia Pte Ltd Cisco Systems Capital Canada Co./Les Systemes Cisco Capital Canada Cie Cisco Systems Capital China Corporation Cisco Systems Capital Corporation Cisco Systems Capital France SAS Cisco Systems Capital GmbH Cisco Systems Capital Italy Srl Cisco Systems Capital KK Cisco Systems Capital Netherlands BV Cisco Systems Capital Sdn Bhd Cisco Systems Capital South Africa (Proprietary) Limited Cisco Systems Capital Spain, SL Cisco Systems Chile SA Cisco Systems Co. Cisco Systems Costa Rica, SA Cisco Systems Croatia Ltd. For Trade Cisco Systems Cyprus Ltd Cisco Systems De Mexico, SA de CV Cisco Systems Denmark ApS Cisco Systems Dominicana SA Cisco Systems Ecuador SA Cisco Systems Egypt Ltd. Cisco Systems El Salvador, Ltda de CV Cisco Systems Estonia OU Cisco Systems Finance International Cisco Systems Finance International Holdings I Limited Cisco Systems Finance International Holdings II Limited ClearLeap Clearwell Systems Cleversafe Cloud Sync Cloudant Cloudflare Cloudscaling CM Equity Partners Cognitive Security Collaborate.com Comneon Compagnie IBM France, S.A.S. Companhia IBM Portuguesa, S.A. Company-i Components Intel de Costa Rica, S.A. Compose Composite Software Comptek Research Inc Computer Sciences Corporation ConteXtream Cosentini Associates Countertack Coyote Point Crossbeam Systems, Inc CrossIdeas Crowdstrike CSL International Cyber Defense Information Assurance CyberArk Cybereason Cylance Cyvera Ltd Cyvera, Inc. Daeja Image Systems Ltd Darktrace Defensetech Dell Federal Systems Inc Dell Inc Dell SecureWorks Deloitte Deloitte Touche Tohmatsu Ltd Deposition Sciences Inc Diebold Digital Guardian Digital Shadows DMI Domino’s Pizza DRC Systems DSSD Dynasec Ltd Elastica Embrane EMC EMC (Benelux) B.V. EMC Information Systems International EMC International Company EMC International U.S. Holdings, Inc. Entera Corporation Enterprise Integration Group Ernst&Young Global Ltd ESET Eucalyptus Exelis, Inc. Explorys FaceTime Communications Federal Data Corporation Fiberlink Communications FireEye FireEye, Inc FireMon FishNet Security Forcepoint Fortinet Fortinet BV Fortinet Federal Inc Fortinet GmbH Fortinet Information Technology (Beijing) Co Ltd Fortinet Information Technology (Tianjin) Co Ltd Fortinet International Inc. Fortinet Japan K.K. Fortinet Malaysia SDN. BHD. Fortinet Mexico Fortinet S.A.R.L. Fortinet Singapore Private Limited Fortinet Technologies (Canada) Inc Fortinet Technologies India Private Limited Fortinet Technologies Sales (Canada) Inc Fortinet UK Ltd F-Secure Gemalto General Atlantic General Dynamics General Dynamics Corporation General Dynamics Information Technology Georgia Tech Georgia Tech Applied Research Corporation Gideon Technologies Global HQ Global Technical Systems Globalfoundries Inc GLONASS Google Gravitant Grumman International Inc Grumman Ohio Corporation Guidance Software Havok Healthcare Incorporated Hewlett Packard Enterprise (HPE) Hewlett Packard Inc Hewlett-Packard Company Hiflex Hitachi Home Depot Honeywell HP Enterprise Services Huawei Humyo Huntington Ingalls Industries Inc Hyperwise Ltd IBM (China) Co., Ltd. IBM (China) Investment Company Limited IBM Argentina Sociedad de Responsabilidad Limitada IBM Australia Limited IBM Bangladesh Private Limited IBM Bulgaria Ltd. IBM Ceska Republika spol. s.r.o. IBM China/Hong Kong Limited IBM Croatia Ltd./IBM Hrvatska d.o.o. IBM Denmark ApS IBM Deutschland GmbH IBM Deutschland Kreditbank GmbH IBM East Europe/Asia Ltd. IBM Eesti Osauhing (IBM Estonia Ou) IBM Foreign Sales Corporation IBM France Financement, S.A. IBM Global Financing Australia Limited IBM Hellas Information Handling Systems S.A. IBM India Private Limited IBM International Group B.V. IBM Ireland Limited IBM Ireland Product Distribution Limited IBM Italia S.p.A. IBM Japan, Ltd. IBM Korea, Inc. IBM Lietuva IBM Magyarorszagi Kft. IBM Malaysia Sdn Bhd IBM Malta Limited IBM Nederland B.V. IBM New Zealand Limited IBM Oesterreich Internationale Bueromaschinen GmbH IBM Philippines, Incorporated IBM Polska Sp z oo IBM Romania Srl IBM Schweiz AG—IBM Suisse SA—IBM Suizzera SA—IBM Switzerland Ltd. IBM Services Financial Sector Luxembourg Sarl IBM Singapore Pte. Ltd. IBM Slovenija d.o.o. IBM Slovensko spol s.r.o. IBM Svenska Aktiebolag IBM Taiwan Corporation IBM Thailand Company Limited IBM Ukraine IBM United Kingdom Asset Leasing Limited IBM United Kingdom Financial Services Limited IBM United Kingdom Limited IBM Vietnam Company IBM—International Business Machines d.o.o., Belgrade Identity Theft Guard Solutions LLC Idnetum Imlogic Inc Industrial Defender Inc Insieme Networks Intel America, Inc Intel Asia holding Limited Intel Benelux B.V. Intel Capital (Cayman) Corporation Intel Capital Corporation Intel China Ltd. Intel Corporation Intel Corporation (UK) Ltd. Intel Electronics Finance Limited Intel Electronics Ltd. Intel Europe, Inc. Intel Holdings B.V. Intel International Intel Investment Management Limited Intel Ireland Limited Intel Israel (74) Limited Intel Israel Holdings B.V. Intel Kabushiki Kaisha Intel Massachusetts, Inc Intel Mobile Communications GmbH Intel Overseas Funding Corporation Intel Security Intel Semiconductors, Ltd. Intel Semiconductor (Dalian) Ltd. Intel Semiconductor (US) Limited International Business Machines AS International Business Machines Corporation (IBM) International Business Machines of Belgium spry/buba International Business Machines, S.A. Intucell Investcorp Iron Bow Technologies LLC Isis Defence J.P. Morgan Johnson Controls JouleX Juniper Networks Kaspersky Lab Kaspersky Lab Argentina Kaspersky Lab Asia-Pacific HQ Kaspersky Lab Australia and New Zealand Kaspersky Lab Benelux Kaspersky Lab Canada Kaspersky Lab China Kaspersky Lab France Kaspersky Lab Germany Kaspersky Lab Iberia Kaspersky Lab India Kaspersky Lab Italy Kaspersky Lab Japan Kaspersky Lab Korea Kaspersky Lab Malaysia Kaspersky Lab Mexico Kaspersky Lab Nordics Kaspersky Lab Polska sp z oo Kaspersky Lab Romania Kaspersky Lab South Africa (Pty) Ltd. Kaspersky Lab Switzerland Kaspersky Lab Turkey Kaspersky Lab UK Knowledge Consulting Group (KCG) KPMG KPMG Kratos Defense KT mobile networks Kudu Dynamics LLC L-3 Communications L-3 Communications Holdings Lacoon Mobile Security Lancope, Inc LANdesk Software Leidos Inc Lenovo lgoSec Lindsay Goldberg LLC Liric Associates LiveOffice Lockheed Martin Aerospace Systems Integration Corporation (Delaware) Lockheed Martin Australia Pty Limited Lockheed Martin Canada Inc Lockheed Martin Corporation Lockheed Martin Desktop Solutions Inc Lockheed Martin Engine Investments LLC Lockheed Martin Global Inc Lockheed Martin Integrated Systems Inc Lockheed Martin Integrated Technology LLC Lockheed Martin Investments Inc Lockheed Martin Logistics Management Inc Lockheed Martin Operations Support Inc Lockheed Martin Services Inc Lockheed Martin Simulation, Training, and Support Lockheed Martin Space Alliance Company Lockheed Martin TAS International Services Inc Lockheed Martin UK Insys Limited Lockheed Martin UK Limited Logic Logicon Commercial Information Services Inc Logicon Inc Logicon International Inc LogRhythm M5 Network Security Pty Ltd MacAulay-Brown, Inc Maginatics MaintenanceNet Malwarebytes Anti-Malware ManageEngine Mandiant ManTech ManTech Advance Systems International, Inc. ManTech International Corporation McAfee, Inc Memoir Systems Meru Networks MessageLabs Metacloud Meteorix LLC Mi5 Networks Micro Focus (Novell) Microsoft Corporation Microtech Systems Middle-East FZ-LCC Mission College Investments Ltd. Mitsubishi Heavy Industries Mobile Armor Mocit Inc Morta Security, Inc. Mt Gox Naikon Group Neophis NGC Denmark ApS Niederlassung Osterreich NitroDesk NitroSecurity Nokia Nonghyup Cooperative Norman Shark Northrop Grumman Corporation Northrop Electro-Optical Systems Northrop Grumman - Canada Northrop Grumman Aviation Inc Northrop Grumman Electronic Systems International Company Northrop Grumman Electronic Systems International Company (UK) Northrop Grumman Electronics Systems Integration International Inc Northrop Grumman Field Support Services Inc Northrop Grumman Foreign Sales Corporation Northrop Grumman Information and Technology, Inc Northrop Grumman International Inc Northrop Grumman International Services Company Inc Northrop Grumman ISA International Inc Northrop Grumman Overseas Holdings Inc Northrop Grumman Overseas Service Corporation Northrop Grumman Space Operations LP Northrop Grumman Systems Corp Northrop Grumman Systems Information Sector Northrop Grumman Tactical Systems LLC Northrop Grumman Technical Services Corporation Northrop Grumman Technical Services Inc Northrop International Aircraft Inc Nova Scotia Company Now Factory NSS Labs Inc. nSuite NTT Com Security NTT Communications Nukona Oak Ridge ON Technology OpenDNS Optiv Oracle Orange OTC Holdings Inc Oy IBM Finland AB Pacific Architects and Engineers Inc Packeteer Palo Alto Networks (Australia) Pty Ltd Palo Alto Networks (Brasil) Ltda. Palo Alto Networks (Canada) Inc. Palo Alto Networks (Germany) GmbH Palo Alto Networks (India) Private Limited Palo Alto Networks (Malaysia), LLC Palo Alto Networks (Mexico) S. de R.L. de C.V. Palo Alto Networks (Netherlands) B.V. Palo Alto Networks (Norway) AS Palo Alto Networks (Singapore) Holding Company Pte. Ltd. Palo Alto Networks (Singapore) PTE. LTD. Palo Alto Networks (UK) Limited Palo Alto Networks Belgium B.V.B.A. Palo Alto Networks FZ LLC Palo Alto Networks Godo Kaisha Palo Alto Networks Holding B.V. Palo Alto Networks International, Inc. Palo Alto Networks Korea, Ltd. Palo Alto Networks, L.L.C. PAN C.V. PAN LLC Panda Security Park Air Electronics Inc ParStream PasswordBank Pawaa PayPal PC Tools Perceptics Corporation Perspecsys PGP Corporation Phytel PistonCloud Computing Pivot Holdings LLC Platform Logic Ponemon Institute Portcullis Computer PricewaterhouseCoopers (PWC) Primera Blue Cross Procerus Technologies, L.C. (Procerus) Professional Project Services Inc. Promisec ProofPoint Prykarpattyaoblenergo PT IBM Indonesia Qantas Defence Services (QDS) QTC Holdings Inc QTC Holdings Inc (QTC) Radware Raytheon Raytheon (Forcepoint) Raytheon BBN Technologies Corp Recon Instruments Redstone Arsenal Relicore Inc. Remotec Inc Resilient Systems Riga Corporation RSA Information Security RUAG Sabiedriba ar irobezotu atbildibu IBM Latvija Safran SAIC Sandia Corporation Sandia Corporation (d/b/a Sandia National Laboratories, Co.) Sandia National Laboratories Saudi Aramco Savi Technology, Inc. ScaleIO ScanDisk Corporation Seagate Secure Computing Security Group Sentrigo Serco Servicentro TMLA S.A.de C.V. Shunra Sierra Nevada Corp Sikorsky Aircraft Silicium Security Silveerpop Silver Tail Systems Simics Sim-Industries B.V. (Sim-Industries) Singtel Skybox Security Skyview Capital SMS Data Products Group Inc. Snapfish SofaWare Technologies Ltd SoftLayer SoftScan Solera Networks Solers Inc. SolveDirect SonicWall SonicWall (Dell) Sony Corporation Sony Pictures Entertainment Sophos Sourcefire Spamtest Splunk SRA International Inc SRI Star Analytics Inc Sterling Software (US) Inc Sterling Software Weather Inc StrongLoop SwapDrive Sygate Technology Symantec (UK) Limited Symantec Asia Pacific Pte. Ltd. Symantec Corporation Symantec Holdings Limited Symantec International Symantec Japan LLC Symantec Limited Symantec Operating Corporation Symantec Software India Private Ltd. Syncplicity Systems made Simple Tail-f Systems TalkTalk Target TASC Inc. Technica Technica Corporation Technologies Thales Group The New York Times The Weather Company Third Brigade Thoma Bravo, LLC ThreatGrid Tools Transparent Trend Micro (China) Incorporated Trend Micro (EMEA) Limited Trend Micro (NZ) Limited Trend Micro (Singapore) Private Limited Trend Micro (Thailand) Limited Trend Micro (UK) Limited Trend Micro Australia Pty. Ltd. Trend Micro Deutschland GmbH Trend Micro do Brasil Ltda. Trend Micro France Trend Micro Hong Kong Limited Trend Micro Inc. Trend Micro Incorporated Trend Micro India Private Limited Trend Micro Italy Srl Trend Micro Korea Inc. Trend Micro Latinoamerica S.A.de C.V. Trend Micro Malaysia Sdn Bhd TripWire Tropo Trusteer Tufin TurnTide TV5 Monde TWD & Associates TwinStrata Ubiquisys Unicorn Government Inc United Technologies Corporation UrbanCode Vencore Labs Inc Veracode VeriSign Veritas Veritas Capital VERITAS Software Corporation Verizon Verizon Enterprise Solutions Virtustream VMware Bermuda Limited VMware, Inc. Voltage Security Vontu Western Digital Corporation WHIPTAIL WholeSecurity Willis Group Holdings Wind River Systems Wind River Systems, Inc World Wide Technology Inc Wyle Laboratories, Inc. X Technologies, Inc Xetron Corporation Xtera Communications Inc Xtify Inc XtreamLok Yandex YTN Zeta Associates Inc ZiiLabs Organisations, Groups, Non-State Actors and Institutions Mentioned in This Report Agence National de la Security des Systemes d’Information (ANSSI) Alsancak Tim Anonymous collective Beer Sheva’s Ben-Gurion university Boko Haram Brazilian Ministry of External Relations Canada Department of National Defence Canada Finance Department Canada Treasury Board China Aerospace Science & Industry Corporation (CASIC) Chinese CERT Chinese General Office of the State Council Chinese Ministry of Commerce Chinese Ministry of National Defence Chinese Ministry of Public Security Chinese Ministry of State Security Chinese People’s Liberation Army (PLA) Chinese PLA Unit 61398 Chinese Science of Military Strategy Defence Research and Development Canada Estonian Parliament European Commission European Union (EU) French Ministry of Defence French Ministry of Finance French Ministry of Interior French Parliament G20 G7 General Office of the Communist Party of China Guardians of Peace Hamas Hezbollah Inchon airport India Defence Research and Development Organisation (DRDO) India Ministry of External Affairs India Ministry of Home Affairs Indo-Tibetan Border Police (ITBP) INTERPOL Iranian Cyber Army Islamic State in Iraq and Syria (ISIS) Israel Defense Forces (IDF) Israel National Cyber Bureau Israeli Cyber Command Israeli Cyber Event Readiness Team Israeli National Cybersecurity Authority Israeli Prime Minister’s Office Israeli Unit 8200 Israeli Defence Ministry Izz ad-Din Al Qassam Japan National Centre of Incident Readiness and Strategy for Cyber Security (NISC) Japan Control Systems Security Centre (CSSC) Japan Defence Ministry Japan Information technology Promotion Agency (IPA) Japan Ministry of Defence (MoD) Japan Ministry of Economy, Trade and Industry (METI) Japan Ministry of Internal Affairs and Communications Japan Ministry of internal Affairs and Communications (MIC) Japan National Institute of Information and Communications Technology (NICT) Japan National Police Agency Japan NICT’s Network Security Laboratory Japan Pension Services Lawrence Berkeley National Laboratory MAHER Centre of Iranian National Computer Emergency Response Team Massachusetts Institute of Technology (MIT) Mexican Centre for Investigation and National Security Mexican Secretariat of National Defense Mexican Secretariat of the Navy Myanmar Posts and Telecommunications Naikon group NASA Nigerian Defence Headquarters North Atlantic Treaty Organisation (NATO) Norwegian National Security Authority Office of the Dalai Lama Rex Mundi Russian 5th Dimension Cyber Army Russian Komitet gosudarstvennoy bezopasnosti (KGB ) Russian Ministry of Defence Sandia National Laboratories Saudi Arabian Ministry of Communications and Information Technology Senegalese Agence de l’Informatique de l’Etat Seoul Subway South Korea Communications Commission South Korea Cyber Security Centre South Korea Cyber War Centre South Korean Ministry of National Defence South Korean National Assembly’s Public Administration & Security Committee South Korean National Intelligence Service South Korean National Security Council Stockholm International Peace Research Institute Tarh Andishan The Commonwealth The Dukes The Impact Team Tsinghua University U.S. DISA U.S. ICS-CERT U.S. Air Force U.S. Air Force Cyber Command (AFCYBER) U.S. ARMY U.S. Army Cyber Command (ARCYBER) U.S. Army Cyber Command (USCYBERCOM) U.S. Central Command U.S. Computer Emergency Readiness Team (US-CERT) U.S. Cyber Command U.S. Cyber Crimes Center (C3) U.S. Cyber Mission Force U.S. Defense Advanced Research Projects Agency (DARPA) U.S. Defense Logistics Agency U.S. Department of Agriculture U.S. Department of Commerce U.S. Department of Defense U.S. Department of Education U.S. Department of Energy U.S. Department of Health and Human Services U.S. Department of Homeland Security U.S. Department of Housing and Urban Development U.S. Department of Interior U.S. Department of Justice U.S. Department of Labor U.S. Department of State U.S. Department of the Interior U.S. Department of Transportation U.S. Department of Treasury U.S. Department of Veterans Affairs U.S. DHS Science & Technology Directorate U.S. Environment and Protection agency U.S. Environmental Protection Agency U.S. Federal Bureau of Investigation (FBI) U.S. Fleet Cyber Command (FLTCYBER) U.S. General Services Administration U.S. Government Accountability Office U.S. Immigration and Customs Enforcement (ICE) U.S. Internal Revenue Service U.S. Joint Chiefs of Staff U.S. Marine Corps U.S. Marine Forces Cyber Command (MARFORCYBER) U.S. Nation Security Agency (NSA) U.S. National Aeronautics and Space Administration (NASA) U.S. National Computer Forensic Institute U.S. National Cyber investigative Joint Task Force (NCIJTF) U.S. National Cybersecurity and Communications Integration Center (NCCIC) U.S. National Institute of Standards and Technology (NIST) U.S. National Intelligence U.S. National Protection and Programs Directorate (NPPD) U.S. National Science Foundation U.S. Navy U.S. Navy Space and Naval Warfare Systems Center Pacific U.S. NPPD U.S. Office of Cyber and infrastructure Analysis (OCIA) U.S. Office of Cybersecurity and Communications (CS&C) U.S. Office of Personnel Management U.S. Secret Service U.S. Social Security Administration U.S. Strategic Command UK Cabinet Office UK Computer Emergency Response Team (CERT-UK) UK Defence Cyber Protection Partnership UK Department for Business, Innovation & Skills (BIS) UK Government Communications Headquarters UK Government Digital Service UK HM Treasury UK Metropolitan Police Service (MPS) UK the Cyber security information Sharing Partnership for Industry & Government Washington Headquarters Services Wikileaks World Economic Forum For more information and orders please contact gabriel.diaz@vgtelecomreports.com Terms and Conditions By replying to this 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If however, you wish to stop future messages you can unsubscribe from this list From owner-freebsd-ppc@freebsd.org Wed Dec 7 22:16:15 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 20C26C6CF1A for ; Wed, 7 Dec 2016 22:16:15 +0000 (UTC) (envelope-from bounce@e.bananabed.com.au) Received: from mx11.bananabed.com.au (mx11.bananabed.com.au [46.105.135.224]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B138F1162 for ; Wed, 7 Dec 2016 22:16:14 +0000 (UTC) (envelope-from bounce@e.bananabed.com.au) DKIM-Signature: v=1; a=rsa-sha1; c=relaxed/relaxed; s=1481058667.bananabed; d=e.bananabed.com.au; h=To:Subject:Message-ID:Date:From:Reply-To:MIME-Version:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; i=info@e.bananabed.com.au; bh=Q+CUmGfM1YURtrcB96u3ryRihGI=; b=Xk9V0nTGnx+SLv1e280x1BKmrOjaCtT65pZmsBOtfv6vC/oosmzvZxZ+v4oo48ImoefIcUeN91Oi FdUYfjqnv/zrHmHkhQLTIo7TSeCN8xx0z4FFLmFP4Fh48w0X33/4ovRJJTrqDIoo0wVpUD9CKKLx Wztle1a8AT57gC7MgAA= DomainKey-Signature: a=rsa-sha1; c=nofws; q=dns; s=1481058667.bananabed; d=e.bananabed.com.au; b=BETKG0T3iKTxDpjCuPx8Ga6C0RfNgAFjJQslQLsH1bhLukQDEJ/2MLaLY7/qE1brTXM8Z2nLBvXu 1JuUMQVfjZtryPcENfxo2OXihZiORuF0o71sgfYbi7EFGE5fHwTB+s44IhQHHdVHX8UG85DO2dVC FlMRuZ/RFMYjAOFEXak=; To: freebsd-ppc@freebsd.org Subject: The perfect present for everyone.. Message-ID: Date: Wed, 07 Dec 2016 22:16:13 +0000 From: "Banana Bed" Reply-To: info@e.bananabed.com.au MIME-Version: 1.0 X-Mailer-LID: 2 X-Mailer-RecptId: 167265 X-Mailer-SID: 3 X-Mailer-Sent-By: 1 Content-Type: text/plain; format=flowed; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Content-Filtered-By: Mailman/MimeDel 2.1.23 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Dec 2016 22:16:15 -0000 Your email client cannot read this email. To view it online, please go here: http://e.bananabed.com.au/mail/display.php?M=167265&C=1185400d3305f5fb1c87fcfba32f8b80&S=3&L=2&N=1 To stop receiving these emails:http://e.bananabed.com.au/mail/unsubscribe.php?M=167265&C=1185400d3305f5fb1c87fcfba32f8b80&L=2&N=3 From owner-freebsd-ppc@freebsd.org Thu Dec 8 00:18:37 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D1CD9C6CA30 for ; Thu, 8 Dec 2016 00:18:37 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-17.reflexion.net [208.70.210.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8B24AAD4 for ; Thu, 8 Dec 2016 00:18:36 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 22181 invoked from network); 8 Dec 2016 00:12:41 -0000 Received: from unknown (HELO rtc-sm-01.app.dca.reflexion.local) (10.81.150.1) by 0 (rfx-qmail) with SMTP; 8 Dec 2016 00:12:41 -0000 Received: by rtc-sm-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Wed, 07 Dec 2016 19:11:50 -0500 (EST) Received: (qmail 8231 invoked from network); 8 Dec 2016 00:11:50 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 8 Dec 2016 00:11:50 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id AF2CCEC7B39; Wed, 7 Dec 2016 16:11:49 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <20161207190057.GA58950@vlakno.cz> Date: Wed, 7 Dec 2016 16:11:48 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 00:18:37 -0000 On 2016-Dec-7, at 11:00 AM, Roman Divacky wrote: > Can the compiler you built with the patch process this file: >=20 > typedef int register_t; > #define mtpmr(reg, val) = \ > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > #define mfpmr(reg) = \ > ( { register_t val; = \ > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > val; } ) >=20 > #define PMR_PMC0 16 >=20 > int foo() > { > return mfpmr(PMR_PMC0); > } >=20 >=20 > I can compile it just fine locally. Not sure why it wouldnt work in = your case. I separately had helped with testing for bugzilla 214902 and so had updated to head -r309656 so the context was different. But I figured out the .td file related issue on powerpc64. My means of forcing all the compiles that target powerpc64 to use -B to pick up the alternate toolchain (since the bootstrap binutils ld can fail) also forced the system compiler to be used instead of the bootstrapped clang. (The SRC_CONF_ENV file that I used had the text that forced this.) So my buildkernel was using an unpatched compiler when I tried kernel-toolchain then buildkernel. This was visible in the .meta file part of my report on the problem. It showed: > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ instead of having the path to the bootstrap compiler. It turns out that my amd64 cross build SRC_CONF_ENV file also had remnants of an experiment that also happened to force the system compiler to be used so it would have got the same behavior. Based on use of compilers that actually have your patch in them. . . Your patch worked fine to let the buildkernel reach the next problem: use of -mminimial-toc in a kernel module is made but is rejected for powerpc64. Sorry for the extra noise in reporting on your patch. Trying to find new things to report (future problems) by working around existing problems that are known but unfixed tends to have these sorts of interferences. Of course sometimes my workarounds might not be the best ones available. This stupid mistake is probably what is going on in at least one bugzilla report that I submitted: So I've likely got more to clean up. =3D=3D=3D Mark Millard markmi at dsl-only.net Older material. . . On Mon, Dec 05, 2016 at 05:42:28PM -0800, Mark Millard wrote: > On 2016-Dec-5, at 5:16 PM, Mark Millard = wrote: >=20 >> Well it looks like: >>=20 >> WITHOUT_CROSS_COMPILER=3D >> WITH_SYSTEM_COMPILER=3D >>=20 >> ignores the .td file change but >>=20 >> WITH_CROSS_COMPILER=3D >> WITHOUT_SYSTEM_COMPILER=3D >>=20 >> may use it. >>=20 >> I had accidentally used a SRC_CONF_ENV file that >> was of the first form. >>=20 >> So I've got a build going based on the 2nd form. . . >=20 > No such luck: same type of failure at the same point. >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > On 2016-Dec-5, at 4:05 PM, Mark Millard = wrote: >=20 > On 2016-Dec-5, at 8:19 AM, Roman Divacky = wrote: >=20 >> Can you try this patch? >>=20 >> Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >> --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) >> +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) >> @@ -2373,6 +2373,12 @@ >> def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), >> "mftb $RT, $SPR", IIC_SprMFTB>; >>=20 >> +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), >> + "mfpmr $RT, $PMRN", IIC_IntGeneral>; >> + >> +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), >> + "mtpmr $PMRN, $RS", IIC_IntGeneral>; >> + >> // A pseudo-instruction used to implement the read of the 64-bit = cycle counter >> // on a 32-bit target. >> let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 > Direct use of the patch (put into a file) was rejected: >=20 > # patch -p0 < llvmPPCInstrInfo_td.patch=20 > Hmm... Looks like a unified diff to me... > The text leading up to this was: > -------------------------- > |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > -------------------------- > Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... > patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, = (outs gprc:$RT), (ins i32imm:$SPR), >=20 > So I hand put in the extra lines. >=20 > I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 > the MFTB line is at line number 2300 while your patch listed: >=20 > @@ -2373,6 +2373,12 @@ >=20 > My edit shows as: >=20 > # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision = 309179) > +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2300,6 +2300,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 >=20 > Unfortunately the buildkernel still gets the same errors: > (This was tried after a kernel-toolchain .) >=20 > # Meta data file = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc/hwpmc_e500.o.met= a > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target = powerpc64-unknown-freebsd12.0 = --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerp= c64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O2 -pipe = -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc = -DHAVE_KERNEL_OPTION_HEADERS -include = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/src/sys -fno-common -g = -fno-omit-frame-pointer = -I/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/sr= c/sys/GENERIC64vtsc-NODBG -mno-altivec -ffreestanding -fwrapv = -fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs = -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline = -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__freebsd_kprintf__ = -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas = -Wno-error-tautological-compare -Wno-error-empty-body = -Wno-error-parentheses-equality -Wno-e > rror-unused-function -Wno-error-pointer-sign = -Wno-error-shift-negative-value -msoft-float -std=3Diso9899:1999 -c = /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o > CMD ctfconvert -L VERSION -g hwpmc_e500.o > CWD = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc > TARGET hwpmc_e500.o > -- command output -- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: = unrecognized instruction mnemonic > mtpmr(PMR_PMGC0, pmgc0); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: = unrecognized instruction mnemonic > mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic > pmc_pmlc =3D mfpmr(PMR_PMLCa0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 10,144 > ^ > . . . >=20 >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > Older content: >=20 > On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: >> [Note: At present I can buildworld using WITH_LIB32=3D on >> powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a >> minor variant of head -r309179 . That does not work for >> amd64 cross compiling to powerpc64 due to assembler >> notation rejections.] >>=20 >> When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's >> clang 3.9.0 I get the following sorts of error >> reports, *even building on powerpc64* : >>=20 >> --- hwpmc_e500.o --- >> /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: = error: unrecognized instruction mnemonic >> uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); >> ^ >> ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' >> __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ >> ^ >> :1:2: note: instantiated into assembly here >> mfpmr 3,400 >> ^ >> . . . >>=20 >> When I look up these instructions I find that they are not >> classic powerpc instructions: >> ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) >>=20 >>> Whereas the classic architecture defines special-purpose registers = (SPRs) and >>> two instructions to access them (Move to Special-Purpose Register = (mtspr) and >>> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines >>> optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and >>> the EIS-defined performance monitor APU defines performance monitor = registers >>> (PMRs) and mtpmr and mfpmr instructions, all based on models = provided by the >>> UISA. >>=20 >> . . . >>=20 >> Does this imply that clang 3.9.0 needs to support more instructions = when >> it is targeting FreeBSD for GENERIC64 based builds? (I include = GENERIC64 >> and then override some items for my build activity.) >>=20 >> If yes, then someone probably needs to make a list of what = instructions >> need to be present and have someone submit the list into llvm's = bugzilla >> and have the submittal listed in: >>=20 >> [META] Using Clang as the FreeBSD/ppc system compiler >>=20 >> (25780). >>=20 >>=20 >> If GENERIC64 does not need the likes of hwpmc_e500.o built then some >> work on the build environment to avoid GENERIC64 including things = with >> non-classic instruction use would appear to be needed. (No llvm >> involvement for this case.) I doubt this is the case as it would >> seem that the problem would reoccur when alternate KERNCONF's were >> in use instead that do require something like of hwpmc_e500.o to be >> built. >>=20 >>=20 >> Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about >> this issue from the FreeBSD side of things. I just noticed the status >> of the specific instructions involved and also that the cross-build >> and on-powerpc64 build get the same result (unlike the recent >> WITH_LIB32=3D discovery). >>=20 >> =3D=3D=3D >> Mark Millard >> markmi at dsl-only.net >=20 >=20 > _______________________________________________ > freebsd-ppc@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-ppc > To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Thu Dec 8 05:59:30 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 46F21C6C195 for ; Thu, 8 Dec 2016 05:59:30 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-17.reflexion.net [208.70.210.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 0A990A49 for ; Thu, 8 Dec 2016 05:59:29 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 24122 invoked from network); 8 Dec 2016 05:52:48 -0000 Received: from unknown (HELO rtc-sm-01.app.dca.reflexion.local) (10.81.150.1) by 0 (rfx-qmail) with SMTP; 8 Dec 2016 05:52:48 -0000 Received: by rtc-sm-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Thu, 08 Dec 2016 00:52:48 -0500 (EST) Received: (qmail 14381 invoked from network); 8 Dec 2016 05:52:48 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 8 Dec 2016 05:52:48 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id C0A77EC861A; Wed, 7 Dec 2016 21:52:47 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: Date: Wed, 7 Dec 2016 21:52:47 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 05:59:30 -0000 Top post of a FYI [head -r309656 powerpc64 context]: I commented out the one -mminimal-toc use in the modules and tried buildkernel again (cross build). It reached the end. But it dies immediately if I try to boot it after installing a copy. This was based on: # svnlite diff /usr/src/sys/modules/zfs/Makefile Index: /usr/src/sys/modules/zfs/Makefile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/sys/modules/zfs/Makefile (revision 309656) +++ /usr/src/sys/modules/zfs/Makefile (working copy) @@ -93,9 +93,9 @@ CFLAGS+=3D-I${SUNW}/common CFLAGS+=3D-DBUILDING_ZFS =20 -.if ${MACHINE_ARCH} =3D=3D "powerpc64" -CFLAGS+=3D-mminimal-toc -.endif +#.if ${MACHINE_ARCH} =3D=3D "powerpc64" +#CFLAGS+=3D-mminimal-toc +#.endif =20 .ifdef ZFS_DEBUG CFLAGS+=3D-DDEBUG=3D1 as well as your .td file patch. zfs is not in use in the configuration: it just uses ufs. I'll note that I had avoided 2.47 binutils variants based on reported issues in powerpc land (not that I know the details or the powerpc64 vs. powerpc vs. both status of the issues). =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-7, at 4:11 PM, Mark Millard wrote: On 2016-Dec-7, at 11:00 AM, Roman Divacky wrote: > Can the compiler you built with the patch process this file: >=20 > typedef int register_t; > #define mtpmr(reg, val) = \ > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > #define mfpmr(reg) = \ > ( { register_t val; = \ > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > val; } ) >=20 > #define PMR_PMC0 16 >=20 > int foo() > { > return mfpmr(PMR_PMC0); > } >=20 >=20 > I can compile it just fine locally. Not sure why it wouldnt work in = your case. I separately had helped with testing for bugzilla 214902 and so had updated to head -r309656 so the context was different. But I figured out the .td file related issue on powerpc64. My means of forcing all the compiles that target powerpc64 to use -B to pick up the alternate toolchain (since the bootstrap binutils ld can fail) also forced the system compiler to be used instead of the bootstrapped clang. (The SRC_CONF_ENV file that I used had the text that forced this.) So my buildkernel was using an unpatched compiler when I tried kernel-toolchain then buildkernel. This was visible in the .meta file part of my report on the problem. It showed: > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ instead of having the path to the bootstrap compiler. It turns out that my amd64 cross build SRC_CONF_ENV file also had remnants of an experiment that also happened to force the system compiler to be used so it would have got the same behavior. Based on use of compilers that actually have your patch in them. . . Your patch worked fine to let the buildkernel reach the next problem: use of -mminimial-toc in a kernel module is made but is rejected for powerpc64. Sorry for the extra noise in reporting on your patch. Trying to find new things to report (future problems) by working around existing problems that are known but unfixed tends to have these sorts of interferences. Of course sometimes my workarounds might not be the best ones available. This stupid mistake is probably what is going on in at least one bugzilla report that I submitted: So I've likely got more to clean up. =3D=3D=3D Mark Millard markmi at dsl-only.net Older material. . . On Mon, Dec 05, 2016 at 05:42:28PM -0800, Mark Millard wrote: > On 2016-Dec-5, at 5:16 PM, Mark Millard = wrote: >=20 >> Well it looks like: >>=20 >> WITHOUT_CROSS_COMPILER=3D >> WITH_SYSTEM_COMPILER=3D >>=20 >> ignores the .td file change but >>=20 >> WITH_CROSS_COMPILER=3D >> WITHOUT_SYSTEM_COMPILER=3D >>=20 >> may use it. >>=20 >> I had accidentally used a SRC_CONF_ENV file that >> was of the first form. >>=20 >> So I've got a build going based on the 2nd form. . . >=20 > No such luck: same type of failure at the same point. >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > On 2016-Dec-5, at 4:05 PM, Mark Millard = wrote: >=20 > On 2016-Dec-5, at 8:19 AM, Roman Divacky = wrote: >=20 >> Can you try this patch? >>=20 >> Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D >> --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) >> +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) >> @@ -2373,6 +2373,12 @@ >> def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), >> "mftb $RT, $SPR", IIC_SprMFTB>; >>=20 >> +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), >> + "mfpmr $RT, $PMRN", IIC_IntGeneral>; >> + >> +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), >> + "mtpmr $PMRN, $RS", IIC_IntGeneral>; >> + >> // A pseudo-instruction used to implement the read of the 64-bit = cycle counter >> // on a 32-bit target. >> let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 > Direct use of the patch (put into a file) was rejected: >=20 > # patch -p0 < llvmPPCInstrInfo_td.patch=20 > Hmm... Looks like a unified diff to me... > The text leading up to this was: > -------------------------- > |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > -------------------------- > Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... > patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, = (outs gprc:$RT), (ins i32imm:$SPR), >=20 > So I hand put in the extra lines. >=20 > I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 > the MFTB line is at line number 2300 while your patch listed: >=20 > @@ -2373,6 +2373,12 @@ >=20 > My edit shows as: >=20 > # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision = 309179) > +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > @@ -2300,6 +2300,12 @@ > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > "mftb $RT, $SPR", IIC_SprMFTB>; >=20 > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > + > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > + > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > // on a 32-bit target. > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in >=20 >=20 > Unfortunately the buildkernel still gets the same errors: > (This was tried after a kernel-toolchain .) >=20 > # Meta data file = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc/hwpmc_e500.o.met= a > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target = powerpc64-unknown-freebsd12.0 = --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerp= c64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -O2 -pipe = -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc = -DHAVE_KERNEL_OPTION_HEADERS -include = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr/src/sys -fno-common -g = -fno-omit-frame-pointer = -I/usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/sr= c/sys/GENERIC64vtsc-NODBG -mno-altivec -ffreestanding -fwrapv = -fstack-protector -gdwarf-2 -Wall -Wredundant-decls -Wnested-externs = -Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith -Winline = -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__freebsd_kprintf__ = -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unknown-pragmas = -Wno-error-tautological-compare -Wno-error-empty-body = -Wno-error-parentheses-equality -Wno-e > rror-unused-function -Wno-error-pointer-sign = -Wno-error-shift-negative-value -msoft-float -std=3Diso9899:1999 -c = /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o > CMD ctfconvert -L VERSION -g hwpmc_e500.o > CWD = /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/usr/src/= sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc > TARGET hwpmc_e500.o > -- command output -- > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 3,400 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: = unrecognized instruction mnemonic > mtpmr(PMR_PMGC0, pmgc0); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: = unrecognized instruction mnemonic > mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); > ^ > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > ^ > :1:2: note: instantiated into assembly here > mtpmr 400,3 > ^ > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic > pmc_pmlc =3D mfpmr(PMR_PMLCa0); > ^ > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > ^ > :1:2: note: instantiated into assembly here > mfpmr 10,144 > ^ > . . . >=20 >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > Older content: >=20 > On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: >> [Note: At present I can buildworld using WITH_LIB32=3D on >> powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a >> minor variant of head -r309179 . That does not work for >> amd64 cross compiling to powerpc64 due to assembler >> notation rejections.] >>=20 >> When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's >> clang 3.9.0 I get the following sorts of error >> reports, *even building on powerpc64* : >>=20 >> --- hwpmc_e500.o --- >> /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: = error: unrecognized instruction mnemonic >> uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); >> ^ >> ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' >> __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ >> ^ >> :1:2: note: instantiated into assembly here >> mfpmr 3,400 >> ^ >> . . . >>=20 >> When I look up these instructions I find that they are not >> classic powerpc instructions: >> ( = http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPRMRM.pd= f ) >>=20 >>> Whereas the classic architecture defines special-purpose registers = (SPRs) and >>> two instructions to access them (Move to Special-Purpose Register = (mtspr) and >>> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines >>> optional device control registers (DCRs) and mtdcr and mfdcr = instructions, and >>> the EIS-defined performance monitor APU defines performance monitor = registers >>> (PMRs) and mtpmr and mfpmr instructions, all based on models = provided by the >>> UISA. >>=20 >> . . . >>=20 >> Does this imply that clang 3.9.0 needs to support more instructions = when >> it is targeting FreeBSD for GENERIC64 based builds? (I include = GENERIC64 >> and then override some items for my build activity.) >>=20 >> If yes, then someone probably needs to make a list of what = instructions >> need to be present and have someone submit the list into llvm's = bugzilla >> and have the submittal listed in: >>=20 >> [META] Using Clang as the FreeBSD/ppc system compiler >>=20 >> (25780). >>=20 >>=20 >> If GENERIC64 does not need the likes of hwpmc_e500.o built then some >> work on the build environment to avoid GENERIC64 including things = with >> non-classic instruction use would appear to be needed. (No llvm >> involvement for this case.) I doubt this is the case as it would >> seem that the problem would reoccur when alternate KERNCONF's were >> in use instead that do require something like of hwpmc_e500.o to be >> built. >>=20 >>=20 >> Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is = about >> this issue from the FreeBSD side of things. I just noticed the status >> of the specific instructions involved and also that the cross-build >> and on-powerpc64 build get the same result (unlike the recent >> WITH_LIB32=3D discovery). >>=20 >> =3D=3D=3D >> Mark Millard >> markmi at dsl-only.net >=20 >=20 > _______________________________________________ > freebsd-ppc@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-ppc > To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Thu Dec 8 18:58:12 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 14F0BC6DE98; Thu, 8 Dec 2016 18:58:12 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (mail.vlakno.cz [91.217.96.224]) by mx1.freebsd.org (Postfix) with ESMTP id 8B9EB182F; Thu, 8 Dec 2016 18:58:10 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: by vlakno.cz (Postfix, from userid 1002) id 67BA7A35631; Thu, 8 Dec 2016 19:55:41 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=vlakno.cz; s=mail; t=1481223341; bh=2GbIgL5ZC8TjiVdj5Et8i5E/lPOPVBJp1AI+hlwlokw=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=eFmLHLjMn6r7HElN9O3IbeYsnyYJN9JyT4W/j4R5QGz0YNfWbi3INK6/bM9yc1GiK LQRz3YRQHW1jyEShUWTj2IYXGgh66wwCLFrzT/INxTjglKllT4qIyPH8hoF5g/KOYf kTKLApU30Ril7fhTmIQkYWys/2VmPANvnsgvn3T4= Date: Thu, 8 Dec 2016 19:55:41 +0100 From: Roman Divacky To: Mark Millard Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-ID: <20161208185541.GA33364@vlakno.cz> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: User-Agent: Mutt/1.7.1 (2016-10-04) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 18:58:12 -0000 Can you try to investigate why it dies? I am not convinced -mminimal-toc would result in a boot failure. I think the kernel would fail to link. On Wed, Dec 07, 2016 at 09:52:47PM -0800, Mark Millard wrote: > Top post of a FYI [head -r309656 powerpc64 context]: >=20 > I commented out the one -mminimal-toc use in the modules and tried > buildkernel again (cross build). >=20 > It reached the end. But it dies immediately if I try to > boot it after installing a copy. >=20 > This was based on: >=20 > # svnlite diff /usr/src/sys/modules/zfs/Makefile > Index: /usr/src/sys/modules/zfs/Makefile > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- /usr/src/sys/modules/zfs/Makefile (revision 309656) > +++ /usr/src/sys/modules/zfs/Makefile (working copy) > @@ -93,9 +93,9 @@ > CFLAGS+=3D-I${SUNW}/common > CFLAGS+=3D-DBUILDING_ZFS > =20 > -.if ${MACHINE_ARCH} =3D=3D "powerpc64" > -CFLAGS+=3D-mminimal-toc > -.endif > +#.if ${MACHINE_ARCH} =3D=3D "powerpc64" > +#CFLAGS+=3D-mminimal-toc > +#.endif > =20 > .ifdef ZFS_DEBUG > CFLAGS+=3D-DDEBUG=3D1 >=20 > as well as your .td file patch. >=20 > zfs is not in use in the configuration: it just > uses ufs. >=20 > I'll note that I had avoided 2.47 binutils variants > based on reported issues in powerpc land (not that > I know the details or the powerpc64 vs. powerpc vs. > both status of the issues). >=20 >=20 >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > On 2016-Dec-7, at 4:11 PM, Mark Millard wrote: >=20 > On 2016-Dec-7, at 11:00 AM, Roman Divacky wrote: >=20 > > Can the compiler you built with the patch process this file: > >=20 > > typedef int register_t; > > #define mtpmr(reg, val) = \ > > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > > #define mfpmr(reg) = \ > > ( { register_t val; \ > > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); = \ > > val; } ) > >=20 > > #define PMR_PMC0 16 > >=20 > > int foo() > > { > > return mfpmr(PMR_PMC0); > > } > >=20 > >=20 > > I can compile it just fine locally. Not sure why it wouldnt work in you= r case. >=20 > I separately had helped with testing for bugzilla 214902 > and so had updated to head -r309656 so the context was > different. >=20 > But I figured out the .td file related issue on powerpc64. >=20 > My means of forcing all the compiles that target powerpc64 > to use -B to pick up the alternate toolchain (since the > bootstrap binutils ld can fail) also forced the system > compiler to be used instead of the bootstrapped clang. > (The SRC_CONF_ENV file that I used had the text that > forced this.) >=20 > So my buildkernel was using an unpatched compiler when > I tried kernel-toolchain then buildkernel. >=20 > This was visible in the .meta file part of my report on the > problem. It showed: >=20 > > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ >=20 >=20 > instead of having the path to the bootstrap compiler. >=20 > It turns out that my amd64 cross build SRC_CONF_ENV file > also had remnants of an experiment that also happened to > force the system compiler to be used so it would have got > the same behavior. >=20 > Based on use of compilers that actually have your > patch in them. . . >=20 > Your patch worked fine to let the buildkernel reach > the next problem: use of -mminimial-toc in a kernel > module is made but is rejected for powerpc64. >=20 > Sorry for the extra noise in reporting on your patch. >=20 >=20 > Trying to find new things to report (future problems) > by working around existing problems that are known but > unfixed tends to have these sorts of interferences. Of > course sometimes my workarounds might not be the best > ones available. >=20 > This stupid mistake is probably what is going on in > at least one bugzilla report that I submitted: So > I've likely got more to clean up. >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net >=20 > Older material. . . >=20 > On Mon, Dec 05, 2016 at 05:42:28PM -0800, Mark Millard wrote: > > On 2016-Dec-5, at 5:16 PM, Mark Millard wrote: > >=20 > >> Well it looks like: > >>=20 > >> WITHOUT_CROSS_COMPILER=3D > >> WITH_SYSTEM_COMPILER=3D > >>=20 > >> ignores the .td file change but > >>=20 > >> WITH_CROSS_COMPILER=3D > >> WITHOUT_SYSTEM_COMPILER=3D > >>=20 > >> may use it. > >>=20 > >> I had accidentally used a SRC_CONF_ENV file that > >> was of the first form. > >>=20 > >> So I've got a build going based on the 2nd form. . . > >=20 > > No such luck: same type of failure at the same point. > >=20 > > =3D=3D=3D > > Mark Millard > > markmi at dsl-only.net > >=20 > > On 2016-Dec-5, at 4:05 PM, Mark Millard wrote: > >=20 > > On 2016-Dec-5, at 8:19 AM, Roman Divacky wrote: > >=20 > >> Can you try this patch? > >>=20 > >> Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > >> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > >> --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > >> +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > >> @@ -2373,6 +2373,12 @@ > >> def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > >> "mftb $RT, $SPR", IIC_SprMFTB>; > >>=20 > >> +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > >> + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > >> + > >> +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > >> + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > >> + > >> // A pseudo-instruction used to implement the read of the 64-bit cycle= counter > >> // on a 32-bit target. > >> let hasSideEffects =3D 1, usesCustomInserter =3D 1 in > >=20 > > Direct use of the patch (put into a file) was rejected: > >=20 > > # patch -p0 < llvmPPCInstrInfo_td.patch=20 > > Hmm... Looks like a unified diff to me... > > The text leading up to this was: > > -------------------------- > > |Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > > |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > |--- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > > |+++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > > -------------------------- > > Patching file llvm/lib/Target/PowerPC/PPCInstrInfo.td using Plan A... > > patch: **** malformed patch at line 6: def MFTB : XFXForm_1<31, 371, (o= uts gprc:$RT), (ins i32imm:$SPR), > >=20 > > So I hand put in the extra lines. > >=20 > > I'll note that in llvm/lib/Target/PowerPC/PPCInstrInfo.td -r309124 > > the MFTB line is at line number 2300 while your patch listed: > >=20 > > @@ -2373,6 +2373,12 @@ > >=20 > > My edit shows as: > >=20 > > # svnlite diff contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > > Index: contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > --- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 309179) > > +++ contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > > @@ -2300,6 +2300,12 @@ > > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > > "mftb $RT, $SPR", IIC_SprMFTB>; > >=20 > > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > > + > > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > > + > > // A pseudo-instruction used to implement the read of the 64-bit cycle = counter > > // on a 32-bit target. > > let hasSideEffects =3D 1, usesCustomInserter =3D 1 in > >=20 > >=20 > > Unfortunately the buildkernel still gets the same errors: > > (This was tried after a kernel-toolchain .) > >=20 > > # Meta data file /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerp= c.powerpc64/usr/src/sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwp= mc/hwpmc_e500.o.meta > > CMD /usr/bin/clang -B /usr/local/powerpc64-freebsd/bin/ -target powerpc= 64-unknown-freebsd12.0 --sysroot=3D/usr/obj/powerpc64vtsc_clang_altbinutils= _kernel/powerpc.powerpc64/usr/src/tmp -B/usr/local/powerpc64-freebsd/bin/ -= O2 -pipe -fno-strict-aliasing -D_KERNEL -DKLD_MODULE -nostdinc -DHAVE_KE= RNEL_OPTION_HEADERS -include /usr/obj/powerpc64vtsc_clang_altbinutils_kerne= l/powerpc.powerpc64/usr/src/sys/GENERIC64vtsc-NODBG/opt_global.h -I. -I/usr= /src/sys -fno-common -g -fno-omit-frame-pointer -I/usr/obj/powerpc64vtsc_cl= ang_altbinutils_kernel/powerpc.powerpc64/usr/src/sys/GENERIC64vtsc-NODBG -= mno-altivec -ffreestanding -fwrapv -fstack-protector -gdwarf-2 -Wall -Wredu= ndant-decls -Wnested-externs -Wstrict-prototypes -Wmissing-prototypes -Wpoi= nter-arith -Winline -Wcast-qual -Wundef -Wno-pointer-sign -D__printf__=3D__= freebsd_kprintf__ -Wmissing-include-dirs -fdiagnostics-show-option -Wno-unk= nown-pragmas -Wno-error-tautological-compare -Wno-error-empty-body -Wno-err= or-parentheses-equality -Wno-e > > rror-unused-function -Wno-error-pointer-sign -Wno-error-shift-negative-= value -msoft-float -std=3Diso9899:1999 -c /usr/src/sys/modules/hwpmc/../.= =2E/dev/hwpmc/hwpmc_e500.c -o hwpmc_e500.o > > CMD ctfconvert -L VERSION -g hwpmc_e500.o > > CWD /usr/obj/powerpc64vtsc_clang_altbinutils_kernel/powerpc.powerpc64/u= sr/src/sys/GENERIC64vtsc-NODBG/modules/usr/src/sys/modules/hwpmc > > TARGET hwpmc_e500.o > > -- command output -- > > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error: = unrecognized instruction mnemonic > > uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > > ^ > > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > > ^ > > :1:2: note: instantiated into assembly here > > mfpmr 3,400 > > ^ > > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:478:2: error: u= nrecognized instruction mnemonic > > mtpmr(PMR_PMGC0, pmgc0); > > ^ > > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > > ^ > > :1:2: note: instantiated into assembly here > > mtpmr 400,3 > > ^ > > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:446:2: error: u= nrecognized instruction mnemonic > > mtpmr(PMR_PMGC0, PMGC_FAC | PMGC_PMIE | PMGC_FCECE); > > ^ > > ./machine/pmc_mdep.h:21:19: note: expanded from macro 'mtpmr' > > __asm __volatile("mtpmr %0,%1" : : "K"(reg), "r"(val)) > > ^ > > :1:2: note: instantiated into assembly here > > mtpmr 400,3 > > ^ > > /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:408:14: error: = unrecognized instruction mnemonic > > pmc_pmlc =3D mfpmr(PMR_PMLCa0); > > ^ > > ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > > __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > > ^ > > :1:2: note: instantiated into assembly here > > mfpmr 10,144 > > ^ > > . . . > >=20 > >=20 > > =3D=3D=3D > > Mark Millard > > markmi at dsl-only.net > >=20 > > Older content: > >=20 > > On Sat, Dec 03, 2016 at 08:35:50PM -0800, Mark Millard wrote: > >> [Note: At present I can buildworld using WITH_LIB32=3D on > >> powerpc64 for TARGET_ARCH=3Dpowerpc64 via clang 3.9.0 from a > >> minor variant of head -r309179 . That does not work for > >> amd64 cross compiling to powerpc64 due to assembler > >> notation rejections.] > >>=20 > >> When I attempt to buildkernel (with WERROR=3D ) via FreeBSD's > >> clang 3.9.0 I get the following sorts of error > >> reports, *even building on powerpc64* : > >>=20 > >> --- hwpmc_e500.o --- > >> /usr/src/sys/modules/hwpmc/../../dev/hwpmc/hwpmc_e500.c:475:19: error:= unrecognized instruction mnemonic > >> uint32_t pmgc0 =3D mfpmr(PMR_PMGC0); > >> ^ > >> ./machine/pmc_mdep.h:24:21: note: expanded from macro 'mfpmr' > >> __asm __volatile("mfpmr %0,%1" : "=3Dr"(val) : "K"(reg)); \ > >> ^ > >> :1:2: note: instantiated into assembly here > >> mfpmr 3,400 > >> ^ > >> . . . > >>=20 > >> When I look up these instructions I find that they are not > >> classic powerpc instructions: > >> ( http://www.nxp.com/assets/documents/data/en/white-papers/POWRPCARCPR= MRM.pdf ) > >>=20 > >>> Whereas the classic architecture defines special-purpose registers (S= PRs) and > >>> two instructions to access them (Move to Special-Purpose Register (mt= spr) and > >>> Move from Special-Purpose Register (mfspr)), Book E takes that model = and defines > >>> optional device control registers (DCRs) and mtdcr and mfdcr instruct= ions, and > >>> the EIS-defined performance monitor APU defines performance monitor r= egisters > >>> (PMRs) and mtpmr and mfpmr instructions, all based on models provided= by the > >>> UISA. > >>=20 > >> . . . > >>=20 > >> Does this imply that clang 3.9.0 needs to support more instructions wh= en > >> it is targeting FreeBSD for GENERIC64 based builds? (I include GENERIC= 64 > >> and then override some items for my build activity.) > >>=20 > >> If yes, then someone probably needs to make a list of what instructions > >> need to be present and have someone submit the list into llvm's bugzil= la > >> and have the submittal listed in: > >>=20 > >> [META] Using Clang as the FreeBSD/ppc system compiler > >>=20 > >> (25780). > >>=20 > >>=20 > >> If GENERIC64 does not need the likes of hwpmc_e500.o built then some > >> work on the build environment to avoid GENERIC64 including things with > >> non-classic instruction use would appear to be needed. (No llvm > >> involvement for this case.) I doubt this is the case as it would > >> seem that the problem would reoccur when alternate KERNCONF's were > >> in use instead that do require something like of hwpmc_e500.o to be > >> built. > >>=20 > >>=20 > >> Note: https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214903 is ab= out > >> this issue from the FreeBSD side of things. I just noticed the status > >> of the specific instructions involved and also that the cross-build > >> and on-powerpc64 build get the same result (unlike the recent > >> WITH_LIB32=3D discovery). > >>=20 > >> =3D=3D=3D > >> Mark Millard > >> markmi at dsl-only.net > >=20 > >=20 > > _______________________________________________ > > freebsd-ppc@freebsd.org mailing list > > https://lists.freebsd.org/mailman/listinfo/freebsd-ppc > > To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Thu Dec 8 22:17:28 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C3905C6D13E; Thu, 8 Dec 2016 22:17:28 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (mail.vlakno.cz [91.217.96.224]) by mx1.freebsd.org (Postfix) with ESMTP id 6E710115A; Thu, 8 Dec 2016 22:17:27 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: by vlakno.cz (Postfix, from userid 1002) id 6DA4DA35642; Thu, 8 Dec 2016 23:14:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=vlakno.cz; s=mail; t=1481235292; bh=AEbR7wvCJ6r5zGGvCrm0og9sNSK7q6/6kCHYiacjU8M=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=HIsrZ7BW1vK26fETY+xxXCgMO0gszEND8xE1DwvMLMc/9jSn+YTiar/GMxZROSXVx Q4p5rj4TbzX4ZBT9zPtDhskcK6eEpBE6Eias6WjcfYrlCGGJO+LP+M3e+quFOnTWuM eowpiP9+ONl4MWqJyRKaECDqcq34jf8tdKperq4s= Date: Thu, 8 Dec 2016 23:14:52 +0100 From: Roman Divacky To: Mark Millard Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML , nwhitehorn@freebsd.org Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-ID: <20161208221452.GA42380@vlakno.cz> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> <20161208185541.GA33364@vlakno.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.7.1 (2016-10-04) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 22:17:28 -0000 I believe the code comes from sys/powerpc/aim/locore64.S and if you compare the different values from the disssembly with the .S code you can see it's __tocbase and TOC_REF(). I wonder if the assembly has the -mminimal-toc knowledge hardcoded in somehow. I am not sure what expectations the locore64.S has about the kernel layout that we're probably breaking. I've CCed Nathan Whitehorn. Nathan, can you take a look please? Thanks, Roman On Thu, Dec 08, 2016 at 02:03:58PM -0800, Mark Millard wrote: > [I have dropped the patch related information and just have > failing-boot related information here.] > > On 2016-Dec-8, at 10:55 AM, Roman Divacky wrote: > > > Can you try to investigate why it dies? I am not convinced -mminimal-toc > > would result in a boot failure. I think the kernel would fail to link. > > I give information for both devel/powerpc64-binutils based > and for WITH_BINUTILS_BOOTSTRAP= based. They are different. > > For using 2.25.1 of devel/powerpc64-binutils (a cross build): > (from camera image of screen) > > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker390 > /boot/ker390/kernel data=0xf851a8+0x42dd98 syms=[0x8+0xd6848+0x8+0xf1137] > /boot/entropy size=0x1000 > Booting. . . > Kernel entry at 0x100160 > > Invalid memory access at %SSR0: 00000000.001001b0 %SRR1:90000000.00003030 > > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > > > The only options at this point are: > > mac-boot > shut-down > > > From objdump for the above failing boot > but with notes added: > (Note: booting xtoolchain kernel starts at > 0000000000100120 instead; relative > offsets are unchanged and the code > is mostly the same.) > > Disassembly of section .text: > 0000000000100160 <.__start> mfmsr r20 > 0000000000100164 <.__start+0x4> li r21,1 > 0000000000100168 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010016c <.__start+0xc> mtmsrd r20 > 0000000000100170 <.__start+0x10> isync > 0000000000100174 <.__start+0x14> nop > 0000000000100178 <.__start+0x18> b 0000000000100180 <.__start+0x20> > 000000000010017c <.__start+0x1c> nop > 0000000000100180 <.__start+0x20> nop > 0000000000100184 <.__start+0x24> bl 0000000000100190 <.__start+0x30> > 0000000000100188 <.__start+0x28> .long 0x0 > 000000000010018c <.__start+0x2c> .long 0xf8ce78 > booting xtoolchain based kernel has: 0xfebeb8 above <<<=== note > 0000000000100190 <.__start+0x30> mflr r2 > 0000000000100194 <.__start+0x34> ld r1,0(r2) > 0000000000100198 <.__start+0x38> add r2,r1,r2 > 000000000010019c <.__start+0x3c> ld r31,-32768(r2) > 00000000001001a0 <.__start+0x40> subf r31,r31,r2 > 00000000001001a4 <.__start+0x44> ld r1,0(r2) <<<=== !!!!! > booting xtoolchain based kernel has: r1,-32760(r2) above <<<=== !!!!! > 00000000001001a8 <.__start+0x48> addi r1,r1,16288 > 00000000001001ac <.__start+0x4c> add r1,r1,r31 > 00000000001001b0 <.__start+0x50> std r3,48(r1) > SRR0 points at the above instruction > (I stopped comparing to the booting xtoolchain > based code after this.) > 00000000001001b4 <.__start+0x54> std r4,56(r1) > 00000000001001b8 <.__start+0x58> std r5,64(r1) > 00000000001001bc <.__start+0x5c> std r6,72(r1) > 00000000001001c0 <.__start+0x60> bl 00000000001001cc <.__start+0x6c> > 00000000001001c4 <.__start+0x64> .long 0x0 > 00000000001001c8 <.__start+0x68> .long 0xf84ed4 > 00000000001001cc <.__start+0x6c> mflr r3 > 00000000001001d0 <.__start+0x70> ld r4,0(r3) > 00000000001001d4 <.__start+0x74> add r3,r4,r3 > 00000000001001d8 <.__start+0x78> mr r4,r31 > 00000000001001dc <.__start+0x7c> bl 0000000000b18ebc <.elf_reloc_self> > 00000000001001e0 <.__start+0x80> nop > 00000000001001e4 <.__start+0x84> ld r3,48(r1) > 00000000001001e8 <.__start+0x88> ld r4,56(r1) > 00000000001001ec <.__start+0x8c> ld r5,64(r1) > 00000000001001f0 <.__start+0x90> ld r6,72(r1) > 00000000001001f4 <.__start+0x94> mr r4,r2 > 00000000001001f8 <.__start+0x98> bl 0000000000b1e980 <.powerpc_init> > 00000000001001fc <.__start+0x9c> nop > 0000000000100200 <.__start+0xa0> mr r1,r3 > 0000000000100204 <.__start+0xa4> li r3,0 > 0000000000100208 <.__start+0xa8> std r3,0(r1) > 000000000010020c <.__start+0xac> bl 00000000005c4af8 <.mi_startup> > 0000000000100210 <.__start+0xb0> nop > 0000000000100214 <.__start+0xb4> b 0000000000100214 <.__start+0xb4> > > > > For using WITH_BINUTILS_BOOTSTRAP= based binutils (a cross build): > (completes for buildkernel; fails for buildworld) > > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker39a > /boot/ker39a/kernel data=0xfd6318+0x42dda8 syms=[0x8+0xd6860+0x8+0xf1193] > /boot/entropy size=0x1000 > Booting. . . > Kernel entry at 0x100160 > > Invalid memory access at %SSR0: 00000000.00000000 %SRR1:10000000.00081000 > > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > > > The only options at this point are: > > mac-boot > shut-down > > The problem here is a different code order and a matching > wrong start address that does not track the difference. > (From objdump.) Note: the same 0(r2) vs. -32760(r2) oddity > exists in the start routine as well. > > Disassembly of section .text: > 0000000000100160 <.__start-0x2030> std r2,40(r1) > 0000000000100164 <.__start-0x202c> addis r2,r2,1 > 0000000000100168 <.__start-0x2028> addi r2,r2,-8 > 000000000010016c <.__start-0x2024> b 0000000000b2c8e0 <.cpu_switch> > 0000000000100170 <.__start-0x2020> std r2,40(r1) > 0000000000100174 <.__start-0x201c> addis r2,r2,1 > 0000000000100178 <.__start-0x2018> addi r2,r2,-8 > 000000000010017c <.__start-0x2014> b 0000000000ade6c8 <.sf_buf_alloc> > 0000000000100180 <.__start-0x2010> std r2,40(r1) > 0000000000100184 <.__start-0x200c> addis r2,r2,1 > 0000000000100188 <.__start-0x2008> addi r2,r2,-8 > 000000000010018c <.__start-0x2004> b 0000000000a83f78 <.vm_fault_hold> > 0000000000100190 <.__start-0x2000> std r2,40(r1) > 0000000000100194 <.__start-0x1ffc> addis r2,r2,1 > 0000000000100198 <.__start-0x1ff8> addi r2,r2,-8 > 000000000010019c <.__start-0x1ff4> b 0000000000b1f1e8 <.fill_regs32> > 00000000001001a0 <.__start-0x1ff0> std r2,40(r1) > 00000000001001a4 <.__start-0x1fec> addis r2,r2,1 > 00000000001001a8 <.__start-0x1fe8> addi r2,r2,-8 > 00000000001001ac <.__start-0x1fe4> b 0000000000b1a7e4 <.casueword32> > 00000000001001b0 <.__start-0x1fe0> std r2,40(r1) > 00000000001001b4 <.__start-0x1fdc> addis r2,r2,1 > 00000000001001b8 <.__start-0x1fd8> addi r2,r2,-8 > 00000000001001bc <.__start-0x1fd4> b 0000000000a8fa30 <.kmap_free_wakeup> > . . . > 0000000000102190 <.__start> mfmsr r20 > 0000000000102194 <.__start+0x4> li r21,1 > 0000000000102198 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010219c <.__start+0xc> mtmsrd r20 > 00000000001021a0 <.__start+0x10> isync > 00000000001021a4 <.__start+0x14> nop > 00000000001021a8 <.__start+0x18> b 00000000001021b0 <.__start+0x20> > 00000000001021ac <.__start+0x1c> nop > 00000000001021b0 <.__start+0x20> nop > 00000000001021b4 <.__start+0x24> bl 00000000001021c0 <.__start+0x30> > 00000000001021b8 <.__start+0x28> .long 0x0 > 00000000001021bc <.__start+0x2c> .long 0xfc8e48 > 00000000001021c0 <.__start+0x30> mflr r2 > 00000000001021c4 <.__start+0x34> ld r1,0(r2) > 00000000001021c8 <.__start+0x38> add r2,r1,r2 > 00000000001021cc <.__start+0x3c> ld r31,-32768(r2) > 00000000001021d0 <.__start+0x40> subf r31,r31,r2 > 00000000001021d4 <.__start+0x44> ld r1,0(r2) <<< same 0 vs. -32760 oddity!!! > 00000000001021d8 <.__start+0x48> addi r1,r1,16288 > 00000000001021dc <.__start+0x4c> add r1,r1,r31 > 00000000001021e0 <.__start+0x50> std r3,48(r1) > 00000000001021e4 <.__start+0x54> std r4,56(r1) > 00000000001021e8 <.__start+0x58> std r5,64(r1) > 00000000001021ec <.__start+0x5c> std r6,72(r1) > 00000000001021f0 <.__start+0x60> bl 00000000001021fc <.__start+0x6c> > 00000000001021f4 <.__start+0x64> .long 0x0 > 00000000001021f8 <.__start+0x68> .long 0xfd4014 > 00000000001021fc <.__start+0x6c> mflr r3 > 0000000000102200 <.__start+0x70> ld r4,0(r3) > 0000000000102204 <.__start+0x74> add r3,r4,r3 > 0000000000102208 <.__start+0x78> mr r4,r31 > 000000000010220c <.__start+0x7c> bl 0000000000101a20 > 0000000000102210 <.__start+0x80> ld r2,40(r1) > 0000000000102214 <.__start+0x84> ld r3,48(r1) > 0000000000102218 <.__start+0x88> ld r4,56(r1) > 000000000010221c <.__start+0x8c> ld r5,64(r1) > 0000000000102220 <.__start+0x90> ld r6,72(r1) > 0000000000102224 <.__start+0x94> mr r4,r2 > 0000000000102228 <.__start+0x98> bl 00000000001019a0 > 000000000010222c <.__start+0x9c> ld r2,40(r1) > 0000000000102230 <.__start+0xa0> mr r1,r3 > 0000000000102234 <.__start+0xa4> li r3,0 > 0000000000102238 <.__start+0xa8> std r3,0(r1) > 000000000010223c <.__start+0xac> bl 00000000005c6b28 <.mi_startup> > 0000000000102240 <.__start+0xb0> nop > 0000000000102244 <.__start+0xb4> b 0000000000102244 <.__start+0xb4> > > > Who is most appropriate to send such information to for powerpc64? > > === > Mark Millard > markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Thu Dec 8 23:04:00 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7D7EDC6E23B for ; Thu, 8 Dec 2016 23:04:00 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-71.reflexion.net [208.70.210.71]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 405B5BE9 for ; Thu, 8 Dec 2016 23:04:00 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 25505 invoked from network); 8 Dec 2016 22:03:59 -0000 Received: from unknown (HELO rtc-sm-01.app.dca.reflexion.local) (10.81.150.1) by 0 (rfx-qmail) with SMTP; 8 Dec 2016 22:03:59 -0000 Received: by rtc-sm-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Thu, 08 Dec 2016 17:03:59 -0500 (EST) Received: (qmail 22978 invoked from network); 8 Dec 2016 22:03:59 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 8 Dec 2016 22:03:59 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id CA579EC9142; Thu, 8 Dec 2016 14:03:58 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <20161208185541.GA33364@vlakno.cz> Date: Thu, 8 Dec 2016 14:03:58 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> <20161208185541.GA33364@vlakno.cz> To: Roman Divacky X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 23:04:00 -0000 [I have dropped the patch related information and just have failing-boot related information here.] On 2016-Dec-8, at 10:55 AM, Roman Divacky wrote: > Can you try to investigate why it dies? I am not convinced = -mminimal-toc > would result in a boot failure. I think the kernel would fail to link. I give information for both devel/powerpc64-binutils based and for WITH_BINUTILS_BOOTSTRAP=3D based. They are different. For using 2.25.1 of devel/powerpc64-binutils (a cross build): (from camera image of screen) . . . (omitted material) . . . Type '?' for a list of commands, 'help' for more detailed help. OK unload OK boot ker390 /boot/ker390/kernel data=3D0xf851a8+0x42dd98 = syms=3D[0x8+0xd6848+0x8+0xf1137] /boot/entropy size=3D0x1000 Booting. . . Kernel entry at 0x100160 Invalid memory access at %SSR0: 00000000.001001b0 = %SRR1:90000000.00003030 Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 . . . (omitted material) . . . ok 0 > The only options at this point are: mac-boot shut-down =46rom objdump for the above failing boot but with notes added: (Note: booting xtoolchain kernel starts at 0000000000100120 instead; relative offsets are unchanged and the code is mostly the same.) Disassembly of section .text: 0000000000100160 <.__start> mfmsr r20 0000000000100164 <.__start+0x4> li r21,1 0000000000100168 <.__start+0x8> rldimi r20,r21,63,0 000000000010016c <.__start+0xc> mtmsrd r20 0000000000100170 <.__start+0x10> isync 0000000000100174 <.__start+0x14> nop 0000000000100178 <.__start+0x18> b 0000000000100180 = <.__start+0x20> 000000000010017c <.__start+0x1c> nop 0000000000100180 <.__start+0x20> nop 0000000000100184 <.__start+0x24> bl 0000000000100190 = <.__start+0x30> 0000000000100188 <.__start+0x28> .long 0x0 000000000010018c <.__start+0x2c> .long 0xf8ce78 =20 booting xtoolchain based kernel has: 0xfebeb8 above <<<=3D=3D=3D = note 0000000000100190 <.__start+0x30> mflr r2 0000000000100194 <.__start+0x34> ld r1,0(r2) 0000000000100198 <.__start+0x38> add r2,r1,r2 000000000010019c <.__start+0x3c> ld r31,-32768(r2) 00000000001001a0 <.__start+0x40> subf r31,r31,r2 00000000001001a4 <.__start+0x44> ld r1,0(r2) <<<=3D=3D=3D = !!!!! booting xtoolchain based kernel has: r1,-32760(r2) above <<<=3D=3D=3D = !!!!! 00000000001001a8 <.__start+0x48> addi r1,r1,16288 00000000001001ac <.__start+0x4c> add r1,r1,r31 00000000001001b0 <.__start+0x50> std r3,48(r1) SRR0 points at the above instruction (I stopped comparing to the booting xtoolchain based code after this.) 00000000001001b4 <.__start+0x54> std r4,56(r1) 00000000001001b8 <.__start+0x58> std r5,64(r1) 00000000001001bc <.__start+0x5c> std r6,72(r1) 00000000001001c0 <.__start+0x60> bl 00000000001001cc = <.__start+0x6c> 00000000001001c4 <.__start+0x64> .long 0x0 00000000001001c8 <.__start+0x68> .long 0xf84ed4 00000000001001cc <.__start+0x6c> mflr r3 00000000001001d0 <.__start+0x70> ld r4,0(r3) 00000000001001d4 <.__start+0x74> add r3,r4,r3 00000000001001d8 <.__start+0x78> mr r4,r31 00000000001001dc <.__start+0x7c> bl 0000000000b18ebc = <.elf_reloc_self> 00000000001001e0 <.__start+0x80> nop 00000000001001e4 <.__start+0x84> ld r3,48(r1) 00000000001001e8 <.__start+0x88> ld r4,56(r1) 00000000001001ec <.__start+0x8c> ld r5,64(r1) 00000000001001f0 <.__start+0x90> ld r6,72(r1) 00000000001001f4 <.__start+0x94> mr r4,r2 00000000001001f8 <.__start+0x98> bl 0000000000b1e980 = <.powerpc_init> 00000000001001fc <.__start+0x9c> nop 0000000000100200 <.__start+0xa0> mr r1,r3 0000000000100204 <.__start+0xa4> li r3,0 0000000000100208 <.__start+0xa8> std r3,0(r1) 000000000010020c <.__start+0xac> bl 00000000005c4af8 <.mi_startup> 0000000000100210 <.__start+0xb0> nop 0000000000100214 <.__start+0xb4> b 0000000000100214 = <.__start+0xb4> For using WITH_BINUTILS_BOOTSTRAP=3D based binutils (a cross build): (completes for buildkernel; fails for buildworld) . . . (omitted material) . . . Type '?' for a list of commands, 'help' for more detailed help. OK unload OK boot ker39a /boot/ker39a/kernel data=3D0xfd6318+0x42dda8 = syms=3D[0x8+0xd6860+0x8+0xf1193] /boot/entropy size=3D0x1000 Booting. . . Kernel entry at 0x100160 Invalid memory access at %SSR0: 00000000.00000000 = %SRR1:10000000.00081000 Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 . . . (omitted material) . . . ok 0 > The only options at this point are: mac-boot shut-down The problem here is a different code order and a matching wrong start address that does not track the difference. (=46rom objdump.) Note: the same 0(r2) vs. -32760(r2) oddity exists in the start routine as well. Disassembly of section .text: 0000000000100160 <.__start-0x2030> std r2,40(r1) 0000000000100164 <.__start-0x202c> addis r2,r2,1 0000000000100168 <.__start-0x2028> addi r2,r2,-8 000000000010016c <.__start-0x2024> b 0000000000b2c8e0 = <.cpu_switch> 0000000000100170 <.__start-0x2020> std r2,40(r1) 0000000000100174 <.__start-0x201c> addis r2,r2,1 0000000000100178 <.__start-0x2018> addi r2,r2,-8 000000000010017c <.__start-0x2014> b 0000000000ade6c8 = <.sf_buf_alloc> 0000000000100180 <.__start-0x2010> std r2,40(r1) 0000000000100184 <.__start-0x200c> addis r2,r2,1 0000000000100188 <.__start-0x2008> addi r2,r2,-8 000000000010018c <.__start-0x2004> b 0000000000a83f78 = <.vm_fault_hold> 0000000000100190 <.__start-0x2000> std r2,40(r1) 0000000000100194 <.__start-0x1ffc> addis r2,r2,1 0000000000100198 <.__start-0x1ff8> addi r2,r2,-8 000000000010019c <.__start-0x1ff4> b 0000000000b1f1e8 = <.fill_regs32> 00000000001001a0 <.__start-0x1ff0> std r2,40(r1) 00000000001001a4 <.__start-0x1fec> addis r2,r2,1 00000000001001a8 <.__start-0x1fe8> addi r2,r2,-8 00000000001001ac <.__start-0x1fe4> b 0000000000b1a7e4 = <.casueword32> 00000000001001b0 <.__start-0x1fe0> std r2,40(r1) 00000000001001b4 <.__start-0x1fdc> addis r2,r2,1 00000000001001b8 <.__start-0x1fd8> addi r2,r2,-8 00000000001001bc <.__start-0x1fd4> b 0000000000a8fa30 = <.kmap_free_wakeup> . . . 0000000000102190 <.__start> mfmsr r20 0000000000102194 <.__start+0x4> li r21,1 0000000000102198 <.__start+0x8> rldimi r20,r21,63,0 000000000010219c <.__start+0xc> mtmsrd r20 00000000001021a0 <.__start+0x10> isync 00000000001021a4 <.__start+0x14> nop 00000000001021a8 <.__start+0x18> b 00000000001021b0 = <.__start+0x20> 00000000001021ac <.__start+0x1c> nop 00000000001021b0 <.__start+0x20> nop 00000000001021b4 <.__start+0x24> bl 00000000001021c0 = <.__start+0x30> 00000000001021b8 <.__start+0x28> .long 0x0 00000000001021bc <.__start+0x2c> .long 0xfc8e48 00000000001021c0 <.__start+0x30> mflr r2 00000000001021c4 <.__start+0x34> ld r1,0(r2) 00000000001021c8 <.__start+0x38> add r2,r1,r2 00000000001021cc <.__start+0x3c> ld r31,-32768(r2) 00000000001021d0 <.__start+0x40> subf r31,r31,r2 00000000001021d4 <.__start+0x44> ld r1,0(r2) <<< same 0 vs. = -32760 oddity!!! 00000000001021d8 <.__start+0x48> addi r1,r1,16288 00000000001021dc <.__start+0x4c> add r1,r1,r31 00000000001021e0 <.__start+0x50> std r3,48(r1) 00000000001021e4 <.__start+0x54> std r4,56(r1) 00000000001021e8 <.__start+0x58> std r5,64(r1) 00000000001021ec <.__start+0x5c> std r6,72(r1) 00000000001021f0 <.__start+0x60> bl 00000000001021fc = <.__start+0x6c> 00000000001021f4 <.__start+0x64> .long 0x0 00000000001021f8 <.__start+0x68> .long 0xfd4014 00000000001021fc <.__start+0x6c> mflr r3 0000000000102200 <.__start+0x70> ld r4,0(r3) 0000000000102204 <.__start+0x74> add r3,r4,r3 0000000000102208 <.__start+0x78> mr r4,r31 000000000010220c <.__start+0x7c> bl 0000000000101a20 0000000000102210 <.__start+0x80> ld r2,40(r1) 0000000000102214 <.__start+0x84> ld r3,48(r1) 0000000000102218 <.__start+0x88> ld r4,56(r1) 000000000010221c <.__start+0x8c> ld r5,64(r1) 0000000000102220 <.__start+0x90> ld r6,72(r1) 0000000000102224 <.__start+0x94> mr r4,r2 0000000000102228 <.__start+0x98> bl 00000000001019a0 000000000010222c <.__start+0x9c> ld r2,40(r1) 0000000000102230 <.__start+0xa0> mr r1,r3 0000000000102234 <.__start+0xa4> li r3,0 0000000000102238 <.__start+0xa8> std r3,0(r1) 000000000010223c <.__start+0xac> bl 00000000005c6b28 <.mi_startup> 0000000000102240 <.__start+0xb0> nop 0000000000102244 <.__start+0xb4> b 0000000000102244 = <.__start+0xb4> Who is most appropriate to send such information to for powerpc64? =3D=3D=3D Mark Millard markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Thu Dec 8 23:08:11 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5F5A5C6E34B for ; Thu, 8 Dec 2016 23:08:11 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-70.reflexion.net [208.70.210.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 20C38CB1 for ; Thu, 8 Dec 2016 23:08:10 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 15303 invoked from network); 8 Dec 2016 23:01:38 -0000 Received: from unknown (HELO mail-cs-02.app.dca.reflexion.local) (10.81.19.2) by 0 (rfx-qmail) with SMTP; 8 Dec 2016 23:01:38 -0000 Received: by mail-cs-02.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Thu, 08 Dec 2016 18:01:37 -0500 (EST) Received: (qmail 20397 invoked from network); 8 Dec 2016 23:01:37 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 8 Dec 2016 23:01:37 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 260CDEC900F; Thu, 8 Dec 2016 15:01:29 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <20161208221452.GA42380@vlakno.cz> Date: Thu, 8 Dec 2016 15:01:28 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: <29224379-EFB5-4FEE-ADDA-EB448773D248@dsl-only.net> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> <20161208185541.GA33364@vlakno.cz> <20161208221452.GA42380@vlakno.cz> To: Roman Divacky , Nathan Whitehorn X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 23:08:11 -0000 On 2016-Dec-8, at 2:14 PM, Roman Divacky wrote: > I believe the code comes from sys/powerpc/aim/locore64.S and if you = compare > the different values from the disssembly with the .S code you can see > it's __tocbase and TOC_REF(). >=20 > I wonder if the assembly has the -mminimal-toc knowledge hardcoded in = somehow. > I am not sure what expectations the locore64.S has about the kernel = layout that > we're probably breaking. >=20 > I've CCed Nathan Whitehorn. Nathan, can you take a look please? >=20 > Thanks, Roman For Nathan's reference about the context: I got to the point of having a clang 3.9.0 buildkernel finish for targeting powerpc64. But it does not boot. I'm working from head -r309656 with the following patches: (ignoring my usual PowerMac G5 powerpc64 booting hack related materials that I've had in place for a long time) # svnlite diff /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td = (revision 309656) +++ /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working = copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; =20 +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in (Roman Divacky supplied the above patch.) # svnlite diff /usr/src/sys/modules/zfs/Makefile Index: /usr/src/sys/modules/zfs/Makefile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/sys/modules/zfs/Makefile (revision 309656) +++ /usr/src/sys/modules/zfs/Makefile (working copy) @@ -93,9 +93,9 @@ CFLAGS+=3D-I${SUNW}/common CFLAGS+=3D-DBUILDING_ZFS =20 -.if ${MACHINE_ARCH} =3D=3D "powerpc64" -CFLAGS+=3D-mminimal-toc -.endif +#.if ${MACHINE_ARCH} =3D=3D "powerpc64" +#CFLAGS+=3D-mminimal-toc +#.endif =20 .ifdef ZFS_DEBUG CFLAGS+=3D-DDEBUG=3D1 This last just avoids that clang 3.9.0 for targeting powerpc64 rejects the -mminimal-toc command line option. It being missing did not cause the buildkernel to stop. Note: I have booted with clang 3.9.0 based buildworld materials. (But C++ exception handling is still messed up so code dependent on C++ exceptions happening needs to be avoided.) I've had to avoid both WITH_BINUTILS_BOOTSTRAP=3D like binutils and 2.47 variants of devel/powerpc64-binutils or devel/binutils: I use older 2.25.1 devel/powerpc64-binutils or devel/binutils (on the powerpc64 itself). However for buildkernel WITH_BINUTILS_BOOTSTRAP=3D like binutils do not end up with ld failing and buildkernel appears to complete. =3D=3D=3D Mark Millard markmi at dsl-only.net Older material: On Thu, Dec 08, 2016 at 02:03:58PM -0800, Mark Millard wrote: > [I have dropped the patch related information and just have > failing-boot related information here.] >=20 > On 2016-Dec-8, at 10:55 AM, Roman Divacky = wrote: >=20 >> Can you try to investigate why it dies? I am not convinced = -mminimal-toc >> would result in a boot failure. I think the kernel would fail to = link. >=20 > I give information for both devel/powerpc64-binutils based > and for WITH_BINUTILS_BOOTSTRAP=3D based. They are different. >=20 > For using 2.25.1 of devel/powerpc64-binutils (a cross build): > (from camera image of screen) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker390 > /boot/ker390/kernel data=3D0xf851a8+0x42dd98 = syms=3D[0x8+0xd6848+0x8+0xf1137] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.001001b0 = %SRR1:90000000.00003030 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 >=20 > =46rom objdump for the above failing boot > but with notes added: > (Note: booting xtoolchain kernel starts at > 0000000000100120 instead; relative > offsets are unchanged and the code > is mostly the same.) >=20 > Disassembly of section .text: > 0000000000100160 <.__start> mfmsr r20 > 0000000000100164 <.__start+0x4> li r21,1 > 0000000000100168 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010016c <.__start+0xc> mtmsrd r20 > 0000000000100170 <.__start+0x10> isync > 0000000000100174 <.__start+0x14> nop > 0000000000100178 <.__start+0x18> b 0000000000100180 = <.__start+0x20> > 000000000010017c <.__start+0x1c> nop > 0000000000100180 <.__start+0x20> nop > 0000000000100184 <.__start+0x24> bl 0000000000100190 = <.__start+0x30> > 0000000000100188 <.__start+0x28> .long 0x0 > 000000000010018c <.__start+0x2c> .long 0xf8ce78 =20 > booting xtoolchain based kernel has: 0xfebeb8 above <<<=3D=3D=3D = note > 0000000000100190 <.__start+0x30> mflr r2 > 0000000000100194 <.__start+0x34> ld r1,0(r2) > 0000000000100198 <.__start+0x38> add r2,r1,r2 > 000000000010019c <.__start+0x3c> ld r31,-32768(r2) > 00000000001001a0 <.__start+0x40> subf r31,r31,r2 > 00000000001001a4 <.__start+0x44> ld r1,0(r2) <<<=3D=3D=3D= !!!!! > booting xtoolchain based kernel has: r1,-32760(r2) above <<<=3D=3D=3D= !!!!! > 00000000001001a8 <.__start+0x48> addi r1,r1,16288 > 00000000001001ac <.__start+0x4c> add r1,r1,r31 > 00000000001001b0 <.__start+0x50> std r3,48(r1) > SRR0 points at the above instruction > (I stopped comparing to the booting xtoolchain > based code after this.) > 00000000001001b4 <.__start+0x54> std r4,56(r1) > 00000000001001b8 <.__start+0x58> std r5,64(r1) > 00000000001001bc <.__start+0x5c> std r6,72(r1) > 00000000001001c0 <.__start+0x60> bl 00000000001001cc = <.__start+0x6c> > 00000000001001c4 <.__start+0x64> .long 0x0 > 00000000001001c8 <.__start+0x68> .long 0xf84ed4 > 00000000001001cc <.__start+0x6c> mflr r3 > 00000000001001d0 <.__start+0x70> ld r4,0(r3) > 00000000001001d4 <.__start+0x74> add r3,r4,r3 > 00000000001001d8 <.__start+0x78> mr r4,r31 > 00000000001001dc <.__start+0x7c> bl 0000000000b18ebc = <.elf_reloc_self> > 00000000001001e0 <.__start+0x80> nop > 00000000001001e4 <.__start+0x84> ld r3,48(r1) > 00000000001001e8 <.__start+0x88> ld r4,56(r1) > 00000000001001ec <.__start+0x8c> ld r5,64(r1) > 00000000001001f0 <.__start+0x90> ld r6,72(r1) > 00000000001001f4 <.__start+0x94> mr r4,r2 > 00000000001001f8 <.__start+0x98> bl 0000000000b1e980 = <.powerpc_init> > 00000000001001fc <.__start+0x9c> nop > 0000000000100200 <.__start+0xa0> mr r1,r3 > 0000000000100204 <.__start+0xa4> li r3,0 > 0000000000100208 <.__start+0xa8> std r3,0(r1) > 000000000010020c <.__start+0xac> bl 00000000005c4af8 = <.mi_startup> > 0000000000100210 <.__start+0xb0> nop > 0000000000100214 <.__start+0xb4> b 0000000000100214 = <.__start+0xb4> >=20 >=20 >=20 > For using WITH_BINUTILS_BOOTSTRAP=3D based binutils (a cross build): > (completes for buildkernel; fails for buildworld) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker39a > /boot/ker39a/kernel data=3D0xfd6318+0x42dda8 = syms=3D[0x8+0xd6860+0x8+0xf1193] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.00000000 = %SRR1:10000000.00081000 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 > The problem here is a different code order and a matching > wrong start address that does not track the difference. > (=46rom objdump.) Note: the same 0(r2) vs. -32760(r2) oddity > exists in the start routine as well. >=20 > Disassembly of section .text: > 0000000000100160 <.__start-0x2030> std r2,40(r1) > 0000000000100164 <.__start-0x202c> addis r2,r2,1 > 0000000000100168 <.__start-0x2028> addi r2,r2,-8 > 000000000010016c <.__start-0x2024> b 0000000000b2c8e0 = <.cpu_switch> > 0000000000100170 <.__start-0x2020> std r2,40(r1) > 0000000000100174 <.__start-0x201c> addis r2,r2,1 > 0000000000100178 <.__start-0x2018> addi r2,r2,-8 > 000000000010017c <.__start-0x2014> b 0000000000ade6c8 = <.sf_buf_alloc> > 0000000000100180 <.__start-0x2010> std r2,40(r1) > 0000000000100184 <.__start-0x200c> addis r2,r2,1 > 0000000000100188 <.__start-0x2008> addi r2,r2,-8 > 000000000010018c <.__start-0x2004> b 0000000000a83f78 = <.vm_fault_hold> > 0000000000100190 <.__start-0x2000> std r2,40(r1) > 0000000000100194 <.__start-0x1ffc> addis r2,r2,1 > 0000000000100198 <.__start-0x1ff8> addi r2,r2,-8 > 000000000010019c <.__start-0x1ff4> b 0000000000b1f1e8 = <.fill_regs32> > 00000000001001a0 <.__start-0x1ff0> std r2,40(r1) > 00000000001001a4 <.__start-0x1fec> addis r2,r2,1 > 00000000001001a8 <.__start-0x1fe8> addi r2,r2,-8 > 00000000001001ac <.__start-0x1fe4> b 0000000000b1a7e4 = <.casueword32> > 00000000001001b0 <.__start-0x1fe0> std r2,40(r1) > 00000000001001b4 <.__start-0x1fdc> addis r2,r2,1 > 00000000001001b8 <.__start-0x1fd8> addi r2,r2,-8 > 00000000001001bc <.__start-0x1fd4> b 0000000000a8fa30 = <.kmap_free_wakeup> > . . . > 0000000000102190 <.__start> mfmsr r20 > 0000000000102194 <.__start+0x4> li r21,1 > 0000000000102198 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010219c <.__start+0xc> mtmsrd r20 > 00000000001021a0 <.__start+0x10> isync > 00000000001021a4 <.__start+0x14> nop > 00000000001021a8 <.__start+0x18> b 00000000001021b0 = <.__start+0x20> > 00000000001021ac <.__start+0x1c> nop > 00000000001021b0 <.__start+0x20> nop > 00000000001021b4 <.__start+0x24> bl 00000000001021c0 = <.__start+0x30> > 00000000001021b8 <.__start+0x28> .long 0x0 > 00000000001021bc <.__start+0x2c> .long 0xfc8e48 > 00000000001021c0 <.__start+0x30> mflr r2 > 00000000001021c4 <.__start+0x34> ld r1,0(r2) > 00000000001021c8 <.__start+0x38> add r2,r1,r2 > 00000000001021cc <.__start+0x3c> ld r31,-32768(r2) > 00000000001021d0 <.__start+0x40> subf r31,r31,r2 > 00000000001021d4 <.__start+0x44> ld r1,0(r2) <<< same 0 vs. = -32760 oddity!!! > 00000000001021d8 <.__start+0x48> addi r1,r1,16288 > 00000000001021dc <.__start+0x4c> add r1,r1,r31 > 00000000001021e0 <.__start+0x50> std r3,48(r1) > 00000000001021e4 <.__start+0x54> std r4,56(r1) > 00000000001021e8 <.__start+0x58> std r5,64(r1) > 00000000001021ec <.__start+0x5c> std r6,72(r1) > 00000000001021f0 <.__start+0x60> bl 00000000001021fc = <.__start+0x6c> > 00000000001021f4 <.__start+0x64> .long 0x0 > 00000000001021f8 <.__start+0x68> .long 0xfd4014 > 00000000001021fc <.__start+0x6c> mflr r3 > 0000000000102200 <.__start+0x70> ld r4,0(r3) > 0000000000102204 <.__start+0x74> add r3,r4,r3 > 0000000000102208 <.__start+0x78> mr r4,r31 > 000000000010220c <.__start+0x7c> bl 0000000000101a20 = > 0000000000102210 <.__start+0x80> ld r2,40(r1) > 0000000000102214 <.__start+0x84> ld r3,48(r1) > 0000000000102218 <.__start+0x88> ld r4,56(r1) > 000000000010221c <.__start+0x8c> ld r5,64(r1) > 0000000000102220 <.__start+0x90> ld r6,72(r1) > 0000000000102224 <.__start+0x94> mr r4,r2 > 0000000000102228 <.__start+0x98> bl 00000000001019a0 = > 000000000010222c <.__start+0x9c> ld r2,40(r1) > 0000000000102230 <.__start+0xa0> mr r1,r3 > 0000000000102234 <.__start+0xa4> li r3,0 > 0000000000102238 <.__start+0xa8> std r3,0(r1) > 000000000010223c <.__start+0xac> bl 00000000005c6b28 = <.mi_startup> > 0000000000102240 <.__start+0xb0> nop > 0000000000102244 <.__start+0xb4> b 0000000000102244 = <.__start+0xb4> >=20 >=20 > Who is most appropriate to send such information to for powerpc64? >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net From owner-freebsd-ppc@freebsd.org Thu Dec 8 23:26:45 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B5B75C6E74B for ; Thu, 8 Dec 2016 23:26:45 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-73.reflexion.net [208.70.210.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 6FFB11375 for ; Thu, 8 Dec 2016 23:26:45 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 21968 invoked from network); 8 Dec 2016 23:26:44 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 8 Dec 2016 23:26:44 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Thu, 08 Dec 2016 18:26:55 -0500 (EST) Received: (qmail 10503 invoked from network); 8 Dec 2016 23:26:55 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 8 Dec 2016 23:26:55 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id F0921EC7B35; Thu, 8 Dec 2016 15:26:42 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <29224379-EFB5-4FEE-ADDA-EB448773D248@dsl-only.net> Date: Thu, 8 Dec 2016 15:26:42 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: <20480337-3CF7-4ED4-AB55-ADE18A3F0F75@dsl-only.net> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> <20161208185541.GA33364@vlakno.cz> <20161208221452.GA42380@vlakno.cz> <29224379-EFB5-4FEE-ADDA-EB448773D248@dsl-only.net> To: Roman Divacky , Nathan Whitehorn X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Dec 2016 23:26:45 -0000 [Top post noting a systematic stupid typo of mine.] I keep typing 2.47 instead of 2.27 for devel/binutils and devel/powerpc64-binutils . =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-8, at 3:01 PM, Mark Millard wrote: On 2016-Dec-8, at 2:14 PM, Roman Divacky wrote: > I believe the code comes from sys/powerpc/aim/locore64.S and if you = compare > the different values from the disssembly with the .S code you can see > it's __tocbase and TOC_REF(). >=20 > I wonder if the assembly has the -mminimal-toc knowledge hardcoded in = somehow. > I am not sure what expectations the locore64.S has about the kernel = layout that > we're probably breaking. >=20 > I've CCed Nathan Whitehorn. Nathan, can you take a look please? >=20 > Thanks, Roman For Nathan's reference about the context: I got to the point of having a clang 3.9.0 buildkernel finish for targeting powerpc64. But it does not boot. I'm working from head -r309656 with the following patches: (ignoring my usual PowerMac G5 powerpc64 booting hack related materials that I've had in place for a long time) # svnlite diff /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td = (revision 309656) +++ /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working = copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in (Roman Divacky supplied the above patch.) # svnlite diff /usr/src/sys/modules/zfs/Makefile Index: /usr/src/sys/modules/zfs/Makefile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/sys/modules/zfs/Makefile (revision 309656) +++ /usr/src/sys/modules/zfs/Makefile (working copy) @@ -93,9 +93,9 @@ CFLAGS+=3D-I${SUNW}/common CFLAGS+=3D-DBUILDING_ZFS -.if ${MACHINE_ARCH} =3D=3D "powerpc64" -CFLAGS+=3D-mminimal-toc -.endif +#.if ${MACHINE_ARCH} =3D=3D "powerpc64" +#CFLAGS+=3D-mminimal-toc +#.endif .ifdef ZFS_DEBUG CFLAGS+=3D-DDEBUG=3D1 This last just avoids that clang 3.9.0 for targeting powerpc64 rejects the -mminimal-toc command line option. It being missing did not cause the buildkernel to stop. Note: I have booted with clang 3.9.0 based buildworld materials. (But C++ exception handling is still messed up so code dependent on C++ exceptions happening needs to be avoided.) I've had to avoid both WITH_BINUTILS_BOOTSTRAP=3D like binutils and 2.47 variants of devel/powerpc64-binutils or devel/binutils: I use older 2.25.1 devel/powerpc64-binutils or devel/binutils (on the powerpc64 itself). However for buildkernel WITH_BINUTILS_BOOTSTRAP=3D like binutils do not end up with ld failing and buildkernel appears to complete. =3D=3D=3D Mark Millard markmi at dsl-only.net Older material: On Thu, Dec 08, 2016 at 02:03:58PM -0800, Mark Millard wrote: > [I have dropped the patch related information and just have > failing-boot related information here.] >=20 > On 2016-Dec-8, at 10:55 AM, Roman Divacky = wrote: >=20 >> Can you try to investigate why it dies? I am not convinced = -mminimal-toc >> would result in a boot failure. I think the kernel would fail to = link. >=20 > I give information for both devel/powerpc64-binutils based > and for WITH_BINUTILS_BOOTSTRAP=3D based. They are different. >=20 > For using 2.25.1 of devel/powerpc64-binutils (a cross build): > (from camera image of screen) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker390 > /boot/ker390/kernel data=3D0xf851a8+0x42dd98 = syms=3D[0x8+0xd6848+0x8+0xf1137] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.001001b0 = %SRR1:90000000.00003030 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 >=20 > =46rom objdump for the above failing boot > but with notes added: > (Note: booting xtoolchain kernel starts at > 0000000000100120 instead; relative > offsets are unchanged and the code > is mostly the same.) >=20 > Disassembly of section .text: > 0000000000100160 <.__start> mfmsr r20 > 0000000000100164 <.__start+0x4> li r21,1 > 0000000000100168 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010016c <.__start+0xc> mtmsrd r20 > 0000000000100170 <.__start+0x10> isync > 0000000000100174 <.__start+0x14> nop > 0000000000100178 <.__start+0x18> b 0000000000100180 = <.__start+0x20> > 000000000010017c <.__start+0x1c> nop > 0000000000100180 <.__start+0x20> nop > 0000000000100184 <.__start+0x24> bl 0000000000100190 = <.__start+0x30> > 0000000000100188 <.__start+0x28> .long 0x0 > 000000000010018c <.__start+0x2c> .long 0xf8ce78 =20 > booting xtoolchain based kernel has: 0xfebeb8 above <<<=3D=3D=3D = note > 0000000000100190 <.__start+0x30> mflr r2 > 0000000000100194 <.__start+0x34> ld r1,0(r2) > 0000000000100198 <.__start+0x38> add r2,r1,r2 > 000000000010019c <.__start+0x3c> ld r31,-32768(r2) > 00000000001001a0 <.__start+0x40> subf r31,r31,r2 > 00000000001001a4 <.__start+0x44> ld r1,0(r2) <<<=3D=3D=3D= !!!!! > booting xtoolchain based kernel has: r1,-32760(r2) above <<<=3D=3D=3D = !!!!! > 00000000001001a8 <.__start+0x48> addi r1,r1,16288 > 00000000001001ac <.__start+0x4c> add r1,r1,r31 > 00000000001001b0 <.__start+0x50> std r3,48(r1) > SRR0 points at the above instruction > (I stopped comparing to the booting xtoolchain > based code after this.) > 00000000001001b4 <.__start+0x54> std r4,56(r1) > 00000000001001b8 <.__start+0x58> std r5,64(r1) > 00000000001001bc <.__start+0x5c> std r6,72(r1) > 00000000001001c0 <.__start+0x60> bl 00000000001001cc = <.__start+0x6c> > 00000000001001c4 <.__start+0x64> .long 0x0 > 00000000001001c8 <.__start+0x68> .long 0xf84ed4 > 00000000001001cc <.__start+0x6c> mflr r3 > 00000000001001d0 <.__start+0x70> ld r4,0(r3) > 00000000001001d4 <.__start+0x74> add r3,r4,r3 > 00000000001001d8 <.__start+0x78> mr r4,r31 > 00000000001001dc <.__start+0x7c> bl 0000000000b18ebc = <.elf_reloc_self> > 00000000001001e0 <.__start+0x80> nop > 00000000001001e4 <.__start+0x84> ld r3,48(r1) > 00000000001001e8 <.__start+0x88> ld r4,56(r1) > 00000000001001ec <.__start+0x8c> ld r5,64(r1) > 00000000001001f0 <.__start+0x90> ld r6,72(r1) > 00000000001001f4 <.__start+0x94> mr r4,r2 > 00000000001001f8 <.__start+0x98> bl 0000000000b1e980 = <.powerpc_init> > 00000000001001fc <.__start+0x9c> nop > 0000000000100200 <.__start+0xa0> mr r1,r3 > 0000000000100204 <.__start+0xa4> li r3,0 > 0000000000100208 <.__start+0xa8> std r3,0(r1) > 000000000010020c <.__start+0xac> bl 00000000005c4af8 = <.mi_startup> > 0000000000100210 <.__start+0xb0> nop > 0000000000100214 <.__start+0xb4> b 0000000000100214 = <.__start+0xb4> >=20 >=20 >=20 > For using WITH_BINUTILS_BOOTSTRAP=3D based binutils (a cross build): > (completes for buildkernel; fails for buildworld) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker39a > /boot/ker39a/kernel data=3D0xfd6318+0x42dda8 = syms=3D[0x8+0xd6860+0x8+0xf1193] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.00000000 = %SRR1:10000000.00081000 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 > The problem here is a different code order and a matching > wrong start address that does not track the difference. > (=46rom objdump.) Note: the same 0(r2) vs. -32760(r2) oddity > exists in the start routine as well. >=20 > Disassembly of section .text: > 0000000000100160 <.__start-0x2030> std r2,40(r1) > 0000000000100164 <.__start-0x202c> addis r2,r2,1 > 0000000000100168 <.__start-0x2028> addi r2,r2,-8 > 000000000010016c <.__start-0x2024> b 0000000000b2c8e0 = <.cpu_switch> > 0000000000100170 <.__start-0x2020> std r2,40(r1) > 0000000000100174 <.__start-0x201c> addis r2,r2,1 > 0000000000100178 <.__start-0x2018> addi r2,r2,-8 > 000000000010017c <.__start-0x2014> b 0000000000ade6c8 = <.sf_buf_alloc> > 0000000000100180 <.__start-0x2010> std r2,40(r1) > 0000000000100184 <.__start-0x200c> addis r2,r2,1 > 0000000000100188 <.__start-0x2008> addi r2,r2,-8 > 000000000010018c <.__start-0x2004> b 0000000000a83f78 = <.vm_fault_hold> > 0000000000100190 <.__start-0x2000> std r2,40(r1) > 0000000000100194 <.__start-0x1ffc> addis r2,r2,1 > 0000000000100198 <.__start-0x1ff8> addi r2,r2,-8 > 000000000010019c <.__start-0x1ff4> b 0000000000b1f1e8 = <.fill_regs32> > 00000000001001a0 <.__start-0x1ff0> std r2,40(r1) > 00000000001001a4 <.__start-0x1fec> addis r2,r2,1 > 00000000001001a8 <.__start-0x1fe8> addi r2,r2,-8 > 00000000001001ac <.__start-0x1fe4> b 0000000000b1a7e4 = <.casueword32> > 00000000001001b0 <.__start-0x1fe0> std r2,40(r1) > 00000000001001b4 <.__start-0x1fdc> addis r2,r2,1 > 00000000001001b8 <.__start-0x1fd8> addi r2,r2,-8 > 00000000001001bc <.__start-0x1fd4> b 0000000000a8fa30 = <.kmap_free_wakeup> > . . . > 0000000000102190 <.__start> mfmsr r20 > 0000000000102194 <.__start+0x4> li r21,1 > 0000000000102198 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010219c <.__start+0xc> mtmsrd r20 > 00000000001021a0 <.__start+0x10> isync > 00000000001021a4 <.__start+0x14> nop > 00000000001021a8 <.__start+0x18> b 00000000001021b0 = <.__start+0x20> > 00000000001021ac <.__start+0x1c> nop > 00000000001021b0 <.__start+0x20> nop > 00000000001021b4 <.__start+0x24> bl 00000000001021c0 = <.__start+0x30> > 00000000001021b8 <.__start+0x28> .long 0x0 > 00000000001021bc <.__start+0x2c> .long 0xfc8e48 > 00000000001021c0 <.__start+0x30> mflr r2 > 00000000001021c4 <.__start+0x34> ld r1,0(r2) > 00000000001021c8 <.__start+0x38> add r2,r1,r2 > 00000000001021cc <.__start+0x3c> ld r31,-32768(r2) > 00000000001021d0 <.__start+0x40> subf r31,r31,r2 > 00000000001021d4 <.__start+0x44> ld r1,0(r2) <<< same 0 vs. = -32760 oddity!!! > 00000000001021d8 <.__start+0x48> addi r1,r1,16288 > 00000000001021dc <.__start+0x4c> add r1,r1,r31 > 00000000001021e0 <.__start+0x50> std r3,48(r1) > 00000000001021e4 <.__start+0x54> std r4,56(r1) > 00000000001021e8 <.__start+0x58> std r5,64(r1) > 00000000001021ec <.__start+0x5c> std r6,72(r1) > 00000000001021f0 <.__start+0x60> bl 00000000001021fc = <.__start+0x6c> > 00000000001021f4 <.__start+0x64> .long 0x0 > 00000000001021f8 <.__start+0x68> .long 0xfd4014 > 00000000001021fc <.__start+0x6c> mflr r3 > 0000000000102200 <.__start+0x70> ld r4,0(r3) > 0000000000102204 <.__start+0x74> add r3,r4,r3 > 0000000000102208 <.__start+0x78> mr r4,r31 > 000000000010220c <.__start+0x7c> bl 0000000000101a20 = > 0000000000102210 <.__start+0x80> ld r2,40(r1) > 0000000000102214 <.__start+0x84> ld r3,48(r1) > 0000000000102218 <.__start+0x88> ld r4,56(r1) > 000000000010221c <.__start+0x8c> ld r5,64(r1) > 0000000000102220 <.__start+0x90> ld r6,72(r1) > 0000000000102224 <.__start+0x94> mr r4,r2 > 0000000000102228 <.__start+0x98> bl 00000000001019a0 = > 000000000010222c <.__start+0x9c> ld r2,40(r1) > 0000000000102230 <.__start+0xa0> mr r1,r3 > 0000000000102234 <.__start+0xa4> li r3,0 > 0000000000102238 <.__start+0xa8> std r3,0(r1) > 000000000010223c <.__start+0xac> bl 00000000005c6b28 = <.mi_startup> > 0000000000102240 <.__start+0xb0> nop > 0000000000102244 <.__start+0xb4> b 0000000000102244 = <.__start+0xb4> >=20 >=20 > Who is most appropriate to send such information to for powerpc64? >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net _______________________________________________ freebsd-toolchain@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-toolchain To unsubscribe, send any mail to = "freebsd-toolchain-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Fri Dec 9 02:47:37 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4C26CC6DE6A for ; Fri, 9 Dec 2016 02:47:37 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-72.reflexion.net [208.70.210.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 00F12C40 for ; Fri, 9 Dec 2016 02:47:36 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 22535 invoked from network); 9 Dec 2016 02:48:27 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 9 Dec 2016 02:48:27 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.20.0) with SMTP; Thu, 08 Dec 2016 21:47:46 -0500 (EST) Received: (qmail 2269 invoked from network); 9 Dec 2016 02:47:46 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 9 Dec 2016 02:47:46 -0000 Received: from [192.168.1.118] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 7531FEC9156; Thu, 8 Dec 2016 18:47:34 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.1 \(3251\)) Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . From: Mark Millard In-Reply-To: <20480337-3CF7-4ED4-AB55-ADE18A3F0F75@dsl-only.net> Date: Thu, 8 Dec 2016 18:47:33 -0800 Cc: FreeBSD Toolchain , Justin Hibbits , FreeBSD PowerPC ML Content-Transfer-Encoding: quoted-printable Message-Id: <3EC1505A-962E-4679-AB5E-021ED352A284@dsl-only.net> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> <126E2EDE-9499-4103-A3DB-CC517105DAB2@dsl-only.net> <20161207190057.GA58950@vlakno.cz> <20161208185541.GA33364@vlakno.cz> <20161208221452.GA42380@vlakno.cz> <29224379-EFB5-4FEE-ADDA-EB448773D248@dsl-only.net> <20480337-3CF7-4ED4-AB55-ADE18A3F0F75@dsl-only.net> To: Roman Divacky , Nathan Whitehorn X-Mailer: Apple Mail (2.3251) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Dec 2016 02:47:37 -0000 A context point that I forgot to mention. . . I had to use WERROR=3D in order for buildkernel to complete under clang 3.9.0 . Otherwise it stopped based on: converts between pointers to integer types with different sign = [-Werror,-Wpointer-sign] =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-8, at 3:26 PM, Mark Millard wrote: [Top post noting a systematic stupid typo of mine.] I keep typing 2.47 instead of 2.27 for devel/binutils and devel/powerpc64-binutils . =3D=3D=3D Mark Millard markmi at dsl-only.net On 2016-Dec-8, at 3:01 PM, Mark Millard wrote: On 2016-Dec-8, at 2:14 PM, Roman Divacky wrote: > I believe the code comes from sys/powerpc/aim/locore64.S and if you = compare > the different values from the disssembly with the .S code you can see > it's __tocbase and TOC_REF(). >=20 > I wonder if the assembly has the -mminimal-toc knowledge hardcoded in = somehow. > I am not sure what expectations the locore64.S has about the kernel = layout that > we're probably breaking. >=20 > I've CCed Nathan Whitehorn. Nathan, can you take a look please? >=20 > Thanks, Roman For Nathan's reference about the context: I got to the point of having a clang 3.9.0 buildkernel finish for targeting powerpc64. But it does not boot. I'm working from head -r309656 with the following patches: (ignoring my usual PowerMac G5 powerpc64 booting hack related materials that I've had in place for a long time) # svnlite diff /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td Index: /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td = (revision 309656) +++ /usr/src/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td (working = copy) @@ -2300,6 +2300,12 @@ def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), "mftb $RT, $SPR", IIC_SprMFTB>; +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), + "mfpmr $RT, $PMRN", IIC_IntGeneral>; + +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), + "mtpmr $PMRN, $RS", IIC_IntGeneral>; + // A pseudo-instruction used to implement the read of the 64-bit cycle = counter // on a 32-bit target. let hasSideEffects =3D 1, usesCustomInserter =3D 1 in (Roman Divacky supplied the above patch.) # svnlite diff /usr/src/sys/modules/zfs/Makefile Index: /usr/src/sys/modules/zfs/Makefile =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D --- /usr/src/sys/modules/zfs/Makefile (revision 309656) +++ /usr/src/sys/modules/zfs/Makefile (working copy) @@ -93,9 +93,9 @@ CFLAGS+=3D-I${SUNW}/common CFLAGS+=3D-DBUILDING_ZFS -.if ${MACHINE_ARCH} =3D=3D "powerpc64" -CFLAGS+=3D-mminimal-toc -.endif +#.if ${MACHINE_ARCH} =3D=3D "powerpc64" +#CFLAGS+=3D-mminimal-toc +#.endif .ifdef ZFS_DEBUG CFLAGS+=3D-DDEBUG=3D1 This last just avoids that clang 3.9.0 for targeting powerpc64 rejects the -mminimal-toc command line option. It being missing did not cause the buildkernel to stop. Note: I have booted with clang 3.9.0 based buildworld materials. (But C++ exception handling is still messed up so code dependent on C++ exceptions happening needs to be avoided.) I've had to avoid both WITH_BINUTILS_BOOTSTRAP=3D like binutils and 2.47 variants of devel/powerpc64-binutils or devel/binutils: I use older 2.25.1 devel/powerpc64-binutils or devel/binutils (on the powerpc64 itself). However for buildkernel WITH_BINUTILS_BOOTSTRAP=3D like binutils do not end up with ld failing and buildkernel appears to complete. =3D=3D=3D Mark Millard markmi at dsl-only.net Older material: On Thu, Dec 08, 2016 at 02:03:58PM -0800, Mark Millard wrote: > [I have dropped the patch related information and just have > failing-boot related information here.] >=20 > On 2016-Dec-8, at 10:55 AM, Roman Divacky = wrote: >=20 >> Can you try to investigate why it dies? I am not convinced = -mminimal-toc >> would result in a boot failure. I think the kernel would fail to = link. >=20 > I give information for both devel/powerpc64-binutils based > and for WITH_BINUTILS_BOOTSTRAP=3D based. They are different. >=20 > For using 2.25.1 of devel/powerpc64-binutils (a cross build): > (from camera image of screen) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker390 > /boot/ker390/kernel data=3D0xf851a8+0x42dd98 = syms=3D[0x8+0xd6848+0x8+0xf1137] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.001001b0 = %SRR1:90000000.00003030 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 >=20 > =46rom objdump for the above failing boot > but with notes added: > (Note: booting xtoolchain kernel starts at > 0000000000100120 instead; relative > offsets are unchanged and the code > is mostly the same.) >=20 > Disassembly of section .text: > 0000000000100160 <.__start> mfmsr r20 > 0000000000100164 <.__start+0x4> li r21,1 > 0000000000100168 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010016c <.__start+0xc> mtmsrd r20 > 0000000000100170 <.__start+0x10> isync > 0000000000100174 <.__start+0x14> nop > 0000000000100178 <.__start+0x18> b 0000000000100180 = <.__start+0x20> > 000000000010017c <.__start+0x1c> nop > 0000000000100180 <.__start+0x20> nop > 0000000000100184 <.__start+0x24> bl 0000000000100190 = <.__start+0x30> > 0000000000100188 <.__start+0x28> .long 0x0 > 000000000010018c <.__start+0x2c> .long 0xf8ce78 =20 > booting xtoolchain based kernel has: 0xfebeb8 above <<<=3D=3D=3D = note > 0000000000100190 <.__start+0x30> mflr r2 > 0000000000100194 <.__start+0x34> ld r1,0(r2) > 0000000000100198 <.__start+0x38> add r2,r1,r2 > 000000000010019c <.__start+0x3c> ld r31,-32768(r2) > 00000000001001a0 <.__start+0x40> subf r31,r31,r2 > 00000000001001a4 <.__start+0x44> ld r1,0(r2) <<<=3D=3D=3D= !!!!! > booting xtoolchain based kernel has: r1,-32760(r2) above <<<=3D=3D=3D = !!!!! > 00000000001001a8 <.__start+0x48> addi r1,r1,16288 > 00000000001001ac <.__start+0x4c> add r1,r1,r31 > 00000000001001b0 <.__start+0x50> std r3,48(r1) > SRR0 points at the above instruction > (I stopped comparing to the booting xtoolchain > based code after this.) > 00000000001001b4 <.__start+0x54> std r4,56(r1) > 00000000001001b8 <.__start+0x58> std r5,64(r1) > 00000000001001bc <.__start+0x5c> std r6,72(r1) > 00000000001001c0 <.__start+0x60> bl 00000000001001cc = <.__start+0x6c> > 00000000001001c4 <.__start+0x64> .long 0x0 > 00000000001001c8 <.__start+0x68> .long 0xf84ed4 > 00000000001001cc <.__start+0x6c> mflr r3 > 00000000001001d0 <.__start+0x70> ld r4,0(r3) > 00000000001001d4 <.__start+0x74> add r3,r4,r3 > 00000000001001d8 <.__start+0x78> mr r4,r31 > 00000000001001dc <.__start+0x7c> bl 0000000000b18ebc = <.elf_reloc_self> > 00000000001001e0 <.__start+0x80> nop > 00000000001001e4 <.__start+0x84> ld r3,48(r1) > 00000000001001e8 <.__start+0x88> ld r4,56(r1) > 00000000001001ec <.__start+0x8c> ld r5,64(r1) > 00000000001001f0 <.__start+0x90> ld r6,72(r1) > 00000000001001f4 <.__start+0x94> mr r4,r2 > 00000000001001f8 <.__start+0x98> bl 0000000000b1e980 = <.powerpc_init> > 00000000001001fc <.__start+0x9c> nop > 0000000000100200 <.__start+0xa0> mr r1,r3 > 0000000000100204 <.__start+0xa4> li r3,0 > 0000000000100208 <.__start+0xa8> std r3,0(r1) > 000000000010020c <.__start+0xac> bl 00000000005c4af8 = <.mi_startup> > 0000000000100210 <.__start+0xb0> nop > 0000000000100214 <.__start+0xb4> b 0000000000100214 = <.__start+0xb4> >=20 >=20 >=20 > For using WITH_BINUTILS_BOOTSTRAP=3D based binutils (a cross build): > (completes for buildkernel; fails for buildworld) >=20 > . . . (omitted material) . . . > Type '?' for a list of commands, 'help' for more detailed help. > OK unload > OK boot ker39a > /boot/ker39a/kernel data=3D0xfd6318+0x42dda8 = syms=3D[0x8+0xd6860+0x8+0xf1193] > /boot/entropy size=3D0x1000 > Booting. . . > Kernel entry at 0x100160 >=20 > Invalid memory access at %SSR0: 00000000.00000000 = %SRR1:10000000.00081000 >=20 > Apple PowerMac11,2 5.2.7f1 BootROM builtin on 09/30/005 at 15:31:03 > . . . (omitted material) . . . > ok > 0 > >=20 > The only options at this point are: >=20 > mac-boot > shut-down >=20 > The problem here is a different code order and a matching > wrong start address that does not track the difference. > (=46rom objdump.) Note: the same 0(r2) vs. -32760(r2) oddity > exists in the start routine as well. >=20 > Disassembly of section .text: > 0000000000100160 <.__start-0x2030> std r2,40(r1) > 0000000000100164 <.__start-0x202c> addis r2,r2,1 > 0000000000100168 <.__start-0x2028> addi r2,r2,-8 > 000000000010016c <.__start-0x2024> b 0000000000b2c8e0 = <.cpu_switch> > 0000000000100170 <.__start-0x2020> std r2,40(r1) > 0000000000100174 <.__start-0x201c> addis r2,r2,1 > 0000000000100178 <.__start-0x2018> addi r2,r2,-8 > 000000000010017c <.__start-0x2014> b 0000000000ade6c8 = <.sf_buf_alloc> > 0000000000100180 <.__start-0x2010> std r2,40(r1) > 0000000000100184 <.__start-0x200c> addis r2,r2,1 > 0000000000100188 <.__start-0x2008> addi r2,r2,-8 > 000000000010018c <.__start-0x2004> b 0000000000a83f78 = <.vm_fault_hold> > 0000000000100190 <.__start-0x2000> std r2,40(r1) > 0000000000100194 <.__start-0x1ffc> addis r2,r2,1 > 0000000000100198 <.__start-0x1ff8> addi r2,r2,-8 > 000000000010019c <.__start-0x1ff4> b 0000000000b1f1e8 = <.fill_regs32> > 00000000001001a0 <.__start-0x1ff0> std r2,40(r1) > 00000000001001a4 <.__start-0x1fec> addis r2,r2,1 > 00000000001001a8 <.__start-0x1fe8> addi r2,r2,-8 > 00000000001001ac <.__start-0x1fe4> b 0000000000b1a7e4 = <.casueword32> > 00000000001001b0 <.__start-0x1fe0> std r2,40(r1) > 00000000001001b4 <.__start-0x1fdc> addis r2,r2,1 > 00000000001001b8 <.__start-0x1fd8> addi r2,r2,-8 > 00000000001001bc <.__start-0x1fd4> b 0000000000a8fa30 = <.kmap_free_wakeup> > . . . > 0000000000102190 <.__start> mfmsr r20 > 0000000000102194 <.__start+0x4> li r21,1 > 0000000000102198 <.__start+0x8> rldimi r20,r21,63,0 > 000000000010219c <.__start+0xc> mtmsrd r20 > 00000000001021a0 <.__start+0x10> isync > 00000000001021a4 <.__start+0x14> nop > 00000000001021a8 <.__start+0x18> b 00000000001021b0 = <.__start+0x20> > 00000000001021ac <.__start+0x1c> nop > 00000000001021b0 <.__start+0x20> nop > 00000000001021b4 <.__start+0x24> bl 00000000001021c0 = <.__start+0x30> > 00000000001021b8 <.__start+0x28> .long 0x0 > 00000000001021bc <.__start+0x2c> .long 0xfc8e48 > 00000000001021c0 <.__start+0x30> mflr r2 > 00000000001021c4 <.__start+0x34> ld r1,0(r2) > 00000000001021c8 <.__start+0x38> add r2,r1,r2 > 00000000001021cc <.__start+0x3c> ld r31,-32768(r2) > 00000000001021d0 <.__start+0x40> subf r31,r31,r2 > 00000000001021d4 <.__start+0x44> ld r1,0(r2) <<< same 0 vs. = -32760 oddity!!! > 00000000001021d8 <.__start+0x48> addi r1,r1,16288 > 00000000001021dc <.__start+0x4c> add r1,r1,r31 > 00000000001021e0 <.__start+0x50> std r3,48(r1) > 00000000001021e4 <.__start+0x54> std r4,56(r1) > 00000000001021e8 <.__start+0x58> std r5,64(r1) > 00000000001021ec <.__start+0x5c> std r6,72(r1) > 00000000001021f0 <.__start+0x60> bl 00000000001021fc = <.__start+0x6c> > 00000000001021f4 <.__start+0x64> .long 0x0 > 00000000001021f8 <.__start+0x68> .long 0xfd4014 > 00000000001021fc <.__start+0x6c> mflr r3 > 0000000000102200 <.__start+0x70> ld r4,0(r3) > 0000000000102204 <.__start+0x74> add r3,r4,r3 > 0000000000102208 <.__start+0x78> mr r4,r31 > 000000000010220c <.__start+0x7c> bl 0000000000101a20 = > 0000000000102210 <.__start+0x80> ld r2,40(r1) > 0000000000102214 <.__start+0x84> ld r3,48(r1) > 0000000000102218 <.__start+0x88> ld r4,56(r1) > 000000000010221c <.__start+0x8c> ld r5,64(r1) > 0000000000102220 <.__start+0x90> ld r6,72(r1) > 0000000000102224 <.__start+0x94> mr r4,r2 > 0000000000102228 <.__start+0x98> bl 00000000001019a0 = > 000000000010222c <.__start+0x9c> ld r2,40(r1) > 0000000000102230 <.__start+0xa0> mr r1,r3 > 0000000000102234 <.__start+0xa4> li r3,0 > 0000000000102238 <.__start+0xa8> std r3,0(r1) > 000000000010223c <.__start+0xac> bl 00000000005c6b28 = <.mi_startup> > 0000000000102240 <.__start+0xb0> nop > 0000000000102244 <.__start+0xb4> b 0000000000102244 = <.__start+0xb4> >=20 >=20 > Who is most appropriate to send such information to for powerpc64? >=20 > =3D=3D=3D > Mark Millard > markmi at dsl-only.net _______________________________________________ freebsd-toolchain@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-toolchain To unsubscribe, send any mail to = "freebsd-toolchain-unsubscribe@freebsd.org" _______________________________________________ freebsd-ppc@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-ppc To unsubscribe, send any mail to "freebsd-ppc-unsubscribe@freebsd.org" From owner-freebsd-ppc@freebsd.org Fri Dec 9 03:03:47 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id BB13FC6C56D for ; Fri, 9 Dec 2016 03:03:47 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id AA1F715C9 for ; Fri, 9 Dec 2016 03:03:47 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id uB933lwZ096966 for ; Fri, 9 Dec 2016 03:03:47 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-ppc@FreeBSD.org Subject: [Bug 214761] head -r279594 (2015-Mar-4 11-CURRENT) introduced iMac G3 boot-time crash; release/11.x releng/11.x stable/11 and head (12-CURRENT) broken Date: Fri, 09 Dec 2016 03:03:47 +0000 X-Bugzilla-Reason: AssignedTo X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Base System X-Bugzilla-Component: kern X-Bugzilla-Version: 11.0-STABLE X-Bugzilla-Keywords: X-Bugzilla-Severity: Affects Only Me X-Bugzilla-Who: markmi@dsl-only.net X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: freebsd-ppc@FreeBSD.org X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Dec 2016 03:03:47 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214761 --- Comment #1 from Mark Millard --- -r309167 fixed this in head by fixing: sys/powerpc/include/cpufunc.h to include the isync in the inline routine for mtsrin: - __asm __volatile ("mtsrin %0,%1" :: "r"(value), "r"(va)); + __asm __volatile ("mtsrin %0,%1; isync" :: "r"(value), "r"(va)); The "MFC after: 1 week" has not occurred to stable/11 yet. I do not know if the MFC is required for a "Closed: Fixed" status or not. I do not know if some releng/11.0.? might pick up the change in order to allow iMac's and such to boot in some 11.0 vintages. I doubt a releng update would delay the status change if stable/11 had the change. --=20 You are receiving this mail because: You are the assignee for the bug.= From owner-freebsd-ppc@freebsd.org Fri Dec 9 04:27:04 2016 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 34796C6DFEC for ; Fri, 9 Dec 2016 04:27:04 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from kenobi.freebsd.org (kenobi.freebsd.org [IPv6:2001:1900:2254:206a::16:76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2359A1DEA for ; Fri, 9 Dec 2016 04:27:04 +0000 (UTC) (envelope-from bugzilla-noreply@freebsd.org) Received: from bugs.freebsd.org ([127.0.1.118]) by kenobi.freebsd.org (8.15.2/8.15.2) with ESMTP id uB94R4aN059390 for ; Fri, 9 Dec 2016 04:27:04 GMT (envelope-from bugzilla-noreply@freebsd.org) From: bugzilla-noreply@freebsd.org To: freebsd-ppc@FreeBSD.org Subject: [Bug 214761] head -r279594 (2015-Mar-4 11-CURRENT) introduced iMac G3 boot-time crash; release/11.x releng/11.x stable/11 and head (12-CURRENT) broken Date: Fri, 09 Dec 2016 04:27:04 +0000 X-Bugzilla-Reason: AssignedTo X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: Base System X-Bugzilla-Component: kern X-Bugzilla-Version: 11.0-STABLE X-Bugzilla-Keywords: X-Bugzilla-Severity: Affects Only Me X-Bugzilla-Who: jhibbits@FreeBSD.org X-Bugzilla-Status: New X-Bugzilla-Resolution: X-Bugzilla-Priority: --- X-Bugzilla-Assigned-To: jhibbits@FreeBSD.org X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: cc assigned_to Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: https://bugs.freebsd.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Dec 2016 04:27:04 -0000 https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D214761 Justin Hibbits changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |jhibbits@FreeBSD.org Assignee|freebsd-ppc@FreeBSD.org |jhibbits@FreeBSD.org --=20 You are receiving this mail because: You are the assignee for the bug.=