Date: Sun, 20 Jun 1999 12:54:02 +0200 From: Andreas Braukmann <braukmann@tse-online.de> To: hackers@FreeBSD.ORG Subject: Re: SMP and Celerons... Message-ID: <19990620125402.Q7092@paert.tse-online.de> In-Reply-To: <Pine.BSF.4.05.9906191302400.16699-100000@medulla.hippocampus.net>; from Marc Nicholas on Sat, Jun 19, 1999 at 01:03:10PM -0400 References: <Pine.BSF.4.05.9906182005180.430-100000@bytor.rush.net> <Pine.BSF.4.05.9906191302400.16699-100000@medulla.hippocampus.net>
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Hi,
On Sat, Jun 19, 1999 at 01:03:10PM -0400, Marc Nicholas wrote:
> Hmmm...I always thought there was something "broke" inside Celerons to
> prevent SMP...maybe I'm wrong? Sure would be neat if you could run them
> SMP...
Since ca. 2 weeks I'm steadily 'beating the hell' out of this
system:
Gigabyte dual slot-1 mainboard
2 x Celeron 466 MHz
128 MByte SDRAM
AHA 2940 U2W
2 x IBM DDRS 9 GByte
running 3.2-stable
The PPGA-Celeri are mounted on S370<->Socket-1 adapter-boards with
this 'magic' Celeron-SMP-Jumper.
I was in need of a rather cheap SMP-play-system and an inexpensive
'software-build-server'. Yes, I know this system has a bottleneck
concerning memory bandwith, but I wasn't able to get a pair of
'over-clockable' Celeri 300A.
-Andreas
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