From owner-freebsd-arm@FreeBSD.ORG Sun Jan 27 00:04:02 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 321BD16A41B for ; Sun, 27 Jan 2008 00:04:02 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id 7D2A413C448 for ; Sun, 27 Jan 2008 00:04:01 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m0R1EI78020213; Sun, 27 Jan 2008 02:14:18 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m0R1EHm4020210; Sun, 27 Jan 2008 02:14:17 +0100 (CET) (envelope-from mlfbsd) Date: Sun, 27 Jan 2008 02:14:17 +0100 From: Olivier Houchard To: Mark Tinguely Message-ID: <20080127011417.GA19569@ci0.org> References: <20080117001757.GA63358@ci0.org> <200801171548.m0HFmsFH003605@casselton.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200801171548.m0HFmsFH003605@casselton.net> User-Agent: Mutt/1.4.1i Cc: freebsd-arm@freebsd.org Subject: Re: ARM pmap cache flushed after PT modification. X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Jan 2008 00:04:02 -0000 Hi Mark, Sorry for the very very late reply. I like your work, and am about to commit it, however, just a small point : On Thu, Jan 17, 2008 at 09:48:54AM -0600, Mark Tinguely wrote: > In pmap_nuke_pv(), the vm_page_flag_clear(pg, PG_WRITEABLE) has been moved > to the pmap_fix_cache(). > if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) pmap_fix_cache(pg, pm, 0); You only call pmap_fix_cache() if the PVF_NC bit is set, so vm_page_flag_clear(pg, PG_WRITEABLE) won't be called, and PVF_MOD won't be removed, if we're removing the only writeable entry for a cacheable page, or did I miss something ? There were a few compile and styles nits, so I put the updated file here : http://people.FreeBSD.org/~cognet/armpmap_fixcache.c Thanks a lot ! Olivier From owner-freebsd-arm@FreeBSD.ORG Sun Jan 27 00:09:58 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id CAB8816A41A for ; Sun, 27 Jan 2008 00:09:58 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id 226BE13C468 for ; Sun, 27 Jan 2008 00:09:57 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m0R1KTlB020559; Sun, 27 Jan 2008 02:20:29 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m0R1KSkF020558; Sun, 27 Jan 2008 02:20:28 +0100 (CET) (envelope-from mlfbsd) Date: Sun, 27 Jan 2008 02:20:28 +0100 From: Olivier Houchard To: Rafal Jaworowski Message-ID: <20080127012028.GB19569@ci0.org> References: <4772E502.6090804@semihalf.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4772E502.6090804@semihalf.com> User-Agent: Mutt/1.4.1i Cc: freebsd-arm@freebsd.org Subject: Re: Clean up ARM_TP_ADDRESS and RAS location X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Jan 2008 00:09:58 -0000 On Thu, Dec 27, 2007 at 12:34:26AM +0100, Rafal Jaworowski wrote: > Hi, > > The following patch de-hardcodes usage of ARM_TP_ADDRESS and RAS local > storage, it also moves this special purpose page to a more convenient place > i.e. after the vectors high page, more towards the end of address space. > Previous location (0xe000_0000) caused grief if KVA where to go beyond the > default limit. > > http://people.freebsd.org/~raj/patches/arm/cleanup_tp_ras.diff > > Let me hear your comments. > > Rafal Hi Rafal, I like the patch, and you can almost commit it has it, I just have one question : in cpu_startup(), you remove the hack I used, to map ARM_TP_ADDRESS to itself, before locking the cache line, and force the allocation of a page. Does that mean the hack doesn't work for you, and your cpu require a mapping to a real page ? Thanks ! Olivier From owner-freebsd-arm@FreeBSD.ORG Sun Jan 27 16:06:41 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BEC7916A5D8 for ; Sun, 27 Jan 2008 16:06:41 +0000 (UTC) (envelope-from tinguely@casselton.net) Received: from casselton.net (casselton.net [63.165.140.2]) by mx1.freebsd.org (Postfix) with ESMTP id 5C27513C45D for ; Sun, 27 Jan 2008 16:06:40 +0000 (UTC) (envelope-from tinguely@casselton.net) Received: from casselton.net (localhost [127.0.0.1]) by casselton.net (8.14.2/8.14.2) with ESMTP id m0RG6bPg036781; Sun, 27 Jan 2008 10:06:37 -0600 (CST) (envelope-from tinguely@casselton.net) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=casselton.net; s=ccnMail; t=1201449997; bh=S+2HYdrQ7Sc52QymTwaYkZHokrewRpiCf8UWJor MOVo=; h=Date:From:Message-Id:To:Subject:Cc:In-Reply-To; b=dQZEJASr pwpWWyLgVxuPweKwepcaBH8BOQgfvJ1v1Ps3Smdje06Zf24+lkttVOjAuGgOdYGkb9v AGuI0+5zFR4+uAq6riFVBiXpolgoiYi+BQ0B0P2IpG3KgmJjFzbR3/9IP8vaRr9LhMq y6Y82avktgtAdk33jelE7VJH/nKjg= Received: (from tinguely@localhost) by casselton.net (8.14.2/8.14.2/Submit) id m0RG6b1C036780; Sun, 27 Jan 2008 10:06:37 -0600 (CST) (envelope-from tinguely) Date: Sun, 27 Jan 2008 10:06:37 -0600 (CST) From: Mark Tinguely Message-Id: <200801271606.m0RG6b1C036780@casselton.net> To: mlfbsd@ci0.org, tinguely@casselton.net In-Reply-To: <20080127011417.GA19569@ci0.org> Cc: freebsd-arm@freebsd.org Subject: Re: ARM pmap cache flushed after PT modification. X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Jan 2008 16:06:41 -0000 > I like your work, and am about to commit it, however, just a small point : > > On Thu, Jan 17, 2008 at 09:48:54AM -0600, Mark Tinguely wrote: > > In pmap_nuke_pv(), the vm_page_flag_clear(pg, PG_WRITEABLE) has been moved > > to the pmap_fix_cache(). > > > > if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || > (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) > pmap_fix_cache(pg, pm, 0); > > You only call pmap_fix_cache() if the PVF_NC bit is set, so > vm_page_flag_clear(pg, PG_WRITEABLE) won't be called, and PVF_MOD won't be > removed, if we're removing the only writeable entry for a cacheable page, or > did I miss something ? You are correct, great catch. Before, the cache fixing routine was called when a write mapping was removed. In addition, I really should call the cache fixing routine when caching was stopped and a kernel mapping was removed (this is a read kernel mapping but obviously there are user mapping(s) and now they may be able to re-enable caching) or a read mapping is being remove when there is at most one user write in this process space. if ((pve->pv_flags & PVF_WRITE) || ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || !(pve->pv_flags & PVF_MWC)))) pmap_fix_cache(pg, pm, 0); ---- I have been reading a lot in the ARM11 (aka ARMv6) technical reference manual. ARMv6 has significant cache changes to simplify page sharing and decrease cache flushing. The single core ARMv6 MMU could use the existing pmap code but is not as efficient as it could be. To maximize the single core MMU (and bypass all this pmap_fix_cache() and flushing the cache when switching processes), page coloring needs to be added (2 colors for 32KB caches and 4 colors for 64KB caches). The multicores does not need the page coloring, but changes to the pmap can help SMP support and efficiency issues. --Mark Tinguely. From owner-freebsd-arm@FreeBSD.ORG Sun Jan 27 23:24:37 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4D92A16A417 for ; Sun, 27 Jan 2008 23:24:37 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id 7F47B13C45B for ; Sun, 27 Jan 2008 23:24:35 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m0S0ZGes032704; Mon, 28 Jan 2008 01:35:16 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m0S0ZFVl032703; Mon, 28 Jan 2008 01:35:16 +0100 (CET) (envelope-from mlfbsd) Date: Mon, 28 Jan 2008 01:35:15 +0100 From: Olivier Houchard To: Mark Tinguely Message-ID: <20080128003515.GA32514@ci0.org> References: <20080127011417.GA19569@ci0.org> <200801271606.m0RG6b1C036780@casselton.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200801271606.m0RG6b1C036780@casselton.net> User-Agent: Mutt/1.4.1i Cc: freebsd-arm@freebsd.org Subject: Re: ARM pmap cache flushed after PT modification. X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 27 Jan 2008 23:24:37 -0000 On Sun, Jan 27, 2008 at 10:06:37AM -0600, Mark Tinguely wrote: > > > I like your work, and am about to commit it, however, just a small point : > > > > On Thu, Jan 17, 2008 at 09:48:54AM -0600, Mark Tinguely wrote: > > > In pmap_nuke_pv(), the vm_page_flag_clear(pg, PG_WRITEABLE) has been moved > > > to the pmap_fix_cache(). > > > > > > > if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || > > (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) > > pmap_fix_cache(pg, pm, 0); > > > > You only call pmap_fix_cache() if the PVF_NC bit is set, so > > vm_page_flag_clear(pg, PG_WRITEABLE) won't be called, and PVF_MOD won't be > > removed, if we're removing the only writeable entry for a cacheable page, or > > did I miss something ? > > You are correct, great catch. > > Before, the cache fixing routine was called when a write mapping was removed. > In addition, I really should call the cache fixing routine when caching > was stopped and a kernel mapping was removed (this is a read kernel mapping > but obviously there are user mapping(s) and now they may be able to > re-enable caching) or a read mapping is being remove when there is at > most one user write in this process space. > > if ((pve->pv_flags & PVF_WRITE) || ((pve->pv_flags & PVF_NC) && > ((pm == pmap_kernel()) || !(pve->pv_flags & PVF_MWC)))) > pmap_fix_cache(pg, pm, 0); > I'm just nitpicking here, but maybe, if the page is cacheable, it would be cheapier to just parse the mapping list once, instead of calling pmap_fix_cache Something like this : if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) pmap_fix_cache(pg, pm, 0); else { TAILQ_FOREACH(pve, &pg->md.pv_list, pv_list) if (pve->pv_flags & PVF_WRITE) break; if (!pve) { pg->md.pvh_attrs &= ~PVF_MOD; vm_page_flag_clear(pg, PG_WRITEABLE); } } > ---- > I have been reading a lot in the ARM11 (aka ARMv6) technical reference > manual. ARMv6 has significant cache changes to simplify page sharing > and decrease cache flushing. The single core ARMv6 MMU could use the > existing pmap code but is not as efficient as it could be. To maximize > the single core MMU (and bypass all this pmap_fix_cache() and flushing > the cache when switching processes), page coloring needs to be added > (2 colors for 32KB caches and 4 colors for 64KB caches). The multicores > does not need the page coloring, but changes to the pmap can help SMP > support and efficiency issues. > Yeah I'd love to work with armv6, but haven't been able to get my hand on hardware yet. I haven't read the doc yet, but I thought armv6 had a physically tagged cache. So why would we need to flush it on context switch at all ? I know NetBSD is starting to implement armv6 support (what they had before for arm11 was just mimicking armv5). It would be interessant to watch their approach. Regards, Olivier From owner-freebsd-arm@FreeBSD.ORG Mon Jan 28 00:17:06 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6665216A419 for ; Mon, 28 Jan 2008 00:17:06 +0000 (UTC) (envelope-from tinguely@casselton.net) Received: from casselton.net (casselton.net [63.165.140.2]) by mx1.freebsd.org (Postfix) with ESMTP id 056D013C447 for ; Mon, 28 Jan 2008 00:17:05 +0000 (UTC) (envelope-from tinguely@casselton.net) Received: from casselton.net (localhost [127.0.0.1]) by casselton.net (8.14.2/8.14.2) with ESMTP id m0S0H2a4070814; Sun, 27 Jan 2008 18:17:02 -0600 (CST) (envelope-from tinguely@casselton.net) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=casselton.net; s=ccnMail; t=1201479422; bh=CXQFG8TlyD4ROaxUtKbRZb6yFvkhx6R24E+J2c7 tf/Q=; h=Date:From:Message-Id:To:Subject:Cc:In-Reply-To; b=ZllaaMxB OvGX8xK+KqTjih2bPgyV+7ADFrY3FGj8+eg0T8M3ruoNBhy92hIOPYNkpcVnOtLRk4r jIJ31O6mkVI5vMF01q2WLSSJXYUGoaDkk/FIaVVwH5ZXKXjNOembvLgaFi5b+mcO31/ 5UWjF6937a6cKkzVxHtmYkw9gqstw= Received: (from tinguely@localhost) by casselton.net (8.14.2/8.14.2/Submit) id m0S0H2XG070813; Sun, 27 Jan 2008 18:17:02 -0600 (CST) (envelope-from tinguely) Date: Sun, 27 Jan 2008 18:17:02 -0600 (CST) From: Mark Tinguely Message-Id: <200801280017.m0S0H2XG070813@casselton.net> To: mlfbsd@ci0.org, tinguely@casselton.net In-Reply-To: <20080128003515.GA32514@ci0.org> Cc: freebsd-arm@freebsd.org Subject: Re: ARM pmap cache flushed after PT modification. X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Jan 2008 00:17:06 -0000 > I'm just nitpicking here, but maybe, if the page is cacheable, it would be > cheapier to just parse the mapping list once, instead of calling pmap_fix_cache > Something like this : > if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || > (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) > pmap_fix_cache(pg, pm, 0); > else { > TAILQ_FOREACH(pve, &pg->md.pv_list, pv_list) > if (pve->pv_flags & PVF_WRITE) > break; > if (!pve) { > pg->md.pvh_attrs &= ~PVF_MOD; > vm_page_flag_clear(pg, PG_WRITEABLE); > } > } It works for me. > > Yeah I'd love to work with armv6, but haven't been able to get my hand on > hardware yet. > I haven't read the doc yet, but I thought armv6 had a physically tagged cache. > So why would we need to flush it on context switch at all ? You would not have to, but in the single core case, they still virtually index the cache - if the cache is greater than 16KB, then the cache set width is wider than 4KB, so a page can be listed (aliased) in the cache in more than one place - that is why page coloring is needed. ARMv5 would need page coloring, but they made the cache set width 1KB, so small pages would not be aliased in the wrong place. The multicore uses a physical indexed cache, so duplicates (alias) in the cache is not possible. I like the ARMv6 ASID feature too - so 256 different maps can be active at once, the MMU will keep those VA seperate. For example all the kernel programs (swapper, interrupt, etc) can be one space and 255 other processes can be active - should be enough for a embedded computer. > I know NetBSD is starting to implement armv6 support (what they had before > for arm11 was just mimicking armv5). It would be interessant to watch their > approach. Make sense. I am still toying with recursive page tales ideas. --Mark Tinguely. From owner-freebsd-arm@FreeBSD.ORG Mon Jan 28 11:31:01 2008 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id CDEBB16A417 for ; Mon, 28 Jan 2008 11:31:01 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id C4E1213C467 for ; Mon, 28 Jan 2008 11:31:00 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m0SCfkJ2041484; Mon, 28 Jan 2008 13:41:46 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m0SCfjlK041483; Mon, 28 Jan 2008 13:41:45 +0100 (CET) (envelope-from mlfbsd) Date: Mon, 28 Jan 2008 13:41:45 +0100 From: mlfbsd To: Mark Tinguely Message-ID: <20080128124144.GA41252@ci0.org> References: <20080128003515.GA32514@ci0.org> <200801280017.m0S0H2XG070813@casselton.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200801280017.m0S0H2XG070813@casselton.net> User-Agent: Mutt/1.4.1i Cc: freebsd-arm@freebsd.org Subject: Re: ARM pmap cache flushed after PT modification. X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 28 Jan 2008 11:31:01 -0000 On Sun, Jan 27, 2008 at 06:17:02PM -0600, Mark Tinguely wrote: > > > I'm just nitpicking here, but maybe, if the page is cacheable, it would be > > cheapier to just parse the mapping list once, instead of calling pmap_fix_cache > > Something like this : > > if ((pve->pv_flags & PVF_NC) && ((pm == pmap_kernel()) || > > (pve->pv_flags & PVF_WRITE) || !(pve->pv_flags & PVF_MWC))) > > pmap_fix_cache(pg, pm, 0); > > else { > > TAILQ_FOREACH(pve, &pg->md.pv_list, pv_list) > > if (pve->pv_flags & PVF_WRITE) > > break; > > if (!pve) { > > pg->md.pvh_attrs &= ~PVF_MOD; > > vm_page_flag_clear(pg, PG_WRITEABLE); > > } > > } > > It works for me. > Ok, I'll commit something similar then. > > > > Yeah I'd love to work with armv6, but haven't been able to get my hand on > > hardware yet. > > I haven't read the doc yet, but I thought armv6 had a physically tagged cache. > > So why would we need to flush it on context switch at all ? > > You would not have to, but in the single core case, they still virtually > index the cache - if the cache is greater than 16KB, then the cache > set width is wider than 4KB, so a page can be listed (aliased) in the > cache in more than one place - that is why page coloring is needed. > ARMv5 would need page coloring, but they made the cache set width 1KB, > so small pages would not be aliased in the wrong place. > Ok got it, I thought even UP had a physically indexed cache. > The multicore uses a physical indexed cache, so duplicates (alias) in the > cache is not possible. > > I like the ARMv6 ASID feature too - so 256 different maps can be active at > once, the MMU will keep those VA seperate. For example all the kernel > programs (swapper, interrupt, etc) can be one space and 255 other > processes can be active - should be enough for a embedded computer. > Yes I read about this, I like it too, would make CS so much faster. > > I know NetBSD is starting to implement armv6 support (what they had before > > for arm11 was just mimicking armv5). It would be interessant to watch their > > approach. > > Make sense. I am still toying with recursive page tales ideas. > Olivier From owner-freebsd-arm@FreeBSD.ORG Sat Feb 2 17:02:42 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8F74416A502 for ; Sat, 2 Feb 2008 17:02:42 +0000 (UTC) (envelope-from xride@x12.dk) Received: from mx02.stofanet.dk (mx02.stofanet.dk [212.10.10.12]) by mx1.freebsd.org (Postfix) with ESMTP id 3BC6713C46E for ; Sat, 2 Feb 2008 17:02:41 +0000 (UTC) (envelope-from xride@x12.dk) Received: from 5634d033.rev.stofanet.dk ([86.52.208.51] helo=beacon.x12.dk) by mx04.stofanet.dk (envelope-from ) with esmtp id 1JLDL0-0001mY-0K for arm@freebsd.org; Sat, 02 Feb 2008 09:02:58 +0100 Received: from localhost (localhost [127.0.0.1]) by beacon.x12.dk (Postfix) with ESMTP id D056C28417 for ; Sat, 2 Feb 2008 09:02:57 +0100 (CET) Date: Sat, 2 Feb 2008 09:02:38 +0100 From: Soeren Straarup To: arm@freebsd.org Message-ID: <20080202090238.289eeb66@x12.dk> X-Mailer: Claws Mail 3.0.2 (GTK+ 2.12.5; i386-portbld-freebsd8.0) Telephone: +4575581244 +13612371008 Mobil: +4520276244 X-Face: 7Y!o?/XT:H%BE>uVwW9m14t\pR.ZF]T!3s$d_`Gv6TVIknyh$"aMW=:t(r}QL:3W, Ico:Gec Ksmq@nVq-$Ks_33F0L>R[^qp'3-g4eV#nKv/8rl",TY4NTKO&DRL)e(x^6Tn^9".i; oJf-l69YL+>hY- }/$J[OE(pIER<2n`8E_}HLv`tXVvUr^O%#4 Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: Subject: about src/lib/libkse/arch/arm/include/pthread_md.h X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Feb 2008 17:02:42 -0000 Hi, Index: pthread_md.h =================================================================== RCS file: /home/ncvs/src/lib/libkse/arch/arm/include/pthread_md.h,v retrieving revision 1.9 diff -u -r1.9 pthread_md.h --- pthread_md.h 9 Oct 2007 13:42:23 -0000 1.9 +++ pthread_md.h 1 Feb 2008 22:48:50 -0000 @@ -240,7 +240,7 @@ tcb->tcb_tmbx.tm_lwp = kcb->kcb_kmbx.km_lwp; if (setmbox) _thr_setcontext(mc, (intptr_t)&tcb->tcb_tmbx, - (intptr_t *)&kcb->kcb_kmbx.km_curthread); + (intptr_t *)kcb->kcb_kmbx.km_curthread); else _thr_setcontext(mc, 0, NULL); } else { Is that change correct? /Soeren -- Soeren Straarup | aka OZ2DAK aka Xride FreeBSD committer | FreeBSD since 2.2.6-R If a program is not working right, then send a patch From owner-freebsd-arm@FreeBSD.ORG Sat Feb 2 17:19:23 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1505016A41B for ; Sat, 2 Feb 2008 17:19:23 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id 49F7D13C474 for ; Sat, 2 Feb 2008 17:19:21 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m12IVdix017666; Sat, 2 Feb 2008 19:31:39 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m12IVdMj017665; Sat, 2 Feb 2008 19:31:39 +0100 (CET) (envelope-from mlfbsd) Date: Sat, 2 Feb 2008 19:31:38 +0100 From: Olivier Houchard To: Soeren Straarup Message-ID: <20080202183138.GA17602@ci0.org> References: <20080202090238.289eeb66@x12.dk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20080202090238.289eeb66@x12.dk> User-Agent: Mutt/1.4.1i Cc: arm@freebsd.org Subject: Re: about src/lib/libkse/arch/arm/include/pthread_md.h X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Feb 2008 17:19:23 -0000 Hi Soeren, On Sat, Feb 02, 2008 at 09:02:38AM +0100, Soeren Straarup wrote: > Hi, > > Index: pthread_md.h > =================================================================== > RCS file: /home/ncvs/src/lib/libkse/arch/arm/include/pthread_md.h,v > retrieving revision 1.9 > diff -u -r1.9 pthread_md.h > --- pthread_md.h 9 Oct 2007 13:42:23 -0000 1.9 > +++ pthread_md.h 1 Feb 2008 22:48:50 -0000 > @@ -240,7 +240,7 @@ > tcb->tcb_tmbx.tm_lwp = kcb->kcb_kmbx.km_lwp; > if (setmbox) > _thr_setcontext(mc, (intptr_t)&tcb->tcb_tmbx, > - (intptr_t > *)&kcb->kcb_kmbx.km_curthread); > + (intptr_t *)kcb->kcb_kmbx.km_curthread); > else > _thr_setcontext(mc, 0, NULL); > } else { > > > Is that change correct? > If I'm nor wrong, the original code is right, and that's what the other platforms seem to do so. Why do you think it should be changed ? Regards, Olivier From owner-freebsd-arm@FreeBSD.ORG Sat Feb 2 17:55:11 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5A60C16A417 for ; Sat, 2 Feb 2008 17:55:11 +0000 (UTC) (envelope-from xride@x12.dk) Received: from mx01.stofanet.dk (mx01.stofanet.dk [212.10.10.11]) by mx1.freebsd.org (Postfix) with ESMTP id 1E8CD13C45B for ; Sat, 2 Feb 2008 17:55:10 +0000 (UTC) (envelope-from xride@x12.dk) Received: from 5634d033.rev.stofanet.dk ([86.52.208.51] helo=beacon.x12.dk) by mx01.stofanet.dk (envelope-from ) with esmtp id 1JLMa5-0003l9-1Y; Sat, 02 Feb 2008 18:55:09 +0100 Received: from localhost (localhost [127.0.0.1]) by beacon.x12.dk (Postfix) with ESMTP id 2473B28417; Sat, 2 Feb 2008 18:55:09 +0100 (CET) Date: Sat, 2 Feb 2008 18:54:49 +0100 From: Soeren Straarup To: Olivier Houchard Message-ID: <20080202185449.6b9068a2@x12.dk> In-Reply-To: <20080202183138.GA17602@ci0.org> References: <20080202090238.289eeb66@x12.dk> <20080202183138.GA17602@ci0.org> X-Mailer: Claws Mail 3.0.2 (GTK+ 2.12.5; i386-portbld-freebsd8.0) Telephone: +4575581244 +13612371008 Mobil: +4520276244 X-Face: 7Y!o?/XT:H%BE>uVwW9m14t\pR.ZF]T!3s$d_`Gv6TVIknyh$"aMW=:t(r}QL:3W, Ico:Gec Ksmq@nVq-$Ks_33F0L>R[^qp'3-g4eV#nKv/8rl",TY4NTKO&DRL)e(x^6Tn^9".i; oJf-l69YL+>hY- }/$J[OE(pIER<2n`8E_}HLv`tXVvUr^O%#4 Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: arm@freebsd.org Subject: Re: about src/lib/libkse/arch/arm/include/pthread_md.h X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Feb 2008 17:55:11 -0000 On Sat, 2 Feb 2008 19:31:38 +0100 Olivier Houchard wrote: > Hi Soeren, > > On Sat, Feb 02, 2008 at 09:02:38AM +0100, Soeren Straarup wrote: > > Hi, > > > > Index: pthread_md.h > > =================================================================== > > RCS file: /home/ncvs/src/lib/libkse/arch/arm/include/pthread_md.h,v > > retrieving revision 1.9 > > diff -u -r1.9 pthread_md.h > > --- pthread_md.h 9 Oct 2007 13:42:23 -0000 1.9 > > +++ pthread_md.h 1 Feb 2008 22:48:50 -0000 > > @@ -240,7 +240,7 @@ > > tcb->tcb_tmbx.tm_lwp = kcb->kcb_kmbx.km_lwp; > > if (setmbox) > > _thr_setcontext(mc, > > (intptr_t)&tcb->tcb_tmbx, > > - (intptr_t > > *)&kcb->kcb_kmbx.km_curthread); > > + (intptr_t > > *)kcb->kcb_kmbx.km_curthread); else > > _thr_setcontext(mc, 0, NULL); > > } else { > > > > > > Is that change correct? > > > > If I'm nor wrong, the original code is right, and that's what the > other platforms seem to do so. Why do you think it should be changed ? > Due to that if gcc is run with warnings set as errors it breaks. /Soeren -- Soeren Straarup | aka OZ2DAK aka Xride FreeBSD committer | FreeBSD since 2.2.6-R If a program is not working right, then send a patch From owner-freebsd-arm@FreeBSD.ORG Sat Feb 2 17:57:13 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0734416A420 for ; Sat, 2 Feb 2008 17:57:13 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (dong.ci0.org [IPv6:2001:7a8:2066:1::1]) by mx1.freebsd.org (Postfix) with ESMTP id 2872C13C45B for ; Sat, 2 Feb 2008 17:57:11 +0000 (UTC) (envelope-from mlfbsd@dong.ci0.org) Received: from dong.ci0.org (localhost.ci0.org [127.0.0.1]) by dong.ci0.org (8.14.1/8.13.8) with ESMTP id m12J9YmY018117; Sat, 2 Feb 2008 20:09:34 +0100 (CET) (envelope-from mlfbsd@dong.ci0.org) Received: (from mlfbsd@localhost) by dong.ci0.org (8.14.1/8.13.8/Submit) id m12J9Y2F018114; Sat, 2 Feb 2008 20:09:34 +0100 (CET) (envelope-from mlfbsd) Date: Sat, 2 Feb 2008 20:09:33 +0100 From: Olivier Houchard To: Soeren Straarup Message-ID: <20080202190933.GA18088@ci0.org> References: <20080202090238.289eeb66@x12.dk> <20080202183138.GA17602@ci0.org> <20080202185449.6b9068a2@x12.dk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20080202185449.6b9068a2@x12.dk> User-Agent: Mutt/1.4.1i Cc: arm@freebsd.org Subject: Re: about src/lib/libkse/arch/arm/include/pthread_md.h X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Feb 2008 17:57:13 -0000 On Sat, Feb 02, 2008 at 06:54:49PM +0100, Soeren Straarup wrote: > On Sat, 2 Feb 2008 19:31:38 +0100 > Olivier Houchard wrote: > > > Hi Soeren, > > > > On Sat, Feb 02, 2008 at 09:02:38AM +0100, Soeren Straarup wrote: > > > Hi, > > > > > > Index: pthread_md.h > > > =================================================================== > > > RCS file: /home/ncvs/src/lib/libkse/arch/arm/include/pthread_md.h,v > > > retrieving revision 1.9 > > > diff -u -r1.9 pthread_md.h > > > --- pthread_md.h 9 Oct 2007 13:42:23 -0000 1.9 > > > +++ pthread_md.h 1 Feb 2008 22:48:50 -0000 > > > @@ -240,7 +240,7 @@ > > > tcb->tcb_tmbx.tm_lwp = kcb->kcb_kmbx.km_lwp; > > > if (setmbox) > > > _thr_setcontext(mc, > > > (intptr_t)&tcb->tcb_tmbx, > > > - (intptr_t > > > *)&kcb->kcb_kmbx.km_curthread); > > > + (intptr_t > > > *)kcb->kcb_kmbx.km_curthread); else > > > _thr_setcontext(mc, 0, NULL); > > > } else { > > > > > > > > > Is that change correct? > > > > > > > If I'm nor wrong, the original code is right, and that's what the > > other platforms seem to do so. Why do you think it should be changed ? > > > > Due to that if gcc is run with warnings set as errors it breaks. > We probably should do what other platforms do, and cast it to (void *) before (intptr_t *). Wanna commit it, or shall I ? Olivier From owner-freebsd-arm@FreeBSD.ORG Sat Feb 2 18:52:50 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1B5CD16A41A for ; Sat, 2 Feb 2008 18:52:50 +0000 (UTC) (envelope-from xride@x12.dk) Received: from mx01.stofanet.dk (mx01.stofanet.dk [212.10.10.11]) by mx1.freebsd.org (Postfix) with ESMTP id A2A7F13C457 for ; Sat, 2 Feb 2008 18:52:49 +0000 (UTC) (envelope-from xride@x12.dk) Received: from 5634d033.rev.stofanet.dk ([86.52.208.51] helo=beacon.x12.dk) by mx01.stofanet.dk (envelope-from ) with esmtp id 1JLNTb-000123-0f; Sat, 02 Feb 2008 19:52:32 +0100 Received: from localhost (localhost [127.0.0.1]) by beacon.x12.dk (Postfix) with ESMTP id F400B28417; Sat, 2 Feb 2008 19:52:30 +0100 (CET) Date: Sat, 2 Feb 2008 19:52:11 +0100 From: Soeren Straarup To: Olivier Houchard Message-ID: <20080202195211.10ca3182@x12.dk> In-Reply-To: <20080202190933.GA18088@ci0.org> References: <20080202090238.289eeb66@x12.dk> <20080202183138.GA17602@ci0.org> <20080202185449.6b9068a2@x12.dk> <20080202190933.GA18088@ci0.org> X-Mailer: Claws Mail 3.0.2 (GTK+ 2.12.5; i386-portbld-freebsd8.0) Telephone: +4575581244 +13612371008 Mobil: +4520276244 X-Face: 7Y!o?/XT:H%BE>uVwW9m14t\pR.ZF]T!3s$d_`Gv6TVIknyh$"aMW=:t(r}QL:3W, Ico:Gec Ksmq@nVq-$Ks_33F0L>R[^qp'3-g4eV#nKv/8rl",TY4NTKO&DRL)e(x^6Tn^9".i; oJf-l69YL+>hY- }/$J[OE(pIER<2n`8E_}HLv`tXVvUr^O%#4 Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: arm@freebsd.org Subject: Re: about src/lib/libkse/arch/arm/include/pthread_md.h X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Feb 2008 18:52:50 -0000 On Sat, 2 Feb 2008 20:09:33 +0100 Olivier Houchard wrote: > On Sat, Feb 02, 2008 at 06:54:49PM +0100, Soeren Straarup wrote: > > On Sat, 2 Feb 2008 19:31:38 +0100 > > Olivier Houchard wrote: > > > > > Hi Soeren, > > > > > > On Sat, Feb 02, 2008 at 09:02:38AM +0100, Soeren Straarup wrote: > > > > Hi, > > > > > > > > Index: pthread_md.h > > > > =================================================================== > > > > RCS > > > > file: /home/ncvs/src/lib/libkse/arch/arm/include/pthread_md.h,v > > > > retrieving revision 1.9 diff -u -r1.9 pthread_md.h > > > > --- pthread_md.h 9 Oct 2007 13:42:23 -0000 1.9 > > > > +++ pthread_md.h 1 Feb 2008 22:48:50 -0000 > > > > @@ -240,7 +240,7 @@ > > > > tcb->tcb_tmbx.tm_lwp = kcb->kcb_kmbx.km_lwp; > > > > if (setmbox) > > > > _thr_setcontext(mc, > > > > (intptr_t)&tcb->tcb_tmbx, > > > > - (intptr_t > > > > *)&kcb->kcb_kmbx.km_curthread); > > > > + (intptr_t > > > > *)kcb->kcb_kmbx.km_curthread); else > > > > _thr_setcontext(mc, 0, NULL); > > > > } else { > > > > > > > > > > > > Is that change correct? > > > > > > > > > > If I'm nor wrong, the original code is right, and that's what the > > > other platforms seem to do so. Why do you think it should be > > > changed ? > > > > > > > Due to that if gcc is run with warnings set as errors it breaks. > > > > We probably should do what other platforms do, and cast it to (void *) > before (intptr_t *). > Wanna commit it, or shall I ? If you would then it would be in the right way (8 Hint i'm a ports committer /Soeren -- Soeren Straarup | aka OZ2DAK aka Xride FreeBSD committer | FreeBSD since 2.2.6-R If a program is not working right, then send a patch