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Date: Sun, 23 May 2010 18:48:40 +0000 (UTC)
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Subject: svn commit: r208456 - in vendor/bind9/dist-9.4: . doc/draft lib/dns
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Author: dougb
Date: Sun May 23 18:48:40 2010
New Revision: 208456
URL: http://svn.freebsd.org/changeset/base/208456
Log:
Vendor import of BIND 9.4-ESV-R2
Added:
vendor/bind9/dist-9.4/doc/draft/draft-ietf-behave-address-format-07.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-behave-dns64-09.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-axfr-clarify-14.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dns-tcp-requirements-03.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dnssec-bis-updates-10.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dnssec-gost-07.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-rfc2672bis-dname-19.txt (contents, props changed)
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsop-default-local-zones-10.txt (contents, props changed)
Deleted:
vendor/bind9/dist-9.4/doc/draft/draft-ietf-behave-dns64-06.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-axfr-clarify-13.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dns-tcp-requirements-02.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dnssec-bis-updates-09.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-dnssec-gost-06.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsext-rfc2672bis-dname-18.txt
vendor/bind9/dist-9.4/doc/draft/draft-ietf-dnsop-default-local-zones-09.txt
Modified:
vendor/bind9/dist-9.4/CHANGES
vendor/bind9/dist-9.4/lib/dns/api
vendor/bind9/dist-9.4/lib/dns/validator.c
vendor/bind9/dist-9.4/version
Modified: vendor/bind9/dist-9.4/CHANGES
==============================================================================
--- vendor/bind9/dist-9.4/CHANGES Sun May 23 18:43:06 2010 (r208455)
+++ vendor/bind9/dist-9.4/CHANGES Sun May 23 18:48:40 2010 (r208456)
@@ -1,3 +1,8 @@
+ --- 9.4-ESV-R2 released ---
+
+2876. [bug] Named could return SERVFAIL for negative responses
+ from unsigned zones. [RT #21131]
+
--- 9.4-ESV-R1 released ---
2852. [bug] Handle broken DNSSEC trust chains better. [RT #15619]
Added: vendor/bind9/dist-9.4/doc/draft/draft-ietf-behave-address-format-07.txt
==============================================================================
--- /dev/null 00:00:00 1970 (empty, because file is newly added)
+++ vendor/bind9/dist-9.4/doc/draft/draft-ietf-behave-address-format-07.txt Sun May 23 18:48:40 2010 (r208456)
@@ -0,0 +1,1009 @@
+
+
+
+Network Working Group C. Bao
+Internet-Draft CERNET Center/Tsinghua University
+Obsoletes: 2765 (if approved) C. Huitema
+Updates: 4291 (if approved) Microsoft Corporation
+Intended status: Standards Track M. Bagnulo
+Expires: October 11, 2010 UC3M
+ M. Boucadair
+ France Telecom
+ X. Li
+ CERNET Center/Tsinghua University
+ April 9, 2010
+
+
+ IPv6 Addressing of IPv4/IPv6 Translators
+ draft-ietf-behave-address-format-07.txt
+
+Abstract
+
+ This document discusses the algorithmic translation of an IPv6
+ address to a corresponding IPv4 address, and vice versa, using only
+ statically configured information. It defines a well-known prefix
+ for use in algorithmic translations, while allowing organizations to
+ also use network-specific prefixes when appropriate. Algorithmic
+ translation is used in IPv4/IPv6 translators, as well as other types
+ of proxies and gateways (e.g., for DNS) used in IPv4/IPv6 scenarios.
+
+Status of this Memo
+
+ This Internet-Draft is submitted in full conformance with the
+ provisions of BCP 78 and BCP 79.
+
+ Internet-Drafts are working documents of the Internet Engineering
+ Task Force (IETF). Note that other groups may also distribute
+ working documents as Internet-Drafts. The list of current Internet-
+ Drafts is at http://datatracker.ietf.org/drafts/current/.
+
+ Internet-Drafts are draft documents valid for a maximum of six months
+ and may be updated, replaced, or obsoleted by other documents at any
+ time. It is inappropriate to use Internet-Drafts as reference
+ material or to cite them other than as "work in progress."
+
+ This Internet-Draft will expire on October 11, 2010.
+
+Copyright Notice
+
+ Copyright (c) 2010 IETF Trust and the persons identified as the
+ document authors. All rights reserved.
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 1]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ This document is subject to BCP 78 and the IETF Trust's Legal
+ Provisions Relating to IETF Documents
+ (http://trustee.ietf.org/license-info) in effect on the date of
+ publication of this document. Please review these documents
+ carefully, as they describe your rights and restrictions with respect
+ to this document. Code Components extracted from this document must
+ include Simplified BSD License text as described in Section 4.e of
+ the Trust Legal Provisions and are provided without warranty as
+ described in the Simplified BSD License.
+
+
+Table of Contents
+
+ 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 3
+ 1.1. Applicability Scope . . . . . . . . . . . . . . . . . . . 3
+ 1.2. Conventions . . . . . . . . . . . . . . . . . . . . . . . 3
+ 1.3. Terminology . . . . . . . . . . . . . . . . . . . . . . . 4
+ 2. IPv4-Embedded IPv6 Address Prefix and Format . . . . . . . . . 4
+ 2.1. Well Known Prefix . . . . . . . . . . . . . . . . . . . . 4
+ 2.2. IPv4-Embedded IPv6 Address Format . . . . . . . . . . . . 4
+ 2.3. Address Translation Algorithms . . . . . . . . . . . . . . 6
+ 2.4. Text Representation . . . . . . . . . . . . . . . . . . . 6
+ 3. Deployment Guidelines and Choices . . . . . . . . . . . . . . 7
+ 3.1. Restrictions on the use of the Well-Known Prefix . . . . . 7
+ 3.2. Impact on Inter-Domain Routing . . . . . . . . . . . . . . 8
+ 3.3. Choice of Prefix for Stateless Translation Deployments . . 8
+ 3.4. Choice of Prefix for Stateful Translation Deployments . . 11
+ 3.5. Choice of Suffix . . . . . . . . . . . . . . . . . . . . . 11
+ 3.6. Choice of the Well-Known Prefix . . . . . . . . . . . . . 12
+ 4. Security Considerations . . . . . . . . . . . . . . . . . . . 13
+ 4.1. Protection Against Spoofing . . . . . . . . . . . . . . . 13
+ 4.2. Secure Configuration . . . . . . . . . . . . . . . . . . . 14
+ 5. IANA Considerations . . . . . . . . . . . . . . . . . . . . . 14
+ 6. Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . 14
+ 7. Contributors . . . . . . . . . . . . . . . . . . . . . . . . . 14
+ 8. References . . . . . . . . . . . . . . . . . . . . . . . . . . 16
+ 8.1. Normative References . . . . . . . . . . . . . . . . . . . 16
+ 8.2. Informative References . . . . . . . . . . . . . . . . . . 16
+ Authors' Addresses . . . . . . . . . . . . . . . . . . . . . . . . 16
+
+
+
+
+
+
+
+
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 2]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+1. Introduction
+
+ This document is part of a series of IPv4/IPv6 translation documents.
+ A framework for IPv4/IPv6 translation is discussed in
+ [I-D.ietf-behave-v6v4-framework], including a taxonomy of scenarios
+ that will be used in this document. Other documents specify the
+ behavior of various types of translators and gateways, including
+ mechanisms for translating between IP headers and other types of
+ messages that include IP addresses. This document specifies how an
+ individual IPv6 address is translated to a corresponding IPv4
+ address, and vice versa, in cases where an algorithmic mapping is
+ used. While specific types of devices are used herein as examples,
+ it is the responsibility of the specification of such devices to
+ reference this document for algorithmic mapping of the addresses
+ themselves.
+
+ Section 2 describes the prefixes and the format of "IPv4-Embedded
+ IPv6 addresses", i.e., IPv6 addresses in which 32 bits contain an
+ IPv4 address. This format is common to both "IPv4-Converted" and
+ "IPv4-Translatable" IPv6 addresses. This section also defines the
+ algorithms for translating addresses, and the text representation of
+ IPv4-Embedded IPv6 addresses.
+
+ Section 3 discusses the choice of prefixes, the conditions in which
+ they can be used, and the use of IPv4-Embedded IPv6 addresses with
+ stateless and stateful translation.
+
+ Section 4 discusses security concerns.
+
+ In some scenarios, a dual-stack host will unnecessarily send its
+ traffic through an IPv6/IPv4 translator. This can be caused by
+ host's default address selection algorithm [RFC3484], referrals, or
+ other reasons. Optimizing these scenarios for dual-stack hosts is
+ for future study.
+
+1.1. Applicability Scope
+
+ This document is part of a series defining address translation
+ services. We understand that the address format could also be used
+ by other interconnection methods between IPv6 and IPv4, e.g., methods
+ based on encapsulation. If encapsulation methods are developed by
+ the IETF, we expect that their descriptions will document their
+ specific use of IPv4-Embedded IPv6 addresses.
+
+1.2. Conventions
+
+ The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT",
+ "SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 3]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ document are to be interpreted as described in RFC 2119 [RFC2119].
+
+1.3. Terminology
+
+ This document makes use of the following terms:
+
+ IPv4/IPv6 translator: an entity that translates IPv4 packets to IPv6
+ packets, and vice versa. It may do "stateless" translation,
+ meaning that there is no per-flow state required, or "stateful"
+ translation where per-flow state is created when the first packet
+ in a flow is received.
+ Address translator: any entity that has to derive an IPv4 address
+ from an IPv6 address or vice versa. This applies not only to
+ devices that do IPv4/IPv6 packet translation, but also to other
+ entities that manipulate addresses, such as name resolution
+ proxies (e.g. DNS64 [I-D.ietf-behave-dns64]) and possibly other
+ types of Application Layer Gateways (ALGs).
+ Well-Known Prefix: the IPv6 prefix defined in this document for use
+ in an algorithmic mapping.
+ Network-Specific Prefix: an IPv6 prefix assigned by an organization
+ for use in algorithmic mapping. Options for the Network Specific
+ Prefix are discussed in Section 3.3 and Section 3.4.
+ IPv4-Embedded IPv6 addresses: IPv6 addresses in which 32 bits
+ contain an IPv4 address. Their format is described in
+ Section 2.2.
+ IPv4-Converted IPv6 addresses: IPv6 addresses used to represent IPv4
+ nodes in an IPv6 network. They are a variant of IPv4-Embedded
+ IPv6 addresses, and follow the format described in Section 2.2.
+ IPv4-Translatable IPv6 addresses: IPv6 addresses assigned to IPv6
+ nodes for use with stateless translation. They are a variant of
+ IPv4-Embedded IPv6 addresses, and follow the format described in
+ Section 2.2.
+
+
+2. IPv4-Embedded IPv6 Address Prefix and Format
+
+2.1. Well Known Prefix
+
+ This document reserves a "Well-Known Prefix" for use in an
+ algorithmic mapping. The value of this IPv6 prefix is:
+
+ 64:FF9B::/96
+
+2.2. IPv4-Embedded IPv6 Address Format
+
+ IPv4-Converted IPv6 addresses and IPv4-Translatable IPv6 addresses
+ follow the same format, described here as the IPv4-Embedded IPv6
+ address Format. IPv4-Embedded IPv6 addresses are composed of a
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 4]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ variable length prefix, the embedded IPv4 address, and a variable
+ length suffix, as presented in the following diagram, in which PL
+ designates the prefix length:
+
+
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |PL| 0-------------32--40--48--56--64--72--80--88--96--104-112-120-|
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |32| prefix |v4(32) | u | suffix |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |40| prefix |v4(24) | u |(8)| suffix |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |48| prefix |v4(16) | u | (16) | suffix |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |56| prefix |(8)| u | v4(24) | suffix |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |64| prefix | u | v4(32) | suffix |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+ |96| prefix | v4(32) |
+ +--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
+
+
+ Figure 1
+
+ In these addresses, the prefix shall be either the "Well-Known
+ Prefix", or a "Network-Specific Prefix" unique to the organization
+ deploying the address translators. The prefixes can only have one of
+ the following lengths: 32, 40, 48, 56, 64 or 96. (The Well-Known
+ prefic is 96 bits long, and can only be used in the last form of the
+ table.)
+
+ Various deployments justify different prefix lengths with Network-
+ Specific prefixes. The tradeoff between different prefix lengths are
+ discussed in Section 3.3 and Section 3.4.
+
+ Bits 64 to 71 of the address are reserved for compatibility with the
+ host identifier format defined in the IPv6 addressing architecture
+ [RFC4291]. These bits MUST be set to zero. When using a /96
+ Network-Specific Prefix, the administrators MUST ensure that the bits
+ 64 to 71 are set to zero. A simple way to achieve that is to
+ construct the /96 Network-Specific Prefix by picking a /64 prefix,
+ and then adding four octets set to zero.
+
+ The IPv4 address is encoded following the prefix, most significant
+ bits first. Depending of the prefix length, the 4 octets of the
+ address may be separated by the reserved octet "u", whose 8 bits MUST
+ be set to zero. In particular:
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 5]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ o When the prefix is 32 bits long, the IPv4 address is encoded in
+ positions 32 to 63.
+ o When the prefix is 40 bits long, 24 bits of the IPv4 address are
+ encoded in positions 40 to 63, with the remaining 8 bits in
+ position 72 to 79.
+ o When the prefix is 48 bits long, 16 bits of the IPv4 address are
+ encoded in positions 48 to 63, with the remaining 16 bits in
+ position 72 to 87.
+ o When the prefix is 56 bits long, 8 bits of the IPv4 address are
+ encoded in positions 56 to 63, with the remaining 24 bits in
+ position 72 to 95.
+ o When the prefix is 64 bits long, the IPv4 address is encoded in
+ positions 72 to 103.
+ o When the prefix is 96 bits long, the IPv4 address is encoded in
+ positions 96 to 127.
+
+ There are no remaining bits, and thus no suffix, if the prefix is 96
+ bits long. In the other cases, the remaining bits of the address
+ constitute the suffix. These bits are reserved for future
+ extensions, and SHOULD be set to zero.
+
+2.3. Address Translation Algorithms
+
+ IPv4-Embedded IPv6 addresses are composed according to the following
+ algorithm:
+ o Concatenate the prefix, the 32 bits of the IPv4 address and the
+ null suffix if needed to obtain a 128 bit address.
+ o If the prefix length is less than 96 bits, insert the null octet
+ "u" at the appropriate position, thus causing the least
+ significant octet to be excluded, as documented in Figure 1.
+
+ The IPv4 addresses are extracted from the IPv4-Embedded IPv6
+ addresses according to the following algorithm:
+ o If the prefix is 96 bit long, extract the last 32 bits of the IPv6
+ address;
+ o for the other prefix lengths, extract the "u" octet to obtain a
+ 120 bit sequence, then extract the 32 bits following the prefix.
+
+2.4. Text Representation
+
+ IPv4-Embedded IPv6 addresses will be represented in text in
+ conformity with section 2.2 of [RFC4291]. IPv4-Embedded IPv6
+ addresses constructed using the Well-Known Prefix or a /96 Network-
+ Specific Prefix may be represented using the alternative form
+ presented in section 2.2 of [RFC4291], with the embedded IPv4 address
+ represented in dotted decimal notation. Examples of such
+ representations are presented in Table 1 and Table 2.
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 6]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ +-----------------------+------------+------------------------------+
+ | Network-Specific | IPv4 | IPv4-Embedded IPv6 address |
+ | Prefix | address | |
+ +-----------------------+------------+------------------------------+
+ | 2001:DB8::/32 | 192.0.2.33 | 2001:DB8:C000:221:: |
+ | 2001:DB8:100::/40 | 192.0.2.33 | 2001:DB8:1C0:2:21:: |
+ | 2001:DB8:122::/48 | 192.0.2.33 | 2001:DB8:122:C000:2:2100:: |
+ | 2001:DB8:122:300::/56 | 192.0.2.33 | 2001:DB8:122:3C0:0:221:: |
+ | 2001:DB8:122:344::/64 | 192.0.2.33 | 2001:DB8:122:344:C0:2:2100:: |
+ | 2001:DB8:122:344::/96 | 192.0.2.33 | 2001:DB8:122:344::192.0.2.33 |
+ +-----------------------+------------+------------------------------+
+
+ Table 1: Text representation of IPv4-Embedded IPv6 addresses using
+ Network-Specific Prefixes
+
+ +-------------------+--------------+----------------------------+
+ | Well Known Prefix | IPv4 address | IPv4-Embedded IPv6 address |
+ +-------------------+--------------+----------------------------+
+ | 64:FF9B::/96 | 192.0.2.33 | 64:FF9B::192.0.2.33 |
+ +-------------------+--------------+----------------------------+
+
+ Table 2: Text representation of IPv4-Embedded IPv6 addresses using
+ the Well-Known Prefix
+
+ The Network-Specific Prefix examples in Table 1 are derived from the
+ IPv6 prefix reserved for documentation in [RFC3849]. The IPv4
+ address 192.0.2.33 is part of the subnet 192.0.2.0/24 reserved for
+ documentation in [RFC5735].
+
+
+3. Deployment Guidelines and Choices
+
+3.1. Restrictions on the use of the Well-Known Prefix
+
+ The Well-Known Prefix MAY be used by organizations deploying
+ translation services, as explained in Section 3.4.
+
+ The Well-Known Prefix SHOULD NOT be used to construct IPv4-
+ Translatable addresses. The nodes served by IPv4-Translatable IPv6
+ addresses should be able to receive global IPv6 traffic bound to
+ their IPv4-Translatable IPv6 address without incurring intermediate
+ protocol translation. This is only possible if the specific prefix
+ used to build the IPv4-Translatable IPv6 addresses is advertized in
+ inter-domain routing, but the advertisement of more specific prefixes
+ derived from the Well-Known Prefix is not supported, as explained in
+ Section 3.2. Network-Specific Prefixes SHOULD be used in these
+ scenarios, as explained in Section 3.3.
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 7]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ The Well-Known Prefix MUST NOT be used to represent non global IPv4
+ addresses, such as those defined in [RFC1918].
+
+3.2. Impact on Inter-Domain Routing
+
+ The Well-Known Prefix MAY appear in inter-domain routing tables, if
+ service providers decide to provide IPv6-IPv4 interconnection
+ services to peers. Advertisement of the Well-Known Prefix SHOULD be
+ controlled either by upstream and/or downstream service providers
+ owing to inter-domain routing policies, e.g., through configuration
+ of BGP [RFC4271]. Organizations that advertize the Well-Known Prefix
+ in inter-domain routing MUST be able to provide IPv4/IPv6 translation
+ service.
+
+ When the IPv4/IPv6 translation relies on the Well-Known Prefix,
+ embedded IPv6 prefixes longer than the Well-Known Prefix MUST NOT be
+ advertised in BGP (especially e-BGP) [RFC4271] because this leads to
+ importing the IPv4 routing table into the IPv6 one and therefore
+ induces scalability issues to the global IPv6 routing table.
+ Administrators of BGP nodes SHOULD configure filters that discard
+ advertisements of embedded IPv6 prefixes longer than the Well-Known
+ Prefix.
+
+ When the IPv4/IPv6 translation service relies on Network-Specific
+ Prefixes, the IPv4-Translatable IPv6 prefixes used in stateless
+ translation MUST be advertised with proper aggregation to the IPv6
+ Internet. Similarly, if translators are configured with multiple
+ Network-Specific Prefixes,these prefixes MUST be advertised to the
+ IPv6 Internet with proper aggregation.
+
+3.3. Choice of Prefix for Stateless Translation Deployments
+
+ Organizations may deploy translation services using stateless
+ translation. In these deployments, internal IPv6 nodes are addressed
+ using IPv4-Translatable IPv6 addresses, which enable them to be
+ accessed by IPv4 nodes. The addresses of these external IPv4 nodes
+ are then represented in IPv4-Converted IPv6 addresses.
+
+ Organizations deploying stateless IPv4/IPv6 translation SHOULD assign
+ a Network-Specific Prefix to their IPv4/IPv6 translation service.
+ IPv4-Translatable and IPv4-Converted IPv6 addresses MUST be
+ constructed as specified in Section 2.2. IPv4-Translatable IPv6
+ addresses MUST use the selected Network-Specific Prefix. Both IPv4-
+ Translatable IPv6 addresses and IPv4-Converted IPv6 addresses SHOULD
+ use the same prefix.
+
+ Using the same prefix ensures that IPv6 nodes internal to the
+ organization will use the most efficient paths to reach the nodes
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 8]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ served by IPv4-Translatable IPv6 addresses. Specifically, if a node
+ learns the IPv4 address of a target internal node without knowing
+ that this target is in fact located behind the same translator that
+ the node also uses, translation rules will ensure that the IPv6
+ address constructed with the Network-Specific prefix is the same as
+ the IPv4-Translatable IPv6 address assigned to the target. Standard
+ routing preference (more specific wins) will then ensure that the
+ IPv6 packets are delivered directly, without requiring "hair-pinning"
+ at the translator.
+
+ The intra-domain routing protocol must be able to deliver packets to
+ the nodes served by IPv4-Translatable IPv6 addresses. This may
+ require routing on some or all of the embedded IPv4 address bits.
+ Security considerations detailed in Section 4 require that routers
+ check the validity of the IPv4-Translatable IPv6 source addresses,
+ using some form of reverse path check.
+
+ The management of stateless address translation can be illustrated
+ with a small example. We will consider an IPv6 network with the
+ prefix 2001:DB8:122::/48. The network administrator has selected the
+ Network-Specific prefix 2001:DB8:122:344::/64 for managing stateless
+ IPv4/IPv6 translation. The IPv4-Translatable address block is 2001:
+ DB8:122:344:C0:2::/96 and this block is visible in IPv4 as the subnet
+ 192.0.2.0/24. In this network, the host A is assigned the IPv4-
+ Translatable IPv6 address 2001:DB8:122:344:C0:2:2100::, which
+ corresponds to the IPv4 address 192.0.2.33. Host A's address is
+ configured either manually or through DHCPv6.
+
+ In this example, host A is not directly connected to the translator,
+ but instead to a link managed by a router R. The router R is
+ configured to forward to A the packets bound to 2001:DB8:122:344:C0:
+ 2:2100::. To receive these packets, R will advertise reachability of
+ the prefix 2001:DB8:122:344:C0:2:2100::/104 in the intra-domain
+ routing protocol -- or perhaps a shorter prefix if many hosts on link
+ have IPv4-Translatable IPv6 addresses derived from the same IPv4
+ subnet. If a packet bound to 192.0.2.33 reaches the translator, the
+ destination address will be translated to 2001:DB8:122:344:C0:2:
+ 2100::, and the packet will be routed towards R and then to A.
+
+ Let's suppose now that a host B of the same domain learns the IPv4
+ address of A, maybe through an application-specific referral. If B
+ has translation-aware software, B can compose a destination address
+ by combining the Network-Specific Prefix 2001:DB8:122:344::/64 and
+ the IPv4 address 192.0.2.33, resulting in the address 2001:DB8:122:
+ 344:C0:2:2100::. The packet sent by B will be forwarded towards R,
+ and then to A, avoiding protocol translation.
+
+ Forwarding, and reverse path checks, should be performed on the
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 9]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ combination of the prefix and the IPv4 address. In theory, routers
+ should be able to route on prefixes of any length. However, routing
+ on prefixes larger than 64 bits may be slower on some routers. But
+ routing efficiency is not the only consideration in the choice of a
+ prefix length. Organizations also need to consider the availability
+ of prefixes, and the potential impact of all-zeroes identifiers.
+
+ If a /32 prefix is used, all the routing bits are contained in the
+ top 64 bits of the IPv6 address, leading to excellent routing
+ properties. These prefixes may however be hard to obtain, and
+ allocation of a /32 to a small set of IPv4-Translatable IPv6
+ addresses may be seen as wasteful. In addition, the /32 prefix and a
+ zero suffix leads to an all-zeroes interface identifier, an issue
+ that we discuss in Section 3.5.
+
+ Intermediate prefix lengths such as /40, /48 or /56 appear as
+ compromises. Only some of the IPv4 bits are part of the /64
+ prefixes. Reverse path checks, in particular, may have a limited
+ efficiency. Reverse path checks limited to the most significant bits
+ of the IPv4 address will reduce the possibility of spoofing external
+ IPv4 addresses, but would allow IPv6 nodes to spoof internal IPv4-
+ Translatable IPv6 addresses.
+
+ We propose here a compromise, based on using no more than 1/256th of
+ an organization's allocation of IPv6 addresses for the IPv4/IPv6
+ translation service. For example, if the organization is an Internet
+ Service Provider with an allocated IPv6 prefix /32 or shorter, the
+ ISP could dedicate a /40 prefix to the translation service. An end
+ site with a /48 allocation could dedicate a /56 prefix to the
+ translation service, or possibly a /96 prefix if all IPv4-
+ Translatable IPv6 addresses are located on the same link.
+
+ The recommended prefix length is also a function of the deployment
+ scenario. The stateless translation can be used for Scenario 1,
+ Scenario 2, Scenario 5, and Scenario 6 defined in
+ [I-D.ietf-behave-v6v4-framework]. For different scenarios, the
+ prefix length recommendations are:
+ o For scenario 1 (an IPv6 network to the IPv4 Internet) and scenario
+ 2 (the IPv4 Internet to an IPv6 network), we recommend using a /40
+ prefix for an ISP holding a /32 allocation, and a /56 prefix for a
+ site holding a /48 allocation.
+ o For scenario 5 (an IPv6 network to an IPv4 network) and scenario 6
+ (an IPv4 network to an IPv6 network), we recommend using a /64 or
+ a /96 prefix.
+
+ IPv4-Translatable IPv6 addresses SHOULD follow the IPv6 address
+ architecture and SHOULD be compatible with the IPv4 address
+ architecture. The first IPv4-translatable address is the subnet-
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 10]
+
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+
+
+ router anycast address in IPv6 and network identifier in IPv4, the
+ last IPv4-translatable address is the subnet broadcast addresses in
+ IPv4. Both of them SHOULD NOT be used for IPv6 nodes. In addition,
+ the minimum IPv4 subnet can be used for hosts is /30 (the router
+ interface needs a valid address for the same subnet) and this rule
+ SHOULD also be applied to the corresponding subnet of the IPv4-
+ translatable addresses.
+
+3.4. Choice of Prefix for Stateful Translation Deployments
+
+ Organizations may deploy translation services based on stateful
+ translation technology. An organization may decide to use either a
+ Network-Specific Prefix or the Well-Known Prefix for its stateful
+ IPv4/IPv6 translation service.
+
+ When these services are used, IPv6 nodes are addressed through
+ standard IPv6 addresses, while IPv4 nodes are represented by IPv4-
+ Converted IPv6 addresses, as specified in Section 2.2.
+
+ The stateful nature of the translation creates a potential stability
+ issue when the organization deploys multiple translators. If several
+ translators use the same prefix, there is a risk that packets
+ belonging to the same connection may be routed to different
+ translators as the internal routing state changes. This issue can be
+ avoided either by assigning different prefixes to different
+ translators, or by ensuring that all translators using same prefix
+ coordinate their state.
+
+ Stateful translation can be used in scenarios defined in
+ [I-D.ietf-behave-v6v4-framework]. The Well Known Prefix SHOULD be
+ used in these scenarios, with two exceptions:
+ o In all scenarios, the translation MAY use a Network-Specific
+ Prefix, if deemed appropriate for management reasons.
+ o The Well-Known Prefix MUST NOT be used for scenario 3 (the IPv6
+ Internet to an IPv4 network), as this would lead to using the
+ Well-Known Prefix with non-global IPv4 addresses. That means a
+ Network-Specific Prefix MUST be used in that scenario, for example
+ a /96 prefix compatible with the Well-Known prefix format.
+
+3.5. Choice of Suffix
+
+ The address format described in Section 2.2 recommends a zero suffix.
+ Before making this recommendation, we considered different options:
+ checksum neutrality; the encoding of a port range; and a value
+ different than 0.
+
+ In the case of stateless translation, there would be no need for the
+ translator to recompute a one's complement checksum if both the IPv4-
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 11]
+
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+
+
+ Translatable and the IPv4-Converted IPv6 addresses were constructed
+ in a "checksum-neutral" manner, that is if the IPv6 addresses would
+ have the same one's complement checksum as the embedded IPv4 address.
+ In the case of stateful translation, checksum neutrality does not
+ eliminate checksum computation during translation, as only one of the
+ two addresses would be checksum neutral. We considered reserving 16
+ bits in the suffix to guarantee checksum neutrality, but declined
+ because it would not help with stateful translation, and because
+ checksum neutrality can also be achieved by an appropriate choice of
+ the Network-Specific Prefix, as was done for example with the Well-
+ Known Prefix.
+
+ There have been proposals to complement stateless translation with a
+ port-range feature. Instead of mapping an IPv4 address to exactly
+ one IPv6 prefix, the options would allow several IPv6 nodes to share
+ an IPv4 address, with each node managing a different range of ports.
+ If a port range extension is needed, it could be defined later, using
+ bits currently reserved as null in the suffix.
+
+ When a /32 prefix is used, an all-zero suffix results in an all-zero
+ interface identifier. We understand the conflict with Section 2.6.1
+ of RFC4291, which specifies that all zeroes are used for the subnet-
+ router anycast address. However, in our specification, there would
+ be only one node with an IPv4-Translatable IPv6 address in the /64
+ subnet, and the anycast semantic would not create confusion. We thus
+ decided to keep the null suffix for now. This issue does not exist
+ for prefixes larger than 32 bits, such as the /40, /56, /64 and /96
+ prefixes that we recommend in Section 3.3.
+
+3.6. Choice of the Well-Known Prefix
+
+ Before making our recommendation of the Well-Known Prefix, we were
+ faced with three choices:
+ o reuse the IPv4-mapped prefix, ::FFFF:0:0/96, as specified in RFC
+ 2765 Section 2.1;
+ o request IANA to allocate a /32 prefix,
+ o or request allocation of a new /96 prefix.
+
+ We weighted the pros and cons of these choices before settling on the
+ recommended /96 Well-Known Prefix.
+
+ The main advantage of the existing IPv4-mapped prefix is that it is
+ already defined. Reusing that prefix would require minimal
+ standardization efforts. However, being already defined is not just
+ an advantage, as there may be side effects of current
+ implementations. When presented with the IPv4-mapped prefix, current
+ versions of Windows and MacOS generate IPv4 packets, but will not
+ send IPv6 packets. If we used the IPv4-mapped prefix, these nodes
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 12]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ would not be able to support translation without modification. This
+ will defeat the main purpose of the translation techniques. We thus
+ eliminated the first choice, and decided to not reuse the IPv4-mapped
+ prefix, ::FFFF:0:0/96.
+
+ A /32 prefix would have allowed the embedded IPv4 address to fit
+ within the top 64 bits of the IPv6 address. This would have
+ facilitated routing and load balancing when an organization deploys
+ several translators. However, such destination-address based load
+ balancing may not be desirable. It is not compatible with STUN in
+ the deployments involving multiple stateful translators, each one
+ having a different pool of IPv4 addresses. STUN compatibility would
+ only be achieved if the translators managed the same pool of IPv4
+ addresses and were able to coordinate their translation state, in
+ which case there is no big advantage to using a /32 prefix rather
+ than a /96 prefix.
+
+ According to Section 2.2 of [RFC4291], in the legal textual
+ representations of IPv6 addresses, dotted decimal can only appear at
+ the end. The /96 prefix is compatible with that requirement. It
+ enables the dotted decimal notation without requiring an update to
+ [RFC4291]. This representation makes the address format easier to
+ use, and log files easier to read.
+
+ The prefix that we recommend has the particularity of being "checksum
+ neutral". The sum of the hexadecimal numbers "0064" and "FF9B" is
+ "FFFF", i.e. a value equal to zero in one's complement arithmetic.
+ An IPv4-Embedded IPv6 address constructed with this prefix will have
+ the same one's complement checksum as the embedded IPv4 address.
+
+
+4. Security Considerations
+
+4.1. Protection Against Spoofing
+
+ By and large, IPv4/IPv6 translators can be modeled as special
+ routers, are subject to the same risks, and can implement the same
+ mitigations. There is however a particular risk that directly
+ derives from the practice of embedding IPv4 addresses in IPv6:
+ address spoofing.
+
+ An attacker could use an IPv4-Embedded IPv6 address as the source
+ address of malicious packets. After translation, the packets will
+ appear as IPv4 packets from the specified source, and the attacker
+ may be hard to track. If left without mitigation, the attack would
+ allow malicious IPv6 nodes to spoof arbitrary IPv4 addresses.
+
+ The mitigation is to implement reverse path checks, and to verify
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 13]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ throughout the network that packets are coming from an authorized
+ location.
+
+4.2. Secure Configuration
+
+ The prefixes used for address translation are used by IPv6 nodes to
+ send packets to IPv6/IPv4 translators. Attackers could attempt to
+ fool nodes, DNS gateways, and IPv4/IPv6 translators into using wrong
+ values for these parameters, resulting in network disruption, denial
+ of service, and possible information disclosure. To mitigate such
+ attacks, network administrators need to ensure that prefixes are
+ configured in a secure way.
+
+ The mechanisms for achieving secure configuration of prefixes are
+ beyond the scope of this document.
+
+
+5. IANA Considerations
+
+ The IANA is requested to add a note to the documentation of the
+ 0000::/8 address block in
+ http://www.iana.org/assignments/ipv6-address-space to document the
+ assignment by the IETF of the Well Known Prefix. For example:
+
+ The "Well Known Prefix" 64:FF9B::/96 used in an algorithmic
+ mapping between IPv4 to IPv6 addresses is defined out of the
+ 0000::/8 address block, per (this document).
+
+
+6. Acknowledgements
+
+ Many people in the Behave WG have contributed to the discussion that
+ led to this document, including Andrew Sullivan, Andrew Yourtchenko,
+ Brian Carpenter, Dan Wing, Ed Jankiewicz, Fred Baker, Hiroshi Miyata,
+ Iljitsch van Beijnum, John Schnizlein, Keith Moore, Kevin Yin, Magnus
+ Westerlund, Margaret Wasserman, Masahito Endo, Phil Roberts, Philip
+ Matthews, Remi Denis-Courmont, Remi Despres and William Waites.
+
+ Marcelo Bagnulo is partly funded by Trilogy, a research project
+ supported by the European Commission under its Seventh Framework
+ Program.
+
+
+7. Contributors
+
+ The following individuals co-authored drafts from which text has been
+ incorporated, and are listed in alphabetical order.
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 14]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ Congxiao Bao
+ CERNET Center/Tsinghua University
+ Room 225, Main Building, Tsinghua University
+ Beijing, 100084
+ China
+ Phone: +86 62785983
+ Email: congxiao@cernet.edu.cn
+
+ Dave Thaler
+ Microsoft Corporation
+ One Microsoft Way
+ Redmond, WA 98052
+ USA
+ Phone: +1 425 703 8835
+ Email: dthaler@microsoft.com
+
+ Fred Baker
+ Cisco Systems
+ Santa Barbara, California 93117
+ USA
+ Phone: +1-408-526-4257
+ Fax: +1-413-473-2403
+ Email: fred@cisco.com
+
+ Hiroshi Miyata
+ Yokogawa Electric Corporation
+ 2-9-32 Nakacho
+ Musashino-shi, Tokyo 180-8750
+ JAPAN
+ Email: h.miyata@jp.yokogawa.com
+
+ Marcelo Bagnulo
+ Universidad Carlos III de Madrid
+ Av. Universidad 30
+ Leganes, Madrid 28911
+ ESPANA
+ Email: marcelo@it.uc3m.es
+
+ Xing Li
+ CERNET Center/Tsinghua University
+ Room 225, Main Building, Tsinghua University
+ Beijing, 100084
+ China
+ Phone: +86 62785983
+ Email: xing@cernet.edu.cn
+
+
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 15]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+8. References
+
+8.1. Normative References
+
+ [RFC2119] Bradner, S., "Key words for use in RFCs to Indicate
+ Requirement Levels", BCP 14, RFC 2119, March 1997.
+
+ [RFC4291] Hinden, R. and S. Deering, "IP Version 6 Addressing
+ Architecture", RFC 4291, February 2006.
+
+8.2. Informative References
+
+ [I-D.ietf-behave-dns64]
+ Bagnulo, M., Sullivan, A., Matthews, P., and I. Beijnum,
+ "DNS64: DNS extensions for Network Address Translation
+ from IPv6 Clients to IPv4 Servers",
+ draft-ietf-behave-dns64-04 (work in progress),
+ December 2009.
+
+ [I-D.ietf-behave-v6v4-framework]
+ Baker, F., Li, X., Bao, C., and K. Yin, "Framework for
+ IPv4/IPv6 Translation",
+ draft-ietf-behave-v6v4-framework-03 (work in progress),
+ October 2009.
+
+ [RFC1918] Rekhter, Y., Moskowitz, R., Karrenberg, D., Groot, G., and
+ E. Lear, "Address Allocation for Private Internets",
+ BCP 5, RFC 1918, February 1996.
+
+ [RFC3484] Draves, R., "Default Address Selection for Internet
+ Protocol version 6 (IPv6)", RFC 3484, February 2003.
+
+ [RFC3849] Huston, G., Lord, A., and P. Smith, "IPv6 Address Prefix
+ Reserved for Documentation", RFC 3849, July 2004.
+
+ [RFC4271] Rekhter, Y., Li, T., and S. Hares, "A Border Gateway
+ Protocol 4 (BGP-4)", RFC 4271, January 2006.
+
+ [RFC5735] Cotton, M. and L. Vegoda, "Special Use IPv4 Addresses",
+ BCP 153, RFC 5735, January 2010.
+
+
+
+
+
+
+
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 16]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+Authors' Addresses
+
+ Congxiao Bao
+ CERNET Center/Tsinghua University
+ Room 225, Main Building, Tsinghua University
+ Beijing, 100084
+ China
+
+ Phone: +86 10-62785983
+ Email: congxiao@cernet.edu.cn
+
+
+ Christian Huitema
+ Microsoft Corporation
+ One Microsoft Way
+ Redmond, WA 98052-6399
+ U.S.A.
+
+ Email: huitema@microsoft.com
+
+
+ Marcelo Bagnulo
+ UC3M
+ Av. Universidad 30
+ Leganes, Madrid 28911
+ Spain
+
+ Phone: +34-91-6249500
+ Fax:
+ Email: marcelo@it.uc3m.es
+ URI: http://www.it.uc3m.es/marcelo
+
+
+ Mohamed Boucadair
+ France Telecom
+ 3, Av Francois Chateaux
+ Rennes 350000
+ France
+
+ Email: mohamed.boucadair@orange-ftgroup.com
+
+
+
+
+
+
+
+
+
+
+
+Bao, et al. Expires October 11, 2010 [Page 17]
+
+Internet-Draft IPv6 Addressing of IPv4/IPv6 Translators April 2010
+
+
+ Xing Li
+ CERNET Center/Tsinghua University
+ Room 225, Main Building, Tsinghua University
+ Beijing, 100084
+ China
+
+ Phone: +86 10-62785983
+ Email: xing@cernet.edu.cn
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
*** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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Update LLVM to r104832.
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vendor/llvm/dist/include/llvm/MC/MCLabel.h
vendor/llvm/dist/include/llvm/MC/MCMachOSymbolFlags.h
vendor/llvm/dist/include/llvm/MC/MCSectionCOFF.h
vendor/llvm/dist/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
vendor/llvm/dist/lib/Analysis/ModuleDebugInfoPrinter.cpp
vendor/llvm/dist/lib/MC/MCLabel.cpp
vendor/llvm/dist/lib/MC/MCLoggingStreamer.cpp
vendor/llvm/dist/lib/MC/MCSectionCOFF.cpp
vendor/llvm/dist/lib/Transforms/Scalar/Sink.cpp
vendor/llvm/dist/test/CodeGen/ARM/2010-05-14-IllegalType.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-17-DAGCombineAssert.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-18-LocalAllocCrash.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-19-Shuffles.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
vendor/llvm/dist/test/CodeGen/ARM/2010-05-21-BuildVector.ll
vendor/llvm/dist/test/CodeGen/ARM/arm-returnaddr.ll
vendor/llvm/dist/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
vendor/llvm/dist/test/CodeGen/ARM/reg_sequence.ll
vendor/llvm/dist/test/CodeGen/ARM/trap.ll
vendor/llvm/dist/test/CodeGen/CellSPU/jumptable.ll
vendor/llvm/dist/test/CodeGen/CellSPU/sub_ops.ll
vendor/llvm/dist/test/CodeGen/Generic/legalize-dbg-value.ll
vendor/llvm/dist/test/CodeGen/Thumb/trap.ll
vendor/llvm/dist/test/CodeGen/Thumb2/2010-05-24-rsbs.ll
vendor/llvm/dist/test/CodeGen/Thumb2/div.ll
vendor/llvm/dist/test/CodeGen/Thumb2/sign_extend_inreg.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-07-ldconvert.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-16-nosseconversion.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
vendor/llvm/dist/test/CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll
vendor/llvm/dist/test/CodeGen/X86/fp-stack.ll
vendor/llvm/dist/test/CodeGen/X86/label-redefinition.ll
vendor/llvm/dist/test/CodeGen/X86/mcinst-lowering-cmp0.ll
vendor/llvm/dist/test/CodeGen/X86/mcinst-lowering.ll
vendor/llvm/dist/test/CodeGen/X86/tls-1.ll
vendor/llvm/dist/test/CodeGen/X86/unknown-location.ll
vendor/llvm/dist/test/DebugInfo/2010-05-10-MultipleCU.ll
vendor/llvm/dist/test/DebugInfo/2010-05-25-DotDebugLoc.ll
vendor/llvm/dist/test/Feature/metadata.ll
vendor/llvm/dist/test/FrontendC++/2010-05-10-Var-DbgInfo.cpp
vendor/llvm/dist/test/FrontendC++/2010-05-11-alwaysinlineinstantiation.cpp
vendor/llvm/dist/test/FrontendC++/2010-05-12-PtrToMember-Dbg.cpp
vendor/llvm/dist/test/FrontendC++/thunk-weak-odr.cpp
vendor/llvm/dist/test/FrontendC/2010-05-14-Optimized-VarType.c
vendor/llvm/dist/test/FrontendC/2010-05-18-asmsched.c
vendor/llvm/dist/test/FrontendC/2010-05-18-palignr.c
vendor/llvm/dist/test/FrontendC/2010-05-26-AsmSideEffect.c
vendor/llvm/dist/test/FrontendC/pr2394.c
vendor/llvm/dist/test/MC/AsmParser/X86/x86_64-imm-widths.s
vendor/llvm/dist/test/MC/AsmParser/directive_tbss.s
vendor/llvm/dist/test/MC/AsmParser/directive_tdata.s
vendor/llvm/dist/test/MC/AsmParser/directive_thread_init_func.s
vendor/llvm/dist/test/MC/AsmParser/directive_tlv.s
vendor/llvm/dist/test/MC/MachO/direction_labels.s
vendor/llvm/dist/test/MC/MachO/indirect-symbols.s
vendor/llvm/dist/test/MC/MachO/string-table.s
vendor/llvm/dist/test/MC/MachO/tbss.s
vendor/llvm/dist/test/MC/MachO/tdata.s
vendor/llvm/dist/test/MC/MachO/thread_init_func.s
vendor/llvm/dist/test/MC/MachO/tls.s
vendor/llvm/dist/test/MC/MachO/tlv-reloc.s
vendor/llvm/dist/test/MC/MachO/tlv.s
vendor/llvm/dist/test/MC/MachO/zerofill-5.s
vendor/llvm/dist/test/Other/2010-05-06-Printer.ll
vendor/llvm/dist/test/Other/inline-asm-newline-terminator.ll
vendor/llvm/dist/test/Transforms/GVN/2010-05-08-OneBit.ll
vendor/llvm/dist/test/Transforms/Inline/2010-05-12-ValueMap.ll
vendor/llvm/dist/test/Transforms/Sink/
vendor/llvm/dist/test/Transforms/Sink/basic.ll
vendor/llvm/dist/test/Transforms/Sink/dg.exp
vendor/llvm/dist/unittests/ADT/ilistTest.cpp
vendor/llvm/dist/utils/TableGen/ClangASTNodesEmitter.cpp
vendor/llvm/dist/utils/TableGen/ClangASTNodesEmitter.h
vendor/llvm/dist/utils/valgrind/i386-pc-linux-gnu.supp
vendor/llvm/dist/utils/valgrind/x86_64-pc-linux-gnu.supp
Deleted:
vendor/llvm/dist/include/llvm/CodeGen/ELFRelocation.h
vendor/llvm/dist/test/CodeGen/X86/stack-color-with-reg-2.ll
Modified:
vendor/llvm/dist/Makefile.config.in
vendor/llvm/dist/Makefile.rules
vendor/llvm/dist/autoconf/configure.ac
vendor/llvm/dist/configure
vendor/llvm/dist/docs/AliasAnalysis.html
vendor/llvm/dist/docs/BitCodeFormat.html
vendor/llvm/dist/docs/Bugpoint.html
vendor/llvm/dist/docs/CodeGenerator.html
vendor/llvm/dist/docs/CodingStandards.html
vendor/llvm/dist/docs/CommandGuide/index.html
vendor/llvm/dist/docs/CommandGuide/lit.pod
vendor/llvm/dist/docs/CommandLine.html
vendor/llvm/dist/docs/CompilerDriver.html
vendor/llvm/dist/docs/CompilerWriterInfo.html
vendor/llvm/dist/docs/DeveloperPolicy.html
vendor/llvm/dist/docs/ExceptionHandling.html
vendor/llvm/dist/docs/ExtendingLLVM.html
vendor/llvm/dist/docs/FAQ.html
vendor/llvm/dist/docs/GCCFEBuildInstrs.html
vendor/llvm/dist/docs/GarbageCollection.html
vendor/llvm/dist/docs/GetElementPtr.html
vendor/llvm/dist/docs/GettingStarted.html
vendor/llvm/dist/docs/GettingStartedVS.html
vendor/llvm/dist/docs/HowToReleaseLLVM.html
vendor/llvm/dist/docs/HowToSubmitABug.html
vendor/llvm/dist/docs/LangRef.html
vendor/llvm/dist/docs/Lexicon.html
vendor/llvm/dist/docs/LinkTimeOptimization.html
vendor/llvm/dist/docs/MakefileGuide.html
vendor/llvm/dist/docs/Packaging.html
vendor/llvm/dist/docs/Passes.html
vendor/llvm/dist/docs/ProgrammersManual.html
vendor/llvm/dist/docs/Projects.html
vendor/llvm/dist/docs/ReleaseNotes.html
vendor/llvm/dist/docs/SourceLevelDebugging.html
vendor/llvm/dist/docs/SystemLibrary.html
vendor/llvm/dist/docs/TableGenFundamentals.html
vendor/llvm/dist/docs/TestingGuide.html
vendor/llvm/dist/docs/UsingLibraries.html
vendor/llvm/dist/docs/WritingAnLLVMBackend.html
vendor/llvm/dist/docs/WritingAnLLVMPass.html
vendor/llvm/dist/docs/index.html
vendor/llvm/dist/docs/tutorial/LangImpl1.html
vendor/llvm/dist/docs/tutorial/LangImpl2.html
vendor/llvm/dist/docs/tutorial/LangImpl3.html
vendor/llvm/dist/docs/tutorial/LangImpl4.html
vendor/llvm/dist/docs/tutorial/LangImpl5.html
vendor/llvm/dist/docs/tutorial/LangImpl6.html
vendor/llvm/dist/docs/tutorial/LangImpl7.html
vendor/llvm/dist/docs/tutorial/LangImpl8.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl1.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl2.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl3.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl4.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl5.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl6.html
vendor/llvm/dist/docs/tutorial/OCamlLangImpl7.html
vendor/llvm/dist/include/llvm/ADT/DenseMap.h
vendor/llvm/dist/include/llvm/ADT/EquivalenceClasses.h
vendor/llvm/dist/include/llvm/ADT/SparseBitVector.h
vendor/llvm/dist/include/llvm/ADT/StringRef.h
vendor/llvm/dist/include/llvm/ADT/Twine.h
vendor/llvm/dist/include/llvm/ADT/ilist_node.h
vendor/llvm/dist/include/llvm/Analysis/DebugInfo.h
vendor/llvm/dist/include/llvm/Analysis/InlineCost.h
vendor/llvm/dist/include/llvm/Analysis/Lint.h
vendor/llvm/dist/include/llvm/Analysis/Passes.h
vendor/llvm/dist/include/llvm/CallingConv.h
vendor/llvm/dist/include/llvm/CodeGen/FastISel.h
vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h
vendor/llvm/dist/include/llvm/CodeGen/LatencyPriorityQueue.h
vendor/llvm/dist/include/llvm/CodeGen/LinkAllCodegenComponents.h
vendor/llvm/dist/include/llvm/CodeGen/LiveInterval.h
vendor/llvm/dist/include/llvm/CodeGen/LiveIntervalAnalysis.h
vendor/llvm/dist/include/llvm/CodeGen/MachineFrameInfo.h
vendor/llvm/dist/include/llvm/CodeGen/MachineFunction.h
vendor/llvm/dist/include/llvm/CodeGen/MachineInstr.h
vendor/llvm/dist/include/llvm/CodeGen/MachineRegisterInfo.h
vendor/llvm/dist/include/llvm/CodeGen/MachineSSAUpdater.h
vendor/llvm/dist/include/llvm/CodeGen/ScheduleDAG.h
vendor/llvm/dist/include/llvm/CodeGen/SchedulerRegistry.h
vendor/llvm/dist/include/llvm/CodeGen/SelectionDAG.h
vendor/llvm/dist/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
vendor/llvm/dist/include/llvm/CodeGen/ValueTypes.h
vendor/llvm/dist/include/llvm/CodeGen/ValueTypes.td
vendor/llvm/dist/include/llvm/Config/config.h.cmake
vendor/llvm/dist/include/llvm/Config/config.h.in
vendor/llvm/dist/include/llvm/Constants.h
vendor/llvm/dist/include/llvm/Intrinsics.td
vendor/llvm/dist/include/llvm/IntrinsicsX86.td
vendor/llvm/dist/include/llvm/LinkAllPasses.h
vendor/llvm/dist/include/llvm/MC/MCAsmInfo.h
vendor/llvm/dist/include/llvm/MC/MCAsmLayout.h
vendor/llvm/dist/include/llvm/MC/MCAssembler.h
vendor/llvm/dist/include/llvm/MC/MCContext.h
vendor/llvm/dist/include/llvm/MC/MCExpr.h
vendor/llvm/dist/include/llvm/MC/MCFixup.h
vendor/llvm/dist/include/llvm/MC/MCObjectWriter.h
vendor/llvm/dist/include/llvm/MC/MCParser/AsmParser.h
vendor/llvm/dist/include/llvm/MC/MCParser/MCAsmLexer.h
vendor/llvm/dist/include/llvm/MC/MCSection.h
vendor/llvm/dist/include/llvm/MC/MCSectionELF.h
vendor/llvm/dist/include/llvm/MC/MCSectionMachO.h
vendor/llvm/dist/include/llvm/MC/MCStreamer.h
vendor/llvm/dist/include/llvm/MC/MCSymbol.h
vendor/llvm/dist/include/llvm/MC/MachObjectWriter.h
vendor/llvm/dist/include/llvm/PassManager.h
vendor/llvm/dist/include/llvm/Support/Compiler.h
vendor/llvm/dist/include/llvm/Support/DOTGraphTraits.h
vendor/llvm/dist/include/llvm/Support/GraphWriter.h
vendor/llvm/dist/include/llvm/Support/StandardPasses.h
vendor/llvm/dist/include/llvm/System/Signals.h
vendor/llvm/dist/include/llvm/Target/SubtargetFeature.h
vendor/llvm/dist/include/llvm/Target/Target.td
vendor/llvm/dist/include/llvm/Target/TargetAsmBackend.h
vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h
vendor/llvm/dist/include/llvm/Target/TargetLowering.h
vendor/llvm/dist/include/llvm/Target/TargetLoweringObjectFile.h
vendor/llvm/dist/include/llvm/Target/TargetMachine.h
vendor/llvm/dist/include/llvm/Target/TargetRegisterInfo.h
vendor/llvm/dist/include/llvm/Target/TargetRegistry.h
vendor/llvm/dist/include/llvm/Target/TargetSelectionDAGInfo.h
vendor/llvm/dist/include/llvm/Transforms/Scalar.h
vendor/llvm/dist/include/llvm/Transforms/Utils/SSAUpdater.h
vendor/llvm/dist/lib/Analysis/CMakeLists.txt
vendor/llvm/dist/lib/Analysis/DebugInfo.cpp
vendor/llvm/dist/lib/Analysis/InlineCost.cpp
vendor/llvm/dist/lib/Analysis/Lint.cpp
vendor/llvm/dist/lib/AsmParser/LLLexer.cpp
vendor/llvm/dist/lib/AsmParser/LLParser.cpp
vendor/llvm/dist/lib/AsmParser/LLToken.h
vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
vendor/llvm/dist/lib/CodeGen/AsmPrinter/DIE.h
vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfDebug.h
vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.cpp
vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfException.h
vendor/llvm/dist/lib/CodeGen/AsmPrinter/OcamlGCPrinter.cpp
vendor/llvm/dist/lib/CodeGen/CriticalAntiDepBreaker.cpp
vendor/llvm/dist/lib/CodeGen/IntrinsicLowering.cpp
vendor/llvm/dist/lib/CodeGen/LLVMTargetMachine.cpp
vendor/llvm/dist/lib/CodeGen/LatencyPriorityQueue.cpp
vendor/llvm/dist/lib/CodeGen/LiveIntervalAnalysis.cpp
vendor/llvm/dist/lib/CodeGen/LowerSubregs.cpp
vendor/llvm/dist/lib/CodeGen/MachineCSE.cpp
vendor/llvm/dist/lib/CodeGen/MachineFunction.cpp
vendor/llvm/dist/lib/CodeGen/MachineInstr.cpp
vendor/llvm/dist/lib/CodeGen/MachineLICM.cpp
vendor/llvm/dist/lib/CodeGen/MachineRegisterInfo.cpp
vendor/llvm/dist/lib/CodeGen/MachineSSAUpdater.cpp
vendor/llvm/dist/lib/CodeGen/MachineSink.cpp
vendor/llvm/dist/lib/CodeGen/MachineVerifier.cpp
vendor/llvm/dist/lib/CodeGen/PHIElimination.cpp
vendor/llvm/dist/lib/CodeGen/PHIElimination.h
vendor/llvm/dist/lib/CodeGen/PostRASchedulerList.cpp
vendor/llvm/dist/lib/CodeGen/PreAllocSplitting.cpp
vendor/llvm/dist/lib/CodeGen/ProcessImplicitDefs.cpp
vendor/llvm/dist/lib/CodeGen/PrologEpilogInserter.cpp
vendor/llvm/dist/lib/CodeGen/RegAllocFast.cpp
vendor/llvm/dist/lib/CodeGen/RegAllocLinearScan.cpp
vendor/llvm/dist/lib/CodeGen/RegAllocLocal.cpp
vendor/llvm/dist/lib/CodeGen/RegAllocPBQP.cpp
vendor/llvm/dist/lib/CodeGen/RegisterScavenging.cpp
vendor/llvm/dist/lib/CodeGen/ScheduleDAG.cpp
vendor/llvm/dist/lib/CodeGen/ScheduleDAGEmit.cpp
vendor/llvm/dist/lib/CodeGen/ScheduleDAGInstrs.cpp
vendor/llvm/dist/lib/CodeGen/ScheduleDAGInstrs.h
vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/FastISel.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/InstrEmitter.h
vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypes.h
vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/TargetLowering.cpp
vendor/llvm/dist/lib/CodeGen/SelectionDAG/TargetSelectionDAGInfo.cpp
vendor/llvm/dist/lib/CodeGen/SimpleRegisterCoalescing.cpp
vendor/llvm/dist/lib/CodeGen/Spiller.cpp
vendor/llvm/dist/lib/CodeGen/StackSlotColoring.cpp
vendor/llvm/dist/lib/CodeGen/StrongPHIElimination.cpp
vendor/llvm/dist/lib/CodeGen/TailDuplication.cpp
vendor/llvm/dist/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
vendor/llvm/dist/lib/CodeGen/TwoAddressInstructionPass.cpp
vendor/llvm/dist/lib/CodeGen/VirtRegRewriter.cpp
vendor/llvm/dist/lib/CompilerDriver/Action.cpp
vendor/llvm/dist/lib/ExecutionEngine/ExecutionEngine.cpp
vendor/llvm/dist/lib/MC/CMakeLists.txt
vendor/llvm/dist/lib/MC/MCAsmInfo.cpp
vendor/llvm/dist/lib/MC/MCAsmInfoDarwin.cpp
vendor/llvm/dist/lib/MC/MCAsmStreamer.cpp
vendor/llvm/dist/lib/MC/MCAssembler.cpp
vendor/llvm/dist/lib/MC/MCContext.cpp
vendor/llvm/dist/lib/MC/MCExpr.cpp
vendor/llvm/dist/lib/MC/MCInst.cpp
vendor/llvm/dist/lib/MC/MCMachOStreamer.cpp
vendor/llvm/dist/lib/MC/MCNullStreamer.cpp
vendor/llvm/dist/lib/MC/MCParser/AsmLexer.cpp
vendor/llvm/dist/lib/MC/MCParser/AsmParser.cpp
vendor/llvm/dist/lib/MC/MCSection.cpp
vendor/llvm/dist/lib/MC/MCSectionMachO.cpp
vendor/llvm/dist/lib/MC/MCStreamer.cpp
vendor/llvm/dist/lib/MC/MCSymbol.cpp
vendor/llvm/dist/lib/MC/MachObjectWriter.cpp
vendor/llvm/dist/lib/Support/APInt.cpp
vendor/llvm/dist/lib/Support/CommandLine.cpp
vendor/llvm/dist/lib/Support/ErrorHandling.cpp
vendor/llvm/dist/lib/Support/PrettyStackTrace.cpp
vendor/llvm/dist/lib/Support/StringRef.cpp
vendor/llvm/dist/lib/Support/Timer.cpp
vendor/llvm/dist/lib/Support/Twine.cpp
vendor/llvm/dist/lib/Support/raw_ostream.cpp
vendor/llvm/dist/lib/System/Unix/Signals.inc
vendor/llvm/dist/lib/System/Win32/Signals.inc
vendor/llvm/dist/lib/Target/ARM/ARM.h
vendor/llvm/dist/lib/Target/ARM/ARM.td
vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp
vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.h
vendor/llvm/dist/lib/Target/ARM/ARMBaseRegisterInfo.cpp
vendor/llvm/dist/lib/Target/ARM/ARMBaseRegisterInfo.h
vendor/llvm/dist/lib/Target/ARM/ARMCodeEmitter.cpp
vendor/llvm/dist/lib/Target/ARM/ARMExpandPseudoInsts.cpp
vendor/llvm/dist/lib/Target/ARM/ARMISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp
vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.h
vendor/llvm/dist/lib/Target/ARM/ARMInstrFormats.td
vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.td
vendor/llvm/dist/lib/Target/ARM/ARMInstrNEON.td
vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb.td
vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb2.td
vendor/llvm/dist/lib/Target/ARM/ARMInstrVFP.td
vendor/llvm/dist/lib/Target/ARM/ARMJITInfo.cpp
vendor/llvm/dist/lib/Target/ARM/ARMRegisterInfo.h
vendor/llvm/dist/lib/Target/ARM/ARMRegisterInfo.td
vendor/llvm/dist/lib/Target/ARM/ARMRelocations.h
vendor/llvm/dist/lib/Target/ARM/ARMSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/ARM/ARMSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/ARM/ARMSubtarget.cpp
vendor/llvm/dist/lib/Target/ARM/ARMSubtarget.h
vendor/llvm/dist/lib/Target/ARM/ARMTargetMachine.cpp
vendor/llvm/dist/lib/Target/ARM/ARMTargetMachine.h
vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
vendor/llvm/dist/lib/Target/ARM/AsmPrinter/ARMMCInstLower.h
vendor/llvm/dist/lib/Target/ARM/NEONMoveFix.cpp
vendor/llvm/dist/lib/Target/ARM/NEONPreAllocPass.cpp
vendor/llvm/dist/lib/Target/ARM/Thumb1InstrInfo.cpp
vendor/llvm/dist/lib/Target/ARM/Thumb1InstrInfo.h
vendor/llvm/dist/lib/Target/ARM/Thumb2InstrInfo.cpp
vendor/llvm/dist/lib/Target/ARM/Thumb2InstrInfo.h
vendor/llvm/dist/lib/Target/Alpha/AlphaInstrInfo.cpp
vendor/llvm/dist/lib/Target/Alpha/AlphaInstrInfo.h
vendor/llvm/dist/lib/Target/Alpha/AlphaInstrInfo.td
vendor/llvm/dist/lib/Target/Alpha/AlphaSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/Alpha/AlphaSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/Alpha/AlphaTargetMachine.cpp
vendor/llvm/dist/lib/Target/Alpha/AlphaTargetMachine.h
vendor/llvm/dist/lib/Target/Blackfin/BlackfinInstrInfo.cpp
vendor/llvm/dist/lib/Target/Blackfin/BlackfinInstrInfo.h
vendor/llvm/dist/lib/Target/Blackfin/BlackfinInstrInfo.td
vendor/llvm/dist/lib/Target/Blackfin/BlackfinRegisterInfo.cpp
vendor/llvm/dist/lib/Target/Blackfin/BlackfinRegisterInfo.h
vendor/llvm/dist/lib/Target/Blackfin/BlackfinRegisterInfo.td
vendor/llvm/dist/lib/Target/Blackfin/BlackfinSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/Blackfin/BlackfinSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/Blackfin/BlackfinTargetMachine.cpp
vendor/llvm/dist/lib/Target/Blackfin/BlackfinTargetMachine.h
vendor/llvm/dist/lib/Target/CBackend/CBackend.cpp
vendor/llvm/dist/lib/Target/CBackend/CTargetMachine.h
vendor/llvm/dist/lib/Target/CellSPU/README.txt
vendor/llvm/dist/lib/Target/CellSPU/SPUISelLowering.cpp
vendor/llvm/dist/lib/Target/CellSPU/SPUInstrInfo.cpp
vendor/llvm/dist/lib/Target/CellSPU/SPUInstrInfo.h
vendor/llvm/dist/lib/Target/CellSPU/SPUInstrInfo.td
vendor/llvm/dist/lib/Target/CellSPU/SPURegisterInfo.cpp
vendor/llvm/dist/lib/Target/CellSPU/SPUSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/CellSPU/SPUSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/CellSPU/SPUTargetMachine.cpp
vendor/llvm/dist/lib/Target/CellSPU/SPUTargetMachine.h
vendor/llvm/dist/lib/Target/CppBackend/CPPBackend.cpp
vendor/llvm/dist/lib/Target/CppBackend/CPPTargetMachine.h
vendor/llvm/dist/lib/Target/MBlaze/AsmPrinter/MBlazeAsmPrinter.cpp
vendor/llvm/dist/lib/Target/MBlaze/MBlazeInstrInfo.cpp
vendor/llvm/dist/lib/Target/MBlaze/MBlazeInstrInfo.h
vendor/llvm/dist/lib/Target/MBlaze/MBlazeRegisterInfo.cpp
vendor/llvm/dist/lib/Target/MBlaze/MBlazeRegisterInfo.td
vendor/llvm/dist/lib/Target/MBlaze/MBlazeSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/MBlaze/MBlazeSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/MBlaze/MBlazeTargetMachine.cpp
vendor/llvm/dist/lib/Target/MBlaze/MBlazeTargetMachine.h
vendor/llvm/dist/lib/Target/MSIL/MSILWriter.cpp
vendor/llvm/dist/lib/Target/MSP430/AsmPrinter/MSP430MCInstLower.h
vendor/llvm/dist/lib/Target/MSP430/MSP430ISelLowering.cpp
vendor/llvm/dist/lib/Target/MSP430/MSP430InstrInfo.cpp
vendor/llvm/dist/lib/Target/MSP430/MSP430InstrInfo.h
vendor/llvm/dist/lib/Target/MSP430/MSP430RegisterInfo.td
vendor/llvm/dist/lib/Target/MSP430/MSP430SelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/MSP430/MSP430SelectionDAGInfo.h
vendor/llvm/dist/lib/Target/MSP430/MSP430TargetMachine.cpp
vendor/llvm/dist/lib/Target/MSP430/MSP430TargetMachine.h
vendor/llvm/dist/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
vendor/llvm/dist/lib/Target/Mips/MipsISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/Mips/MipsInstrInfo.cpp
vendor/llvm/dist/lib/Target/Mips/MipsInstrInfo.h
vendor/llvm/dist/lib/Target/Mips/MipsRegisterInfo.cpp
vendor/llvm/dist/lib/Target/Mips/MipsRegisterInfo.h
vendor/llvm/dist/lib/Target/Mips/MipsRegisterInfo.td
vendor/llvm/dist/lib/Target/Mips/MipsSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/Mips/MipsSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/Mips/MipsTargetMachine.cpp
vendor/llvm/dist/lib/Target/Mips/MipsTargetMachine.h
vendor/llvm/dist/lib/Target/PIC16/AsmPrinter/PIC16AsmPrinter.h
vendor/llvm/dist/lib/Target/PIC16/PIC16DebugInfo.cpp
vendor/llvm/dist/lib/Target/PIC16/PIC16ISelDAGToDAG.h
vendor/llvm/dist/lib/Target/PIC16/PIC16InstrInfo.cpp
vendor/llvm/dist/lib/Target/PIC16/PIC16InstrInfo.h
vendor/llvm/dist/lib/Target/PIC16/PIC16Section.h
vendor/llvm/dist/lib/Target/PIC16/PIC16SelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/PIC16/PIC16SelectionDAGInfo.h
vendor/llvm/dist/lib/Target/PIC16/PIC16TargetMachine.cpp
vendor/llvm/dist/lib/Target/PIC16/PIC16TargetMachine.h
vendor/llvm/dist/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.h
vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.h
vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.td
vendor/llvm/dist/lib/Target/PowerPC/PPCRegisterInfo.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCRegisterInfo.td
vendor/llvm/dist/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/PowerPC/PPCTargetMachine.cpp
vendor/llvm/dist/lib/Target/PowerPC/PPCTargetMachine.h
vendor/llvm/dist/lib/Target/README.txt
vendor/llvm/dist/lib/Target/Sparc/SparcInstrInfo.cpp
vendor/llvm/dist/lib/Target/Sparc/SparcInstrInfo.h
vendor/llvm/dist/lib/Target/Sparc/SparcRegisterInfo.td
vendor/llvm/dist/lib/Target/Sparc/SparcSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/Sparc/SparcSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/Sparc/SparcTargetMachine.cpp
vendor/llvm/dist/lib/Target/Sparc/SparcTargetMachine.h
vendor/llvm/dist/lib/Target/SubtargetFeature.cpp
vendor/llvm/dist/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZISelLowering.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZInstrInfo.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZInstrInfo.h
vendor/llvm/dist/lib/Target/SystemZ/SystemZRegisterInfo.h
vendor/llvm/dist/lib/Target/SystemZ/SystemZRegisterInfo.td
vendor/llvm/dist/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/SystemZ/SystemZTargetMachine.cpp
vendor/llvm/dist/lib/Target/SystemZ/SystemZTargetMachine.h
vendor/llvm/dist/lib/Target/TargetMachine.cpp
vendor/llvm/dist/lib/Target/TargetRegisterInfo.cpp
vendor/llvm/dist/lib/Target/X86/AsmParser/X86AsmParser.cpp
vendor/llvm/dist/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
vendor/llvm/dist/lib/Target/X86/AsmPrinter/X86AsmPrinter.h
vendor/llvm/dist/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
vendor/llvm/dist/lib/Target/X86/AsmPrinter/X86MCInstLower.h
vendor/llvm/dist/lib/Target/X86/CMakeLists.txt
vendor/llvm/dist/lib/Target/X86/Disassembler/X86Disassembler.cpp
vendor/llvm/dist/lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
vendor/llvm/dist/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
vendor/llvm/dist/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
vendor/llvm/dist/lib/Target/X86/SSEDomainFix.cpp
vendor/llvm/dist/lib/Target/X86/X86AsmBackend.cpp
vendor/llvm/dist/lib/Target/X86/X86COFFMachineModuleInfo.h
vendor/llvm/dist/lib/Target/X86/X86CallingConv.td
vendor/llvm/dist/lib/Target/X86/X86FastISel.cpp
vendor/llvm/dist/lib/Target/X86/X86FloatingPointRegKill.cpp
vendor/llvm/dist/lib/Target/X86/X86ISelDAGToDAG.cpp
vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp
vendor/llvm/dist/lib/Target/X86/X86ISelLowering.h
vendor/llvm/dist/lib/Target/X86/X86Instr64bit.td
vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp
vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h
vendor/llvm/dist/lib/Target/X86/X86InstrInfo.td
vendor/llvm/dist/lib/Target/X86/X86InstrMMX.td
vendor/llvm/dist/lib/Target/X86/X86InstrSSE.td
vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.cpp
vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.h
vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.td
vendor/llvm/dist/lib/Target/X86/X86SelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/X86/X86SelectionDAGInfo.h
vendor/llvm/dist/lib/Target/X86/X86TargetMachine.cpp
vendor/llvm/dist/lib/Target/X86/X86TargetMachine.h
vendor/llvm/dist/lib/Target/XCore/XCoreISelLowering.cpp
vendor/llvm/dist/lib/Target/XCore/XCoreInstrInfo.cpp
vendor/llvm/dist/lib/Target/XCore/XCoreInstrInfo.h
vendor/llvm/dist/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
vendor/llvm/dist/lib/Target/XCore/XCoreSelectionDAGInfo.h
vendor/llvm/dist/lib/Target/XCore/XCoreTargetMachine.cpp
vendor/llvm/dist/lib/Target/XCore/XCoreTargetMachine.h
vendor/llvm/dist/lib/Transforms/IPO/DeadArgumentElimination.cpp
vendor/llvm/dist/lib/Transforms/IPO/InlineAlways.cpp
vendor/llvm/dist/lib/Transforms/IPO/InlineSimple.cpp
vendor/llvm/dist/lib/Transforms/IPO/MergeFunctions.cpp
vendor/llvm/dist/lib/Transforms/IPO/StripSymbols.cpp
vendor/llvm/dist/lib/Transforms/InstCombine/InstCombine.h
vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCasts.cpp
vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineWorklist.h
vendor/llvm/dist/lib/Transforms/Scalar/CMakeLists.txt
vendor/llvm/dist/lib/Transforms/Scalar/GVN.cpp
vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp
vendor/llvm/dist/lib/Transforms/Scalar/SimplifyCFGPass.cpp
vendor/llvm/dist/lib/Transforms/Scalar/SimplifyLibCalls.cpp
vendor/llvm/dist/lib/Transforms/Utils/CloneFunction.cpp
vendor/llvm/dist/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
vendor/llvm/dist/lib/Transforms/Utils/SSAUpdater.cpp
vendor/llvm/dist/lib/VMCore/AsmWriter.cpp
vendor/llvm/dist/lib/VMCore/PassManager.cpp
vendor/llvm/dist/lib/VMCore/ValueTypes.cpp
vendor/llvm/dist/lib/VMCore/Verifier.cpp
vendor/llvm/dist/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
vendor/llvm/dist/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
vendor/llvm/dist/test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
vendor/llvm/dist/test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
vendor/llvm/dist/test/CodeGen/ARM/2009-11-02-NegativeLane.ll
vendor/llvm/dist/test/CodeGen/ARM/arm-frameaddr.ll
vendor/llvm/dist/test/CodeGen/ARM/div.ll
vendor/llvm/dist/test/CodeGen/ARM/fabss.ll
vendor/llvm/dist/test/CodeGen/ARM/fadds.ll
vendor/llvm/dist/test/CodeGen/ARM/fdivs.ll
vendor/llvm/dist/test/CodeGen/ARM/fmacs.ll
vendor/llvm/dist/test/CodeGen/ARM/fmscs.ll
vendor/llvm/dist/test/CodeGen/ARM/fmuls.ll
vendor/llvm/dist/test/CodeGen/ARM/fnmscs.ll
vendor/llvm/dist/test/CodeGen/ARM/mul_const.ll
vendor/llvm/dist/test/CodeGen/ARM/spill-q.ll
vendor/llvm/dist/test/CodeGen/ARM/vcgt.ll
vendor/llvm/dist/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
vendor/llvm/dist/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
vendor/llvm/dist/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
vendor/llvm/dist/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
vendor/llvm/dist/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
vendor/llvm/dist/test/CodeGen/PowerPC/cr_spilling.ll
vendor/llvm/dist/test/CodeGen/SystemZ/2009-07-10-BadIncomingArgOffset.ll
vendor/llvm/dist/test/CodeGen/Thumb/2010-01-15-local-alloc-spill-physical.ll
vendor/llvm/dist/test/CodeGen/Thumb2/machine-licm.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-pack.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-rev.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-shifter.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-smla.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-smul.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-spill-q.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-sxt_rot.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-uxt_rot.ll
vendor/llvm/dist/test/CodeGen/Thumb2/thumb2-uxtb.ll
vendor/llvm/dist/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
vendor/llvm/dist/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
vendor/llvm/dist/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
vendor/llvm/dist/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
vendor/llvm/dist/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
vendor/llvm/dist/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
vendor/llvm/dist/test/CodeGen/X86/2009-01-29-LocalRegAllocBug.ll
vendor/llvm/dist/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
vendor/llvm/dist/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
vendor/llvm/dist/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
vendor/llvm/dist/test/CodeGen/X86/2009-08-08-CastError.ll
vendor/llvm/dist/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
vendor/llvm/dist/test/CodeGen/X86/call-imm.ll
vendor/llvm/dist/test/CodeGen/X86/fast-cc-callee-pops.ll
vendor/llvm/dist/test/CodeGen/X86/fast-cc-pass-in-regs.ll
vendor/llvm/dist/test/CodeGen/X86/fp-stack-O0-crash.ll
vendor/llvm/dist/test/CodeGen/X86/liveness-local-regalloc.ll
vendor/llvm/dist/test/CodeGen/X86/lsr-delayed-fold.ll
vendor/llvm/dist/test/CodeGen/X86/sse-align-11.ll
vendor/llvm/dist/test/FrontendC/2007-04-11-InlineStorageClassC89.c
vendor/llvm/dist/test/FrontendC/2007-04-11-InlineStorageClassC99.c
vendor/llvm/dist/test/MC/AsmParser/X86/x86_32-bit_cat.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_32-encoding.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_32-new-encoder.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_64-encoding.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_64-new-encoder.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_64-suffix-matching.s
vendor/llvm/dist/test/MC/AsmParser/X86/x86_instructions.s
vendor/llvm/dist/test/MC/AsmParser/assignment.s
vendor/llvm/dist/test/MC/AsmParser/directive_zerofill.s
vendor/llvm/dist/test/MC/Disassembler/simple-tests.txt
vendor/llvm/dist/test/MC/MachO/darwin-x86_64-reloc.s
vendor/llvm/dist/test/MC/MachO/reloc.s
vendor/llvm/dist/test/MC/MachO/symbol-flags.s
vendor/llvm/dist/test/MC/MachO/x86_32-optimal_nop.s
vendor/llvm/dist/test/Other/lint.ll
vendor/llvm/dist/test/Transforms/InstCombine/cast.ll
vendor/llvm/dist/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
vendor/llvm/dist/test/Transforms/SimplifyCFG/trapping-load-unreachable.ll
vendor/llvm/dist/test/Transforms/SimplifyLibCalls/memcmp.ll
vendor/llvm/dist/tools/bugpoint/ExecutionDriver.cpp
vendor/llvm/dist/tools/bugpoint/Miscompilation.cpp
vendor/llvm/dist/tools/bugpoint/ToolRunner.cpp
vendor/llvm/dist/tools/bugpoint/ToolRunner.h
vendor/llvm/dist/tools/edis/EDInst.cpp
vendor/llvm/dist/tools/gold/Makefile
vendor/llvm/dist/tools/gold/gold-plugin.cpp
vendor/llvm/dist/tools/llc/llc.cpp
vendor/llvm/dist/tools/llvm-ld/llvm-ld.cpp
vendor/llvm/dist/tools/llvm-mc/Disassembler.cpp
vendor/llvm/dist/tools/llvm-mc/llvm-mc.cpp
vendor/llvm/dist/tools/lto/LTOCodeGenerator.cpp
vendor/llvm/dist/tools/lto/LTOModule.cpp
vendor/llvm/dist/tools/opt/opt.cpp
vendor/llvm/dist/unittests/ADT/StringRefTest.cpp
vendor/llvm/dist/utils/TableGen/AsmMatcherEmitter.cpp
vendor/llvm/dist/utils/TableGen/CMakeLists.txt
vendor/llvm/dist/utils/TableGen/ClangDiagnosticsEmitter.cpp
vendor/llvm/dist/utils/TableGen/CodeGenDAGPatterns.cpp
vendor/llvm/dist/utils/TableGen/CodeGenRegisters.h
vendor/llvm/dist/utils/TableGen/CodeGenTarget.cpp
vendor/llvm/dist/utils/TableGen/CodeGenTarget.h
vendor/llvm/dist/utils/TableGen/DAGISelMatcherGen.cpp
vendor/llvm/dist/utils/TableGen/EDEmitter.cpp
vendor/llvm/dist/utils/TableGen/FastISelEmitter.cpp
vendor/llvm/dist/utils/TableGen/IntrinsicEmitter.cpp
vendor/llvm/dist/utils/TableGen/IntrinsicEmitter.h
vendor/llvm/dist/utils/TableGen/Makefile
vendor/llvm/dist/utils/TableGen/Record.h
vendor/llvm/dist/utils/TableGen/RegisterInfoEmitter.cpp
vendor/llvm/dist/utils/TableGen/TableGen.cpp
vendor/llvm/dist/utils/TableGen/X86RecognizableInstr.cpp
vendor/llvm/dist/utils/buildit/GNUmakefile
vendor/llvm/dist/utils/buildit/build_llvm
vendor/llvm/dist/utils/lit/lit/LitConfig.py
vendor/llvm/dist/utils/lit/lit/ShUtil.py
vendor/llvm/dist/utils/lit/lit/TestFormats.py
vendor/llvm/dist/utils/lit/lit/lit.py
Modified: vendor/llvm/dist/Makefile.config.in
==============================================================================
--- vendor/llvm/dist/Makefile.config.in Thu May 27 13:56:53 2010 (r208598)
+++ vendor/llvm/dist/Makefile.config.in Thu May 27 15:15:58 2010 (r208599)
@@ -156,6 +156,7 @@ TAR := @TAR@
# Paths to miscellaneous programs we hope are present but might not be
PERL := @PERL@
BZIP2 := @BZIP2@
+CAT := @CAT@
DOT := @DOT@
DOXYGEN := @DOXYGEN@
GROFF := @GROFF@
@@ -167,6 +168,7 @@ OCAMLDOC := @OCAMLDOC@
GAS := @GAS@
POD2HTML := @POD2HTML@
POD2MAN := @POD2MAN@
+PDFROFF := @PDFROFF@
RUNTEST := @RUNTEST@
TCLSH := @TCLSH@
ZIP := @ZIP@
@@ -268,6 +270,9 @@ ENABLE_SHARED := @ENABLE_SHARED@
# Use -fvisibility-inlines-hidden?
ENABLE_VISIBILITY_INLINES_HIDDEN := @ENABLE_VISIBILITY_INLINES_HIDDEN@
+# Do we want to allow timestamping information into builds?
+ENABLE_TIMESTAMPS := @ENABLE_TIMESTAMPS@
+
# This option tells the Makefiles to produce verbose output.
# It essentially prints the commands that make is executing
#VERBOSE = 1
Modified: vendor/llvm/dist/Makefile.rules
==============================================================================
--- vendor/llvm/dist/Makefile.rules Thu May 27 13:56:53 2010 (r208598)
+++ vendor/llvm/dist/Makefile.rules Thu May 27 15:15:58 2010 (r208599)
@@ -447,6 +447,14 @@ else
endif
endif
+# Support makefile variable to disable any kind of timestamp/non-deterministic
+# info from being used in the build.
+ifeq ($(ENABLE_TIMESTAMPS),1)
+ DOTDIR_TIMESTAMP_COMMAND := $(DATE)
+else
+ DOTDIR_TIMESTAMP_COMMAND := echo 'Created.'
+endif
+
ifeq ($(HOST_OS),MingW)
# Work around PR4957
CPP.Defines += -D__NO_CTYPE_INLINE
@@ -581,10 +589,14 @@ ifeq ($(TARGET_OS),Darwin)
endif
ifdef SHARED_LIBRARY
+ifneq ($(HOST_OS),Darwin)
+ LD.Flags += $(RPATH) -Wl,'$$ORIGIN'
+else
ifneq ($(DARWIN_MAJVERS),4)
LD.Flags += $(RPATH) -Wl,$(LibDir)
endif
endif
+endif
ifdef TOOL_VERBOSE
C.Flags += -v
@@ -779,7 +791,7 @@ $(DESTDIR)$(PROJ_bindir) $(DESTDIR)$(PRO
# To create other directories, as needed, and timestamp their creation
%/.dir:
$(Verb) $(MKDIR) $* > /dev/null
- $(Verb) $(DATE) > $@
+ $(Verb) $(DOTDIR_TIMESTAMP_COMMAND) > $@
.PRECIOUS: $(ObjDir)/.dir $(LibDir)/.dir $(ToolDir)/.dir $(ExmplDir)/.dir
.PRECIOUS: $(LLVMLibDir)/.dir $(LLVMToolDir)/.dir $(LLVMExmplDir)/.dir
@@ -1116,7 +1128,12 @@ install-local::
uninstall-local::
$(Echo) Uninstall circumvented with NO_INSTALL
else
+
+ifdef LOADABLE_MODULE
+DestSharedLib = $(DESTDIR)$(PROJ_libdir)/$(LIBRARYNAME)$(SHLIBEXT)
+else
DestSharedLib = $(DESTDIR)$(PROJ_libdir)/lib$(LIBRARYNAME)$(SHLIBEXT)
+endif
install-local:: $(DestSharedLib)
Modified: vendor/llvm/dist/autoconf/configure.ac
==============================================================================
--- vendor/llvm/dist/autoconf/configure.ac Thu May 27 13:56:53 2010 (r208598)
+++ vendor/llvm/dist/autoconf/configure.ac Thu May 27 15:15:58 2010 (r208599)
@@ -525,6 +525,20 @@ case "$enableval" in
*) AC_MSG_ERROR([Invalid setting for --enable-shared. Use "yes" or "no"]) ;;
esac
+dnl Enable embedding timestamp information into build.
+AC_ARG_ENABLE(timestamps,
+ AS_HELP_STRING([--enable-timestamps],
+ [Enable embedding timestamp information in build (default is YES)]),,
+ enableval=default)
+case "$enableval" in
+ yes) AC_SUBST(ENABLE_TIMESTAMPS,[1]) ;;
+ no) AC_SUBST(ENABLE_TIMESTAMPS,[0]) ;;
+ default) AC_SUBST(ENABLE_TIMESTAMPS,[1]) ;;
+ *) AC_MSG_ERROR([Invalid setting for --enable-timestamps. Use "yes" or "no"]) ;;
+esac
+AC_DEFINE_UNQUOTED([ENABLE_TIMESTAMPS],$ENABLE_TIMESTAMPS,
+ [Define if timestamp information (e.g., __DATE___) is allowed])
+
dnl Allow specific targets to be specified for building (or not)
TARGETS_TO_BUILD=""
AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets],
@@ -1003,11 +1017,13 @@ dnl are not found then they are set to "
dnl nothing. This just lets the build output show that we could have done
dnl something if the tool was available.
AC_PATH_PROG(BZIP2, [bzip2])
+AC_PATH_PROG(CAT, [cat])
AC_PATH_PROG(DOXYGEN, [doxygen])
AC_PATH_PROG(GROFF, [groff])
AC_PATH_PROG(GZIP, [gzip])
AC_PATH_PROG(POD2HTML, [pod2html])
AC_PATH_PROG(POD2MAN, [pod2man])
+AC_PATH_PROG(PDFROFF, [pdfroff])
AC_PATH_PROG(RUNTEST, [runtest])
DJ_AC_PATH_TCLSH
AC_PATH_PROG(ZIP, [zip])
@@ -1543,9 +1559,6 @@ AC_CONFIG_FILES([Makefile.config])
dnl Configure the RPM spec file for LLVM
AC_CONFIG_FILES([llvm.spec])
-dnl Configure doxygen's configuration file
-AC_CONFIG_FILES([docs/doxygen.cfg])
-
dnl Configure llvmc's Base plugin
AC_CONFIG_FILES([tools/llvmc/plugins/Base/Base.td])
Modified: vendor/llvm/dist/configure
==============================================================================
--- vendor/llvm/dist/configure Thu May 27 13:56:53 2010 (r208598)
+++ vendor/llvm/dist/configure Thu May 27 15:15:58 2010 (r208599)
@@ -690,6 +690,7 @@ ENABLE_DOXYGEN
ENABLE_THREADS
ENABLE_PIC
ENABLE_SHARED
+ENABLE_TIMESTAMPS
TARGETS_TO_BUILD
LLVM_ENUM_TARGETS
LLVM_ENUM_ASM_PRINTERS
@@ -736,11 +737,13 @@ INSTALL_PROGRAM
INSTALL_SCRIPT
INSTALL_DATA
BZIP2
+CAT
DOXYGEN
GROFF
GZIP
POD2HTML
POD2MAN
+PDFROFF
RUNTEST
TCLSH
ZIP
@@ -1408,6 +1411,8 @@ Optional Features:
is YES)
--enable-shared Build a shared library and link tools against it
(default is NO)
+ --enable-timestamps Enable embedding timestamp information in build
+ (default is YES)
--enable-targets Build specific host targets: all or
target1,target2,... Valid targets are: host, x86,
x86_64, sparc, powerpc, alpha, arm, mips, spu,
@@ -4921,6 +4926,30 @@ echo "$as_me: error: Invalid setting for
{ (exit 1); exit 1; }; } ;;
esac
+# Check whether --enable-timestamps was given.
+if test "${enable_timestamps+set}" = set; then
+ enableval=$enable_timestamps;
+else
+ enableval=default
+fi
+
+case "$enableval" in
+ yes) ENABLE_TIMESTAMPS=1
+ ;;
+ no) ENABLE_TIMESTAMPS=0
+ ;;
+ default) ENABLE_TIMESTAMPS=1
+ ;;
+ *) { { echo "$as_me:$LINENO: error: Invalid setting for --enable-timestamps. Use \"yes\" or \"no\"" >&5
+echo "$as_me: error: Invalid setting for --enable-timestamps. Use \"yes\" or \"no\"" >&2;}
+ { (exit 1); exit 1; }; } ;;
+esac
+
+cat >>confdefs.h <<_ACEOF
+#define ENABLE_TIMESTAMPS $ENABLE_TIMESTAMPS
+_ACEOF
+
+
TARGETS_TO_BUILD=""
# Check whether --enable-targets was given.
if test "${enable_targets+set}" = set; then
@@ -8016,6 +8045,46 @@ echo "${ECHO_T}no" >&6; }
fi
+# Extract the first word of "cat", so it can be a program name with args.
+set dummy cat; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_path_CAT+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ case $CAT in
+ [\\/]* | ?:[\\/]*)
+ ac_cv_path_CAT="$CAT" # Let the user override the test with a path.
+ ;;
+ *)
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_path_CAT="$as_dir/$ac_word$ac_exec_ext"
+ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+done
+IFS=$as_save_IFS
+
+ ;;
+esac
+fi
+CAT=$ac_cv_path_CAT
+if test -n "$CAT"; then
+ { echo "$as_me:$LINENO: result: $CAT" >&5
+echo "${ECHO_T}$CAT" >&6; }
+else
+ { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
# Extract the first word of "doxygen", so it can be a program name with args.
set dummy doxygen; ac_word=$2
{ echo "$as_me:$LINENO: checking for $ac_word" >&5
@@ -8216,6 +8285,46 @@ echo "${ECHO_T}no" >&6; }
fi
+# Extract the first word of "pdfroff", so it can be a program name with args.
+set dummy pdfroff; ac_word=$2
+{ echo "$as_me:$LINENO: checking for $ac_word" >&5
+echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; }
+if test "${ac_cv_path_PDFROFF+set}" = set; then
+ echo $ECHO_N "(cached) $ECHO_C" >&6
+else
+ case $PDFROFF in
+ [\\/]* | ?:[\\/]*)
+ ac_cv_path_PDFROFF="$PDFROFF" # Let the user override the test with a path.
+ ;;
+ *)
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+for as_dir in $PATH
+do
+ IFS=$as_save_IFS
+ test -z "$as_dir" && as_dir=.
+ for ac_exec_ext in '' $ac_executable_extensions; do
+ if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_executable_p "$as_dir/$ac_word$ac_exec_ext"; }; then
+ ac_cv_path_PDFROFF="$as_dir/$ac_word$ac_exec_ext"
+ echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5
+ break 2
+ fi
+done
+done
+IFS=$as_save_IFS
+
+ ;;
+esac
+fi
+PDFROFF=$ac_cv_path_PDFROFF
+if test -n "$PDFROFF"; then
+ { echo "$as_me:$LINENO: result: $PDFROFF" >&5
+echo "${ECHO_T}$PDFROFF" >&6; }
+else
+ { echo "$as_me:$LINENO: result: no" >&5
+echo "${ECHO_T}no" >&6; }
+fi
+
+
# Extract the first word of "runtest", so it can be a program name with args.
set dummy runtest; ac_word=$2
{ echo "$as_me:$LINENO: checking for $ac_word" >&5
@@ -11275,7 +11384,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <conf$$subs.sed <<_ACEOF
+ENABLE_BUILT_CLANG!$ENABLE_BUILT_CLANG$ac_delim
OPTIMIZE_OPTION!$OPTIMIZE_OPTION$ac_delim
EXTRA_OPTIONS!$EXTRA_OPTIONS$ac_delim
BINUTILS_INCDIR!$BINUTILS_INCDIR$ac_delim
@@ -21176,11 +21282,13 @@ INSTALL_PROGRAM!$INSTALL_PROGRAM$ac_deli
INSTALL_SCRIPT!$INSTALL_SCRIPT$ac_delim
INSTALL_DATA!$INSTALL_DATA$ac_delim
BZIP2!$BZIP2$ac_delim
+CAT!$CAT$ac_delim
DOXYGEN!$DOXYGEN$ac_delim
GROFF!$GROFF$ac_delim
GZIP!$GZIP$ac_delim
POD2HTML!$POD2HTML$ac_delim
POD2MAN!$POD2MAN$ac_delim
+PDFROFF!$PDFROFF$ac_delim
RUNTEST!$RUNTEST$ac_delim
TCLSH!$TCLSH$ac_delim
ZIP!$ZIP$ac_delim
@@ -21233,7 +21341,7 @@ LIBOBJS!$LIBOBJS$ac_delim
LTLIBOBJS!$LTLIBOBJS$ac_delim
_ACEOF
- if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 92; then
+ if test `sed -n "s/.*$ac_delim\$/X/p" conf$$subs.sed | grep -c X` = 95; then
break
elif $ac_last_try; then
{ { echo "$as_me:$LINENO: error: could not make $CONFIG_STATUS" >&5
Modified: vendor/llvm/dist/docs/AliasAnalysis.html
==============================================================================
--- vendor/llvm/dist/docs/AliasAnalysis.html Thu May 27 13:56:53 2010 (r208598)
+++ vendor/llvm/dist/docs/AliasAnalysis.html Thu May 27 15:15:58 2010 (r208599)
@@ -930,7 +930,7 @@ analysis directly.
Chris Lattner
LLVM Compiler Infrastructure
- Last modified: $Date: 2010-03-01 20:24:17 +0100 (Mon, 01 Mar 2010) $
+ Last modified: $Date: 2010-05-07 02:28:04 +0200 (Fri, 07 May 2010) $