From owner-svn-src-projects@FreeBSD.ORG Sun Feb 5 00:31:08 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0C90D106566C; Sun, 5 Feb 2012 00:31:08 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id D17F48FC0C; Sun, 5 Feb 2012 00:31:07 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q150V73d058587; Sun, 5 Feb 2012 00:31:07 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q150V7tJ058584; Sun, 5 Feb 2012 00:31:07 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201202050031.q150V7tJ058584@svn.freebsd.org> From: Nathan Whitehorn Date: Sun, 5 Feb 2012 00:31:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231002 - in projects/pseries: dev/ofw powerpc/ofw X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2012 00:31:08 -0000 Author: nwhitehorn Date: Sun Feb 5 00:31:07 2012 New Revision: 231002 URL: http://svn.freebsd.org/changeset/base/231002 Log: Choose to use a OF_xref_phandle() differently: for interrupt parents, use whatever is in the firmware tree for cross-referencing, and store the PIC id as the xref phandle (as we already do in xics). Modified: projects/pseries/dev/ofw/ofw_bus_subr.c projects/pseries/powerpc/ofw/ofw_pcibus.c Modified: projects/pseries/dev/ofw/ofw_bus_subr.c ============================================================================== --- projects/pseries/dev/ofw/ofw_bus_subr.c Sat Feb 4 23:29:07 2012 (r231001) +++ projects/pseries/dev/ofw/ofw_bus_subr.c Sun Feb 5 00:31:07 2012 (r231002) @@ -285,8 +285,7 @@ ofw_bus_search_intrmap(void *intr, int i i = imapsz; while (i > 0) { bcopy(mptr + physsz + intrsz, &parent, sizeof(parent)); - parent = OF_xref_phandle(parent); - if (OF_searchprop(parent, "#interrupt-cells", + if (OF_searchprop(OF_xref_phandle(parent), "#interrupt-cells", &pintrsz, sizeof(pintrsz)) == -1) pintrsz = 1; /* default */ pintrsz *= sizeof(pcell_t); Modified: projects/pseries/powerpc/ofw/ofw_pcibus.c ============================================================================== --- projects/pseries/powerpc/ofw/ofw_pcibus.c Sat Feb 4 23:29:07 2012 (r231001) +++ projects/pseries/powerpc/ofw/ofw_pcibus.c Sun Feb 5 00:31:07 2012 (r231002) @@ -213,11 +213,10 @@ ofw_pcibus_enum_devtree(device_t dev, u_ icells = 1; OF_getprop(child, "interrupt-parent", &iparent, sizeof(iparent)); - iparent = OF_xref_phandle(iparent); - if (iparent != 0) { - OF_getprop(iparent, "#interrupt-cells", - &icells, sizeof(icells)); + OF_getprop(OF_xref_phandle(iparent), + "#interrupt-cells", &icells, + sizeof(icells)); intr[0] = MAP_IRQ(iparent, intr[0]); } @@ -346,8 +345,6 @@ ofw_pcibus_assign_interrupt(device_t dev iparent = -1; if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) < 0) iparent = -1; - else - iparent = OF_xref_phandle(iparent); /* * Any AAPL,interrupts property gets priority and is From owner-svn-src-projects@FreeBSD.ORG Sun Feb 5 01:57:31 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D18AF106564A; Sun, 5 Feb 2012 01:57:31 +0000 (UTC) (envelope-from rmacklem@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id BBF528FC14; Sun, 5 Feb 2012 01:57:31 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q151vVHd061258; Sun, 5 Feb 2012 01:57:31 GMT (envelope-from rmacklem@svn.freebsd.org) Received: (from rmacklem@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q151vVqm061253; Sun, 5 Feb 2012 01:57:31 GMT (envelope-from rmacklem@svn.freebsd.org) Message-Id: <201202050157.q151vVqm061253@svn.freebsd.org> From: Rick Macklem Date: Sun, 5 Feb 2012 01:57:31 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231004 - in projects/nfsv4.1-client/sys/fs: nfs nfsclient X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2012 01:57:32 -0000 Author: rmacklem Date: Sun Feb 5 01:57:31 2012 New Revision: 231004 URL: http://svn.freebsd.org/changeset/base/231004 Log: Add some fields to the nfsclds structure to store the NFSv4.1 write verifier for the DS. Also, initialize and destroy the mutex that is added. Modified: projects/nfsv4.1-client/sys/fs/nfs/nfsclstate.h projects/nfsv4.1-client/sys/fs/nfs/nfsport.h projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Modified: projects/nfsv4.1-client/sys/fs/nfs/nfsclstate.h ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfs/nfsclstate.h Sun Feb 5 00:51:59 2012 (r231003) +++ projects/nfsv4.1-client/sys/fs/nfs/nfsclstate.h Sun Feb 5 01:57:31 2012 (r231004) @@ -73,8 +73,11 @@ struct nfsclsession { * This structure holds the information used to access a Data Server (DS). */ struct nfsclds { + struct mtx nfsclds_mtx; struct nfssockreq nfsclds_sock; struct nfsclsession nfsclds_sess; + int nfsclds_haswriteverf; + uint8_t nfsclds_verf[NFSX_VERF]; }; struct nfsclclient { Modified: projects/nfsv4.1-client/sys/fs/nfs/nfsport.h ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfs/nfsport.h Sun Feb 5 00:51:59 2012 (r231003) +++ projects/nfsv4.1-client/sys/fs/nfs/nfsport.h Sun Feb 5 01:57:31 2012 (r231004) @@ -645,6 +645,8 @@ void nfsrvd_rcv(struct socket *, void *, #define NFSPROCLISTUNLOCK() sx_sunlock(&allproc_lock) #define NFSLOCKSOCKREQ(r) mtx_lock(&((r)->nr_mtx)) #define NFSUNLOCKSOCKREQ(r) mtx_unlock(&((r)->nr_mtx)) +#define NFSLOCKDS(d) mtx_lock(&((d)->nfsclds_mtx)) +#define NFSUNLOCKDS(d) mtx_unlock(&((d)->nfsclds_mtx)) /* * Use these macros to initialize/free a mutex. Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Sun Feb 5 00:51:59 2012 (r231003) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Sun Feb 5 01:57:31 2012 (r231004) @@ -5025,6 +5025,7 @@ nfsrpc_fillsa(struct nfsmount *nmp, stru dsp->nfsclds_sock.nr_nam = (struct sockaddr *)sad6; } else return (EPERM); + mtx_init(&dsp->nfsclds_mtx, "nfsds", NULL, MTX_DEF); dsp->nfsclds_sock.nr_sotype = SOCK_STREAM; mtx_init(&dsp->nfsclds_sock.nr_mtx, "nfssock", NULL, MTX_DEF); dsp->nfsclds_sock.nr_prog = NFS_PROG; @@ -5051,6 +5052,7 @@ nfsrpc_fillsa(struct nfsmount *nmp, stru } if (error != 0) { NFSFREECRED(dsp->nfsclds_sock.nr_cred); + NFSFREEMUTEX(&dsp->nfsclds_mtx); NFSFREEMUTEX(&dsp->nfsclds_sock.nr_mtx); free(dsp->nfsclds_sock.nr_nam, M_SONAME); NFSBZERO(dsp, sizeof(*dsp)); Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Sun Feb 5 00:51:59 2012 (r231003) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Sun Feb 5 01:57:31 2012 (r231004) @@ -4645,6 +4645,7 @@ nfscl_freedevinfo(struct nfscldevinfo *d if (dsp->nfsclds_sock.nr_nam != NULL) { /* All are set or none are. */ NFSFREECRED(dsp->nfsclds_sock.nr_cred); + NFSFREEMUTEX(&dsp->nfsclds_mtx); NFSFREEMUTEX(&dsp->nfsclds_sock.nr_mtx); free(dsp->nfsclds_sock.nr_nam, M_SONAME); } From owner-svn-src-projects@FreeBSD.ORG Sun Feb 5 03:23:27 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0A790106566B; Sun, 5 Feb 2012 03:23:27 +0000 (UTC) (envelope-from rmacklem@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E20728FC17; Sun, 5 Feb 2012 03:23:26 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q153NQ2i064295; Sun, 5 Feb 2012 03:23:26 GMT (envelope-from rmacklem@svn.freebsd.org) Received: (from rmacklem@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q153NQtu064291; Sun, 5 Feb 2012 03:23:26 GMT (envelope-from rmacklem@svn.freebsd.org) Message-Id: <201202050323.q153NQtu064291@svn.freebsd.org> From: Rick Macklem Date: Sun, 5 Feb 2012 03:23:26 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231005 - in projects/nfsv4.1-client/sys/fs: nfs nfsclient X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2012 03:23:27 -0000 Author: rmacklem Date: Sun Feb 5 03:23:26 2012 New Revision: 231005 URL: http://svn.freebsd.org/changeset/base/231005 Log: Add an argument to nfscl_getstateid() to indicate it if it is being called to get a stateid for an I/O operation to be done on a DS. This is necessary, since the rules for what kind of stateid that can be used is different for a DS than against an MDS/non-MDS NFSv4 server. Modified: projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Modified: projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h Sun Feb 5 01:57:31 2012 (r231004) +++ projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h Sun Feb 5 03:23:26 2012 (r231005) @@ -460,7 +460,7 @@ int nfsrpc_reclaimcomplete(struct nfsmou int nfscl_open(vnode_t, u_int8_t *, int, u_int32_t, int, struct ucred *, NFSPROC_T *, struct nfsclowner **, struct nfsclopen **, int *, int *, int); -int nfscl_getstateid(vnode_t, u_int8_t *, int, u_int32_t, struct ucred *, +int nfscl_getstateid(vnode_t, u_int8_t *, int, u_int32_t, int, struct ucred *, NFSPROC_T *, nfsv4stateid_t *, void **); void nfscl_ownerrelease(struct nfsclowner *, int, int, int); void nfscl_openrelease(struct nfsclopen *, int, int); Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Sun Feb 5 01:57:31 2012 (r231004) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Sun Feb 5 03:23:26 2012 (r231005) @@ -1026,7 +1026,7 @@ nfsrpc_setattr(vnode_t vp, struct vattr if (NFSHASNFSV4(nmp)) { nfhp = VTONFS(vp)->n_fhp; error = nfscl_getstateid(vp, nfhp->nfh_fh, - nfhp->nfh_len, mode, cred, p, &stateid, &lckp); + nfhp->nfh_len, mode, 0, cred, p, &stateid, &lckp); if (error && vnode_vtype(vp) == VREG && (mode == NFSV4OPEN_ACCESSWRITE || nfstest_openallsetattr)) { @@ -1043,7 +1043,7 @@ nfsrpc_setattr(vnode_t vp, struct vattr if (!openerr) (void) nfscl_getstateid(vp, nfhp->nfh_fh, nfhp->nfh_len, - mode, cred, p, &stateid, &lckp); + mode, 0, cred, p, &stateid, &lckp); } } if (vap != NULL) @@ -1296,7 +1296,8 @@ nfsrpc_read(vnode_t vp, struct uio *uiop lckp = NULL; if (NFSHASNFSV4(nmp)) (void)nfscl_getstateid(vp, nfhp->nfh_fh, nfhp->nfh_len, - NFSV4OPEN_ACCESSREAD, newcred, p, &stateid, &lckp); + NFSV4OPEN_ACCESSREAD, 0, newcred, p, &stateid, + &lckp); error = nfsrpc_readrpc(vp, uiop, newcred, &stateid, p, nap, attrflagp, stuff); if (error == NFSERR_STALESTATEID || error == NFSERR_BADSESSION) @@ -1450,7 +1451,8 @@ nfsrpc_write(vnode_t vp, struct uio *uio nostateid = 0; if (NFSHASNFSV4(nmp)) { (void)nfscl_getstateid(vp, nfhp->nfh_fh, nfhp->nfh_len, - NFSV4OPEN_ACCESSWRITE, newcred, p, &stateid, &lckp); + NFSV4OPEN_ACCESSWRITE, 0, newcred, p, &stateid, + &lckp); if (stateid.other[0] == 0 && stateid.other[1] == 0 && stateid.other[2] == 0) { nostateid = 1; Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Sun Feb 5 01:57:31 2012 (r231004) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Sun Feb 5 03:23:26 2012 (r231005) @@ -461,7 +461,7 @@ nfscl_finddeleg(struct nfsclclient *clp, */ APPLESTATIC int nfscl_getstateid(vnode_t vp, u_int8_t *nfhp, int fhlen, u_int32_t mode, - struct ucred *cred, NFSPROC_T *p, nfsv4stateid_t *stateidp, + int fords, struct ucred *cred, NFSPROC_T *p, nfsv4stateid_t *stateidp, void **lckpp) { struct nfsclclient *clp; @@ -476,11 +476,14 @@ nfscl_getstateid(vnode_t vp, u_int8_t *n *lckpp = NULL; /* * Initially, just set the special stateid of all zeros. + * (Don't do this for a DS, since the special stateid can't be used.) */ - stateidp->seqid = 0; - stateidp->other[0] = 0; - stateidp->other[1] = 0; - stateidp->other[2] = 0; + if (fords == 0) { + stateidp->seqid = 0; + stateidp->other[0] = 0; + stateidp->other[1] = 0; + stateidp->other[2] = 0; + } if (vnode_vtype(vp) != VREG) return (EISDIR); np = VTONFS(vp); @@ -536,7 +539,8 @@ nfscl_getstateid(vnode_t vp, u_int8_t *n lp = NULL; error = nfscl_getopen(&clp->nfsc_owner, nfhp, fhlen, own, own, mode, &lp, &op); - if (error == 0 && lp != NULL) { + if (error == 0 && lp != NULL && fords == 0) { + /* Don't return a lock stateid for a DS. */ stateidp->seqid = lp->nfsl_stateid.seqid; stateidp->other[0] = From owner-svn-src-projects@FreeBSD.ORG Sun Feb 5 07:11:03 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 19C24106564A; Sun, 5 Feb 2012 07:11:03 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 08AB48FC08; Sun, 5 Feb 2012 07:11:03 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q157B2B0071382; Sun, 5 Feb 2012 07:11:02 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q157B2J5071379; Sun, 5 Feb 2012 07:11:02 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202050711.q157B2J5071379@svn.freebsd.org> From: Andrew Turner Date: Sun, 5 Feb 2012 07:11:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231007 - projects/arm_eabi/contrib/compiler-rt/lib X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2012 07:11:03 -0000 Author: andrew Date: Sun Feb 5 07:11:02 2012 New Revision: 231007 URL: http://svn.freebsd.org/changeset/base/231007 Log: Implement __aeabi_lcmp and __aeabi_ulcmp Modified: projects/arm_eabi/contrib/compiler-rt/lib/cmpdi2.c projects/arm_eabi/contrib/compiler-rt/lib/ucmpdi2.c Modified: projects/arm_eabi/contrib/compiler-rt/lib/cmpdi2.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/cmpdi2.c Sun Feb 5 04:49:31 2012 (r231006) +++ projects/arm_eabi/contrib/compiler-rt/lib/cmpdi2.c Sun Feb 5 07:11:02 2012 (r231007) @@ -37,3 +37,13 @@ __cmpdi2(di_int a, di_int b) return 2; return 1; } + +#ifdef __ARM_EABI__ +/* Returns (-1, 0, 1) for (<, ==, >) */ +COMPILER_RT_ABI si_int +__aeabi_lcmp(di_int a, di_int b) +{ + return __cmpdi2(a, b) - 1; +} +#endif + Modified: projects/arm_eabi/contrib/compiler-rt/lib/ucmpdi2.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/ucmpdi2.c Sun Feb 5 04:49:31 2012 (r231006) +++ projects/arm_eabi/contrib/compiler-rt/lib/ucmpdi2.c Sun Feb 5 07:11:02 2012 (r231007) @@ -37,3 +37,13 @@ __ucmpdi2(du_int a, du_int b) return 2; return 1; } + +#ifdef __ARM_EABI__ +/* Returns (-1, 0, 1) for (<, ==, >) */ +COMPILER_RT_ABI si_int +__aeabi_ulcmp(di_int a, di_int b) +{ + return __ucmpdi2(a, b) - 1; +} +#endif + From owner-svn-src-projects@FreeBSD.ORG Sun Feb 5 07:19:01 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3FA8A106566C; Sun, 5 Feb 2012 07:19:01 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 2CE768FC0A; Sun, 5 Feb 2012 07:19:01 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q157J1OV071642; Sun, 5 Feb 2012 07:19:01 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q157J1kl071635; Sun, 5 Feb 2012 07:19:01 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202050719.q157J1kl071635@svn.freebsd.org> From: Andrew Turner Date: Sun, 5 Feb 2012 07:19:01 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231008 - in projects/arm_eabi: contrib/compiler-rt/lib contrib/compiler-rt/lib/arm lib/libcompiler_rt X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2012 07:19:01 -0000 Author: andrew Date: Sun Feb 5 07:19:00 2012 New Revision: 231008 URL: http://svn.freebsd.org/changeset/base/231008 Log: Bring in the __aeabi_*divmod functions from compiler-rt r149242 Added: projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_idivmod.S projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_ldivmod.S projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uidivmod.S projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uldivmod.S Modified: projects/arm_eabi/contrib/compiler-rt/lib/divmoddi4.c projects/arm_eabi/contrib/compiler-rt/lib/udivmoddi4.c projects/arm_eabi/lib/libcompiler_rt/Makefile Added: projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_idivmod.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_idivmod.S Sun Feb 5 07:19:00 2012 (r231008) @@ -0,0 +1,27 @@ +//===-- aeabi_idivmod.S - EABI idivmod implementation ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "../assembly.h" + +// struct { int quot, int rem} __aeabi_idivmod(int numerator, int denominator) { +// int rem, quot; +// quot = __divmodsi4(numerator, denominator, &rem); +// return {quot, rem}; +// } + + .syntax unified + .align 2 +DEFINE_COMPILERRT_FUNCTION(__aeabi_idivmod) + push { lr } + sub sp, sp, #4 + mov r2, sp + bl SYMBOL_NAME(__divmodsi4) + ldr r1, [sp] + add sp, sp, #4 + pop { pc } Added: projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_ldivmod.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_ldivmod.S Sun Feb 5 07:19:00 2012 (r231008) @@ -0,0 +1,30 @@ +//===-- aeabi_ldivmod.S - EABI ldivmod implementation ---------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "../assembly.h" + +// struct { int64_t quot, int64_t rem} +// __aeabi_ldivmod(int64_t numerator, int64_t denominator) { +// int64_t rem, quot; +// quot = __divmoddi4(numerator, denominator, &rem); +// return {quot, rem}; +// } + + .syntax unified + .align 2 +DEFINE_COMPILERRT_FUNCTION(__aeabi_ldivmod) + push {r11, lr} + sub sp, sp, #16 + add r12, sp, #8 + str r12, [sp] + bl SYMBOL_NAME(__divmoddi4) + ldr r2, [sp, #8] + ldr r3, [sp, #12] + add sp, sp, #16 + pop {r11, pc} Added: projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uidivmod.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uidivmod.S Sun Feb 5 07:19:00 2012 (r231008) @@ -0,0 +1,28 @@ +//===-- aeabi_uidivmod.S - EABI uidivmod implementation -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "../assembly.h" + +// struct { unsigned quot, unsigned rem} +// __aeabi_uidivmod(unsigned numerator, unsigned denominator) { +// unsigned rem, quot; +// quot = __udivmodsi4(numerator, denominator, &rem); +// return {quot, rem}; +// } + + .syntax unified + .align 2 +DEFINE_COMPILERRT_FUNCTION(__aeabi_uidivmod) + push { lr } + sub sp, sp, #4 + mov r2, sp + bl SYMBOL_NAME(__udivmodsi4) + ldr r1, [sp] + add sp, sp, #4 + pop { pc } Added: projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uldivmod.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/contrib/compiler-rt/lib/arm/aeabi_uldivmod.S Sun Feb 5 07:19:00 2012 (r231008) @@ -0,0 +1,30 @@ +//===-- aeabi_uldivmod.S - EABI uldivmod implementation -------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "../assembly.h" + +// struct { uint64_t quot, uint64_t rem} +// __aeabi_uldivmod(uint64_t numerator, uint64_t denominator) { +// uint64_t rem, quot; +// quot = __udivmoddi4(numerator, denominator, &rem); +// return {quot, rem}; +// } + + .syntax unified + .align 2 +DEFINE_COMPILERRT_FUNCTION(__aeabi_uldivmod) + push {r11, lr} + sub sp, sp, #16 + add r12, sp, #8 + str r12, [sp] + bl SYMBOL_NAME(__udivmoddi4) + ldr r2, [sp, #8] + ldr r3, [sp, #12] + add sp, sp, #16 + pop {r11, pc} Modified: projects/arm_eabi/contrib/compiler-rt/lib/divmoddi4.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/divmoddi4.c Sun Feb 5 07:11:02 2012 (r231007) +++ projects/arm_eabi/contrib/compiler-rt/lib/divmoddi4.c Sun Feb 5 07:19:00 2012 (r231008) @@ -17,8 +17,6 @@ extern COMPILER_RT_ABI di_int __divdi3(di_int a, di_int b); -ARM_EABI_FNALIAS(ldivmod, divmoddi4); - /* Returns: a / b, *rem = a % b */ COMPILER_RT_ABI di_int Modified: projects/arm_eabi/contrib/compiler-rt/lib/udivmoddi4.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/udivmoddi4.c Sun Feb 5 07:11:02 2012 (r231007) +++ projects/arm_eabi/contrib/compiler-rt/lib/udivmoddi4.c Sun Feb 5 07:19:00 2012 (r231008) @@ -21,8 +21,6 @@ /* Translated from Figure 3-40 of The PowerPC Compiler Writer's Guide */ -ARM_EABI_FNALIAS(uldivmod, udivmoddi4); - COMPILER_RT_ABI du_int __udivmoddi4(du_int a, du_int b, du_int* rem) { Modified: projects/arm_eabi/lib/libcompiler_rt/Makefile ============================================================================== --- projects/arm_eabi/lib/libcompiler_rt/Makefile Sun Feb 5 07:11:02 2012 (r231007) +++ projects/arm_eabi/lib/libcompiler_rt/Makefile Sun Feb 5 07:19:00 2012 (r231008) @@ -152,6 +152,13 @@ SRCS+= ${file}.c . endif .endfor +.if ${MACHINE_CPUARCH} == "arm" +SRCS+= aeabi_idivmod.S \ + aeabi_ldivmod.S \ + aeabi_uidivmod.S \ + aeabi_uldivmod.S +.endif + .if ${MACHINE_CPUARCH} != "sparc64" && ${MACHINE_CPUARCH} != "mips" . if ${MK_INSTALLLIB} != "no" SYMLINKS+=libcompiler_rt.a ${LIBDIR}/libgcc.a From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 04:23:38 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 44A34106567B; Mon, 6 Feb 2012 04:23:38 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 2FB518FC1C; Mon, 6 Feb 2012 04:23:38 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q164NcNI016011; Mon, 6 Feb 2012 04:23:38 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q164Ncjx016009; Mon, 6 Feb 2012 04:23:38 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060423.q164Ncjx016009@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 04:23:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231059 - projects/arm_eabi/contrib/compiler-rt/lib X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 04:23:38 -0000 Author: andrew Date: Mon Feb 6 04:23:37 2012 New Revision: 231059 URL: http://svn.freebsd.org/changeset/base/231059 Log: The pcs attribute will not work with the system GCC as it was introduced in GCC 4.5.0. Don't attempt to use it on previous versions of GCC. Modified: projects/arm_eabi/contrib/compiler-rt/lib/abi.h Modified: projects/arm_eabi/contrib/compiler-rt/lib/abi.h ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/abi.h Mon Feb 6 00:26:29 2012 (r231058) +++ projects/arm_eabi/contrib/compiler-rt/lib/abi.h Mon Feb 6 04:23:37 2012 (r231059) @@ -16,7 +16,14 @@ #if __ARM_EABI__ # define ARM_EABI_FNALIAS(aeabi_name, name) \ void __aeabi_##aeabi_name() __attribute__((alias("__" #name))); + +#if defined(__GNUC__) && (__GNUC__ < 4 || __GNUC__ == 4 && __GNUC_MINOR__ < 5) +/* The pcs attribute was introduced in GCC 4.5.0 */ +# define COMPILER_RT_ABI +#else # define COMPILER_RT_ABI __attribute__((pcs("aapcs"))) +#endif + #else # define ARM_EABI_FNALIAS(aeabi_name, name) # define COMPILER_RT_ABI From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 07:16:13 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C61FF106566B; Mon, 6 Feb 2012 07:16:13 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id B522B8FC13; Mon, 6 Feb 2012 07:16:13 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q167GDi5021585; Mon, 6 Feb 2012 07:16:13 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q167GD1e021583; Mon, 6 Feb 2012 07:16:13 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060716.q167GD1e021583@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 07:16:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231061 - projects/arm_eabi/contrib/compiler-rt/lib X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 07:16:13 -0000 Author: andrew Date: Mon Feb 6 07:16:13 2012 New Revision: 231061 URL: http://svn.freebsd.org/changeset/base/231061 Log: Fix the spelling of f2lz. __aeabi_d2lz was implemented twice, one of them should have been __aeabi_f2lz. Modified: projects/arm_eabi/contrib/compiler-rt/lib/fixsfdi.c Modified: projects/arm_eabi/contrib/compiler-rt/lib/fixsfdi.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/fixsfdi.c Mon Feb 6 06:03:16 2012 (r231060) +++ projects/arm_eabi/contrib/compiler-rt/lib/fixsfdi.c Mon Feb 6 07:16:13 2012 (r231061) @@ -24,7 +24,7 @@ /* seee eeee emmm mmmm mmmm mmmm mmmm mmmm */ -ARM_EABI_FNALIAS(d2lz, fixsfdi); +ARM_EABI_FNALIAS(f2lz, fixsfdi); COMPILER_RT_ABI di_int __fixsfdi(float a) From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 07:18:59 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B67D9106566B; Mon, 6 Feb 2012 07:18:59 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 8B14C8FC13; Mon, 6 Feb 2012 07:18:59 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q167Ixh7021701; Mon, 6 Feb 2012 07:18:59 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q167Ixe9021698; Mon, 6 Feb 2012 07:18:59 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060718.q167Ixe9021698@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 07:18:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231062 - projects/arm_eabi/contrib/compiler-rt/lib X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 07:18:59 -0000 Author: andrew Date: Mon Feb 6 07:18:59 2012 New Revision: 231062 URL: http://svn.freebsd.org/changeset/base/231062 Log: Implement __aeabi_{d,f}cmp* Modified: projects/arm_eabi/contrib/compiler-rt/lib/comparedf2.c projects/arm_eabi/contrib/compiler-rt/lib/comparesf2.c Modified: projects/arm_eabi/contrib/compiler-rt/lib/comparedf2.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/comparedf2.c Mon Feb 6 07:16:13 2012 (r231061) +++ projects/arm_eabi/contrib/compiler-rt/lib/comparedf2.c Mon Feb 6 07:18:59 2012 (r231062) @@ -130,3 +130,31 @@ enum GE_RESULT __gtdf2(fp_t a, fp_t b) { return __gedf2(a, b); } +#ifdef __ARM_EABI__ +// The following are required for the ARM EABI. + +int __aeabi_dcmpeq(fp_t a, fp_t b) { + return __ledf2(a, b) == 0; +} + +int __aeabi_dcmplt(fp_t a, fp_t b) { + return __ledf2(a, b) < 0; +} + +int __aeabi_dcmple(fp_t a, fp_t b) { + return __ledf2(a, b) <= 0; +} + +int __aeabi_dcmpge(fp_t a, fp_t b) { + return __gedf2(a, b) >= 0; +} + +int __aeabi_dcmpgt(fp_t a, fp_t b) { + return __gedf2(a, b) > 0; +} + +int __aeabi_dcmpun(fp_t a, fp_t b) { + return __unorddf2(a, b); +} +#endif + Modified: projects/arm_eabi/contrib/compiler-rt/lib/comparesf2.c ============================================================================== --- projects/arm_eabi/contrib/compiler-rt/lib/comparesf2.c Mon Feb 6 07:16:13 2012 (r231061) +++ projects/arm_eabi/contrib/compiler-rt/lib/comparesf2.c Mon Feb 6 07:18:59 2012 (r231062) @@ -129,3 +129,32 @@ enum LE_RESULT __nesf2(fp_t a, fp_t b) { enum GE_RESULT __gtsf2(fp_t a, fp_t b) { return __gesf2(a, b); } + +#ifdef __ARM_EABI__ +// The following are required for the ARM EABI. + +int __aeabi_fcmpeq(fp_t a, fp_t b) { + return __lesf2(a, b) == 0; +} + +int __aeabi_fcmplt(fp_t a, fp_t b) { + return __lesf2(a, b) < 0; +} + +int __aeabi_fcmple(fp_t a, fp_t b) { + return __lesf2(a, b) <= 0; +} + +int __aeabi_fcmpge(fp_t a, fp_t b) { + return __gesf2(a, b) >= 0; +} + +int __aeabi_fcmpgt(fp_t a, fp_t b) { + return __gesf2(a, b) > 0; +} + +int __aeabi_fcmpun(fp_t a, fp_t b) { + return __unordsf2(a, b); +} +#endif + From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 08:28:45 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0E3DE106566C; Mon, 6 Feb 2012 08:28:45 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id D74998FC0C; Mon, 6 Feb 2012 08:28:44 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q168SiW6023907; Mon, 6 Feb 2012 08:28:44 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q168SiE1023905; Mon, 6 Feb 2012 08:28:44 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060828.q168SiE1023905@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 08:28:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231063 - projects/arm_eabi/gnu/lib/libgcc X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 08:28:45 -0000 Author: andrew Date: Mon Feb 6 08:28:44 2012 New Revision: 231063 URL: http://svn.freebsd.org/changeset/base/231063 Log: Get libgcc_s building on ARM EABI: * Don't build the C version of the floating point functions as there are ARM specific versions. * Only include the required functions in LIB1ASMFUNCS. * Stop compiling bpabi.c as it is unneeded. Modified: projects/arm_eabi/gnu/lib/libgcc/Makefile Modified: projects/arm_eabi/gnu/lib/libgcc/Makefile ============================================================================== --- projects/arm_eabi/gnu/lib/libgcc/Makefile Mon Feb 6 07:18:59 2012 (r231062) +++ projects/arm_eabi/gnu/lib/libgcc/Makefile Mon Feb 6 08:28:44 2012 (r231063) @@ -52,12 +52,13 @@ LIB2FUNCS+= _fixuns${mode}si .endfor # Likewise double-word routines. +.if ${TARGET_CPUARCH} != "arm" +# These are implemented in an ARM specific file but will not be filtered out .for mode in sf df xf tf LIB2FUNCS+= _fix${mode}di _fixuns${mode}di -.if ${TARGET_CPUARCH} != "arm" LIB2FUNCS+= _floatdi${mode} _floatundi${mode} -.endif .endfor +.endif LIB2ADD = $(LIB2FUNCS_EXTRA) LIB2ADD_ST = $(LIB2FUNCS_STATIC_EXTRA) @@ -110,18 +111,10 @@ LIB2_DIVMOD_FUNCS = _divdi3 _moddi3 _udi CFLAGS+= -Dinhibit_libc -fno-inline LIB1ASMSRC = lib1funcs.asm LIB1ASMFUNCS = _dvmd_tls _bb_init_func -LIB1ASMFUNCS+= _udivsi3 _divsi3 _umodsi3 _modsi3\ - _call_via_rX _interwork_call_via_rX \ - _lshrdi3 _ashrdi3 _ashldi3 \ - _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \ - _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \ - _fixsfsi _fixunssfsi _floatdidf _floatdisf \ - _aeabi_ulcmp _aeabi_ldivmod _aeabi_uldivmod -LIB2ADDEH = unwind-arm.c libunwind.S pr-support.c unwind-c.c -LIB2FUNCS_EXTRA = bpabi.c +LIB1ASMFUNCS+= _addsubdf3 _addsubsf3 _cmpdf2 _cmpsf2 _fixdfsi _fixsfsi \ + _fixunsdfsi _fixunsdfsi _muldivdf3 _muldivsf3 _udivsi3 -# Make bpabi.So depend on bpabi.c and not bpabi.S -bpabi.So: bpabi.c +LIB2ADDEH = unwind-arm.c libunwind.S pr-support.c unwind-c.c .endif .if ${TARGET_CPUARCH} == mips From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 08:40:35 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 770111065672; Mon, 6 Feb 2012 08:40:35 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 4B6D38FC14; Mon, 6 Feb 2012 08:40:35 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q168eZNf024369; Mon, 6 Feb 2012 08:40:35 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q168eZ1r024365; Mon, 6 Feb 2012 08:40:35 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060840.q168eZ1r024365@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 08:40:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231064 - in projects/arm_eabi/lib: libc libc/quad libcompiler_rt X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 08:40:35 -0000 Author: andrew Date: Mon Feb 6 08:40:34 2012 New Revision: 231064 URL: http://svn.freebsd.org/changeset/base/231064 Log: Use the compiler-rt softfloat code where possible as it includes the required __aeabi_* functions. Modified: projects/arm_eabi/lib/libc/Makefile projects/arm_eabi/lib/libc/quad/Makefile.inc projects/arm_eabi/lib/libcompiler_rt/Makefile Modified: projects/arm_eabi/lib/libc/Makefile ============================================================================== --- projects/arm_eabi/lib/libc/Makefile Mon Feb 6 08:28:44 2012 (r231063) +++ projects/arm_eabi/lib/libc/Makefile Mon Feb 6 08:40:34 2012 (r231064) @@ -85,7 +85,7 @@ NOASM= .include "${.CURDIR}/rpc/Makefile.inc" .include "${.CURDIR}/uuid/Makefile.inc" .include "${.CURDIR}/xdr/Makefile.inc" -.if ${LIBC_ARCH} == "arm" || ${LIBC_ARCH} == "mips" +.if ${LIBC_ARCH} == "mips" .include "${.CURDIR}/softfloat/Makefile.inc" .endif .if ${MK_NIS} != "no" Modified: projects/arm_eabi/lib/libc/quad/Makefile.inc ============================================================================== --- projects/arm_eabi/lib/libc/quad/Makefile.inc Mon Feb 6 08:28:44 2012 (r231063) +++ projects/arm_eabi/lib/libc/quad/Makefile.inc Mon Feb 6 08:40:34 2012 (r231064) @@ -8,6 +8,10 @@ SRCS+= cmpdi2.c divdi3.c moddi3.c qdivrem.c ucmpdi2.c udivdi3.c umoddi3.c +.elif ${LIBC_ARCH} == "arm" + +SRCS+= adddi3.c anddi3.c floatunsdidf.c iordi3.c lshldi3.c notdi2.c \ + qdivrem.c subdi3.c xordi3.c .else SRCS+= adddi3.c anddi3.c ashldi3.c ashrdi3.c cmpdi2.c divdi3.c fixdfdi.c \ Modified: projects/arm_eabi/lib/libcompiler_rt/Makefile ============================================================================== --- projects/arm_eabi/lib/libcompiler_rt/Makefile Mon Feb 6 08:28:44 2012 (r231063) +++ projects/arm_eabi/lib/libcompiler_rt/Makefile Mon Feb 6 08:40:34 2012 (r231064) @@ -123,7 +123,7 @@ SRCF= absvdi2 \ umodti3 # These are already shipped by libc.a on arm and mips -.if ${MACHINE_CPUARCH} != "arm" && ${MACHINE_CPUARCH} != "mips" +.if ${MACHINE_CPUARCH} != "mips" SRCF+= adddf3 \ addsf3 \ divdf3 \ From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 08:46:01 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 095E9106564A; Mon, 6 Feb 2012 08:46:01 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E26618FC13; Mon, 6 Feb 2012 08:46:00 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q168k0T7024584; Mon, 6 Feb 2012 08:46:00 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q168k0TO024579; Mon, 6 Feb 2012 08:46:00 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060846.q168k0TO024579@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 08:46:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231065 - in projects/arm_eabi/lib/libc/arm: . gen X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 08:46:01 -0000 Author: andrew Date: Mon Feb 6 08:46:00 2012 New Revision: 231065 URL: http://svn.freebsd.org/changeset/base/231065 Log: * Move the old symbols moved to compiler-rt out of the ARM Symbol.map to an OABI map file. * Stop compiling divsi3.S as it provides symbols we have in compiler-rt Added: projects/arm_eabi/lib/libc/arm/Symbol_oabi.map Modified: projects/arm_eabi/lib/libc/arm/Makefile.inc projects/arm_eabi/lib/libc/arm/Symbol.map projects/arm_eabi/lib/libc/arm/gen/Makefile.inc Modified: projects/arm_eabi/lib/libc/arm/Makefile.inc ============================================================================== --- projects/arm_eabi/lib/libc/arm/Makefile.inc Mon Feb 6 08:40:34 2012 (r231064) +++ projects/arm_eabi/lib/libc/arm/Makefile.inc Mon Feb 6 08:46:00 2012 (r231065) @@ -8,3 +8,6 @@ SOFTFLOAT_BITS=32 # Long double is just double precision. MDSRCS+=machdep_ldisd.c SYM_MAPS+=${.CURDIR}/arm/Symbol.map + +# This contains the symbols that were removed when moving to the ARM EABI +#SYM_MAPS+=${.CURDIR}/arm/Symbol_oabi.map Modified: projects/arm_eabi/lib/libc/arm/Symbol.map ============================================================================== --- projects/arm_eabi/lib/libc/arm/Symbol.map Mon Feb 6 08:40:34 2012 (r231064) +++ projects/arm_eabi/lib/libc/arm/Symbol.map Mon Feb 6 08:46:00 2012 (r231065) @@ -41,10 +41,6 @@ FBSDprivate_1.0 { _set_tp; ___longjmp; - __umodsi3; - __modsi3; - __udivsi3; - __divsi3; __makecontext; __longjmp; signalcontext; @@ -57,22 +53,4 @@ FBSDprivate_1.0 { curbrk; minbrk; _sbrk; - - /* softfloat */ - __addsf3; - __adddf3; - __subsf3; - __subdf3; - __mulsf3; - __muldf3; - __divsf3; - __divdf3; - __floatsisf; - __floatsidf; - __fixsfsi; - __fixdfsi; - __fixunssfsi; - __fixunsdfsi; - __extendsfdf2; - __truncdfsf2; }; Added: projects/arm_eabi/lib/libc/arm/Symbol_oabi.map ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/lib/libc/arm/Symbol_oabi.map Mon Feb 6 08:46:00 2012 (r231065) @@ -0,0 +1,34 @@ +/* + * $FreeBSD: projects/arm_eabi/lib/libc/arm/Symbol.map 228591 2011-12-16 19:38:31Z andrew $ + */ + +/* + * This only needs to contain symbols that are not listed in + * symbol maps from other parts of libc (i.e., not found in + * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...) + * and are not used in the ARM EABI. + */ +FBSDprivate_1.0 { + __umodsi3; + __modsi3; + __udivsi3; + __divsi3; + + /* softfloat */ + __addsf3; + __adddf3; + __subsf3; + __subdf3; + __mulsf3; + __muldf3; + __divsf3; + __divdf3; + __floatsisf; + __floatsidf; + __fixsfsi; + __fixdfsi; + __fixunssfsi; + __fixunsdfsi; + __extendsfdf2; + __truncdfsf2; +}; Modified: projects/arm_eabi/lib/libc/arm/gen/Makefile.inc ============================================================================== --- projects/arm_eabi/lib/libc/arm/gen/Makefile.inc Mon Feb 6 08:40:34 2012 (r231064) +++ projects/arm_eabi/lib/libc/arm/gen/Makefile.inc Mon Feb 6 08:46:00 2012 (r231065) @@ -3,4 +3,7 @@ SRCS+= _ctx_start.S _setjmp.S _set_tp.c alloca.S fabs.c \ infinity.c ldexp.c makecontext.c \ - setjmp.S signalcontext.c sigsetjmp.S divsi3.S + setjmp.S signalcontext.c sigsetjmp.S + +#SRCS+= divsi3.S + From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 08:50:42 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5C616106566B; Mon, 6 Feb 2012 08:50:42 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 4A6DC8FC0A; Mon, 6 Feb 2012 08:50:42 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q168oglM024773; Mon, 6 Feb 2012 08:50:42 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q168ogLm024767; Mon, 6 Feb 2012 08:50:42 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060850.q168ogLm024767@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 08:50:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231066 - in projects/arm_eabi/lib/libc/arm: . aeabi X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 08:50:42 -0000 Author: andrew Date: Mon Feb 6 08:50:41 2012 New Revision: 231066 URL: http://svn.freebsd.org/changeset/base/231066 Log: Add the ARM EABI changes required by libc Added: projects/arm_eabi/lib/libc/arm/aeabi/ projects/arm_eabi/lib/libc/arm/aeabi/Makefile.inc projects/arm_eabi/lib/libc/arm/aeabi/Symbol.map projects/arm_eabi/lib/libc/arm/aeabi/aeabi_atexit.c projects/arm_eabi/lib/libc/arm/aeabi/aeabi_unwind_cpp.c Modified: projects/arm_eabi/lib/libc/arm/Makefile.inc Modified: projects/arm_eabi/lib/libc/arm/Makefile.inc ============================================================================== --- projects/arm_eabi/lib/libc/arm/Makefile.inc Mon Feb 6 08:46:00 2012 (r231065) +++ projects/arm_eabi/lib/libc/arm/Makefile.inc Mon Feb 6 08:50:41 2012 (r231066) @@ -11,3 +11,6 @@ SYM_MAPS+=${.CURDIR}/arm/Symbol.map # This contains the symbols that were removed when moving to the ARM EABI #SYM_MAPS+=${.CURDIR}/arm/Symbol_oabi.map + +.include "${.CURDIR}/arm/aeabi/Makefile.inc" + Added: projects/arm_eabi/lib/libc/arm/aeabi/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/lib/libc/arm/aeabi/Makefile.inc Mon Feb 6 08:50:41 2012 (r231066) @@ -0,0 +1,9 @@ +# $FreeBSD$ + +.PATH: ${.CURDIR}/arm/aeabi + +SRCS+= aeabi_atexit.c \ + aeabi_unwind_cpp.c + +SYM_MAPS+=${.CURDIR}/arm/aeabi/Symbol.map + Added: projects/arm_eabi/lib/libc/arm/aeabi/Symbol.map ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/lib/libc/arm/aeabi/Symbol.map Mon Feb 6 08:50:41 2012 (r231066) @@ -0,0 +1,12 @@ +/* + * $FreeBSD: projects/arm_eabi/lib/libc/arm/Symbol.map 228591 2011-12-16 19:38:31Z andrew $ + */ + +/* + * This only needs to contain symbols that are not listed in + * symbol maps from other parts of libc (i.e., not found in + * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). + */ +FBSDprivate_1.0 { + __aeabi_atexit; +}; Added: projects/arm_eabi/lib/libc/arm/aeabi/aeabi_atexit.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/lib/libc/arm/aeabi/aeabi_atexit.c Mon Feb 6 08:50:41 2012 (r231066) @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2012 Andrew Turner + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +int __cxa_atexit(void (*)(void *), void *, void *); + +int +__aeabi_atexit(void *object, void (*func)(void*), void *dso) +{ + return __cxa_atexit(func, object, dso); +} + Added: projects/arm_eabi/lib/libc/arm/aeabi/aeabi_unwind_cpp.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/arm_eabi/lib/libc/arm/aeabi/aeabi_unwind_cpp.c Mon Feb 6 08:50:41 2012 (r231066) @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2011 Andrew Turner + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +/* + * Provide an implementation of __aeabi_unwind_cpp_pr{0,1,2}. These are + * required by libc but are implemented in libgcc_eh.a which we don't link + * against. The libgcc_eh.a version will be called so we call abort to + * check this. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include + +void __aeabi_unwind_cpp_pr0(void) __hidden; +void __aeabi_unwind_cpp_pr1(void) __hidden; +void __aeabi_unwind_cpp_pr2(void) __hidden; + +void +__aeabi_unwind_cpp_pr0(void) +{ + abort(); +} + +void +__aeabi_unwind_cpp_pr1(void) +{ + abort(); +} + +void +__aeabi_unwind_cpp_pr2(void) +{ + abort(); +} + From owner-svn-src-projects@FreeBSD.ORG Mon Feb 6 09:05:12 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D6704106566B; Mon, 6 Feb 2012 09:05:12 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id C59DF8FC0A; Mon, 6 Feb 2012 09:05:12 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1695CRl025609; Mon, 6 Feb 2012 09:05:12 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1695COp025607; Mon, 6 Feb 2012 09:05:12 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202060905.q1695COp025607@svn.freebsd.org> From: Andrew Turner Date: Mon, 6 Feb 2012 09:05:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231067 - projects/arm_eabi/libexec/rtld-elf X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Feb 2012 09:05:12 -0000 Author: andrew Date: Mon Feb 6 09:05:12 2012 New Revision: 231067 URL: http://svn.freebsd.org/changeset/base/231067 Log: ld-rtld.so calls __aeabi_uidivmod on ARM, provide it by linking against compiler-rt. Modified: projects/arm_eabi/libexec/rtld-elf/Makefile Modified: projects/arm_eabi/libexec/rtld-elf/Makefile ============================================================================== --- projects/arm_eabi/libexec/rtld-elf/Makefile Mon Feb 6 08:50:41 2012 (r231066) +++ projects/arm_eabi/libexec/rtld-elf/Makefile Mon Feb 6 09:05:12 2012 (r231067) @@ -40,6 +40,16 @@ LDFLAGS+= -shared -Wl,-Bsymbolic DPADD= ${LIBC_PIC} LDADD= -lc_pic -lssp_nonshared +.if ${MACHINE_CPUARCH} == "arm" +# Some of the required math functions (div & mod) are implemented in libgcc +# on ARM. The library also needs to be placed first to be correctly linked. +# As some of the functions are used before we have shared libraries. +DPADD+= ${LIBGCC} +LDADD+= -lgcc +.endif + + + .if ${MK_SYMVER} == "yes" LIBCDIR= ${.CURDIR}/../../lib/libc VERSION_DEF= ${LIBCDIR}/Versions.def From owner-svn-src-projects@FreeBSD.ORG Tue Feb 7 03:41:09 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0C034106566C; Tue, 7 Feb 2012 03:41:09 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E82898FC0C; Tue, 7 Feb 2012 03:41:08 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q173f8i7067051; Tue, 7 Feb 2012 03:41:08 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q173f8EZ067039; Tue, 7 Feb 2012 03:41:08 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202070341.q173f8EZ067039@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Tue, 7 Feb 2012 03:41:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231110 - in projects/armv6/sys: arm/conf arm/ti arm/ti/omap4 arm/ti/omap4/pandaboard boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Feb 2012 03:41:09 -0000 Author: gonzo Date: Tue Feb 7 03:41:08 2012 New Revision: 231110 URL: http://svn.freebsd.org/changeset/base/231110 Log: Add first code drop of FDT support for TI platforms: - Disable all files in omap nbuild that do not support FDT yet - Add generic GIC driver. At the time to ti/ directory. Final location TBD - Add timer.c with DELAY stub before we get working timer driver - Rename omap_cpuid files to ti_cpuid since support for am335x is on its way Submitted by: Damjan Marion Added: projects/armv6/sys/arm/ti/bus_space.c projects/armv6/sys/arm/ti/common.c projects/armv6/sys/arm/ti/gic.c projects/armv6/sys/arm/ti/ti_cpuid.c - copied, changed from r231102, projects/armv6/sys/arm/ti/omap_cpuid.c projects/armv6/sys/arm/ti/ti_cpuid.h - copied, changed from r231102, projects/armv6/sys/arm/ti/omap_cpuid.h projects/armv6/sys/arm/ti/ti_machdep.c projects/armv6/sys/arm/ti/timer.c projects/armv6/sys/boot/fdt/dts/pandaboard.dts Deleted: projects/armv6/sys/arm/ti/omap_cpuid.c projects/armv6/sys/arm/ti/omap_cpuid.h projects/armv6/sys/arm/ti/omap_machdep.c Modified: projects/armv6/sys/arm/conf/PANDABOARD projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard projects/armv6/sys/arm/ti/omapvar.h Modified: projects/armv6/sys/arm/conf/PANDABOARD ============================================================================== --- projects/armv6/sys/arm/conf/PANDABOARD Tue Feb 7 03:37:29 2012 (r231109) +++ projects/armv6/sys/arm/conf/PANDABOARD Tue Feb 7 03:41:08 2012 (r231110) @@ -125,6 +125,9 @@ device da # Direct Access (disks) # USB Ethernet support, requires miibus device miibus device axe # ASIX Electronics USB Ethernet -device smsc # SMSC LAN95xx USB Ethernet - +# device smsc # SMSC LAN95xx USB Ethernet +# Flattened Device Tree +options FDT +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=pandaboard.dts Added: projects/armv6/sys/arm/ti/bus_space.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/bus_space.c Tue Feb 7 03:41:08 2012 (r231110) @@ -0,0 +1,113 @@ +/*- + * Copyright (C) 2012 FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of MARVELL nor the names of contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include + +#include + +/* Prototypes for all the bus_space structure functions */ +bs_protos(generic); +bs_protos(generic_armv4); + +struct bus_space _base_tag = { + /* cookie */ + .bs_cookie = (void *) 0, + + /* mapping/unmapping */ + .bs_map = generic_bs_map, + .bs_unmap = generic_bs_unmap, + .bs_subregion = generic_bs_subregion, + + /* allocation/deallocation */ + .bs_alloc = generic_bs_alloc, + .bs_free = generic_bs_free, + + /* barrier */ + .bs_barrier = generic_bs_barrier, + + /* read (single) */ + .bs_r_1 = generic_bs_r_1, + .bs_r_2 = generic_armv4_bs_r_2, + .bs_r_4 = generic_bs_r_4, + .bs_r_8 = NULL, + + /* read multiple */ + .bs_rm_1 = generic_bs_rm_1, + .bs_rm_2 = generic_armv4_bs_rm_2, + .bs_rm_4 = generic_bs_rm_4, + .bs_rm_8 = NULL, + + /* read region */ + .bs_rr_1 = generic_bs_rr_1, + .bs_rr_2 = generic_armv4_bs_rr_2, + .bs_rr_4 = generic_bs_rr_4, + .bs_rr_8 = NULL, + + /* write (single) */ + .bs_w_1 = generic_bs_w_1, + .bs_w_2 = generic_armv4_bs_w_2, + .bs_w_4 = generic_bs_w_4, + .bs_w_8 = NULL, + + /* write multiple */ + .bs_wm_1 = generic_bs_wm_1, + .bs_wm_2 = generic_armv4_bs_wm_2, + .bs_wm_4 = generic_bs_wm_4, + .bs_wm_8 = NULL, + + /* write region */ + .bs_wr_1 = generic_bs_wr_1, + .bs_wr_2 = generic_armv4_bs_wr_2, + .bs_wr_4 = generic_bs_wr_4, + .bs_wr_8 = NULL, + + /* set multiple */ + /* XXX not implemented */ + + /* set region */ + .bs_sr_1 = NULL, + .bs_sr_2 = generic_armv4_bs_sr_2, + .bs_sr_4 = generic_bs_sr_4, + .bs_sr_8 = NULL, + + /* copy */ + .bs_c_1 = NULL, + .bs_c_2 = generic_armv4_bs_c_2, + .bs_c_4 = NULL, + .bs_c_8 = NULL, +}; + +bus_space_tag_t fdtbus_bs_tag = &_base_tag; Added: projects/armv6/sys/arm/ti/common.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/common.c Tue Feb 7 03:41:08 2012 (r231110) @@ -0,0 +1,74 @@ +/*- + * Copyright (C) 2008-2011 MARVELL INTERNATIONAL LTD. + * All rights reserved. + * + * Developed by Semihalf. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of MARVELL nor the names of contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include "opt_global.h" + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +struct fdt_fixup_entry fdt_fixup_table[] = { + { NULL, NULL } +}; + +static int +fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig, + int *pol) +{ + + if (!fdt_is_compatible(node, "arm,gic")) + return (ENXIO); + + *interrupt = fdt32_to_cpu(intr[0]); + *trig = INTR_TRIGGER_CONFORM; + *pol = INTR_POLARITY_CONFORM; + + return (0); +} + +fdt_pic_decode_t fdt_pic_table[] = { + &fdt_gic_decode_ic, + NULL +}; Added: projects/armv6/sys/arm/ti/gic.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/gic.c Tue Feb 7 03:41:08 2012 (r231110) @@ -0,0 +1,232 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * All rights reserved. + * + * Developed by Damjan Marion + * + * Based on OMAP4 GIC code by Ben Gray + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + + + /* We are using GICv2 register naming */ + + /* Distributor Registers */ +#define GICD_CTLR 0x000 /* v1 ICDDCR */ +#define GICD_TYPER 0x004 /* v1 ICDICTR */ +#define GICD_IIDR 0x008 /* v1 ICDIIDR */ +#define GICD_IGROUPR(n) (0x0080 + ((n) * 4)) /* v1 ICDISER */ +#define GICD_ISENABLER(n) (0x0100 + ((n) * 4)) /* v1 ICDISER */ +#define GICD_ICENABLER(n) (0x0180 + ((n) * 4)) /* v1 ICDICER */ +#define GICD_ISPENDR(n) (0x0200 + ((n) * 4)) /* v1 ICDISPR */ +#define GICD_ICPENDR(n) (0x0280 + ((n) * 4)) /* v1 ICDICPR */ +#define GICD_ICACTIVER(n) (0x0380 + ((n) * 4)) /* v1 ICDABR */ +#define GICD_IPRIORITYR(n) (0x0400 + ((n) * 4)) /* v1 ICDIPR */ +#define GICD_ITARGETSR(n) (0x0800 + ((n) * 4)) /* v1 ICDIPTR */ +#define GICD_ICFGR(n) (0x0C00 + ((n) * 4)) /* v1 ICDICFR */ +#define GICD_SGIR(n) (0x0F00 + ((n) * 4)) /* v1 ICDSGIR */ + + /* CPU Registers */ +#define GICC_CTLR 0x0000 /* v1 ICCICR */ +#define GICC_PMR 0x0004 /* v1 ICCPMR */ +#define GICC_BPR 0x0008 /* v1 ICCBPR */ +#define GICC_IAR 0x000C /* v1 ICCIAR */ +#define GICC_EOIR 0x0010 /* v1 ICCEOIR */ +#define GICC_RPR 0x0014 /* v1 ICCRPR */ +#define GICC_HPPIR 0x0018 /* v1 ICCHPIR */ +#define GICC_ABPR 0x001C /* v1 ICCABPR */ +#define GICC_IIDR 0x00FC /* v1 ICCIIDR*/ + + + +struct arm_gic_softc { + struct resource * gic_res[3]; + bus_space_tag_t gic_c_bst; + bus_space_tag_t gic_d_bst; + bus_space_handle_t gic_c_bsh; + bus_space_handle_t gic_d_bsh; + uint8_t ver; +}; + +static struct resource_spec arm_gic_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Distributor registers */ + { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* CPU Interrupt Intf. registers */ + { -1, 0 } +}; + + +static struct arm_gic_softc *arm_gic_sc = NULL; + +#define gic_c_read_4(reg) \ + bus_space_read_4(arm_gic_sc->gic_c_bst, arm_gic_sc->gic_c_bsh, reg) +#define gic_c_write_4(reg, val) \ + bus_space_write_4(arm_gic_sc->gic_c_bst, arm_gic_sc->gic_c_bsh, reg, val) +#define gic_d_read_4(reg) \ + bus_space_read_4(arm_gic_sc->gic_d_bst, arm_gic_sc->gic_d_bsh, reg) +#define gic_d_write_4(reg, val) \ + bus_space_write_4(arm_gic_sc->gic_d_bst, arm_gic_sc->gic_d_bsh, reg, val) + + +static int +arm_gic_probe(device_t dev) +{ + if (!ofw_bus_is_compatible(dev, "arm,gic")) + return (ENXIO); + device_set_desc(dev, "ARM Generic Interrupt Controller"); + return (BUS_PROBE_DEFAULT); +} + +static int +arm_gic_attach(device_t dev) +{ + struct arm_gic_softc *sc = device_get_softc(dev); + int i; + uint32_t icciidr; + uint32_t nirqs; + + if (arm_gic_sc) + return (ENXIO); + + if (bus_alloc_resources(dev, arm_gic_spec, sc->gic_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + /* Distributor Interface */ + sc->gic_d_bst = rman_get_bustag(sc->gic_res[0]); + sc->gic_d_bsh = rman_get_bushandle(sc->gic_res[0]); + + /* CPU Interface */ + sc->gic_c_bst = rman_get_bustag(sc->gic_res[1]); + sc->gic_c_bsh = rman_get_bushandle(sc->gic_res[1]); + + arm_gic_sc = sc; + + /* Disable interrupt forwarding to the CPU interface */ + gic_d_write_4(GICD_CTLR, 0x00); + + /* Get the number of interrupts */ + nirqs = gic_d_read_4(GICD_TYPER); + nirqs = 32 * ((nirqs & 0x1f) + 1); + + icciidr = gic_c_read_4(GICC_IIDR); + device_printf(dev,"pn 0x%x, arch 0x%x, rev 0x%x, implementer 0x%x nirqs %u\n", + icciidr>>20, (icciidr>>16) & 0xF, (icciidr>>12) & 0xf, + (icciidr & 0xfff), nirqs); + + /* Set all global interrupts to be level triggered, active low. */ + for (i = 32; i < nirqs; i += 32) { + gic_d_write_4(GICD_ICFGR(i >> 5), 0x00000000); + } + + /* Disable all interrupts. */ + for (i = 32; i < nirqs; i += 32) { + gic_d_write_4(GICD_ICENABLER(i >> 5), 0xFFFFFFFF); + } + + /* Route all interrupts to CPU0 and set priority to 0 */ + for (i = 32; i < nirqs; i += 32) { + gic_d_write_4(GICD_IPRIORITYR(i >> 5), 0x00000000); + gic_d_write_4(GICD_ITARGETSR(i >> 5), 0x01010101); + } + + /* Enable CPU interface */ + gic_c_write_4(GICC_CTLR, 1); + + /* Enable interrupt distribution */ + gic_d_write_4(GICD_CTLR, 0x01); + + + return (0); +} + +static device_method_t arm_gic_methods[] = { + DEVMETHOD(device_probe, arm_gic_probe), + DEVMETHOD(device_attach, arm_gic_attach), + { 0, 0 } +}; + +static driver_t arm_gic_driver = { + "gic", + arm_gic_methods, + sizeof(struct arm_gic_softc), +}; + +static devclass_t arm_gic_devclass; + +DRIVER_MODULE(gic, simplebus, arm_gic_driver, arm_gic_devclass, 0, 0); + +int +arm_get_next_irq(int last_irq) +{ + uint32_t active_irq; + + /* clean-up the last IRQ */ + if (last_irq != -1) { + gic_c_write_4(GICC_EOIR, last_irq); + } + + active_irq = gic_c_read_4(GICC_IAR); + active_irq &= 0x3FF; + + if (active_irq == 0x3FF) { + if (last_irq == -1) + printf("Spurious interrupt detected [0x%08x]\n", active_irq); + return -1; + } + + return active_irq; +} + +void +arm_mask_irq(uintptr_t nb) +{ + gic_d_write_4(GICD_ICENABLER(nb >> 5), (1UL << (nb & 0x1F))); +} + +void +arm_unmask_irq(uintptr_t nb) +{ + gic_d_write_4(GICD_ISENABLER(nb >> 5), (1UL << (nb & 0x1F))); +} Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Tue Feb 7 03:37:29 2012 (r231109) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Tue Feb 7 03:41:08 2012 (r231110) @@ -10,20 +10,24 @@ arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv7.S standard arm/arm/irq_dispatch.S standard -arm/ti/omap_machdep.c standard -arm/ti/omap.c standard -arm/ti/omap_cpuid.c standard -arm/ti/omap_prcm.c standard -arm/ti/omap_scm.c standard -arm/ti/omap_if.m standard -arm/ti/omap4/omap4_if.m standard -arm/ti/omap4/omap44xx.c standard -arm/ti/omap4/omap4_intr.c standard -arm/ti/omap4/omap4_prcm_clks.c standard -arm/ti/omap4/omap4_scm_padconf.c standard -arm/ti/omap4/omap4_timer.c standard +arm/ti/ti_machdep.c standard +# arm/ti/omap.c standard +arm/ti/ti_cpuid.c standard +# arm/ti/omap_prcm.c standard +# arm/ti/omap_scm.c standard +# arm/ti/omap_if.m standard +arm/ti/timer.c standard +arm/ti/gic.c standard -arm/ti/omap4/uart_cpu_omap4.c optional uart +arm/ti/common.c standard +arm/ti/bus_space.c standard + +# arm/ti/omap4/omap4_if.m standard +# arm/ti/omap4/omap44xx.c standard +# arm/ti/omap4/omap4_intr.c standard +# arm/ti/omap4/omap4_prcm_clks.c standard +# arm/ti/omap4/omap4_scm_padconf.c standard +# arm/ti/omap4/omap4_timer.c standard dev/uart/uart_dev_ns8250.c optional uart Modified: projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard ============================================================================== --- projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard Tue Feb 7 03:37:29 2012 (r231109) +++ projects/armv6/sys/arm/ti/omap4/pandaboard/files.pandaboard Tue Feb 7 03:41:08 2012 (r231110) @@ -1,3 +1,3 @@ # $FreeBSD$ -arm/ti/omap4/pandaboard/pandaboard.c standard +# arm/ti/omap4/pandaboard/pandaboard.c standard Modified: projects/armv6/sys/arm/ti/omapvar.h ============================================================================== --- projects/armv6/sys/arm/ti/omapvar.h Tue Feb 7 03:37:29 2012 (r231109) +++ projects/armv6/sys/arm/ti/omapvar.h Tue Feb 7 03:41:08 2012 (r231110) @@ -50,7 +50,7 @@ #include #include -#include +#include /* Copied and modified: projects/armv6/sys/arm/ti/ti_cpuid.c (from r231102, projects/armv6/sys/arm/ti/omap_cpuid.c) ============================================================================== --- projects/armv6/sys/arm/ti/omap_cpuid.c Mon Feb 6 21:50:11 2012 (r231102, copy source) +++ projects/armv6/sys/arm/ti/ti_cpuid.c Tue Feb 7 03:41:08 2012 (r231110) @@ -39,6 +39,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include #include @@ -46,28 +47,29 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include +#ifdef notyet +#include +#endif -#define OMAP4_STD_FUSE_DIE_ID_0 0x2200 +#define OMAP4_STD_FUSE_DIE_ID_0 0x2200 #define OMAP4_ID_CODE 0x2204 -#define OMAP4_STD_FUSE_DIE_ID_1 0x2208 -#define OMAP4_STD_FUSE_DIE_ID_2 0x220C -#define OMAP4_STD_FUSE_DIE_ID_3 0x2210 -#define OMAP4_STD_FUSE_PROD_ID_0 0x2214 +#define OMAP4_STD_FUSE_DIE_ID_1 0x2208 +#define OMAP4_STD_FUSE_DIE_ID_2 0x220C +#define OMAP4_STD_FUSE_DIE_ID_3 0x2210 +#define OMAP4_STD_FUSE_PROD_ID_0 0x2214 #define OMAP4_STD_FUSE_PROD_ID_1 0x2218 #define OMAP3_ID_CODE 0xA204 -#define REG_READ32(r) *((volatile uint32_t*)(r)) - static uint32_t chip_revision = 0xffffffff; /** - * omap_revision - Returns the revision number of the device - * + * ti_revision - Returns the revision number of the device + * * Simply returns an identifier for the revision of the chip we are running * on. * @@ -75,14 +77,14 @@ static uint32_t chip_revision = 0xffffff * A 32-bit identifier for the current chip */ uint32_t -omap_revision(void) +ti_revision(void) { return chip_revision; } /** * omap4_get_revision - determines omap4 revision - * + * * Reads the registers to determine the revision of the chip we are currently * running on. Stores the information in global variables. * @@ -94,25 +96,30 @@ omap4_get_revision(void) uint32_t id_code; uint32_t revision; uint32_t hawkeye; + bus_space_handle_t bsh; /* The chip revsion is read from the device identification registers and * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to * 0x4A00_2218. This is part of the L4_CORE memory range and should have * been mapped in by the machdep.c code. * - * STD_FUSE_DIE_ID_0 0x4A00 2200 + * STD_FUSE_DIE_ID_0 0x4A00 2200 * ID_CODE 0x4A00 2204 (this is the only one we need) - * STD_FUSE_DIE_ID_1 0x4A00 2208 - * STD_FUSE_DIE_ID_2 0x4A00 220C - * STD_FUSE_DIE_ID_3 0x4A00 2210 - * STD_FUSE_PROD_ID_0 0x4A00 2214 + * STD_FUSE_DIE_ID_1 0x4A00 2208 + * STD_FUSE_DIE_ID_2 0x4A00 220C + * STD_FUSE_DIE_ID_3 0x4A00 2210 + * STD_FUSE_PROD_ID_0 0x4A00 2214 * STD_FUSE_PROD_ID_1 0x4A00 2218 */ - id_code = REG_READ32(OMAP44XX_L4_CORE_VBASE + OMAP4_ID_CODE); - + // id_code = REG_READ32(OMAP44XX_L4_CORE_VBASE + OMAP4_ID_CODE); + //FIXME Should we map somewhere else? + bus_space_map(fdtbus_bs_tag,OMAP44XX_L4_CORE_HWBASE, 0x4000, 0, &bsh); + id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP4_ID_CODE); + bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000); + hawkeye = ((id_code >> 12) & 0xffff); revision = ((id_code >> 28) & 0xf); - + /* Apparently according to the linux code there were some ES2.0 samples that * have the wrong id code and report themselves as ES1.0 silicon. So used * the ARM cpuid to get the correct revision. @@ -121,7 +128,7 @@ omap4_get_revision(void) id_code = cpufunc_id(); revision = (id_code & 0xf) - 1; } - + switch (hawkeye) { case 0xB852: if (revision == 0) @@ -142,19 +149,19 @@ omap4_get_revision(void) chip_revision = OMAP4430_REV_ES2_3; break; } - - printf("OMAP%04x ES%u.%u\n", OMAP_REV_DEVICE(chip_revision), - OMAP_REV_MAJOR(chip_revision), OMAP_REV_MINOR(chip_revision)); + printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n", + OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision), + OMAP_REV_MINOR(chip_revision)); } /** * omap3_get_revision - determines omap3 revision - * + * * Reads the registers to determine the revision of the chip we are currently * running on. Stores the information in global variables. * * WARNING: This function currently only really works for OMAP3530 devices. - * + * * * */ @@ -164,6 +171,7 @@ omap3_get_revision(void) uint32_t id_code; uint32_t revision; uint32_t hawkeye; + bus_space_handle_t bsh; /* The chip revsion is read from the device identification registers and * the JTAG (?) tap registers, which are located in address 0x4A00_2200 to @@ -174,8 +182,11 @@ omap3_get_revision(void) * * */ - id_code = REG_READ32(OMAP35XX_L4_WAKEUP_VBASE + OMAP3_ID_CODE); - + //id_code = REG_READ32(OMAP35XX_L4_WAKEUP_VBASE + OMAP3_ID_CODE); + bus_space_map(fdtbus_bs_tag,OMAP35XX_L4_WAKEUP_HWBASE, 0x10000, 0, &bsh); + id_code = bus_space_read_4(fdtbus_bs_tag, bsh, OMAP3_ID_CODE); + bus_space_unmap(fdtbus_bs_tag, bsh, 0x4000); + hawkeye = ((id_code >> 12) & 0xffff); revision = ((id_code >> 28) & 0xf); @@ -200,15 +211,56 @@ omap3_get_revision(void) chip_revision = OMAP3530_REV_ES3_1_2; break; } + printf("Texas Instruments OMAP%04x Processor, Revision ES%u.%u\n", + OMAP_REV_DEVICE(chip_revision), OMAP_REV_MAJOR(chip_revision), + OMAP_REV_MINOR(chip_revision)); +} + +#ifdef notyet +static void +am335x_get_revision(void) +{ + uint32_t dev_feature; + uint8_t cpu_last_char; + bus_space_handle_t bsh; + + bus_space_map(fdtbus_bs_tag, AM335X_CONTROL_BASE, AM335X_CONTROL_SIZE, 0, &bsh); + chip_revision = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEVICE_ID); + dev_feature = bus_space_read_4(fdtbus_bs_tag, bsh, AM335X_CONTROL_DEV_FEATURE); + bus_space_unmap(fdtbus_bs_tag, bsh, AM335X_CONTROL_SIZE); + + switch (dev_feature) { + case 0x00FF0382: + cpu_last_char='2'; + break; + case 0x20FF0382: + cpu_last_char='4'; + break; + case 0x00FF0383: + cpu_last_char='6'; + break; + case 0x00FE0383: + cpu_last_char='7'; + break; + case 0x20FF0383: + cpu_last_char='8'; + break; + case 0x20FE0383: + cpu_last_char='9'; + break; + default: + cpu_last_char='x'; + } - printf("OMAP%04x ES%u.%u\n", OMAP_REV_DEVICE(chip_revision), - OMAP_REV_MAJOR(chip_revision), OMAP_REV_MINOR(chip_revision)); + printf("Texas Instruments AM335%c Processor, Revision ES1.%u\n", + cpu_last_char, AM335X_DEVREV(chip_revision)); } +#endif /** - * omap_cpu_ident - attempts to identify the chip we are running on + * ti_cpu_ident - attempts to identify the chip we are running on * @dummy: ignored - * + * * This function is called before any of the driver are initialised, however * the basic virt to phys maps have been setup in machdep.c so we can still * access the required registers, we just have to use direct register reads @@ -217,18 +269,23 @@ omap3_get_revision(void) * */ static void -omap_cpu_ident(void *dummy) +ti_cpu_ident(void *dummy) { - switch(omap_chip()) { + switch(ti_chip()) { case CHIP_OMAP_3: omap3_get_revision(); break; case CHIP_OMAP_4: omap4_get_revision(); break; +#ifdef notyet + case CHIP_AM335X: + am335x_get_revision(); + break; +#endif default: - panic("Unknown OMAP chip type, fixme!\n"); + panic("Unknown chip type, fixme!\n"); } } -SYSINIT(omap_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, omap_cpu_ident, NULL); +SYSINIT(ti_cpu_ident, SI_SUB_CPU, SI_ORDER_SECOND, ti_cpu_ident, NULL); Copied and modified: projects/armv6/sys/arm/ti/ti_cpuid.h (from r231102, projects/armv6/sys/arm/ti/omap_cpuid.h) ============================================================================== --- projects/armv6/sys/arm/ti/omap_cpuid.h Mon Feb 6 21:50:11 2012 (r231102, copy source) +++ projects/armv6/sys/arm/ti/ti_cpuid.h Tue Feb 7 03:41:08 2012 (r231110) @@ -25,8 +25,8 @@ * SUCH DAMAGE. */ -#ifndef _OMAP_CPUID_H_ -#define _OMAP_CPUID_H_ +#ifndef _TI_CPUID_H_ +#define _TI_CPUID_H_ #define OMAP_MAKEREV(d, a, b, c) \ (uint32_t)(((d) << 16) | (((a) & 0xf) << 8) | (((b) & 0xf) << 4) | ((c) & 0xf)) @@ -36,36 +36,38 @@ #define OMAP_REV_MINOR(x) (((x) >> 4) & 0xf) #define OMAP_REV_MINOR_MINOR(x) (((x) >> 0) & 0xf) -#define OMAP3530_DEV 0x3530 -#define OMAP4430_DEV 0x4430 +#define OMAP3350_REV_ES1_0 OMAP_MAKEREV(0x3530, 1, 0, 0) +#define OMAP3530_REV_ES2_0 OMAP_MAKEREV(0x3530, 2, 0, 0) +#define OMAP3530_REV_ES2_1 OMAP_MAKEREV(0x3530, 2, 1, 0) +#define OMAP3530_REV_ES3_0 OMAP_MAKEREV(0x3530, 3, 0, 0) +#define OMAP3530_REV_ES3_1 OMAP_MAKEREV(0x3530, 3, 1, 0) +#define OMAP3530_REV_ES3_1_2 OMAP_MAKEREV(0x3530, 3, 1, 2) + +#define OMAP4430_REV_ES1_0 OMAP_MAKEREV(0x4430, 1, 0, 0) +#define OMAP4430_REV_ES2_0 OMAP_MAKEREV(0x4430, 2, 0, 0) +#define OMAP4430_REV_ES2_1 OMAP_MAKEREV(0x4430, 2, 1, 0) +#define OMAP4430_REV_ES2_2 OMAP_MAKEREV(0x4430, 2, 2, 0) +#define OMAP4430_REV_ES2_3 OMAP_MAKEREV(0x4430, 2, 3, 0) + +#define AM335X_DEVREV(x) ((x) >> 28) + +#define CHIP_OMAP_3 0 +#define CHIP_OMAP_4 1 +#define CHIP_AM335X 2 -#define OMAP3350_REV_ES1_0 OMAP_MAKEREV(OMAP3530_DEV, 1, 0, 0) -#define OMAP3530_REV_ES2_0 OMAP_MAKEREV(OMAP3530_DEV, 2, 0, 0) -#define OMAP3530_REV_ES2_1 OMAP_MAKEREV(OMAP3530_DEV, 2, 1, 0) -#define OMAP3530_REV_ES3_0 OMAP_MAKEREV(OMAP3530_DEV, 3, 0, 0) -#define OMAP3530_REV_ES3_1 OMAP_MAKEREV(OMAP3530_DEV, 3, 1, 0) -#define OMAP3530_REV_ES3_1_2 OMAP_MAKEREV(OMAP3530_DEV, 3, 1, 2) - -#define OMAP4430_REV_ES1_0 OMAP_MAKEREV(OMAP4430_DEV, 1, 0, 0) -#define OMAP4430_REV_ES2_0 OMAP_MAKEREV(OMAP4430_DEV, 2, 0, 0) -#define OMAP4430_REV_ES2_1 OMAP_MAKEREV(OMAP4430_DEV, 2, 1, 0) -#define OMAP4430_REV_ES2_2 OMAP_MAKEREV(OMAP4430_DEV, 2, 2, 0) -#define OMAP4430_REV_ES2_3 OMAP_MAKEREV(OMAP4430_DEV, 2, 3, 0) - -#define CHIP_OMAP_3 0 -#define CHIP_OMAP_4 1 - -static __inline int omap_chip(void) +static __inline int ti_chip(void) { #if defined(SOC_OMAP4) return CHIP_OMAP_4; #elif defined(SOC_OMAP3) return CHIP_OMAP_3; +#elif defined(SOC_TI_AM335X) + return CHIP_AM335X; #else -# error OMAP chip type not defined, ensure SOC_OMAPxxxx is defined +# error Chip type not defined, ensure SOC_xxxx is defined #endif } -uint32_t omap_revision(void); +uint32_t ti_revision(void); -#endif /* _OMAP_CPUID_H_ */ +#endif /* _TI_CPUID_H_ */ Added: projects/armv6/sys/arm/ti/ti_machdep.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/ti_machdep.c Tue Feb 7 03:41:08 2012 (r231110) @@ -0,0 +1,647 @@ +/*- + * Copyright (c) 1994-1998 Mark Brinicombe. + * Copyright (c) 1994 Brini. + * All rights reserved. + * + * This code is derived from software written for Brini by Mark Brinicombe + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Brini. + * 4. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45 + */ + +#include "opt_ddb.h" +#include "opt_platform.h" +#include "opt_global.h" + +#include +__FBSDID("$FreeBSD$"); + +#define _ARM32_BUS_DMA_PRIVATE +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEBUG +#ifdef DEBUG +#define debugf(fmt, args...) printf(fmt, ##args) +#else +#define debugf(fmt, args...) +#endif + +/* + * This is the number of L2 page tables required for covering max + * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, + * stacks etc.), uprounded to be divisible by 4. + */ +#define KERNEL_PT_MAX 78 + +/* Define various stack sizes in pages */ +#define IRQ_STACK_SIZE 1 +#define ABT_STACK_SIZE 1 +#define UND_STACK_SIZE 1 + +extern unsigned char kernbase[]; +extern unsigned char _etext[]; +extern unsigned char _edata[]; +extern unsigned char __bss_start[]; +extern unsigned char _end[]; + +#ifdef DDB +extern vm_offset_t ksym_start, ksym_end; +#endif + +extern u_int data_abort_handler_address; +extern u_int prefetch_abort_handler_address; +extern u_int undefined_handler_address; + +extern vm_offset_t pmap_bootstrap_lastaddr; +extern int *end; + +struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; + +/* Physical and virtual addresses for some global pages */ +vm_paddr_t phys_avail[10]; +vm_paddr_t dump_avail[4]; +vm_offset_t physical_pages; +vm_offset_t pmap_bootstrap_lastaddr; +vm_paddr_t pmap_pa; + +const struct pmap_devmap *pmap_devmap_bootstrap_table; +struct pv_addr systempage; +struct pv_addr msgbufpv; +struct pv_addr irqstack; +struct pv_addr undstack; +struct pv_addr abtstack; +struct pv_addr kernelstack; + +void set_stackptrs(int cpu); + +static struct trapframe proc0_tf; + +static struct mem_region availmem_regions[FDT_MEM_REGIONS]; +static int availmem_regions_sz; + +static void print_kenv(void); +static void print_kernel_section_addr(void); + +static void physmap_init(void); +static int platform_devmap_init(void); + +static char * +kenv_next(char *cp) +{ + + if (cp != NULL) { + while (*cp != 0) + cp++; + cp++; + if (*cp == 0) + cp = NULL; + } + return (cp); +} + *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-projects@FreeBSD.ORG Tue Feb 7 04:38:44 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0D37E106567A; Tue, 7 Feb 2012 04:38:44 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id EAC658FC19; Tue, 7 Feb 2012 04:38:43 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q174chiN068997; Tue, 7 Feb 2012 04:38:43 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q174chuR068995; Tue, 7 Feb 2012 04:38:43 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202070438.q174chuR068995@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Tue, 7 Feb 2012 04:38:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231114 - in projects/armv6/sys/arm/ti: . omap4 X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Feb 2012 04:38:44 -0000 Author: gonzo Date: Tue Feb 7 04:38:43 2012 New Revision: 231114 URL: http://svn.freebsd.org/changeset/base/231114 Log: - Add FDT-enabled timer driver Submitted by: Damjan Marion Added: projects/armv6/sys/arm/ti/mp_timer.c Deleted: projects/armv6/sys/arm/ti/timer.c Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx Added: projects/armv6/sys/arm/ti/mp_timer.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/mp_timer.c Tue Feb 7 04:38:43 2012 (r231114) @@ -0,0 +1,431 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * All rights reserved. + * + * Developed by Ben Gray + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/** + * The ARM Cortex-A9 core can support a global timer plus a private and + * watchdog timer per core. This driver reserves memory and interrupt + * resources for accessing both timer register sets, these resources are + * stored globally and used to setup the timecount and eventtimer. + * + * The timecount timer uses the global 64-bit counter, whereas the + * per-CPU eventtimer uses the private 32-bit counters. + * + * + * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2) + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +/* Private (per-CPU) timer register map */ +#define PRV_TIMER_LOAD 0x0000 +#define PRV_TIMER_COUNT 0x0004 +#define PRV_TIMER_CTRL 0x0008 +#define PRV_TIMER_INTR 0x000C + +#define PRV_TIMER_CTR_PRESCALER_SHIFT 8 +#define PRV_TIMER_CTRL_IRQ_ENABLE (1UL << 2) +#define PRV_TIMER_CTRL_AUTO_RELOAD (1UL << 1) +#define PRV_TIMER_CTRL_TIMER_ENABLE (1UL << 0) + +#define PRV_TIMER_INTR_EVENT (1UL << 0) + +/* Global timer register map */ +#define GBL_TIMER_COUNT_LOW 0x0000 +#define GBL_TIMER_COUNT_HIGH 0x0004 +#define GBL_TIMER_CTRL 0x0008 +#define GBL_TIMER_INTR 0x000C + +#define GBL_TIMER_CTR_PRESCALER_SHIFT 8 +#define GBL_TIMER_CTRL_AUTO_INC (1UL << 3) +#define GBL_TIMER_CTRL_IRQ_ENABLE (1UL << 2) +#define GBL_TIMER_CTRL_COMP_ENABLE (1UL << 1) +#define GBL_TIMER_CTRL_TIMER_ENABLE (1UL << 0) + +#define GBL_TIMER_INTR_EVENT (1UL << 0) + +struct arm_tmr_softc { + struct resource * tmr_res[4]; + bus_space_tag_t prv_bst; + bus_space_tag_t gbl_bst; + bus_space_handle_t prv_bsh; + bus_space_handle_t gbl_bsh; + uint32_t clkfreq; + struct eventtimer et; +}; + +static struct resource_spec arm_tmr_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Global registers */ + { SYS_RES_IRQ, 0, RF_ACTIVE }, /* Global timer interrupt (unused) */ + { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* Private (per-CPU) registers */ + { SYS_RES_IRQ, 1, RF_ACTIVE }, /* Private timer interrupt */ + { -1, 0 } +}; + +static struct arm_tmr_softc *arm_tmr_sc = NULL; + +#define tmr_prv_read_4(reg) \ + bus_space_read_4(arm_tmr_sc->prv_bst, arm_tmr_sc->prv_bsh, reg) +#define tmr_prv_write_4(reg, val) \ + bus_space_write_4(arm_tmr_sc->prv_bst, arm_tmr_sc->prv_bsh, reg, val) +#define tmr_gbl_read_4(reg) \ + bus_space_read_4(arm_tmr_sc->gbl_bst, arm_tmr_sc->gbl_bsh, reg) +#define tmr_gbl_write_4(reg, val) \ + bus_space_write_4(arm_tmr_sc->gbl_bst, arm_tmr_sc->gbl_bsh, reg, val) + + +static timecounter_get_t arm_tmr_get_timecount; + +static struct timecounter arm_tmr_timecount = { + .tc_name = "ARM MPCore Timecouter", + .tc_get_timecount = arm_tmr_get_timecount, + .tc_poll_pps = NULL, + .tc_counter_mask = ~0u, + .tc_frequency = 0, + .tc_quality = 1000, +}; + +/** + * arm_tmr_get_timecount - reads the timecount (global) timer + * @tc: pointer to arm_tmr_timecount struct + * + * We only read the lower 32-bits, the timecount stuff only uses 32-bits + * so (for now?) ignore the upper 32-bits. + * + * RETURNS + * The lower 32-bits of the counter. + */ +static unsigned +arm_tmr_get_timecount(struct timecounter *tc) +{ + return (tmr_gbl_read_4(GBL_TIMER_COUNT_LOW)); +} + +/** + * arm_tmr_start - starts the eventtimer (private) timer + * @et: pointer to eventtimer struct + * @first: the number of seconds and fractional sections to trigger in + * @period: the period (in seconds and fractional sections) to set + * + * If the eventtimer is required to be in oneshot mode, period will be + * NULL and first will point to the time to trigger. If in periodic mode + * period will contain the time period and first may optionally contain + * the time for the first period. + * + * RETURNS + * Always returns 0 + */ +static int +arm_tmr_start(struct eventtimer *et, struct bintime *first, + struct bintime *period) +{ + struct arm_tmr_softc *sc = (struct arm_tmr_softc *)et->et_priv; + uint32_t load, count; + uint32_t ctrl; + + ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE; + + if (period != NULL) { + load = (et->et_frequency * (period->frac >> 32)) >> 32; + if (period->sec > 0) + load += et->et_frequency * period->sec; + ctrl |= PRV_TIMER_CTRL_AUTO_RELOAD; + } else { + load = 0; + } + + if (first != NULL) { + count = (sc->et.et_frequency * (first->frac >> 32)) >> 32; + if (first->sec != 0) + count += sc->et.et_frequency * first->sec; + } else { + count = load; + } + + tmr_prv_write_4(PRV_TIMER_LOAD, load); + tmr_prv_write_4(PRV_TIMER_COUNT, count); + + tmr_prv_write_4(PRV_TIMER_CTRL, ctrl); + return (0); +} + +/** + * arm_tmr_stop - stops the eventtimer (private) timer + * @et: pointer to eventtimer struct + * + * Simply stops the private timer by clearing all bits in the ctrl register. + * + * RETURNS + * Always returns 0 + */ +static int +arm_tmr_stop(struct eventtimer *et) +{ + tmr_prv_write_4(PRV_TIMER_CTRL, 0); + return (0); +} + +/** + * arm_tmr_intr - ISR for the eventtimer (private) timer + * @arg: pointer to arm_tmr_softc struct + * + * Clears the event register and then calls the eventtimer callback. + * + * RETURNS + * Always returns FILTER_HANDLED + */ +static int +arm_tmr_intr(void *arg) +{ + struct arm_tmr_softc *sc = (struct arm_tmr_softc *)arg; + + tmr_prv_write_4(PRV_TIMER_INTR, PRV_TIMER_INTR_EVENT); + + if (sc->et.et_active) + sc->et.et_event_cb(&sc->et, sc->et.et_arg); + + return (FILTER_HANDLED); +} + + + + +/** + * arm_tmr_probe - timer probe routine + * @dev: new device + * + * The probe function returns success when probed with the fdt compatible + * string set to "arm,mpcore-timers". + * + * RETURNS + * BUS_PROBE_DEFAULT if the fdt device is compatible, otherwise ENXIO. + */ +static int +arm_tmr_probe(device_t dev) +{ + if (!ofw_bus_is_compatible(dev, "arm,mpcore-timers")) + return (ENXIO); + + device_set_desc(dev, "ARM Generic MPCore Timers"); + return (BUS_PROBE_DEFAULT); +} + +/** + * arm_tmr_attach - attaches the timer to the simplebus + * @dev: new device + * + * Reserves memory and interrupt resources, stores the softc structure + * globally and registers both the timecount and eventtimer objects. + * + * RETURNS + * Zero on sucess or ENXIO if an error occuried. + */ +static int +arm_tmr_attach(device_t dev) +{ + struct arm_tmr_softc *sc = device_get_softc(dev); + phandle_t node; + pcell_t clock; + void *ihl; + + if (arm_tmr_sc) + return (ENXIO); + + /* Get the base clock frequency */ + node = ofw_bus_get_node(dev); + if ((OF_getprop(node, "clock-frequency", &clock, sizeof(clock))) <= 0) { + device_printf(dev, "missing clock-frequency attribute in FDT\n"); + return (ENXIO); + } + sc->clkfreq = fdt32_to_cpu(clock); + + + if (bus_alloc_resources(dev, arm_tmr_spec, sc->tmr_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + /* Global timer interface */ + sc->gbl_bst = rman_get_bustag(sc->tmr_res[0]); + sc->gbl_bsh = rman_get_bushandle(sc->tmr_res[0]); + + /* Private per-CPU timer interface */ + sc->prv_bst = rman_get_bustag(sc->tmr_res[2]); + sc->prv_bsh = rman_get_bushandle(sc->tmr_res[2]); + + arm_tmr_sc = sc; + + /* Disable both timers to start off */ + tmr_prv_write_4(PRV_TIMER_CTRL, 0x00000000); + tmr_gbl_write_4(PRV_TIMER_CTRL, 0x00000000); + + /* Setup and enable the global timer to use as the timecounter */ + tmr_gbl_write_4(GBL_TIMER_CTRL, (0x00 << GBL_TIMER_CTR_PRESCALER_SHIFT) | + GBL_TIMER_CTRL_TIMER_ENABLE); + + arm_tmr_timecount.tc_frequency = sc->clkfreq; + tc_init(&arm_tmr_timecount); + + /* Setup and enable the timer */ + if (bus_setup_intr(dev, sc->tmr_res[3], INTR_TYPE_CLK, arm_tmr_intr, + NULL, sc, &ihl) != 0) { + bus_release_resources(dev, arm_tmr_spec, sc->tmr_res); + device_printf(dev, "Unable to setup the clock irq handler.\n"); + return (ENXIO); + } + + sc->et.et_name = "ARM MPCore Eventtimer"; + sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU; + sc->et.et_quality = 1000; + + sc->et.et_frequency = sc->clkfreq; + sc->et.et_min_period.sec = 0; + sc->et.et_min_period.frac = + ((0x00000002LLU << 32) / sc->et.et_frequency) << 32; + sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency; + sc->et.et_max_period.frac = + ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32; + sc->et.et_start = arm_tmr_start; + sc->et.et_stop = arm_tmr_stop; + sc->et.et_priv = sc; + et_register(&sc->et); + + return (0); +} + +static device_method_t arm_tmr_methods[] = { + DEVMETHOD(device_probe, arm_tmr_probe), + DEVMETHOD(device_attach, arm_tmr_attach), + { 0, 0 } +}; + +static driver_t arm_tmr_driver = { + "mp_tmr", + arm_tmr_methods, + sizeof(struct arm_tmr_softc), +}; + +static devclass_t arm_tmr_devclass; + +DRIVER_MODULE(mp_tmr, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0); + +/** + * cpu_initclocks - called by system to initialise the cpu clocks + * + * This is a boilerplat function, most of the setup has already been done + * when the driver was attached. Therefore this function must only be called + * after the driver is attached. + * + * RETURNS + * nothing + */ +void +cpu_initclocks(void) +{ + if (PCPU_GET(cpuid) == 0) + cpu_initclocks_bsp(); + else + cpu_initclocks_ap(); +} + +/** + * DELAY - Delay for at least usec microseconds. + * @usec: number of microseconds to delay by + * + * This function is called all over the kernel and is suppose to provide a + * consistent delay. This function may also be called before the console + * is setup so no printf's can be called here. + * + * RETURNS: + * nothing + */ +void +DELAY(int usec) +{ + int32_t counts_per_usec; + int32_t counts; + uint32_t first, last; + + /* Check the timers are setup, if not just use a for loop for the meantime */ + if (arm_tmr_sc == NULL) { + for (; usec > 0; usec--) + for (counts = 200; counts > 0; counts--) + cpufunc_nullop(); /* Prevent gcc from optimizing + * out the loop + */ + return; + } + + /* Get the number of times to count */ + counts_per_usec = ((arm_tmr_timecount.tc_frequency / 1000000) + 1); + + /* + * Clamp the timeout at a maximum value (about 32 seconds with + * a 66MHz clock). *Nobody* should be delay()ing for anywhere + * near that length of time and if they are, they should be hung + * out to dry. + */ + if (usec >= (0x80000000U / counts_per_usec)) + counts = (0x80000000U / counts_per_usec) - 1; + else + counts = usec * counts_per_usec; + + first = tmr_gbl_read_4(GBL_TIMER_COUNT_LOW); + + while (counts > 0) { + last = tmr_gbl_read_4(GBL_TIMER_COUNT_LOW); + counts -= (int32_t)(last - first); + first = last; + } +} Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Tue Feb 7 04:06:21 2012 (r231113) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Tue Feb 7 04:38:43 2012 (r231114) @@ -17,7 +17,7 @@ arm/ti/ti_cpuid.c standard # arm/ti/omap_prcm.c standard # arm/ti/omap_scm.c standard # arm/ti/omap_if.m standard -arm/ti/timer.c standard +arm/ti/mp_timer.c standard arm/ti/gic.c standard arm/ti/common.c standard @@ -28,6 +28,5 @@ arm/ti/bus_space.c standard # arm/ti/omap4/omap4_intr.c standard # arm/ti/omap4/omap4_prcm_clks.c standard # arm/ti/omap4/omap4_scm_padconf.c standard -# arm/ti/omap4/omap4_timer.c standard dev/uart/uart_dev_ns8250.c optional uart From owner-svn-src-projects@FreeBSD.ORG Tue Feb 7 22:13:25 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3F29F106566B; Tue, 7 Feb 2012 22:13:25 +0000 (UTC) (envelope-from jamie@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 2E6BD8FC0A; Tue, 7 Feb 2012 22:13:25 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q17MDPt9009640; Tue, 7 Feb 2012 22:13:25 GMT (envelope-from jamie@svn.freebsd.org) Received: (from jamie@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q17MDONb009638; Tue, 7 Feb 2012 22:13:24 GMT (envelope-from jamie@svn.freebsd.org) Message-Id: <201202072213.q17MDONb009638@svn.freebsd.org> From: Jamie Gritton Date: Tue, 7 Feb 2012 22:13:24 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231163 - projects/jailconf/usr.sbin/jail X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 07 Feb 2012 22:13:25 -0000 Author: jamie Date: Tue Feb 7 22:13:24 2012 New Revision: 231163 URL: http://svn.freebsd.org/changeset/base/231163 Log: Allow relative pathnames for jails generated on the command line (but continue to flag when from a config file). Modified: projects/jailconf/usr.sbin/jail/jail.c Modified: projects/jailconf/usr.sbin/jail/jail.c ============================================================================== --- projects/jailconf/usr.sbin/jail/jail.c Tue Feb 7 21:56:58 2012 (r231162) +++ projects/jailconf/usr.sbin/jail/jail.c Tue Feb 7 22:13:24 2012 (r231163) @@ -582,7 +582,7 @@ create_jail(struct cfjail *j) * gives. */ if ((path = string_param(j->intparams[KP_PATH]))) { - if (path[0] != '/') { + if (j->name != NULL && path[0] != '/') { jail_warnx(j, "path %s: not an absolute pathname", path); return -1; From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 01:31:02 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id EFE3210656D5; Wed, 8 Feb 2012 01:31:02 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id DDE098FC14; Wed, 8 Feb 2012 01:31:02 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q181V25o016077; Wed, 8 Feb 2012 01:31:02 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q181V2Zg016072; Wed, 8 Feb 2012 01:31:02 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080131.q181V2Zg016072@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 01:31:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231173 - in projects/armv6/sys: arm/ti arm/ti/omap4 boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 01:31:03 -0000 Author: gonzo Date: Wed Feb 8 01:31:02 2012 New Revision: 231173 URL: http://svn.freebsd.org/changeset/base/231173 Log: Add FDT-enabled SCM module driver and respective node to dts Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/arm/ti/omap_scm.c projects/armv6/sys/arm/ti/omap_scm.h projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 00:36:36 2012 (r231172) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 01:31:02 2012 (r231173) @@ -15,7 +15,7 @@ arm/ti/ti_machdep.c standard # arm/ti/omap.c standard arm/ti/ti_cpuid.c standard # arm/ti/omap_prcm.c standard -# arm/ti/omap_scm.c standard +arm/ti/omap_scm.c standard # arm/ti/omap_if.m standard arm/ti/mp_timer.c standard arm/ti/gic.c standard @@ -27,6 +27,6 @@ arm/ti/bus_space.c standard # arm/ti/omap4/omap44xx.c standard # arm/ti/omap4/omap4_intr.c standard # arm/ti/omap4/omap4_prcm_clks.c standard -# arm/ti/omap4/omap4_scm_padconf.c standard +arm/ti/omap4/omap4_scm_padconf.c standard dev/uart/uart_dev_ns8250.c optional uart Modified: projects/armv6/sys/arm/ti/omap_scm.c ============================================================================== --- projects/armv6/sys/arm/ti/omap_scm.c Wed Feb 8 00:36:36 2012 (r231172) +++ projects/armv6/sys/arm/ti/omap_scm.c Wed Feb 8 01:31:02 2012 (r231173) @@ -64,9 +64,26 @@ __FBSDID("$FreeBSD$"); #include #include +#include +#include +#include +#include + #include "omap_scm.h" #include "omap_if.h" +static struct resource_spec omap_scm_res_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ + { -1, 0 } +}; + +static struct omap_scm_softc *omap_scm_sc; + +#define omap_scm_read_2(sc, reg) \ + bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg)) +#define omap_scm_write_2(sc, reg, val) \ + bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) + /** * omap_padconf_devmap - Array of pins, should be defined one per SoC * @@ -77,18 +94,6 @@ __FBSDID("$FreeBSD$"); extern const struct omap_scm_padconf omap_padconf_devmap[]; /** - * Macros for driver mutex locking - */ -#define OMAP_SCM_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) -#define OMAP_SCM_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) -#define OMAP_SCM_LOCK_INIT(_sc) \ - mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ - "omap_scm", MTX_DEF) -#define OMAP_SCM_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx) -#define OMAP_SCM_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED) -#define OMAP_SCM_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED) - -/** * omap_scm_padconf_from_name - searches the list of pads and returns entry * with matching ball name. * @ballname: the name of the ball @@ -126,7 +131,7 @@ omap_scm_padconf_from_name(const char *b * EINVAL if pin requested is outside valid range or already in use. */ static int -omap_scm_padconf_set_internal(device_t dev, +omap_scm_padconf_set_internal(struct omap_scm_softc *sc, const struct omap_scm_padconf *padconf, const char *muxmode, unsigned int state) { @@ -153,7 +158,7 @@ omap_scm_padconf_set_internal(device_t d printf("setting internal %x for %s\n", reg_val, muxmode); /* write the register value (16-bit writes) */ - OMAP_SCM_WRITES(dev, padconf->reg_off, reg_val); + omap_scm_write_2(sc, padconf->reg_off, reg_val); return (0); } @@ -173,17 +178,19 @@ omap_scm_padconf_set_internal(device_t d * EINVAL if pin requested is outside valid range or already in use. */ int -omap_scm_padconf_set(device_t dev, const char *padname, - const char *muxmode, unsigned int state) +omap_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state) { const struct omap_scm_padconf *padconf; + if (!omap_scm_sc) + return (ENXIO); + /* find the pin in the devmap */ padconf = omap_scm_padconf_from_name(padname); if (padconf == NULL) return (EINVAL); - return (omap_scm_padconf_set_internal(dev, padconf, muxmode, state)); + return (omap_scm_padconf_set_internal(omap_scm_sc, padconf, muxmode, state)); } /** @@ -201,19 +208,22 @@ omap_scm_padconf_set(device_t dev, const * EINVAL if pin requested is outside valid range or already in use. */ int -omap_scm_padconf_get(device_t dev, const char *padname, const char **muxmode, +omap_scm_padconf_get(const char *padname, const char **muxmode, unsigned int *state) { const struct omap_scm_padconf *padconf; uint16_t reg_val; + if (!omap_scm_sc) + return (ENXIO); + /* find the pin in the devmap */ padconf = omap_scm_padconf_from_name(padname); if (padconf == NULL) return (EINVAL); /* read the register value (16-bit reads) */ - reg_val = OMAP_SCM_READS(dev, padconf->reg_off); + reg_val = omap_scm_read_2(omap_scm_sc, padconf->reg_off); /* save the state */ if (state) @@ -241,10 +251,13 @@ omap_scm_padconf_get(device_t dev, const * EINVAL if pin requested is outside valid range or already in use. */ int -omap_scm_padconf_set_gpiomode(device_t dev, uint32_t gpio, unsigned int state) +omap_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state) { const struct omap_scm_padconf *padconf; uint16_t reg_val; + + if (!omap_scm_sc) + return (ENXIO); /* find the gpio pin in the padconf array */ padconf = omap_padconf_devmap; @@ -263,7 +276,7 @@ omap_scm_padconf_set_gpiomode(device_t d reg_val |= (uint16_t)(padconf->gpio_mode & CONTROL_PADCONF_MUXMODE_MASK); /* write the register value (16-bit writes) */ - OMAP_SCM_WRITES(dev, padconf->reg_off, reg_val); + omap_scm_write_2(omap_scm_sc, padconf->reg_off, reg_val); return (0); } @@ -283,10 +296,13 @@ omap_scm_padconf_set_gpiomode(device_t d * EINVAL if pin requested is outside valid range or not configured as GPIO. */ int -omap_scm_padconf_get_gpiomode(device_t dev, uint32_t gpio, unsigned int *state) +omap_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state) { const struct omap_scm_padconf *padconf; uint16_t reg_val; + + if (!omap_scm_sc) + return (ENXIO); /* find the gpio pin in the padconf array */ padconf = omap_padconf_devmap; @@ -299,7 +315,7 @@ omap_scm_padconf_get_gpiomode(device_t d return (EINVAL); /* read the current register settings */ - reg_val = OMAP_SCM_READS(dev, padconf->reg_off); + reg_val = omap_scm_read_2(omap_scm_sc, padconf->reg_off); /* check to make sure the pins is configured as GPIO in the first state */ if ((reg_val & CONTROL_PADCONF_MUXMODE_MASK) != padconf->gpio_mode) @@ -325,73 +341,140 @@ omap_scm_padconf_get_gpiomode(device_t d * 0 on success. * EINVAL if pin requested is outside valid range or already in use. */ -int -omap_scm_padconf_init_from_hints(device_t dev) +static int +omap_scm_padconf_init_from_fdt(struct omap_scm_softc *sc) { const struct omap_scm_padconf *padconf; int err; - char resname[64]; - const char *resval; - char muxname[64]; - char padstate[64]; - - /* Hint names should be of the form "padconf." */ - strcpy(resname, "padconf."); - - /* This is very inefficent ... basically we look up every possible pad name - * in the hints. Unfortunatly there doesn't seem to be any way to iterate - * over all the hints for a given device, so instead we have to manually - * probe for the existance of every possible pad. - */ - padconf = omap_padconf_devmap; - while (padconf->ballname != NULL) { - - strncpy(&resname[8], padconf->ballname, 50); - - err = resource_string_value(device_get_name(dev), - device_get_unit(dev), resname, &resval); - if ((err == 0) && (resval != NULL)) { - - /* Found a matching pad/ball name in the hints section, the hint - * should be of the following format: - * : - * i.e. - * usbb1_ulpiphy_stp:output - */ - - /* Read the mux name */ - if (sscanf(resval, "%64[^:]:%64s", muxname, padstate) != 2) { - device_printf(dev, "err: padconf hint for pin \"%s\"" - "is incorrectly formated, ignoring hint.\n", - padconf->ballname); - } - - /* Convert the padstate to a flag and write the values */ - else { + + phandle_t node; + int len; + char *fdt_pad_config; + int i; + char *padname, *muxname, *padstate; + + node = ofw_bus_get_node(sc->sc_dev); + len = OF_getproplen(node, "omap-pad-config"); + OF_getprop_alloc(node, "omap-pad-config", 1, (void **)&fdt_pad_config); + + i = len; + while (i > 0) { + padname = fdt_pad_config; + fdt_pad_config += strlen(padname) + 1; + i -= strlen(padname) + 1; + if (i <= 0) + break; + + muxname = fdt_pad_config; + fdt_pad_config += strlen(muxname) + 1; + i -= strlen(muxname) + 1; + if (i <= 0) + break; + + padstate = fdt_pad_config; + fdt_pad_config += strlen(padstate) + 1; + i -= strlen(padstate) + 1; + if (i < 0) + break; + + /* This is very inefficent ... basically we look up every possible pad name + * in the hints. Unfortunatly there doesn't seem to be any way to iterate + * over all the hints for a given device, so instead we have to manually + * probe for the existance of every possible pad. + */ + padconf = omap_padconf_devmap; + while (padconf->ballname != NULL) { + if (strcmp(padconf->ballname, padname) == 0) { if (strcmp(padstate, "output") == 0) - err = omap_scm_padconf_set_internal(dev, + err = omap_scm_padconf_set_internal(sc, padconf, muxname, PADCONF_PIN_OUTPUT); else if (strcmp(padstate, "input") == 0) - err = omap_scm_padconf_set_internal(dev, + err = omap_scm_padconf_set_internal(sc, padconf, muxname, PADCONF_PIN_INPUT); else if (strcmp(padstate, "input_pullup") == 0) - err = omap_scm_padconf_set_internal(dev, + err = omap_scm_padconf_set_internal(sc, padconf, muxname, PADCONF_PIN_INPUT_PULLUP); else if (strcmp(padstate, "input_pulldown") == 0) - err = omap_scm_padconf_set_internal(dev, + err = omap_scm_padconf_set_internal(sc, padconf, muxname, PADCONF_PIN_INPUT_PULLDOWN); else - device_printf(dev, "err: padconf hint for pin \"%s\"" - "has incorrectly formated state, ignoring hint.\n", - padconf->ballname); + device_printf(sc->sc_dev, "err: padconf hint for pin \"%s\"" + "has incorrectly formated state, ignoring hint.\n", + padconf->ballname); } + padconf++; } - - padconf++; } return (0); } + +/* + * Device part of OMAP SCM driver + */ + +static int +omap_scm_probe(device_t dev) +{ + if (!ofw_bus_is_compatible(dev, "ti,omap_scm")) + return (ENXIO); + + device_set_desc(dev, "TI OMAP Control Module"); + return (BUS_PROBE_DEFAULT); +} + +/** + * omap_scm_attach - attaches the timer to the simplebus + * @dev: new device + * + * Reserves memory and interrupt resources, stores the softc structure + * globally and registers both the timecount and eventtimer objects. + * + * RETURNS + * Zero on sucess or ENXIO if an error occuried. + */ +static int +omap_scm_attach(device_t dev) +{ + struct omap_scm_softc *sc = device_get_softc(dev); + + if (omap_scm_sc) + return (ENXIO); + + sc->sc_dev = dev; + + if (bus_alloc_resources(dev, omap_scm_res_spec, sc->sc_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + /* Global timer interface */ + sc->sc_bst = rman_get_bustag(sc->sc_res[0]); + sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]); + + omap_scm_sc = sc; + + omap_scm_padconf_init_from_fdt(sc); + + return (0); +} + + +static device_method_t omap_scm_methods[] = { + DEVMETHOD(device_probe, omap_scm_probe), + DEVMETHOD(device_attach, omap_scm_attach), + { 0, 0 } +}; + +static driver_t omap_scm_driver = { + "omap_scm", + omap_scm_methods, + sizeof(struct omap_scm_softc), +}; + +static devclass_t omap_scm_devclass; + +DRIVER_MODULE(omap_scm, simplebus, omap_scm_driver, omap_scm_devclass, 0, 0); Modified: projects/armv6/sys/arm/ti/omap_scm.h ============================================================================== --- projects/armv6/sys/arm/ti/omap_scm.h Wed Feb 8 00:36:36 2012 (r231172) +++ projects/armv6/sys/arm/ti/omap_scm.h Wed Feb 8 01:31:02 2012 (r231173) @@ -95,14 +95,18 @@ struct omap_scm_padconf { const char *muxmodes[8]; }; -int omap_scm_padconf_set(device_t dev, const char *padname, - const char *muxmode, unsigned int state); -int omap_scm_padconf_get(device_t dev, const char *padname, - const char **muxmode, unsigned int *state); -int omap_scm_padconf_set_gpiomode(device_t dev, uint32_t gpio, - unsigned int state); -int omap_scm_padconf_get_gpiomode(device_t dev, uint32_t gpio, - unsigned int *state); -int omap_scm_padconf_init_from_hints(device_t dev); +struct omap_scm_softc { + device_t sc_dev; + struct resource * sc_res[4]; + bus_space_tag_t sc_bst; + bus_space_handle_t sc_bsh; +}; + +int omap_scm_padconf_set(const char *padname, const char *muxmode, + unsigned int state); +int omap_scm_padconf_get(const char *padname, const char **muxmode, + unsigned int *state); +int omap_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state); +int omap_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state); #endif /* _OMAP_SCM_H_ */ Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts ============================================================================== --- projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 00:36:36 2012 (r231172) +++ projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 01:31:02 2012 (r231173) @@ -73,7 +73,6 @@ interrupt-parent = < &GIC >; }; - uart3: serial@48020000 { compatible = "ns16550"; reg = <0x48020000 0x1000>; @@ -83,6 +82,25 @@ clock-frequency = < 48000000 >; /* 48Mhz clock for all uarts */ /* (techref 17.3.1.1) */ }; + + omap_scp@4a100000 { + compatible = "ti,omap_scm"; + reg = < 0x4a100000 0x1000 >; + /* Set of triplets < padname, muxname, padstate> */ + omap-pad-config = + "ag19", "usbb1_ulpiphy_stp", "output", + "ae18", "usbb1_ulpiphy_clk", "input_pulldown", + "af19", "usbb1_ulpiphy_dir", "input_pulldown", + "ae19", "usbb1_ulpiphy_nxt", "input_pulldown", + "af18", "usbb1_ulpiphy_dat0", "input_pulldown", + "ag18", "usbb1_ulpiphy_dat1", "input_pulldown", + "ae17", "usbb1_ulpiphy_dat2", "input_pulldown", + "af17", "usbb1_ulpiphy_dat3", "input_pulldown", + "ah17", "usbb1_ulpiphy_dat4", "input_pulldown", + "ae16", "usbb1_ulpiphy_dat5", "input_pulldown", + "af16", "usbb1_ulpiphy_dat6", "input_pulldown", + "ag16", "usbb1_ulpiphy_dat7", "input_pulldown"; + }; }; chosen { From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 02:15:59 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7ACBD106564A; Wed, 8 Feb 2012 02:15:59 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 6A5BA8FC24; Wed, 8 Feb 2012 02:15:59 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q182Fx4f017498; Wed, 8 Feb 2012 02:15:59 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q182FxIn017496; Wed, 8 Feb 2012 02:15:59 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080215.q182FxIn017496@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 02:15:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231174 - projects/armv6/sys/boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 02:15:59 -0000 Author: gonzo Date: Wed Feb 8 02:15:59 2012 New Revision: 231174 URL: http://svn.freebsd.org/changeset/base/231174 Log: Fix typo Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts ============================================================================== --- projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 01:31:02 2012 (r231173) +++ projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 02:15:59 2012 (r231174) @@ -83,7 +83,7 @@ /* (techref 17.3.1.1) */ }; - omap_scp@4a100000 { + omap_scm@4a100000 { compatible = "ti,omap_scm"; reg = < 0x4a100000 0x1000 >; /* Set of triplets < padname, muxname, padstate> */ From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 03:16:30 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BC87D10656F9; Wed, 8 Feb 2012 03:16:30 +0000 (UTC) (envelope-from rmacklem@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A30808FC12; Wed, 8 Feb 2012 03:16:30 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q183GUxW019730; Wed, 8 Feb 2012 03:16:30 GMT (envelope-from rmacklem@svn.freebsd.org) Received: (from rmacklem@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q183GUu3019696; Wed, 8 Feb 2012 03:16:30 GMT (envelope-from rmacklem@svn.freebsd.org) Message-Id: <201202080316.q183GUu3019696@svn.freebsd.org> From: Rick Macklem Date: Wed, 8 Feb 2012 03:16:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231176 - in projects/nfsv4.1-client/sys: amd64/acpica amd64/amd64 amd64/conf amd64/include boot/ficl boot/ficl/i386 cam/ata cam/ctl cam/scsi compat/freebsd32 conf dev/acpica dev/ath de... X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 03:16:30 -0000 Author: rmacklem Date: Wed Feb 8 03:16:29 2012 New Revision: 231176 URL: http://svn.freebsd.org/changeset/base/231176 Log: Merge in an up-to-date kernel from head. Added: projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS - copied unchanged from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_HOST - copied unchanged from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_HOST projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE - copied unchanged from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE projects/nfsv4.1-client/sys/dev/isci/ - copied from r231175, head/sys/dev/isci/ projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_82598.h - copied unchanged from r231175, head/sys/dev/ixgbe/ixgbe_82598.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_82599.h - copied unchanged from r231175, head/sys/dev/ixgbe/ixgbe_82599.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_x540.c - copied unchanged from r231175, head/sys/dev/ixgbe/ixgbe_x540.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_x540.h - copied unchanged from r231175, head/sys/dev/ixgbe/ixgbe_x540.h projects/nfsv4.1-client/sys/dev/sound/pci/cs461x_dsp.h - copied unchanged from r231175, head/sys/dev/sound/pci/cs461x_dsp.h projects/nfsv4.1-client/sys/i386/conf/WITHOUT_SOURCELESS - copied unchanged from r231175, head/sys/i386/conf/WITHOUT_SOURCELESS projects/nfsv4.1-client/sys/i386/conf/WITHOUT_SOURCELESS_HOST - copied unchanged from r231175, head/sys/i386/conf/WITHOUT_SOURCELESS_HOST projects/nfsv4.1-client/sys/i386/conf/WITHOUT_SOURCELESS_UCODE - copied unchanged from r231175, head/sys/i386/conf/WITHOUT_SOURCELESS_UCODE projects/nfsv4.1-client/sys/modules/isci/ - copied from r231175, head/sys/modules/isci/ projects/nfsv4.1-client/sys/powerpc/ofw/ofw_pci.c - copied unchanged from r231175, head/sys/powerpc/ofw/ofw_pci.c projects/nfsv4.1-client/sys/powerpc/ofw/ofw_pci.h - copied unchanged from r231175, head/sys/powerpc/ofw/ofw_pci.h Deleted: projects/nfsv4.1-client/sys/gnu/dev/ Modified: projects/nfsv4.1-client/sys/amd64/acpica/acpi_switch.S projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakecode.S projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakeup.c projects/nfsv4.1-client/sys/amd64/amd64/apic_vector.S projects/nfsv4.1-client/sys/amd64/amd64/fpu.c projects/nfsv4.1-client/sys/amd64/conf/GENERIC projects/nfsv4.1-client/sys/amd64/conf/NOTES projects/nfsv4.1-client/sys/amd64/include/cpufunc.h projects/nfsv4.1-client/sys/amd64/include/signal.h projects/nfsv4.1-client/sys/boot/ficl/fileaccess.c projects/nfsv4.1-client/sys/boot/ficl/i386/sysdep.h projects/nfsv4.1-client/sys/cam/ata/ata_da.c projects/nfsv4.1-client/sys/cam/ata/ata_xpt.c projects/nfsv4.1-client/sys/cam/ctl/ctl_frontend_cam_sim.c projects/nfsv4.1-client/sys/cam/scsi/scsi_da.c projects/nfsv4.1-client/sys/compat/freebsd32/freebsd32_signal.h projects/nfsv4.1-client/sys/conf/files projects/nfsv4.1-client/sys/conf/files.amd64 projects/nfsv4.1-client/sys/conf/files.i386 projects/nfsv4.1-client/sys/conf/files.powerpc projects/nfsv4.1-client/sys/conf/options projects/nfsv4.1-client/sys/conf/options.amd64 projects/nfsv4.1-client/sys/conf/options.i386 projects/nfsv4.1-client/sys/dev/acpica/acpi.c projects/nfsv4.1-client/sys/dev/acpica/acpi_ec.c projects/nfsv4.1-client/sys/dev/acpica/acpi_hpet.c projects/nfsv4.1-client/sys/dev/acpica/acpi_timer.c projects/nfsv4.1-client/sys/dev/acpica/acpivar.h projects/nfsv4.1-client/sys/dev/ath/ath_dfs/null/dfs_null.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5210/ar5210_attach.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5212/ar5212.h projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c projects/nfsv4.1-client/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c projects/nfsv4.1-client/sys/dev/ath/if_ath.c projects/nfsv4.1-client/sys/dev/bge/if_bge.c projects/nfsv4.1-client/sys/dev/cxgb/cxgb_adapter.h projects/nfsv4.1-client/sys/dev/cxgb/cxgb_main.c projects/nfsv4.1-client/sys/dev/cxgb/cxgb_sge.c projects/nfsv4.1-client/sys/dev/cxgbe/adapter.h projects/nfsv4.1-client/sys/dev/cxgbe/t4_l2t.c projects/nfsv4.1-client/sys/dev/cxgbe/t4_l2t.h projects/nfsv4.1-client/sys/dev/cxgbe/t4_main.c projects/nfsv4.1-client/sys/dev/fe/if_fe.c projects/nfsv4.1-client/sys/dev/ie/if_ie.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_82598.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_82599.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_api.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_api.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_common.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_common.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_mbx.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_mbx.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_osdep.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_phy.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_phy.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_type.h projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_vf.c projects/nfsv4.1-client/sys/dev/ixgbe/ixgbe_vf.h projects/nfsv4.1-client/sys/dev/ixgbe/ixv.c projects/nfsv4.1-client/sys/dev/ixgbe/ixv.h projects/nfsv4.1-client/sys/dev/mvs/mvs.h projects/nfsv4.1-client/sys/dev/mvs/mvs_soc.c projects/nfsv4.1-client/sys/dev/pci/pcireg.h projects/nfsv4.1-client/sys/dev/sound/pci/csa.c projects/nfsv4.1-client/sys/dev/sound/pci/csareg.h projects/nfsv4.1-client/sys/dev/sound/pci/hda/hdac.c projects/nfsv4.1-client/sys/dev/sound/pci/hda/hdac.h projects/nfsv4.1-client/sys/dev/sound/pci/hda/hdacc.c projects/nfsv4.1-client/sys/dev/sound/pcm/buffer.c projects/nfsv4.1-client/sys/dev/sound/pcm/buffer.h projects/nfsv4.1-client/sys/dev/sound/pcm/channel.c projects/nfsv4.1-client/sys/dev/xen/netback/netback.c projects/nfsv4.1-client/sys/fs/ext2fs/ext2_dinode.h projects/nfsv4.1-client/sys/fs/ext2fs/ext2fs.h projects/nfsv4.1-client/sys/fs/ext2fs/inode.h projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clvfsops.c projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clvnops.c projects/nfsv4.1-client/sys/fs/nwfs/nwfs_vnops.c projects/nfsv4.1-client/sys/fs/smbfs/smbfs_vnops.c projects/nfsv4.1-client/sys/geom/journal/g_journal.c projects/nfsv4.1-client/sys/geom/part/g_part.c projects/nfsv4.1-client/sys/i386/conf/GENERIC projects/nfsv4.1-client/sys/i386/conf/NOTES projects/nfsv4.1-client/sys/i386/i386/initcpu.c projects/nfsv4.1-client/sys/i386/include/signal.h projects/nfsv4.1-client/sys/i386/include/xen/xenpmap.h projects/nfsv4.1-client/sys/i386/include/xen/xenvar.h projects/nfsv4.1-client/sys/kern/imgact_elf.c projects/nfsv4.1-client/sys/kern/kern_kthread.c projects/nfsv4.1-client/sys/kern/subr_log.c projects/nfsv4.1-client/sys/kern/subr_mchain.c projects/nfsv4.1-client/sys/kern/subr_syscall.c projects/nfsv4.1-client/sys/kern/tty.c projects/nfsv4.1-client/sys/kern/tty_info.c projects/nfsv4.1-client/sys/kern/tty_ttydisc.c projects/nfsv4.1-client/sys/kern/uipc_socket.c projects/nfsv4.1-client/sys/kern/vfs_aio.c projects/nfsv4.1-client/sys/kern/vfs_cache.c projects/nfsv4.1-client/sys/kern/vfs_mount.c projects/nfsv4.1-client/sys/kern/vfs_subr.c projects/nfsv4.1-client/sys/kern/vfs_syscalls.c projects/nfsv4.1-client/sys/kern/vfs_vnops.c projects/nfsv4.1-client/sys/modules/Makefile projects/nfsv4.1-client/sys/modules/drm/Makefile projects/nfsv4.1-client/sys/modules/ixgbe/Makefile projects/nfsv4.1-client/sys/modules/kgssapi/Makefile projects/nfsv4.1-client/sys/modules/kgssapi_krb5/Makefile projects/nfsv4.1-client/sys/modules/sound/driver/Makefile projects/nfsv4.1-client/sys/modules/sound/driver/emu10k1/Makefile projects/nfsv4.1-client/sys/modules/sound/driver/emu10kx/Makefile projects/nfsv4.1-client/sys/modules/sound/driver/maestro3/Makefile projects/nfsv4.1-client/sys/modules/usb/Makefile projects/nfsv4.1-client/sys/net/if.c projects/nfsv4.1-client/sys/net/if_bridge.c projects/nfsv4.1-client/sys/net80211/ieee80211.h projects/nfsv4.1-client/sys/net80211/ieee80211_dfs.c projects/nfsv4.1-client/sys/net80211/ieee80211_dfs.h projects/nfsv4.1-client/sys/net80211/ieee80211_mesh.c projects/nfsv4.1-client/sys/netinet/ip_carp.c projects/nfsv4.1-client/sys/netinet/ipfw/ip_fw2.c projects/nfsv4.1-client/sys/netinet/ipfw/ip_fw_sockopt.c projects/nfsv4.1-client/sys/netinet/sctp_structs.h projects/nfsv4.1-client/sys/netinet/tcp.h projects/nfsv4.1-client/sys/netinet/tcp_input.c projects/nfsv4.1-client/sys/netinet/tcp_syncache.c projects/nfsv4.1-client/sys/netinet/tcp_timer.c projects/nfsv4.1-client/sys/netinet/tcp_timer.h projects/nfsv4.1-client/sys/netinet/tcp_usrreq.c projects/nfsv4.1-client/sys/netinet/tcp_var.h projects/nfsv4.1-client/sys/nfsclient/nfs_vfsops.c projects/nfsv4.1-client/sys/nfsclient/nfs_vnops.c projects/nfsv4.1-client/sys/nlm/nlm_prot_impl.c projects/nfsv4.1-client/sys/powerpc/aim/mmu_oea64.c projects/nfsv4.1-client/sys/powerpc/aim/swtch64.S projects/nfsv4.1-client/sys/powerpc/booke/machdep.c projects/nfsv4.1-client/sys/powerpc/include/asm.h projects/nfsv4.1-client/sys/powerpc/ofw/ofw_pcib_pci.c projects/nfsv4.1-client/sys/powerpc/ofw/ofw_syscons.c projects/nfsv4.1-client/sys/powerpc/powermac/cpcht.c projects/nfsv4.1-client/sys/powerpc/powermac/grackle.c projects/nfsv4.1-client/sys/powerpc/powermac/gracklevar.h projects/nfsv4.1-client/sys/powerpc/powermac/uninorthpci.c projects/nfsv4.1-client/sys/powerpc/powermac/uninorthvar.h projects/nfsv4.1-client/sys/powerpc/ps3/ps3_syscons.c projects/nfsv4.1-client/sys/sys/elf_common.h projects/nfsv4.1-client/sys/sys/param.h projects/nfsv4.1-client/sys/sys/proc.h projects/nfsv4.1-client/sys/sys/signal.h projects/nfsv4.1-client/sys/sys/ttycom.h projects/nfsv4.1-client/sys/sys/ttydefaults.h projects/nfsv4.1-client/sys/sys/types.h projects/nfsv4.1-client/sys/sys/ucontext.h projects/nfsv4.1-client/sys/sys/vnode.h projects/nfsv4.1-client/sys/ufs/ffs/ffs_softdep.c projects/nfsv4.1-client/sys/ufs/ffs/ffs_vfsops.c projects/nfsv4.1-client/sys/ufs/ufs/inode.h projects/nfsv4.1-client/sys/ufs/ufs/ufs_acl.c projects/nfsv4.1-client/sys/ufs/ufs/ufs_vnops.c projects/nfsv4.1-client/sys/vm/swap_pager.c projects/nfsv4.1-client/sys/xen/interface/io/netif.h Directory Properties: projects/nfsv4.1-client/sys/ (props changed) projects/nfsv4.1-client/sys/conf/ (props changed) projects/nfsv4.1-client/sys/contrib/dev/acpica/ (props changed) Modified: projects/nfsv4.1-client/sys/amd64/acpica/acpi_switch.S ============================================================================== --- projects/nfsv4.1-client/sys/amd64/acpica/acpi_switch.S Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/acpica/acpi_switch.S Wed Feb 8 03:16:29 2012 (r231176) @@ -1,7 +1,7 @@ /*- * Copyright (c) 2001 Takanori Watanabe * Copyright (c) 2001 Mitsuru IWASAKI - * Copyright (c) 2008-2010 Jung-uk Kim + * Copyright (c) 2008-2012 Jung-uk Kim * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -95,7 +95,6 @@ ENTRY(acpi_restorecpu) /* Restore CR0 except for FPU mode. */ movq PCB_CR0(%rdi), %rax - movq %rax, %rcx andq $~(CR0_EM | CR0_TS), %rax movq %rax, %cr0 @@ -121,15 +120,6 @@ ENTRY(acpi_restorecpu) #undef SDT_SYSTSS #undef SDT_SYSBSY - /* Restore other callee saved registers. */ - movq PCB_R15(%rdi), %r15 - movq PCB_R14(%rdi), %r14 - movq PCB_R13(%rdi), %r13 - movq PCB_R12(%rdi), %r12 - movq PCB_RBP(%rdi), %rbp - movq PCB_RSP(%rdi), %rsp - movq PCB_RBX(%rdi), %rbx - /* Restore debug registers. */ movq PCB_DR0(%rdi), %rax movq %rax, %dr0 @@ -146,21 +136,34 @@ ENTRY(acpi_restorecpu) /* Restore FPU state. */ fninit - movq WAKEUP_CTX(fpusave),%rdi - cmpl $0,use_xsave - jne 1f - fxrstor (%rdi) + movq WAKEUP_CTX(fpusave), %rbx + movq WAKEUP_CTX(xsmask), %rax + testq %rax, %rax + jz 1f + movq %rax, %rdx + shrq $32, %rdx + movl $XCR0, %ecx +/* xsetbv */ + .byte 0x0f, 0x01, 0xd1 +/* xrstor (%rbx) */ + .byte 0x0f, 0xae, 0x2b jmp 2f -1: movl xsave_mask,%eax - movl xsave_mask+4,%edx -/* xrstor (%rdi) */ - .byte 0x0f,0xae,0x2f +1: + fxrstor (%rbx) 2: /* Reload CR0. */ - movq %rcx, %cr0 + movq PCB_CR0(%rdi), %rax + movq %rax, %cr0 - movq WAKEUP_CTX(pcb),%rdi + /* Restore other callee saved registers. */ + movq PCB_R15(%rdi), %r15 + movq PCB_R14(%rdi), %r14 + movq PCB_R13(%rdi), %r13 + movq PCB_R12(%rdi), %r12 + movq PCB_RBP(%rdi), %rbp + movq PCB_RSP(%rdi), %rsp + movq PCB_RBX(%rdi), %rbx /* Restore return address. */ movq PCB_RIP(%rdi), %rax Modified: projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakecode.S ============================================================================== --- projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakecode.S Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakecode.S Wed Feb 8 03:16:29 2012 (r231176) @@ -2,7 +2,7 @@ * Copyright (c) 2001 Takanori Watanabe * Copyright (c) 2001 Mitsuru IWASAKI * Copyright (c) 2003 Peter Wemm - * Copyright (c) 2008-2010 Jung-uk Kim + * Copyright (c) 2008-2012 Jung-uk Kim * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -267,11 +267,11 @@ wakeup_ctx: .quad 0 wakeup_pcb: .quad 0 +wakeup_fpusave: + .quad 0 wakeup_gdt: .word 0 .quad 0 -wakeup_fpusave: - .quad 0 ALIGN_DATA wakeup_efer: @@ -284,6 +284,8 @@ wakeup_cstar: .quad 0 wakeup_sfmask: .quad 0 +wakeup_xsmask: + .quad 0 wakeup_cpu: .long 0 dummy: Modified: projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakeup.c ============================================================================== --- projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakeup.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/acpica/acpi_wakeup.c Wed Feb 8 03:16:29 2012 (r231176) @@ -2,7 +2,7 @@ * Copyright (c) 2001 Takanori Watanabe * Copyright (c) 2001 Mitsuru IWASAKI * Copyright (c) 2003 Peter Wemm - * Copyright (c) 2008-2010 Jung-uk Kim + * Copyright (c) 2008-2012 Jung-uk Kim * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -74,7 +74,7 @@ static struct pcb **susppcbs; static void **suspfpusave; #endif -int acpi_restorecpu(vm_offset_t, struct pcb *); +int acpi_restorecpu(uint64_t, vm_offset_t); static void *acpi_alloc_wakeup_handler(void); static void acpi_stop_beep(void *); @@ -386,6 +386,7 @@ acpi_install_wakeup_handler(struct acpi_ WAKECODE_FIXUP(wakeup_lstar, uint64_t, rdmsr(MSR_LSTAR)); WAKECODE_FIXUP(wakeup_cstar, uint64_t, rdmsr(MSR_CSTAR)); WAKECODE_FIXUP(wakeup_sfmask, uint64_t, rdmsr(MSR_SF_MASK)); + WAKECODE_FIXUP(wakeup_xsmask, uint64_t, xsave_mask); /* Build temporary page tables below realmode code. */ pt4 = wakeaddr; Modified: projects/nfsv4.1-client/sys/amd64/amd64/apic_vector.S ============================================================================== --- projects/nfsv4.1-client/sys/amd64/amd64/apic_vector.S Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/amd64/apic_vector.S Wed Feb 8 03:16:29 2012 (r231176) @@ -300,13 +300,10 @@ IDTVEC(cpustop) IDTVEC(cpususpend) PUSH_FRAME + call cpususpend_handler movq lapic, %rax movl $0, LA_EOI(%rax) /* End Of Interrupt to APIC */ - - call cpususpend_handler - - POP_FRAME - jmp doreti_iret + jmp doreti /* * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU. Modified: projects/nfsv4.1-client/sys/amd64/amd64/fpu.c ============================================================================== --- projects/nfsv4.1-client/sys/amd64/amd64/fpu.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/amd64/fpu.c Wed Feb 8 03:16:29 2012 (r231176) @@ -78,6 +78,41 @@ __FBSDID("$FreeBSD$"); : : "n" (CR0_TS) : "ax") #define stop_emulating() __asm __volatile("clts") +static __inline void +xrstor(char *addr, uint64_t mask) +{ + uint32_t low, hi; + + low = mask; + hi = mask >> 32; + /* xrstor (%rdi) */ + __asm __volatile(".byte 0x0f,0xae,0x2f" : : + "a" (low), "d" (hi), "D" (addr)); +} + +static __inline void +xsave(char *addr, uint64_t mask) +{ + uint32_t low, hi; + + low = mask; + hi = mask >> 32; + /* xsave (%rdi) */ + __asm __volatile(".byte 0x0f,0xae,0x27" : : + "a" (low), "d" (hi), "D" (addr) : "memory"); +} + +static __inline void +xsetbv(uint32_t reg, uint64_t val) +{ + uint32_t low, hi; + + low = val; + hi = val >> 32; + __asm __volatile(".byte 0x0f,0x01,0xd1" : : + "c" (reg), "a" (low), "d" (hi)); +} + #else /* !(__GNUCLIKE_ASM && !lint) */ void fldcw(u_short cw); @@ -90,6 +125,9 @@ void fxrstor(caddr_t addr); void ldmxcsr(u_int csr); void start_emulating(void); void stop_emulating(void); +void xrstor(char *addr, uint64_t mask); +void xsave(char *addr, uint64_t mask); +void xsetbv(uint32_t reg, uint64_t val); #endif /* __GNUCLIKE_ASM && !lint */ Modified: projects/nfsv4.1-client/sys/amd64/conf/GENERIC ============================================================================== --- projects/nfsv4.1-client/sys/amd64/conf/GENERIC Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/conf/GENERIC Wed Feb 8 03:16:29 2012 (r231176) @@ -123,6 +123,7 @@ device adv # Advansys SCSI adapters device adw # Advansys wide SCSI adapters device aic # Adaptec 15[012]x SCSI adapters, AIC-6[23]60. device bt # Buslogic/Mylex MultiMaster SCSI adapters +device isci # Intel C600 SAS controller # ATA/SCSI peripherals device scbus # SCSI bus (required for ATA/SCSI) Modified: projects/nfsv4.1-client/sys/amd64/conf/NOTES ============================================================================== --- projects/nfsv4.1-client/sys/amd64/conf/NOTES Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/conf/NOTES Wed Feb 8 03:16:29 2012 (r231176) @@ -409,6 +409,11 @@ device hptiop device ips # +# Intel C600 (Patsburg) integrated SAS controller +device isci +options ISCI_LOGGING # enable debugging in isci HAL + +# # SafeNet crypto driver: can be moved to the MI NOTES as soon as # it's tested on a big-endian machine # Copied: projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS (from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS Wed Feb 8 03:16:29 2012 (r231176, copy of r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS) @@ -0,0 +1,7 @@ +# +# WITHOUT_SOURCELESS -- Disable drivers that include sourceless code. +# +# $FreeBSD$ + +include WITHOUT_SOURCELESS_HOST +include WITHOUT_SOURCELESS_UCODE Copied: projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_HOST (from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_HOST) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_HOST Wed Feb 8 03:16:29 2012 (r231176, copy of r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_HOST) @@ -0,0 +1,10 @@ +# +# WITHOUT_SOURCELESS_UCODE -- Disable drivers that include sourceless +# native code for host CPU. +# +# $FreeBSD$ + +nodevice hpt27xx +nodevice hptmv +nodevice hptrr +nodevice nve Copied: projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE (from r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/nfsv4.1-client/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE Wed Feb 8 03:16:29 2012 (r231176, copy of r231175, head/sys/amd64/conf/WITHOUT_SOURCELESS_UCODE) @@ -0,0 +1,41 @@ +# +# WITHOUT_SOURCELESS_UCODE -- Disable drivers that include sourceless +# microcode. +# +# $FreeBSD$ + +nodevice adw +nodevice bce +nodevice fatm +nodevice fxp +nodevice ispfw +nodevice mwlfw +nodevice ralfw +nodevice runfw +nodevice sf +nodevice sn +nodevice ti +nodevice txp +nodevice ce +nodevice cp +nodevice ctau +nodevice ipwfw +nodevice iwifw +nodevice iwnfw +nodevice wpifw + +# drm +nodevice mga +nodevice r128 +nodevice radeon + +# sound +nodevice csa +nodevice ds1 +nodevice maestro3 + +# usb +nodevice rum +nodevice uath +nodevice zyd +nodevice kue Modified: projects/nfsv4.1-client/sys/amd64/include/cpufunc.h ============================================================================== --- projects/nfsv4.1-client/sys/amd64/include/cpufunc.h Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/include/cpufunc.h Wed Feb 8 03:16:29 2012 (r231176) @@ -669,41 +669,6 @@ intr_restore(register_t rflags) write_rflags(rflags); } -static __inline void -xsave(char *addr, uint64_t mask) -{ - uint32_t low, hi; - - low = mask; - hi = mask >> 32; - /* xsave (%rdi) */ - __asm __volatile(".byte 0x0f,0xae,0x27" : : - "a" (low), "d" (hi), "D" (addr) : "memory"); -} - -static __inline void -xsetbv(uint32_t reg, uint64_t val) -{ - uint32_t low, hi; - - low = val; - hi = val >> 32; - __asm __volatile(".byte 0x0f,0x01,0xd1" : : - "c" (reg), "a" (low), "d" (hi)); -} - -static __inline void -xrstor(char *addr, uint64_t mask) -{ - uint32_t low, hi; - - low = mask; - hi = mask >> 32; - /* xrstor (%rdi) */ - __asm __volatile(".byte 0x0f,0xae,0x2f" : : - "a" (low), "d" (hi), "D" (addr)); -} - #else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */ int breakpoint(void); @@ -768,9 +733,6 @@ u_int rgs(void); void wbinvd(void); void write_rflags(u_int rf); void wrmsr(u_int msr, uint64_t newval); -void xsave(char *addr, uint64_t mask); -void xsetbv(uint32_t reg, uint64_t val); -void xrstor(char *addr, uint64_t mask); #endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */ Modified: projects/nfsv4.1-client/sys/amd64/include/signal.h ============================================================================== --- projects/nfsv4.1-client/sys/amd64/include/signal.h Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/amd64/include/signal.h Wed Feb 8 03:16:29 2012 (r231176) @@ -99,7 +99,10 @@ struct sigcontext { long sc_fsbase; long sc_gsbase; - long sc_spare[6]; + long sc_xfpustate; + long sc_xfpustate_len; + + long sc_spare[4]; }; #endif /* __BSD_VISIBLE */ Modified: projects/nfsv4.1-client/sys/boot/ficl/fileaccess.c ============================================================================== --- projects/nfsv4.1-client/sys/boot/ficl/fileaccess.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/boot/ficl/fileaccess.c Wed Feb 8 03:16:29 2012 (r231176) @@ -420,6 +420,6 @@ void ficlCompileFile(FICL_SYSTEM *pSys) ficlSetEnv(pSys, "file-ext", FICL_TRUE); #endif /* FICL_HAVE_FTRUNCATE */ #else - &pSys; + (void)pSys; #endif /* FICL_WANT_FILE */ } Modified: projects/nfsv4.1-client/sys/boot/ficl/i386/sysdep.h ============================================================================== --- projects/nfsv4.1-client/sys/boot/ficl/i386/sysdep.h Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/boot/ficl/i386/sysdep.h Wed Feb 8 03:16:29 2012 (r231176) @@ -58,7 +58,7 @@ #include #if !defined IGNORE /* Macro to silence unused param warnings */ -#define IGNORE(x) &x +#define IGNORE(x) (void)x #endif /* @@ -405,7 +405,7 @@ void *ficlRealloc(void *p, size_t size); #if FICL_MULTITHREAD int ficlLockDictionary(short fLock); #else -#define ficlLockDictionary(x) 0 /* ignore */ +#define ficlLockDictionary(x) /* ignore */ #endif /* Modified: projects/nfsv4.1-client/sys/cam/ata/ata_da.c ============================================================================== --- projects/nfsv4.1-client/sys/cam/ata/ata_da.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/cam/ata/ata_da.c Wed Feb 8 03:16:29 2012 (r231176) @@ -1098,7 +1098,7 @@ adaregister(struct cam_periph *periph, v */ callout_init_mtx(&softc->sendordered_c, periph->sim->mtx, 0); callout_reset(&softc->sendordered_c, - (ADA_DEFAULT_TIMEOUT * hz) / ADA_ORDEREDTAG_INTERVAL, + (ada_default_timeout * hz) / ADA_ORDEREDTAG_INTERVAL, adasendorderedtag, softc); if (ADA_RA >= 0 && @@ -1653,7 +1653,7 @@ adasendorderedtag(void *arg) } /* Queue us up again */ callout_reset(&softc->sendordered_c, - (ADA_DEFAULT_TIMEOUT * hz) / ADA_ORDEREDTAG_INTERVAL, + (ada_default_timeout * hz) / ADA_ORDEREDTAG_INTERVAL, adasendorderedtag, softc); } Modified: projects/nfsv4.1-client/sys/cam/ata/ata_xpt.c ============================================================================== --- projects/nfsv4.1-client/sys/cam/ata/ata_xpt.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/cam/ata/ata_xpt.c Wed Feb 8 03:16:29 2012 (r231176) @@ -186,6 +186,12 @@ static void ata_dev_async(u_int32_t asy static void ata_action(union ccb *start_ccb); static void ata_announce_periph(struct cam_periph *periph); +static int ata_dma = 1; +static int atapi_dma = 1; + +TUNABLE_INT("hw.ata.ata_dma", &ata_dma); +TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma); + static struct xpt_xport ata_xport = { .alloc_device = ata_alloc_device, .action = ata_action, @@ -356,6 +362,13 @@ probestart(struct cam_periph *periph, un if (cts.xport_specific.sata.valid & CTS_SATA_VALID_MODE) mode = cts.xport_specific.sata.mode; } + if (periph->path->device->protocol == PROTO_ATA) { + if (ata_dma == 0 && (mode == 0 || mode > ATA_PIO_MAX)) + mode = ATA_PIO_MAX; + } else { + if (atapi_dma == 0 && (mode == 0 || mode > ATA_PIO_MAX)) + mode = ATA_PIO_MAX; + } negotiate: /* Honor device capabilities. */ wantmode = mode = ata_max_mode(ident_buf, mode); Modified: projects/nfsv4.1-client/sys/cam/ctl/ctl_frontend_cam_sim.c ============================================================================== --- projects/nfsv4.1-client/sys/cam/ctl/ctl_frontend_cam_sim.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/cam/ctl/ctl_frontend_cam_sim.c Wed Feb 8 03:16:29 2012 (r231176) @@ -221,6 +221,7 @@ cfcs_init(void) mtx_lock(&softc->lock); if (xpt_bus_register(softc->sim, NULL, 0) != CAM_SUCCESS) { + mtx_unlock(&softc->lock); printf("%s: error registering SIM\n", __func__); retval = ENOMEM; goto bailout; @@ -230,6 +231,7 @@ cfcs_init(void) cam_sim_path(softc->sim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) { + mtx_unlock(&softc->lock); printf("%s: error creating path\n", __func__); xpt_bus_deregister(cam_sim_path(softc->sim)); retval = 1; @@ -253,8 +255,6 @@ bailout: else if (softc->devq) cam_simq_free(softc->devq); - mtx_unlock(&softc->lock); - return (retval); } Modified: projects/nfsv4.1-client/sys/cam/scsi/scsi_da.c ============================================================================== --- projects/nfsv4.1-client/sys/cam/scsi/scsi_da.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/cam/scsi/scsi_da.c Wed Feb 8 03:16:29 2012 (r231176) @@ -1149,7 +1149,7 @@ dadump(void *arg, void *virtual, vm_offs /*data_ptr*/(u_int8_t *) virtual, /*dxfer_len*/length, /*sense_len*/SSD_FULL_SIZE, - DA_DEFAULT_TIMEOUT * 1000); + da_default_timeout * 1000); xpt_polled_action((union ccb *)&csio); cam_periph_unlock(periph); @@ -1597,7 +1597,7 @@ daregister(struct cam_periph *periph, vo */ callout_init_mtx(&softc->sendordered_c, periph->sim->mtx, 0); callout_reset(&softc->sendordered_c, - (DA_DEFAULT_TIMEOUT * hz) / DA_ORDEREDTAG_INTERVAL, + (da_default_timeout * hz) / DA_ORDEREDTAG_INTERVAL, dasendorderedtag, softc); mtx_unlock(periph->sim->mtx); @@ -2768,7 +2768,7 @@ dasendorderedtag(void *arg) } /* Queue us up again */ callout_reset(&softc->sendordered_c, - (DA_DEFAULT_TIMEOUT * hz) / DA_ORDEREDTAG_INTERVAL, + (da_default_timeout * hz) / DA_ORDEREDTAG_INTERVAL, dasendorderedtag, softc); } Modified: projects/nfsv4.1-client/sys/compat/freebsd32/freebsd32_signal.h ============================================================================== --- projects/nfsv4.1-client/sys/compat/freebsd32/freebsd32_signal.h Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/compat/freebsd32/freebsd32_signal.h Wed Feb 8 03:16:29 2012 (r231176) @@ -92,6 +92,7 @@ struct sigevent32 { uint32_t _function; uint32_t _attribute; } _sigev_thread; + unsigned short _kevent_flags; uint32_t __spare__[8]; } _sigev_un; }; Modified: projects/nfsv4.1-client/sys/conf/files ============================================================================== --- projects/nfsv4.1-client/sys/conf/files Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/files Wed Feb 8 03:16:29 2012 (r231176) @@ -1395,6 +1395,8 @@ dev/ixgbe/ixgbe_82598.c optional ixgbe compile-with "${NORMAL_C} -I$S/dev/ixgbe" dev/ixgbe/ixgbe_82599.c optional ixgbe inet \ compile-with "${NORMAL_C} -I$S/dev/ixgbe" +dev/ixgbe/ixgbe_x540.c optional ixgbe inet \ + compile-with "${NORMAL_C} -I$S/dev/ixgbe" dev/jme/if_jme.c optional jme pci dev/joy/joy.c optional joy dev/joy/joy_isa.c optional joy isa @@ -1730,8 +1732,7 @@ dev/sound/pci/als4000.c optional snd_al dev/sound/pci/atiixp.c optional snd_atiixp pci dev/sound/pci/cmi.c optional snd_cmi pci dev/sound/pci/cs4281.c optional snd_cs4281 pci -dev/sound/pci/csa.c optional snd_csa pci \ - warning "kernel contains GPL contaminated csaimg.h header" +dev/sound/pci/csa.c optional snd_csa pci dev/sound/pci/csapcm.c optional snd_csa pci dev/sound/pci/ds1.c optional snd_ds1 pci dev/sound/pci/emu10k1.c optional snd_emu10k1 pci @@ -2404,9 +2405,8 @@ kern/sched_ule.c optional sched_ule kern/serdev_if.m standard kern/stack_protector.c standard \ compile-with "${NORMAL_C:N-fstack-protector*}" -# XXX subr_acl_nfs4.c is also used by ZFS -kern/subr_acl_nfs4.c optional ufs_acl -kern/subr_acl_posix1e.c optional ufs_acl +kern/subr_acl_nfs4.c standard +kern/subr_acl_posix1e.c standard kern/subr_autoconf.c standard kern/subr_blist.c standard kern/subr_bus.c standard @@ -2499,17 +2499,17 @@ kern/vfs_vnops.c standard # gssd.h optional kgssapi \ dependency "$S/kgssapi/gssd.x" \ - compile-with "rpcgen -hM $S/kgssapi/gssd.x | grep -v pthread.h > gssd.h" \ + compile-with "RPCGEN_CPP='${CPP}' rpcgen -hM $S/kgssapi/gssd.x | grep -v pthread.h > gssd.h" \ no-obj no-implicit-rule before-depend local \ clean "gssd.h" gssd_xdr.c optional kgssapi \ dependency "$S/kgssapi/gssd.x gssd.h" \ - compile-with "rpcgen -c $S/kgssapi/gssd.x -o gssd_xdr.c" \ + compile-with "RPCGEN_CPP='${CPP}' rpcgen -c $S/kgssapi/gssd.x -o gssd_xdr.c" \ no-implicit-rule before-depend local \ clean "gssd_xdr.c" gssd_clnt.c optional kgssapi \ dependency "$S/kgssapi/gssd.x gssd.h" \ - compile-with "rpcgen -lM $S/kgssapi/gssd.x | grep -v string.h > gssd_clnt.c" \ + compile-with "RPCGEN_CPP='${CPP}' rpcgen -lM $S/kgssapi/gssd.x | grep -v string.h > gssd_clnt.c" \ no-implicit-rule before-depend local \ clean "gssd_clnt.c" kgssapi/gss_accept_sec_context.c optional kgssapi @@ -3530,6 +3530,7 @@ dev/xen/blkback/blkback.c optional xen | dev/xen/console/console.c optional xen dev/xen/console/xencons_ring.c optional xen dev/xen/control/control.c optional xen | xenhvm +dev/xen/netback/netback.c optional xen | xenhvm dev/xen/netfront/netfront.c optional xen | xenhvm dev/xen/xenpci/xenpci.c optional xenpci dev/xen/xenpci/evtchn.c optional xenpci Modified: projects/nfsv4.1-client/sys/conf/files.amd64 ============================================================================== --- projects/nfsv4.1-client/sys/conf/files.amd64 Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/files.amd64 Wed Feb 8 03:16:29 2012 (r231176) @@ -271,6 +271,115 @@ dev/tpm/tpm_isa.c optional tpm isa dev/uart/uart_cpu_amd64.c optional uart dev/viawd/viawd.c optional viawd dev/wpi/if_wpi.c optional wpi +dev/isci/isci.c optional isci +dev/isci/isci_controller.c optional isci +dev/isci/isci_domain.c optional isci +dev/isci/isci_interrupt.c optional isci +dev/isci/isci_io_request.c optional isci +dev/isci/isci_logger.c optional isci +dev/isci/isci_oem_parameters.c optional isci +dev/isci/isci_remote_device.c optional isci +dev/isci/isci_sysctl.c optional isci +dev/isci/isci_task_request.c optional isci +dev/isci/isci_timer.c optional isci +dev/isci/scil/sati.c optional isci +dev/isci/scil/sati_abort_task_set.c optional isci +dev/isci/scil/sati_atapi.c optional isci +dev/isci/scil/sati_device.c optional isci +dev/isci/scil/sati_inquiry.c optional isci +dev/isci/scil/sati_log_sense.c optional isci +dev/isci/scil/sati_lun_reset.c optional isci +dev/isci/scil/sati_mode_pages.c optional isci +dev/isci/scil/sati_mode_select.c optional isci +dev/isci/scil/sati_mode_sense.c optional isci +dev/isci/scil/sati_mode_sense_10.c optional isci +dev/isci/scil/sati_mode_sense_6.c optional isci +dev/isci/scil/sati_move.c optional isci +dev/isci/scil/sati_passthrough.c optional isci +dev/isci/scil/sati_read.c optional isci +dev/isci/scil/sati_read_buffer.c optional isci +dev/isci/scil/sati_read_capacity.c optional isci +dev/isci/scil/sati_reassign_blocks.c optional isci +dev/isci/scil/sati_report_luns.c optional isci +dev/isci/scil/sati_request_sense.c optional isci +dev/isci/scil/sati_start_stop_unit.c optional isci +dev/isci/scil/sati_synchronize_cache.c optional isci +dev/isci/scil/sati_test_unit_ready.c optional isci +dev/isci/scil/sati_unmap.c optional isci +dev/isci/scil/sati_util.c optional isci +dev/isci/scil/sati_verify.c optional isci +dev/isci/scil/sati_write.c optional isci +dev/isci/scil/sati_write_and_verify.c optional isci +dev/isci/scil/sati_write_buffer.c optional isci +dev/isci/scil/sati_write_long.c optional isci +dev/isci/scil/sci_abstract_list.c optional isci +dev/isci/scil/sci_base_controller.c optional isci +dev/isci/scil/sci_base_domain.c optional isci +dev/isci/scil/sci_base_iterator.c optional isci +dev/isci/scil/sci_base_library.c optional isci +dev/isci/scil/sci_base_logger.c optional isci +dev/isci/scil/sci_base_memory_descriptor_list.c optional isci +dev/isci/scil/sci_base_memory_descriptor_list_decorator.c optional isci +dev/isci/scil/sci_base_object.c optional isci +dev/isci/scil/sci_base_observer.c optional isci +dev/isci/scil/sci_base_phy.c optional isci +dev/isci/scil/sci_base_port.c optional isci +dev/isci/scil/sci_base_remote_device.c optional isci +dev/isci/scil/sci_base_request.c optional isci +dev/isci/scil/sci_base_state_machine.c optional isci +dev/isci/scil/sci_base_state_machine_logger.c optional isci +dev/isci/scil/sci_base_state_machine_observer.c optional isci +dev/isci/scil/sci_base_subject.c optional isci +dev/isci/scil/sci_util.c optional isci +dev/isci/scil/scic_sds_controller.c optional isci +dev/isci/scil/scic_sds_library.c optional isci +dev/isci/scil/scic_sds_pci.c optional isci +dev/isci/scil/scic_sds_phy.c optional isci +dev/isci/scil/scic_sds_port.c optional isci +dev/isci/scil/scic_sds_port_configuration_agent.c optional isci +dev/isci/scil/scic_sds_remote_device.c optional isci +dev/isci/scil/scic_sds_remote_node_context.c optional isci +dev/isci/scil/scic_sds_remote_node_table.c optional isci +dev/isci/scil/scic_sds_request.c optional isci +dev/isci/scil/scic_sds_sgpio.c optional isci +dev/isci/scil/scic_sds_smp_remote_device.c optional isci +dev/isci/scil/scic_sds_smp_request.c optional isci +dev/isci/scil/scic_sds_ssp_request.c optional isci +dev/isci/scil/scic_sds_stp_packet_request.c optional isci +dev/isci/scil/scic_sds_stp_remote_device.c optional isci +dev/isci/scil/scic_sds_stp_request.c optional isci +dev/isci/scil/scic_sds_unsolicited_frame_control.c optional isci +dev/isci/scil/scif_sas_controller.c optional isci +dev/isci/scil/scif_sas_controller_state_handlers.c optional isci +dev/isci/scil/scif_sas_controller_states.c optional isci +dev/isci/scil/scif_sas_domain.c optional isci +dev/isci/scil/scif_sas_domain_state_handlers.c optional isci +dev/isci/scil/scif_sas_domain_states.c optional isci +dev/isci/scil/scif_sas_high_priority_request_queue.c optional isci +dev/isci/scil/scif_sas_internal_io_request.c optional isci +dev/isci/scil/scif_sas_io_request.c optional isci +dev/isci/scil/scif_sas_io_request_state_handlers.c optional isci +dev/isci/scil/scif_sas_io_request_states.c optional isci +dev/isci/scil/scif_sas_library.c optional isci +dev/isci/scil/scif_sas_remote_device.c optional isci +dev/isci/scil/scif_sas_remote_device_ready_substate_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_ready_substates.c optional isci +dev/isci/scil/scif_sas_remote_device_starting_substate_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_starting_substates.c optional isci +dev/isci/scil/scif_sas_remote_device_state_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_states.c optional isci +dev/isci/scil/scif_sas_request.c optional isci +dev/isci/scil/scif_sas_smp_activity_clear_affiliation.c optional isci +dev/isci/scil/scif_sas_smp_io_request.c optional isci +dev/isci/scil/scif_sas_smp_phy.c optional isci +dev/isci/scil/scif_sas_smp_remote_device.c optional isci +dev/isci/scil/scif_sas_stp_io_request.c optional isci +dev/isci/scil/scif_sas_stp_remote_device.c optional isci +dev/isci/scil/scif_sas_stp_task_request.c optional isci +dev/isci/scil/scif_sas_task_request.c optional isci +dev/isci/scil/scif_sas_task_request_state_handlers.c optional isci +dev/isci/scil/scif_sas_task_request_states.c optional isci +dev/isci/scil/scif_sas_timer.c optional isci isa/syscons_isa.c optional sc isa/vga_isa.c optional vga kern/kern_clocksource.c standard Modified: projects/nfsv4.1-client/sys/conf/files.i386 ============================================================================== --- projects/nfsv4.1-client/sys/conf/files.i386 Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/files.i386 Wed Feb 8 03:16:29 2012 (r231176) @@ -248,6 +248,115 @@ dev/viawd/viawd.c optional viawd dev/acpica/acpi_if.m standard dev/acpi_support/acpi_wmi_if.m standard dev/wpi/if_wpi.c optional wpi +dev/isci/isci.c optional isci +dev/isci/isci_controller.c optional isci +dev/isci/isci_domain.c optional isci +dev/isci/isci_interrupt.c optional isci +dev/isci/isci_io_request.c optional isci +dev/isci/isci_logger.c optional isci +dev/isci/isci_oem_parameters.c optional isci +dev/isci/isci_remote_device.c optional isci +dev/isci/isci_sysctl.c optional isci +dev/isci/isci_task_request.c optional isci +dev/isci/isci_timer.c optional isci +dev/isci/scil/sati.c optional isci +dev/isci/scil/sati_abort_task_set.c optional isci +dev/isci/scil/sati_atapi.c optional isci +dev/isci/scil/sati_device.c optional isci +dev/isci/scil/sati_inquiry.c optional isci +dev/isci/scil/sati_log_sense.c optional isci +dev/isci/scil/sati_lun_reset.c optional isci +dev/isci/scil/sati_mode_pages.c optional isci +dev/isci/scil/sati_mode_select.c optional isci +dev/isci/scil/sati_mode_sense.c optional isci +dev/isci/scil/sati_mode_sense_10.c optional isci +dev/isci/scil/sati_mode_sense_6.c optional isci +dev/isci/scil/sati_move.c optional isci +dev/isci/scil/sati_passthrough.c optional isci +dev/isci/scil/sati_read.c optional isci +dev/isci/scil/sati_read_buffer.c optional isci +dev/isci/scil/sati_read_capacity.c optional isci +dev/isci/scil/sati_reassign_blocks.c optional isci +dev/isci/scil/sati_report_luns.c optional isci +dev/isci/scil/sati_request_sense.c optional isci +dev/isci/scil/sati_start_stop_unit.c optional isci +dev/isci/scil/sati_synchronize_cache.c optional isci +dev/isci/scil/sati_test_unit_ready.c optional isci +dev/isci/scil/sati_unmap.c optional isci +dev/isci/scil/sati_util.c optional isci +dev/isci/scil/sati_verify.c optional isci +dev/isci/scil/sati_write.c optional isci +dev/isci/scil/sati_write_and_verify.c optional isci +dev/isci/scil/sati_write_buffer.c optional isci +dev/isci/scil/sati_write_long.c optional isci +dev/isci/scil/sci_abstract_list.c optional isci +dev/isci/scil/sci_base_controller.c optional isci +dev/isci/scil/sci_base_domain.c optional isci +dev/isci/scil/sci_base_iterator.c optional isci +dev/isci/scil/sci_base_library.c optional isci +dev/isci/scil/sci_base_logger.c optional isci +dev/isci/scil/sci_base_memory_descriptor_list.c optional isci +dev/isci/scil/sci_base_memory_descriptor_list_decorator.c optional isci +dev/isci/scil/sci_base_object.c optional isci +dev/isci/scil/sci_base_observer.c optional isci +dev/isci/scil/sci_base_phy.c optional isci +dev/isci/scil/sci_base_port.c optional isci +dev/isci/scil/sci_base_remote_device.c optional isci +dev/isci/scil/sci_base_request.c optional isci +dev/isci/scil/sci_base_state_machine.c optional isci +dev/isci/scil/sci_base_state_machine_logger.c optional isci +dev/isci/scil/sci_base_state_machine_observer.c optional isci +dev/isci/scil/sci_base_subject.c optional isci +dev/isci/scil/sci_util.c optional isci +dev/isci/scil/scic_sds_controller.c optional isci +dev/isci/scil/scic_sds_library.c optional isci +dev/isci/scil/scic_sds_pci.c optional isci +dev/isci/scil/scic_sds_phy.c optional isci +dev/isci/scil/scic_sds_port.c optional isci +dev/isci/scil/scic_sds_port_configuration_agent.c optional isci +dev/isci/scil/scic_sds_remote_device.c optional isci +dev/isci/scil/scic_sds_remote_node_context.c optional isci +dev/isci/scil/scic_sds_remote_node_table.c optional isci +dev/isci/scil/scic_sds_request.c optional isci +dev/isci/scil/scic_sds_sgpio.c optional isci +dev/isci/scil/scic_sds_smp_remote_device.c optional isci +dev/isci/scil/scic_sds_smp_request.c optional isci +dev/isci/scil/scic_sds_ssp_request.c optional isci +dev/isci/scil/scic_sds_stp_packet_request.c optional isci +dev/isci/scil/scic_sds_stp_remote_device.c optional isci +dev/isci/scil/scic_sds_stp_request.c optional isci +dev/isci/scil/scic_sds_unsolicited_frame_control.c optional isci +dev/isci/scil/scif_sas_controller.c optional isci +dev/isci/scil/scif_sas_controller_state_handlers.c optional isci +dev/isci/scil/scif_sas_controller_states.c optional isci +dev/isci/scil/scif_sas_domain.c optional isci +dev/isci/scil/scif_sas_domain_state_handlers.c optional isci +dev/isci/scil/scif_sas_domain_states.c optional isci +dev/isci/scil/scif_sas_high_priority_request_queue.c optional isci +dev/isci/scil/scif_sas_internal_io_request.c optional isci +dev/isci/scil/scif_sas_io_request.c optional isci +dev/isci/scil/scif_sas_io_request_state_handlers.c optional isci +dev/isci/scil/scif_sas_io_request_states.c optional isci +dev/isci/scil/scif_sas_library.c optional isci +dev/isci/scil/scif_sas_remote_device.c optional isci +dev/isci/scil/scif_sas_remote_device_ready_substate_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_ready_substates.c optional isci +dev/isci/scil/scif_sas_remote_device_starting_substate_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_starting_substates.c optional isci +dev/isci/scil/scif_sas_remote_device_state_handlers.c optional isci +dev/isci/scil/scif_sas_remote_device_states.c optional isci +dev/isci/scil/scif_sas_request.c optional isci +dev/isci/scil/scif_sas_smp_activity_clear_affiliation.c optional isci +dev/isci/scil/scif_sas_smp_io_request.c optional isci +dev/isci/scil/scif_sas_smp_phy.c optional isci +dev/isci/scil/scif_sas_smp_remote_device.c optional isci +dev/isci/scil/scif_sas_stp_io_request.c optional isci +dev/isci/scil/scif_sas_stp_remote_device.c optional isci +dev/isci/scil/scif_sas_stp_task_request.c optional isci +dev/isci/scil/scif_sas_task_request.c optional isci +dev/isci/scil/scif_sas_task_request_state_handlers.c optional isci +dev/isci/scil/scif_sas_task_request_states.c optional isci +dev/isci/scil/scif_sas_timer.c optional isci i386/acpica/acpi_machdep.c optional acpi acpi_wakecode.o optional acpi \ dependency "$S/i386/acpica/acpi_wakecode.S assym.s" \ Modified: projects/nfsv4.1-client/sys/conf/files.powerpc ============================================================================== --- projects/nfsv4.1-client/sys/conf/files.powerpc Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/files.powerpc Wed Feb 8 03:16:29 2012 (r231176) @@ -133,6 +133,7 @@ powerpc/mpc85xx/openpic_fdt.c optional f powerpc/mpc85xx/pci_fdt.c optional pci mpc85xx powerpc/ofw/ofw_cpu.c optional aim powerpc/ofw/ofw_machdep.c optional aim +powerpc/ofw/ofw_pci.c optional pci aim powerpc/ofw/ofw_pcibus.c optional pci aim powerpc/ofw/ofw_pcib_pci.c optional pci aim powerpc/ofw/ofw_real.c optional aim Modified: projects/nfsv4.1-client/sys/conf/options ============================================================================== --- projects/nfsv4.1-client/sys/conf/options Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/options Wed Feb 8 03:16:29 2012 (r231176) @@ -845,6 +845,7 @@ IEEE80211_SUPPORT_MESH opt_wlan.h IEEE80211_SUPPORT_SUPERG opt_wlan.h IEEE80211_SUPPORT_TDMA opt_wlan.h IEEE80211_ALQ opt_wlan.h +IEEE80211_DFS_DEBUG opt_wlan.h # 802.11 TDMA support TDMA_SLOTLEN_DEFAULT opt_tdma.h Modified: projects/nfsv4.1-client/sys/conf/options.amd64 ============================================================================== --- projects/nfsv4.1-client/sys/conf/options.amd64 Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/options.amd64 Wed Feb 8 03:16:29 2012 (r231176) @@ -65,3 +65,6 @@ KDTRACE_FRAME opt_kdtrace.h BPF_JITTER opt_bpf.h XENHVM opt_global.h + +# options for the Intel C600 SAS driver (isci) +ISCI_LOGGING opt_isci.h Modified: projects/nfsv4.1-client/sys/conf/options.i386 ============================================================================== --- projects/nfsv4.1-client/sys/conf/options.i386 Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/conf/options.i386 Wed Feb 8 03:16:29 2012 (r231176) @@ -119,3 +119,6 @@ BPF_JITTER opt_bpf.h NATIVE opt_global.h XEN opt_global.h XENHVM opt_global.h + +# options for the Intel C600 SAS driver (isci) +ISCI_LOGGING opt_isci.h Modified: projects/nfsv4.1-client/sys/dev/acpica/acpi.c ============================================================================== --- projects/nfsv4.1-client/sys/dev/acpica/acpi.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/acpica/acpi.c Wed Feb 8 03:16:29 2012 (r231176) @@ -1812,23 +1812,29 @@ acpi_probe_children(device_t bus) static void acpi_probe_order(ACPI_HANDLE handle, int *order) { - ACPI_OBJECT_TYPE type; + ACPI_OBJECT_TYPE type; - /* - * 1. CPUs - * 2. I/O port and memory system resource holders - * 3. Embedded controllers (to handle early accesses) - * 4. PCI Link Devices - */ - AcpiGetType(handle, &type); - if (type == ACPI_TYPE_PROCESSOR) - *order = 1; - else if (acpi_MatchHid(handle, "PNP0C01") || acpi_MatchHid(handle, "PNP0C02")) - *order = 2; - else if (acpi_MatchHid(handle, "PNP0C09")) - *order = 3; - else if (acpi_MatchHid(handle, "PNP0C0F")) - *order = 4; + /* + * 0. CPUs + * 1. I/O port and memory system resource holders + * 2. Clocks and timers (to handle early accesses) + * 3. Embedded controllers (to handle early accesses) + * 4. PCI Link Devices + */ + AcpiGetType(handle, &type); + if (type == ACPI_TYPE_PROCESSOR) + *order = 0; + else if (acpi_MatchHid(handle, "PNP0C01") || + acpi_MatchHid(handle, "PNP0C02")) + *order = 1; + else if (acpi_MatchHid(handle, "PNP0100") || + acpi_MatchHid(handle, "PNP0103") || + acpi_MatchHid(handle, "PNP0B00")) + *order = 2; + else if (acpi_MatchHid(handle, "PNP0C09")) + *order = 3; + else if (acpi_MatchHid(handle, "PNP0C0F")) + *order = 4; } /* @@ -1889,7 +1895,7 @@ acpi_probe_child(ACPI_HANDLE handle, UIN * resources). */ ACPI_DEBUG_PRINT((ACPI_DB_OBJECTS, "scanning '%s'\n", handle_str)); - order = level * 10 + 100; + order = level * 10 + ACPI_DEV_BASE_ORDER; acpi_probe_order(handle, &order); child = BUS_ADD_CHILD(bus, order, NULL, -1); if (child == NULL) Modified: projects/nfsv4.1-client/sys/dev/acpica/acpi_ec.c ============================================================================== --- projects/nfsv4.1-client/sys/dev/acpica/acpi_ec.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/acpica/acpi_ec.c Wed Feb 8 03:16:29 2012 (r231176) @@ -295,7 +295,7 @@ acpi_ec_ecdt_probe(device_t parent) } /* Create the child device with the given unit number. */ - child = BUS_ADD_CHILD(parent, 0, "acpi_ec", ecdt->Uid); + child = BUS_ADD_CHILD(parent, 3, "acpi_ec", ecdt->Uid); if (child == NULL) { printf("%s: can't add child\n", __func__); return; Modified: projects/nfsv4.1-client/sys/dev/acpica/acpi_hpet.c ============================================================================== --- projects/nfsv4.1-client/sys/dev/acpica/acpi_hpet.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/acpica/acpi_hpet.c Wed Feb 8 03:16:29 2012 (r231176) @@ -342,7 +342,7 @@ hpet_identify(driver_t *driver, device_t if (found) continue; /* If not - create it from table info. */ - child = BUS_ADD_CHILD(parent, ACPI_DEV_BASE_ORDER, "hpet", 0); + child = BUS_ADD_CHILD(parent, 2, "hpet", 0); if (child == NULL) { printf("%s: can't add child\n", __func__); continue; Modified: projects/nfsv4.1-client/sys/dev/acpica/acpi_timer.c ============================================================================== --- projects/nfsv4.1-client/sys/dev/acpica/acpi_timer.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/acpica/acpi_timer.c Wed Feb 8 03:16:29 2012 (r231176) @@ -124,7 +124,7 @@ acpi_timer_identify(driver_t *driver, de acpi_timer_dev) return_VOID; - if ((dev = BUS_ADD_CHILD(parent, 0, "acpi_timer", 0)) == NULL) { + if ((dev = BUS_ADD_CHILD(parent, 2, "acpi_timer", 0)) == NULL) { device_printf(parent, "could not add acpi_timer0\n"); return_VOID; } Modified: projects/nfsv4.1-client/sys/dev/acpica/acpivar.h ============================================================================== --- projects/nfsv4.1-client/sys/dev/acpica/acpivar.h Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/acpica/acpivar.h Wed Feb 8 03:16:29 2012 (r231176) @@ -473,7 +473,7 @@ ACPI_HANDLE acpi_GetReference(ACPI_HANDL * probe order sorted so that things like sysresource are available before * their children need them. */ -#define ACPI_DEV_BASE_ORDER 10 +#define ACPI_DEV_BASE_ORDER 100 /* Default maximum number of tasks to enqueue. */ #ifndef ACPI_MAX_TASKS Modified: projects/nfsv4.1-client/sys/dev/ath/ath_dfs/null/dfs_null.c ============================================================================== --- projects/nfsv4.1-client/sys/dev/ath/ath_dfs/null/dfs_null.c Wed Feb 8 03:02:12 2012 (r231175) +++ projects/nfsv4.1-client/sys/dev/ath/ath_dfs/null/dfs_null.c Wed Feb 8 03:16:29 2012 (r231176) @@ -71,6 +71,28 @@ __FBSDID("$FreeBSD$"); #include /* + * These are default parameters for the AR5416 and + * later 802.11n NICs. They simply enable some + * radar pulse event generation. + * + * These are very likely not valid for the AR5212 era + * NICs. + * + * Since these define signal sizing and threshold + * parameters, they may need changing based on the + * specific antenna and receive amplifier + * configuration. + */ +#define AR5416_DFS_FIRPWR -33 +#define AR5416_DFS_RRSSI 20 +#define AR5416_DFS_HEIGHT 10 +#define AR5416_DFS_PRSSI 15 +#define AR5416_DFS_INBAND 15 +#define AR5416_DFS_RELPWR 8 +#define AR5416_DFS_RELSTEP 12 +#define AR5416_DFS_MAXLEN 255 + +/* * Methods which are required */ @@ -98,16 +120,45 @@ ath_dfs_detach(struct ath_softc *sc) int ath_dfs_radar_enable(struct ath_softc *sc, struct ieee80211_channel *chan) { +#if 0 + HAL_PHYERR_PARAM pe; + /* Check if the current channel is radar-enabled */ if (! IEEE80211_IS_CHAN_DFS(chan)) return (0); + /* Enable radar PHY error reporting */ + sc->sc_dodfs = 1; + *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 04:55:00 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 888781065714; Wed, 8 Feb 2012 04:55:00 +0000 (UTC) (envelope-from rmacklem@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 6C9178FC12; Wed, 8 Feb 2012 04:55:00 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q184t0NS022965; Wed, 8 Feb 2012 04:55:00 GMT (envelope-from rmacklem@svn.freebsd.org) Received: (from rmacklem@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q184t0tA022960; Wed, 8 Feb 2012 04:55:00 GMT (envelope-from rmacklem@svn.freebsd.org) Message-Id: <201202080455.q184t0tA022960@svn.freebsd.org> From: Rick Macklem Date: Wed, 8 Feb 2012 04:55:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231180 - in projects/nfsv4.1-client/sys/fs: nfs nfsclient X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 04:55:00 -0000 Author: rmacklem Date: Wed Feb 8 04:55:00 2012 New Revision: 231180 URL: http://svn.freebsd.org/changeset/base/231180 Log: Add some functions to do I/O using the NFSv4.1 file layouts to the DS(s). Also, replace the "struct nfsmount *" argument with a "struct nfsclclient *" argument for nfscl_getlayout() and nfscl_getdevinfo() to simplify these functions. Modified: projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Modified: projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h Wed Feb 8 04:47:06 2012 (r231179) +++ projects/nfsv4.1-client/sys/fs/nfs/nfs_var.h Wed Feb 8 04:55:00 2012 (r231180) @@ -455,6 +455,8 @@ int nfsrpc_layoutcommit(vnode_t, off_t, int nfsrpc_layoutreturn(vnode_t, int, int, int, int, off_t, uint64_t, nfsv4stateid_t *, int, uint32_t *, struct ucred *, NFSPROC_T *, void *); int nfsrpc_reclaimcomplete(struct nfsmount *, struct ucred *, NFSPROC_T *); +int nfscl_doiods(vnode_t, struct uio *, int *, int *, uint32_t, + struct ucred *, NFSPROC_T *); /* nfs_clstate.c */ int nfscl_open(vnode_t, u_int8_t *, int, u_int32_t, int, @@ -519,8 +521,9 @@ void nfscl_cleanup(NFSPROC_T *); int nfscl_layout(struct nfsmount *, u_int8_t *, int, nfsv4stateid_t *, int, struct nfsclflayouthead *, struct nfscllayout **, struct ucred *, NFSPROC_T *); -struct nfscllayout *nfscl_getlayout(struct nfsmount *, uint8_t *, int); +struct nfscllayout *nfscl_getlayout(struct nfsclclient *, uint8_t *, int); void nfscl_rellayout(struct nfscllayout *); +struct nfscldevinfo *nfscl_getdevinfo(struct nfsclclient *, uint8_t *); void nfscl_reldevinfo(struct nfscldevinfo *); void nfscl_adddevinfo(struct nfsmount *, struct nfscldevinfo *); void nfscl_freelayout(struct nfscllayout *); Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Wed Feb 8 04:47:06 2012 (r231179) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clrpcops.c Wed Feb 8 04:55:00 2012 (r231180) @@ -90,6 +90,17 @@ static int nfsrpc_getlayout(struct nfsmo static int nfsrpc_fillsa(struct nfsmount *, struct nfsclds *, struct sockaddr_storage *, NFSPROC_T *); static void nfscl_initsessionslots(struct nfsclsession *); +static int nfscl_findlayoutforio(struct nfscllayout *, uint64_t, uint32_t, + struct nfsclflayout **); +static int nfscl_doflayoutio(vnode_t, struct uio *, int *, int *, int *, + nfsv4stateid_t *, int, struct nfscldevinfo *, struct nfsclflayout *, + uint64_t, uint64_t, struct ucred *, NFSPROC_T *); +static int nfsrpc_readds(vnode_t, struct uio *, nfsv4stateid_t *, int *, + struct nfsclds *, uint64_t, int, struct nfsfh *, struct ucred *, + NFSPROC_T *); +static int nfsrpc_writeds(vnode_t, struct uio *, int *, int *, + nfsv4stateid_t *, struct nfsclds *, uint64_t, int, + struct nfsfh *, int, struct ucred *, NFSPROC_T *); /* * nfs null call from vfs. @@ -4951,7 +4962,7 @@ nfsmout: /* * Called from nfsrpc_open() to acquire a layout and associated device * info. A separate function mostly to avoid excessive indentation in - * nfsrpc_open(). + * nfsrpc_open(). The open has already acquired a reference cnt on the client. */ static int nfsrpc_getlayout(struct nfsmount *nmp, struct nfsfh *nfhp, int iomode, @@ -4964,7 +4975,7 @@ nfsrpc_getlayout(struct nfsmount *nmp, s struct nfsclflayouthead flh; int error = 0, retonclose; - lyp = nfscl_getlayout(nmp, nfhp->nfh_fh, nfhp->nfh_len); + lyp = nfscl_getlayout(nmp->nm_clp, nfhp->nfh_fh, nfhp->nfh_len); if (lyp == NULL) { LIST_INIT(&flh); error = nfsrpc_layoutget(nmp, nfhp->nfh_fh, nfhp->nfh_len, @@ -5104,3 +5115,326 @@ nfscl_initsessionslots(struct nfsclsessi sep->nfsess_slots = 0; } +/* + * Called to try and do an I/O operation via an NFSv4.1 Data Server (DS). + */ +int +nfscl_doiods(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, + uint32_t rwaccess, struct ucred *cred, NFSPROC_T *p) +{ + struct nfsnode *np = VTONFS(vp); + struct nfsmount *nmp = VFSTONFS(vnode_mount(vp)); + struct nfscllayout *layp; + struct nfscldevinfo *dip; + struct nfsclflayout *rflp; + nfsv4stateid_t stateid; + struct ucred *newcred; + uint64_t len, off, oresid, xfer; + int eof, error; + void *lckp; + + /* First, get a reference cnt on the clientid for this mount. */ + if (nfscl_getref(nmp) == 0) + return (EIO); + + /* Search for a layout for this file. */ + layp = nfscl_getlayout(nmp->nm_clp, np->n_fhp->nfh_fh, + np->n_fhp->nfh_len); + if (layp == NULL) { + nfscl_relref(nmp); + return (EIO); + } + + /* Find an appropriate stateid. */ + newcred = NFSNEWCRED(cred); + error = nfscl_getstateid(vp, np->n_fhp->nfh_fh, np->n_fhp->nfh_len, + rwaccess, 1, newcred, p, &stateid, &lckp); + if (error != 0) { + NFSFREECRED(newcred); + nfscl_rellayout(layp); + nfscl_relref(nmp); + return (error); + } + + /* + * Loop around finding a layout that works for the first part of + * this I/O operation, and then call the function that actually + * does the RPC. + */ + eof = 0; + len = (uint64_t)uiop->uio_resid; + while (len > 0 && error == 0 && eof == 0) { + off = uiop->uio_offset; + error = nfscl_findlayoutforio(layp, off, rwaccess, &rflp); + if (error == 0) { + oresid = xfer = (uint64_t)uiop->uio_resid; + if (xfer > (rflp->nfsfl_end - rflp->nfsfl_off)) + xfer = rflp->nfsfl_end - rflp->nfsfl_off; + dip = nfscl_getdevinfo(nmp->nm_clp, rflp->nfsfl_dev); + if (dip != NULL) { + error = nfscl_doflayoutio(vp, uiop, iomode, + &eof, must_commit, &stateid, rwaccess, dip, + rflp, off, xfer, newcred, p); + nfscl_reldevinfo(dip); + } else + error = EIO; + if (error == 0) + len -= (oresid - (uint64_t)uiop->uio_resid); + } + } + if (lckp != NULL) + nfscl_lockderef(lckp); + NFSFREECRED(newcred); + nfscl_rellayout(layp); + nfscl_relref(nmp); + return (error); +} + +/* + * Find a file layout that will handle the first bytes of the requested + * range and return the information from it needed to to the I/O operation. + */ +static int +nfscl_findlayoutforio(struct nfscllayout *lyp, uint64_t off, uint32_t rwaccess, + struct nfsclflayout **retflpp) +{ + struct nfsclflayout *flp, *nflp, *rflp; + uint32_t rw; + + rflp = NULL; + rw = rwaccess; + /* For reading, do the Read list first and then the Write list. */ + do { + if (rw == NFSV4OPEN_ACCESSREAD) + flp = LIST_FIRST(&lyp->nfsly_flayread); + else + flp = LIST_FIRST(&lyp->nfsly_flayrw); + while (flp != NULL) { + nflp = LIST_NEXT(flp, nfsfl_list); + if (flp->nfsfl_off > off) + break; + if (flp->nfsfl_end > off && + (rflp == NULL || rflp->nfsfl_end < flp->nfsfl_end)) + rflp = flp; + flp = nflp; + } + if (rw == NFSV4OPEN_ACCESSREAD) + rw = NFSV4OPEN_ACCESSWRITE; + else + rw = 0; + } while (rw != 0); + if (rflp != NULL) { + /* This one covers the most bytes starting at off. */ + *retflpp = rflp; + return (0); + } + return (EIO); +} + +/* + * Do I/O using an NFSv4.1 file layout. + */ +static int +nfscl_doflayoutio(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, + int *eofp, nfsv4stateid_t *stateidp, int rwflag, struct nfscldevinfo *dp, + struct nfsclflayout *flp, uint64_t off, uint64_t len, struct ucred *cred, + NFSPROC_T *p) +{ + uint64_t io_off, rel_off, stripe_unit_size, transfer, xfer; + int commit_thru_mds, error = 0, stripe_index, stripe_pos; + struct nfsnode *np; + struct nfsfh *fhp; + struct nfsclds *dsp; + + np = VTONFS(vp); + rel_off = off - flp->nfsfl_patoff; + stripe_unit_size = (flp->nfsfl_util >> 6) & 0x3ffffff; + stripe_pos = (rel_off / stripe_unit_size + flp->nfsfl_stripe1) % + dp->nfsdi_stripecnt; + transfer = stripe_unit_size - (rel_off % stripe_unit_size); + + /* Loop around, doing I/O for each stripe unit. */ + while (len > 0 && error == 0) { + stripe_index = nfsfldi_stripeindex(dp, stripe_pos); + dsp = nfsfldi_addr(dp, stripe_index); + if (len > transfer) + xfer = transfer; + else + xfer = len; + if ((flp->nfsfl_util & NFSFLAYUTIL_DENSE) != 0) { + /* Dense layout. */ + if (stripe_pos >= flp->nfsfl_fhcnt) + return (EIO); + fhp = flp->nfsfl_fh[stripe_pos]; + io_off = (rel_off / (stripe_unit_size * + dp->nfsdi_stripecnt)) * stripe_unit_size + + rel_off % stripe_unit_size; + } else { + /* Sparse layout. */ + if (flp->nfsfl_fhcnt > 1) { + if (stripe_index >= flp->nfsfl_fhcnt) + return (EIO); + fhp = flp->nfsfl_fh[stripe_index]; + } else if (flp->nfsfl_fhcnt == 1) + fhp = flp->nfsfl_fh[0]; + else + fhp = np->n_fhp; + io_off = off; + } + if ((flp->nfsfl_util & NFSFLAYUTIL_COMMIT_THRU_MDS) != 0) + commit_thru_mds = 1; + else + commit_thru_mds = 0; + if (rwflag == FREAD) + error = nfsrpc_readds(vp, uiop, stateidp, eofp, dsp, + io_off, xfer, fhp, cred, p); + else + error = nfsrpc_writeds(vp, uiop, iomode, must_commit, + stateidp, dsp, io_off, xfer, fhp, commit_thru_mds, + cred, p); + if (error == 0) { + transfer = stripe_unit_size; + stripe_pos = (stripe_pos + 1) % dp->nfsdi_stripecnt; + len -= xfer; + off += xfer; + } + } + return (error); +} + +/* + * The actual read RPC done to a DS. + */ +static int +nfsrpc_readds(vnode_t vp, struct uio *uiop, nfsv4stateid_t *stateidp, int *eofp, + struct nfsclds *dsp, uint64_t io_off, int len, struct nfsfh *fhp, + struct ucred *cred, NFSPROC_T *p) +{ + uint32_t *tl; + int error, retlen; + struct nfsrv_descript nfsd; + struct nfsmount *nmp = VFSTONFS(vnode_mount(vp)); + struct nfsrv_descript *nd = &nfsd; + + nd->nd_mrep = NULL; + nfscl_reqstart(nd, NFSPROC_READ, nmp, fhp->nfh_fh, fhp->nfh_len, + NULL, NULL); + nfsm_stateidtom(nd, stateidp, NFSSTATEID_PUTSEQIDZERO); + NFSM_BUILD(tl, uint32_t *, NFSX_UNSIGNED * 3); + txdr_hyper(io_off, tl); + *(tl + 2) = txdr_unsigned(len); + error = newnfs_request(nd, nmp, NULL, &dsp->nfsclds_sock, vp, p, cred, + NFS_PROG, NFS_VER4, NULL, 1, NULL, &dsp->nfsclds_sess); + if (error != 0) + return (error); + if (nd->nd_repstat != 0) { + error = nd->nd_repstat; + goto nfsmout; + } + NFSM_DISSECT(tl, uint32_t *, NFSX_UNSIGNED); + *eofp = fxdr_unsigned(int, *tl); + NFSM_STRSIZ(retlen, len); + error = nfsm_mbufuio(nd, uiop, retlen); +nfsmout: + if (nd->nd_mrep != NULL) + mbuf_freem(nd->nd_mrep); + return (error); +} + +/* + * The actual write RPC done to a DS. + */ +static int +nfsrpc_writeds(vnode_t vp, struct uio *uiop, int *iomode, int *must_commit, + nfsv4stateid_t *stateidp, struct nfsclds *dsp, uint64_t io_off, int len, + struct nfsfh *fhp, int commit_thru_mds, struct ucred *cred, NFSPROC_T *p) +{ + uint32_t *tl; + struct nfsmount *nmp = VFSTONFS(vnode_mount(vp)); + int error, rlen, commit, committed = NFSWRITE_FILESYNC; + int32_t backup; + struct nfsrv_descript nfsd; + struct nfsrv_descript *nd = &nfsd; + + KASSERT(uiop->uio_iovcnt == 1, ("nfs: writerpc iovcnt > 1")); + nd->nd_mrep = NULL; + nfscl_reqstart(nd, NFSPROC_WRITEDS, nmp, fhp->nfh_fh, fhp->nfh_len, + NULL, NULL); + nfsm_stateidtom(nd, stateidp, NFSSTATEID_PUTSEQIDZERO); + NFSM_BUILD(tl, uint32_t *, NFSX_HYPER + 2 * NFSX_UNSIGNED); + txdr_hyper(io_off, tl); + tl += 2; + *tl++ = txdr_unsigned(*iomode); + *tl = txdr_unsigned(len); + nfsm_uiombuf(nd, uiop, len); + error = newnfs_request(nd, nmp, NULL, &dsp->nfsclds_sock, vp, p, cred, + NFS_PROG, NFS_VER4, NULL, 1, NULL, &dsp->nfsclds_sess); + if (error != 0) + return (error); + if (nd->nd_repstat != 0) { + /* + * In case the rpc gets retried, roll + * the uio fileds changed by nfsm_uiombuf() + * back. + */ + uiop->uio_offset -= len; + uio_uio_resid_add(uiop, len); + uio_iov_base_add(uiop, -len); + uio_iov_len_add(uiop, len); + error = nd->nd_repstat; + } else { + NFSM_DISSECT(tl, uint32_t *, 2 * NFSX_UNSIGNED + NFSX_VERF); + rlen = fxdr_unsigned(int, *tl++); + if (rlen == 0) { + error = NFSERR_IO; + goto nfsmout; + } else if (rlen < len) { + backup = len - rlen; + uio_iov_base_add(uiop, -(backup)); + uio_iov_len_add(uiop, backup); + uiop->uio_offset -= backup; + uio_uio_resid_add(uiop, backup); + len = rlen; + } + commit = fxdr_unsigned(int, *tl++); + + /* + * Return the lowest committment level + * obtained by any of the RPCs. + */ + if (committed == NFSWRITE_FILESYNC) + committed = commit; + else if (committed == NFSWRITE_DATASYNC && + commit == NFSWRITE_UNSTABLE) + committed = commit; + if (commit_thru_mds != 0) { + NFSLOCKMNT(nmp); + if (!NFSHASWRITEVERF(nmp)) { + NFSBCOPY(tl, nmp->nm_verf, NFSX_VERF); + NFSSETWRITEVERF(nmp); + } else if (NFSBCMP(tl, nmp->nm_verf, NFSX_VERF)) { + *must_commit = 1; + NFSBCOPY(tl, nmp->nm_verf, NFSX_VERF); + } + NFSUNLOCKMNT(nmp); + } else { + NFSLOCKDS(dsp); + if (dsp->nfsclds_haswriteverf == 0) { + NFSBCOPY(tl, dsp->nfsclds_verf, NFSX_VERF); + dsp->nfsclds_haswriteverf = 1; + } else if (NFSBCMP(tl, dsp->nfsclds_verf, NFSX_VERF)) { + *must_commit = 1; + NFSBCOPY(tl, dsp->nfsclds_verf, NFSX_VERF); + } + NFSUNLOCKDS(dsp); + } + } +nfsmout: + if (nd->nd_mrep != NULL) + mbuf_freem(nd->nd_mrep); + *iomode = committed; + if (nd->nd_repstat != 0 && error == 0) + error = nd->nd_repstat; + return (error); +} + Modified: projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c ============================================================================== --- projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Wed Feb 8 04:47:06 2012 (r231179) +++ projects/nfsv4.1-client/sys/fs/nfsclient/nfs_clstate.c Wed Feb 8 04:55:00 2012 (r231180) @@ -4473,17 +4473,11 @@ nfscl_layout(struct nfsmount *nmp, u_int * return a pointer to it. */ struct nfscllayout * -nfscl_getlayout(struct nfsmount *nmp, uint8_t *fhp, int fhlen) +nfscl_getlayout(struct nfsclclient *clp, uint8_t *fhp, int fhlen) { - struct nfsclclient *clp; struct nfscllayout *lyp; NFSLOCKCLSTATE(); - clp = nmp->nm_clp; - if (clp == NULL) { - NFSUNLOCKCLSTATE(); - return (NULL); - } lyp = nfscl_findlayout(clp, fhp, fhlen); if (lyp != NULL) { lyp->nfsly_refcnt++; @@ -4509,6 +4503,26 @@ nfscl_rellayout(struct nfscllayout *lyp) } /* + * Search for a devinfo by deviceid. If one is found, return it after + * acquiring a reference count on it. + */ +struct nfscldevinfo * +nfscl_getdevinfo(struct nfsclclient *clp, uint8_t *deviceid) +{ + struct nfscldevinfo *dip; + + NFSLOCKCLSTATE(); + dip = nfscl_finddevinfo(clp, deviceid); + if (dip != NULL) { + dip->nfsdi_refcnt++; + TAILQ_REMOVE(&clp->nfsc_devinfo, dip, nfsdi_list); + TAILQ_INSERT_HEAD(&clp->nfsc_devinfo, dip, nfsdi_list); + } + NFSUNLOCKCLSTATE(); + return (dip); +} + +/* * Dereference a devinfo structure. */ void From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 06:15:39 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 50E00106566C; Wed, 8 Feb 2012 06:15:39 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 223868FC0C; Wed, 8 Feb 2012 06:15:39 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q186Fdrp025594; Wed, 8 Feb 2012 06:15:39 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q186Fdb8025591; Wed, 8 Feb 2012 06:15:39 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080615.q186Fdb8025591@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 06:15:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231182 - projects/armv6/sys/arm/ti X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 06:15:39 -0000 Author: gonzo Date: Wed Feb 8 06:15:38 2012 New Revision: 231182 URL: http://svn.freebsd.org/changeset/base/231182 Log: Provide placeholder for per-board reset function implementation - Minor empty lines clean-up Modified: projects/armv6/sys/arm/ti/omapvar.h projects/armv6/sys/arm/ti/ti_machdep.c Modified: projects/armv6/sys/arm/ti/omapvar.h ============================================================================== --- projects/armv6/sys/arm/ti/omapvar.h Wed Feb 8 05:03:04 2012 (r231181) +++ projects/armv6/sys/arm/ti/omapvar.h Wed Feb 8 06:15:38 2012 (r231182) @@ -62,6 +62,8 @@ extern struct bus_space omap_bs_tag; +/* board-dependent reset function implementation */ +extern void (*ti_cpu_reset)(void); unsigned int omap_sdram_size(void); @@ -97,9 +99,6 @@ omap_teardown_intr(device_t dev, device_ #define OMAP_CPUID_OMAP4430_ES1_2 0xB852 #define OMAP_CPUID_OMAP4430 0xB95C - - - /** * struct omap_softc * @@ -114,7 +113,6 @@ omap_cpu_is(uint32_t cpu) return ((omap3_chip_id & 0xffff) == cpu); } - /** * struct omap_softc * @@ -131,7 +129,6 @@ struct omap_softc { bus_dma_tag_t sc_dmat; }; - struct omap_mem_range { bus_addr_t base; bus_size_t size; @@ -152,14 +149,8 @@ struct omap_cpu_dev { int irqs[16]; }; - - struct omap_ivar { struct resource_list resources; }; - - - - #endif /* _OMAP3VAR_H_ */ Modified: projects/armv6/sys/arm/ti/ti_machdep.c ============================================================================== --- projects/armv6/sys/arm/ti/ti_machdep.c Wed Feb 8 05:03:04 2012 (r231181) +++ projects/armv6/sys/arm/ti/ti_machdep.c Wed Feb 8 06:15:38 2012 (r231182) @@ -155,6 +155,7 @@ static void print_kernel_section_addr(vo static void physmap_init(void); static int platform_devmap_init(void); +void (*ti_cpu_reset)(void); static char * kenv_next(char *cp) @@ -210,6 +211,7 @@ physmap_init(void) phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR); kernload = KERNPHYSADDR; + ti_cpu_reset = NULL; /* * Remove kernel physical address range from avail @@ -640,7 +642,10 @@ bus_dma_get_range_nb(void) void cpu_reset() { -// omap_prcm_reset(); + if (ti_cpu_reset) + (*ti_cpu_reset)(); + else + printf("no cpu_reset implementation\n"); printf("Reset failed!\n"); while (1); } From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 06:21:42 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 66F48106566B; Wed, 8 Feb 2012 06:21:42 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 525B08FC0A; Wed, 8 Feb 2012 06:21:42 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q186LgdG025812; Wed, 8 Feb 2012 06:21:42 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q186LgGh025810; Wed, 8 Feb 2012 06:21:42 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080621.q186LgGh025810@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 06:21:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231183 - projects/armv6/sys/arm/ti X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 06:21:42 -0000 Author: gonzo Date: Wed Feb 8 06:21:42 2012 New Revision: 231183 URL: http://svn.freebsd.org/changeset/base/231183 Log: Remove unused header Modified: projects/armv6/sys/arm/ti/omap_scm.c Modified: projects/armv6/sys/arm/ti/omap_scm.c ============================================================================== --- projects/armv6/sys/arm/ti/omap_scm.c Wed Feb 8 06:15:38 2012 (r231182) +++ projects/armv6/sys/arm/ti/omap_scm.c Wed Feb 8 06:21:42 2012 (r231183) @@ -70,7 +70,6 @@ __FBSDID("$FreeBSD$"); #include #include "omap_scm.h" -#include "omap_if.h" static struct resource_spec omap_scm_res_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 06:22:43 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 935C0106566C; Wed, 8 Feb 2012 06:22:43 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 7D4B18FC15; Wed, 8 Feb 2012 06:22:43 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q186MhYU025897; Wed, 8 Feb 2012 06:22:43 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q186Mhck025892; Wed, 8 Feb 2012 06:22:43 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080622.q186Mhck025892@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 06:22:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231184 - in projects/armv6/sys: arm/ti arm/ti/omap4 boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 06:22:43 -0000 Author: gonzo Date: Wed Feb 8 06:22:43 2012 New Revision: 231184 URL: http://svn.freebsd.org/changeset/base/231184 Log: Make PRCM driver FDT-compatible Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c projects/armv6/sys/arm/ti/omap_prcm.c projects/armv6/sys/arm/ti/omap_prcm.h projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 06:21:42 2012 (r231183) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 06:22:43 2012 (r231184) @@ -14,7 +14,7 @@ arm/arm/irq_dispatch.S standard arm/ti/ti_machdep.c standard # arm/ti/omap.c standard arm/ti/ti_cpuid.c standard -# arm/ti/omap_prcm.c standard +arm/ti/omap_prcm.c standard arm/ti/omap_scm.c standard # arm/ti/omap_if.m standard arm/ti/mp_timer.c standard @@ -26,7 +26,7 @@ arm/ti/bus_space.c standard # arm/ti/omap4/omap4_if.m standard # arm/ti/omap4/omap44xx.c standard # arm/ti/omap4/omap4_intr.c standard -# arm/ti/omap4/omap4_prcm_clks.c standard +arm/ti/omap4/omap4_prcm_clks.c standard arm/ti/omap4/omap4_scm_padconf.c standard dev/uart/uart_dev_ns8250.c optional uart Modified: projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c ============================================================================== --- projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c Wed Feb 8 06:21:42 2012 (r231183) +++ projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c Wed Feb 8 06:22:43 2012 (r231184) @@ -51,7 +51,10 @@ __FBSDID("$FreeBSD$"); #include #include -#include "omap_if.h" +#include +#include +#include +#include /* * This file defines the clock configuration for the OMAP4xxx series of @@ -126,13 +129,11 @@ __FBSDID("$FreeBSD$"); #define DEVICE_PRM_OFFSET 0x00001B00UL #define INSTR_PRM_OFFSET 0x00001F00UL - #define CM_ABE_DSS_SYS_CLKSEL_OFFSET (CKGEN_PRM_OFFSET + 0x0000UL) #define CM_L4_WKUP_CLKSELL_OFFSET (CKGEN_PRM_OFFSET + 0x0008UL) #define CM_ABE_PLL_REF_CLKSEL_OFFSET (CKGEN_PRM_OFFSET + 0x000CUL) #define CM_SYS_CLKSEL_OFFSET (CKGEN_PRM_OFFSET + 0x0010UL) - /** * Address offsets from the CM1 memory region to the top level clock control * registers. @@ -146,7 +147,6 @@ __FBSDID("$FreeBSD$"); #define CM_CLKSEL_DPLL_MPU (CKGEN_CM1_OFFSET + 0x006CUL) - /** * Address offsets from the CM2 memory region to the top level clock control * registers. @@ -164,8 +164,6 @@ __FBSDID("$FreeBSD$"); #define RESTORE_CM2_OFFSET 0x00001E00UL #define INSTR_CM2_OFFSET 0x00001F00UL - - #define CLKCTRL_MODULEMODE_MASK 0x00000003UL #define CLKCTRL_MODULEMODE_DISABLE 0x00000000UL #define CLKCTRL_MODULEMODE_AUTO 0x00000001UL @@ -177,29 +175,38 @@ __FBSDID("$FreeBSD$"); #define CLKCTRL_IDLEST_IDLE 0x00020000UL #define CLKCTRL_IDLEST_DISABLED 0x00030000UL +static struct resource_spec omap_scm_res_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */ + { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* Control memory window */ + { SYS_RES_MEMORY, 2, RF_ACTIVE }, /* Control memory window */ + { -1, 0 } +}; + struct omap4_prcm_softc { - struct resource *sc_mem_res[4]; + struct resource *sc_res[3]; }; -static int omap4_clk_generic_activate(device_t dev, struct omap_clock_dev *clkdev); -static int omap4_clk_generic_deactivate(device_t dev, struct omap_clock_dev *clkdev); -static int omap4_clk_generic_accessible(device_t dev, struct omap_clock_dev *clkdev); -static int omap4_clk_generic_set_source(device_t dev, struct omap_clock_dev *clkdev, clk_src_t clksrc); -static int omap4_clk_generic_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, unsigned int *freq); - -static int omap4_clk_gptimer_set_source(device_t dev, struct omap_clock_dev *clkdev, clk_src_t clksrc); -static int omap4_clk_gptimer_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, unsigned int *freq); - -static int omap4_clk_hsmmc_set_source(device_t dev, struct omap_clock_dev *clkdev, clk_src_t clksrc); -static int omap4_clk_hsmmc_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, unsigned int *freq); - -static int omap4_clk_hsusbhost_set_source(device_t dev, struct omap_clock_dev *clkdev, clk_src_t clksrc); -static int omap4_clk_hsusbhost_activate(device_t dev, struct omap_clock_dev *clkdev); -static int omap4_clk_hsusbhost_deactivate(device_t dev, struct omap_clock_dev *clkdev); -static int omap4_clk_hsusbhost_accessible(device_t dev, struct omap_clock_dev *clkdev); +static struct omap4_prcm_softc *omap4_prcm_sc; -static int omap4_clk_get_sysclk_freq(device_t dev, struct omap_clock_dev *clkdev, unsigned int *freq); -static int omap4_clk_get_arm_fclk_freq(device_t dev, struct omap_clock_dev *clkdev, unsigned int *freq); +static int omap4_clk_generic_activate(struct omap_clock_dev *clkdev); +static int omap4_clk_generic_deactivate(struct omap_clock_dev *clkdev); +static int omap4_clk_generic_accessible(struct omap_clock_dev *clkdev); +static int omap4_clk_generic_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc); +static int omap4_clk_generic_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq); + +static int omap4_clk_gptimer_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc); +static int omap4_clk_gptimer_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq); + +static int omap4_clk_hsmmc_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc); +static int omap4_clk_hsmmc_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq); + +static int omap4_clk_hsusbhost_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc); +static int omap4_clk_hsusbhost_activate(struct omap_clock_dev *clkdev); +static int omap4_clk_hsusbhost_deactivate(struct omap_clock_dev *clkdev); +static int omap4_clk_hsusbhost_accessible(struct omap_clock_dev *clkdev); + +static int omap4_clk_get_sysclk_freq(struct omap_clock_dev *clkdev, unsigned int *freq); +static int omap4_clk_get_arm_fclk_freq(struct omap_clock_dev *clkdev, unsigned int *freq); /** * omap_clk_devmap - Array of clock devices available on OMAP4xxx devices @@ -321,20 +328,14 @@ struct omap_clock_dev omap_clk_devmap[] { INVALID_CLK_IDENT, NULL, NULL, NULL, NULL } }; - - - - - /** - * g_omap4_clk_details - Stores details for all the different clocks supported + * omap4_clk_details - Stores details for all the different clocks supported * * Whenever an operation on a clock is being performed (activated, deactivated, * etc) this array is looked up to find the correct register and bit(s) we * should be modifying. * */ - struct omap4_clk_details { clk_ident_t id; @@ -423,18 +424,12 @@ static struct omap4_clk_details g_omap4_ { INVALID_CLK_IDENT, 0, 0, 0, 0 }, }; - - - - - /** * MAX_MODULE_ENABLE_WAIT - the number of loops to wait for the module to come * alive. * */ #define MAX_MODULE_ENABLE_WAIT 1000 - /** * ARRAY_SIZE - Macro to return the number of elements in a static const array. @@ -442,7 +437,6 @@ static struct omap4_clk_details g_omap4_ */ #define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) - /** * omap4_clk_details - writes a 32-bit value to one of the timer registers * @timer: Timer device context @@ -465,9 +459,6 @@ omap4_clk_details(clk_ident_t id) return NULL; } - - - /** * omap4_clk_generic_activate - checks if a module is accessible @@ -484,21 +475,26 @@ omap4_clk_details(clk_ident_t id) * Returns 0 on success or a positive error code on failure. */ static int -omap4_clk_generic_activate(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_generic_activate(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; unsigned int i; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); + if (clk_mem_res == NULL) return (EINVAL); - - /* All the 'generic' clocks have a CLKCTRL register which is more or less * generic - the have at least two fielda called MODULEMODE and IDLEST. */ @@ -507,7 +503,6 @@ omap4_clk_generic_activate(device_t dev, clksel |= clk_details->enable_mode; bus_write_4(clk_mem_res, clk_details->clksel_reg, clksel); - /* Now poll on the IDLEST register to tell us if the module has come up. * TODO: We need to take into account the parent clocks. */ @@ -529,8 +524,6 @@ omap4_clk_generic_activate(device_t dev, return (0); } - - /** * omap4_clk_generic_deactivate - checks if a module is accessible * @module: identifier for the module to check, see omap3_prcm.h for a list @@ -546,19 +539,25 @@ omap4_clk_generic_activate(device_t dev, * Returns 0 on success or a positive error code on failure. */ static int -omap4_clk_generic_deactivate(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_generic_deactivate(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); + if (clk_mem_res == NULL) return (EINVAL); - /* All the 'generic' clocks have a CLKCTRL register which is more or less * generic - the have at least two fielda called MODULEMODE and IDLEST. */ @@ -570,7 +569,6 @@ omap4_clk_generic_deactivate(device_t de return (0); } - /** * omap4_clk_generic_set_source - checks if a module is accessible * @module: identifier for the module to check, see omap3_prcm.h for a list @@ -586,11 +584,10 @@ omap4_clk_generic_deactivate(device_t de * Returns 0 on success or a positive error code on failure. */ static int -omap4_clk_generic_set_source(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_generic_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc) { - return (0); } @@ -609,13 +606,19 @@ omap4_clk_generic_set_source(device_t de * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_generic_accessible(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_generic_accessible(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); if (clk_mem_res == NULL) @@ -630,7 +633,6 @@ omap4_clk_generic_accessible(device_t de return (1); } - /** * omap4_clk_generic_get_source_freq - checks if a module is accessible * @module: identifier for the module to check, see omap3_prcm.h for a list @@ -646,15 +648,11 @@ omap4_clk_generic_accessible(device_t de * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_generic_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_generic_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq ) { struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); -#if 0 - uint32_t clksel; - unsigned int src_freq; -#endif if (clk_details == NULL) return (ENXIO); @@ -682,16 +680,18 @@ omap4_clk_generic_get_source_freq(device * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_gptimer_set_source(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_gptimer_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; -#if 0 - uint32_t clksel; - unsigned int src_freq; -#endif + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; + + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; if (clk_details == NULL) return (ENXIO); @@ -718,16 +718,22 @@ omap4_clk_gptimer_set_source(device_t de * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_gptimer_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_gptimer_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq ) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; unsigned int src_freq; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); if (clk_mem_res == NULL) @@ -738,7 +744,7 @@ omap4_clk_gptimer_get_source_freq(device if (clksel & (0x1UL << 24)) src_freq = FREQ_32KHZ; else - omap4_clk_get_sysclk_freq(dev, NULL, &src_freq); + omap4_clk_get_sysclk_freq(NULL, &src_freq); /* Return the frequency */ if (freq) @@ -747,8 +753,6 @@ omap4_clk_gptimer_get_source_freq(device return (0); } - - /** * omap4_clk_hsmmc_set_source - sets the source clock (freq) * @clkdev: pointer to the clockdev structure (id field will contain clock id) @@ -762,14 +766,20 @@ omap4_clk_gptimer_get_source_freq(device * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_hsmmc_set_source(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_hsmmc_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); if (clk_mem_res == NULL) @@ -812,16 +822,22 @@ omap4_clk_hsmmc_set_source(device_t dev, * Returns 0 on success or a negative error code on failure. */ static int -omap4_clk_hsmmc_get_source_freq(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_hsmmc_get_source_freq(struct omap_clock_dev *clkdev, unsigned int *freq ) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - struct omap4_clk_details* clk_details = omap4_clk_details(clkdev->id); - struct resource* clk_mem_res = sc->sc_mem_res[clk_details->mem_region]; + struct omap4_prcm_softc *sc = omap4_prcm_sc; + struct omap4_clk_details* clk_details; + struct resource* clk_mem_res; uint32_t clksel; unsigned int src_freq; + if (sc == NULL) + return ENXIO; + + clk_details = omap4_clk_details(clkdev->id); + clk_mem_res = sc->sc_res[clk_details->mem_region]; + if (clk_details == NULL) return (ENXIO); if (clk_mem_res == NULL) @@ -853,8 +869,6 @@ omap4_clk_hsmmc_get_source_freq(device_t return (0); } - - /** * omap4_clk_get_sysclk_freq - gets the sysclk frequency * @sc: pointer to the clk module/device context @@ -866,15 +880,18 @@ omap4_clk_hsmmc_get_source_freq(device_t * nothing, values are saved in global variables */ static int -omap4_clk_get_sysclk_freq(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_get_sysclk_freq(struct omap_clock_dev *clkdev, unsigned int *freq) { uint32_t clksel; uint32_t sysclk; - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; + if (sc == NULL) + return ENXIO; + /* Read the input clock freq from the configuration register (CM_SYS_CLKSEL) */ - clksel = bus_read_4(sc->sc_mem_res[PRM_INSTANCE_MEM_REGION], CM_SYS_CLKSEL_OFFSET); + clksel = bus_read_4(sc->sc_res[PRM_INSTANCE_MEM_REGION], CM_SYS_CLKSEL_OFFSET); switch (clksel & 0x7) { case 0x1: /* 12Mhz */ @@ -907,7 +924,6 @@ omap4_clk_get_sysclk_freq(device_t dev, return (0); } - /** * omap4_clk_get_arm_fclk_freq - gets the MPU clock frequency * @clkdev: ignored @@ -921,25 +937,28 @@ omap4_clk_get_sysclk_freq(device_t dev, * returns 0 on success, a positive error code on failure. */ static int -omap4_clk_get_arm_fclk_freq(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_get_arm_fclk_freq(struct omap_clock_dev *clkdev, unsigned int *freq) { uint32_t clksel; uint32_t pll_mult, pll_div; uint32_t mpuclk, sysclk; - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; + + if (sc == NULL) + return ENXIO; /* Read the clksel register which contains the DPLL multiple and divide * values. These are applied to the sysclk. */ - clksel = bus_read_4(sc->sc_mem_res[CM1_INSTANCE_MEM_REGION], CM_CLKSEL_DPLL_MPU); + clksel = bus_read_4(sc->sc_res[CM1_INSTANCE_MEM_REGION], CM_CLKSEL_DPLL_MPU); pll_mult = ((clksel >> 8) & 0x7ff); pll_div = (clksel & 0x7f) + 1; /* Get the system clock freq */ - omap4_clk_get_sysclk_freq(dev, NULL, &sysclk); + omap4_clk_get_sysclk_freq(NULL, &sysclk); /* Calculate the MPU freq */ @@ -952,8 +971,6 @@ omap4_clk_get_arm_fclk_freq(device_t dev return (0); } - - /** * omap4_clk_hsusbhost_activate - activates the USB clocks for the given module * @clkdev: pointer to the clock device structure. @@ -1003,82 +1020,17 @@ struct dpll_param usb_dpll_param[7] = { #endif }; static int -omap4_clk_hsusbhost_activate(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_hsusbhost_activate(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; unsigned int i; -#if 0 - struct dpll_param *dpll_param; - - - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; - clksel_reg_off = 0x104; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel &= ~CLKCTRL_MODULEMODE_MASK; - clksel = 1; - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; - clksel_reg_off = 0x180; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel &= ~0x7; - clksel |= 4; - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - clksel_reg_off = 0x184; - while (bus_read_4(clk_mem_res, clksel_reg_off) & 1) { - printf("GOT %x\n", bus_read_4(clk_mem_res, clksel_reg_off)); - } - - clksel_reg_off = 0x188; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel &= ~0x7; - bus_write_4(clk_mem_res, clksel_reg_off, clksel); + if (sc == NULL) + return ENXIO; - i = *(unsigned int *)(OMAP44XX_L4_CORE_VBASE + 0x306110); - printf("got %d\n", i); - dpll_param = &usb_dpll_param[i - 1]; - clksel_reg_off = 0x18c; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel = (dpll_param->m << 8) | (dpll_param->n); - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - clksel_reg_off = 0x190; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel = 0x100 | (dpll_param->m2) | (1 << 8); - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; - clksel_reg_off = 0x1b4; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel |= (1 << 8); - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - clksel_reg_off = 0x180; - clksel = bus_read_4(clk_mem_res, clksel_reg_off); - clksel &= ~0x7; - clksel |= 7; - bus_write_4(clk_mem_res, clksel_reg_off, clksel); - printf("YEAH YEAH\n"); - clksel_reg_off = 0x184; - while (!(bus_read_4(clk_mem_res, clksel_reg_off) & 1)) { - printf("pouic pouic %x\n", bus_read_4(clk_mem_res, clksel_reg_off) & 1); - } - - clksel_reg_off = 0x1b4; - clksel = 0x100; - bus_write_4(clk_mem_res, clksel_reg_off, clksel); -#if 0 - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0x38, 1); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0x40, 2); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0x58, 2); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0x60, 1); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0x68, 1); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0xd0, 2); - bus_write_4(clk_mem_res, L3INIT_CM2_OFFSET + 0xe0, 0x301); -#endif -#endif - switch (clkdev->id) { case USBTLL_CLK: /* For the USBTLL module we need to enable the following clocks: @@ -1088,7 +1040,7 @@ omap4_clk_hsusbhost_activate(device_t de */ /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; /* Enable the module and also enable the optional func clocks for @@ -1123,7 +1075,7 @@ omap4_clk_hsusbhost_activate(device_t de */ /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); /* Enable the module and also enable the optional func clocks */ @@ -1152,7 +1104,6 @@ omap4_clk_hsusbhost_activate(device_t de bus_write_4(clk_mem_res, clksel_reg_off, clksel); - /* Try MAX_MODULE_ENABLE_WAIT number of times to check if enabled */ for (i = 0; i < MAX_MODULE_ENABLE_WAIT; i++) { clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1166,13 +1117,10 @@ omap4_clk_hsusbhost_activate(device_t de printf("Error: 0x%08x => 0x%08x\n", clksel_reg_off, clksel); return (ETIMEDOUT); } - return (0); } - - /** * omap4_clk_generic_deactivate - checks if a module is accessible * @clkdev: pointer to the clock device structure. @@ -1187,17 +1135,20 @@ omap4_clk_hsusbhost_activate(device_t de * Returns 0 on success or a positive error code on failure. */ static int -omap4_clk_hsusbhost_deactivate(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_hsusbhost_deactivate(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; + if (sc == NULL) + return ENXIO; + switch (clkdev->id) { case USBTLL_CLK: /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1226,7 +1177,7 @@ omap4_clk_hsusbhost_deactivate(device_t */ /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1259,7 +1210,6 @@ omap4_clk_hsusbhost_deactivate(device_t return (0); } - /** * omap4_clk_hsusbhost_accessible - checks if a module is accessible * @clkdev: pointer to the clock device structure. @@ -1275,21 +1225,24 @@ omap4_clk_hsusbhost_deactivate(device_t * error code on failure. */ static int -omap4_clk_hsusbhost_accessible(device_t dev, struct omap_clock_dev *clkdev) +omap4_clk_hsusbhost_accessible(struct omap_clock_dev *clkdev) { - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; + if (sc == NULL) + return ENXIO; + if (clkdev->id == USBTLL_CLK) { /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x68; } else if (clkdev->id == USBHSHOST_CLK) { /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; } else { @@ -1320,15 +1273,18 @@ omap4_clk_hsusbhost_accessible(device_t * Returns 0 if sucessful otherwise a negative error code on failure. */ static int -omap4_clk_hsusbhost_set_source(device_t dev, struct omap_clock_dev *clkdev, +omap4_clk_hsusbhost_set_source(struct omap_clock_dev *clkdev, clk_src_t clksrc) { - struct omap4_prcm_softc *sc = device_get_softc(dev); + struct omap4_prcm_softc *sc = omap4_prcm_sc; struct resource* clk_mem_res; uint32_t clksel_reg_off; uint32_t clksel; unsigned int bit; + if (sc == NULL) + return ENXIO; + if (clkdev->id == USBP1_PHY_CLK) bit = 24; else if (clkdev->id != USBP2_PHY_CLK) @@ -1337,7 +1293,7 @@ omap4_clk_hsusbhost_set_source(device_t return (-EINVAL); /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ - clk_mem_res = sc->sc_mem_res[CM2_INSTANCE_MEM_REGION]; + clk_mem_res = sc->sc_res[CM2_INSTANCE_MEM_REGION]; clksel_reg_off = L3INIT_CM2_OFFSET + 0x58; clksel = bus_read_4(clk_mem_res, clksel_reg_off); @@ -1356,19 +1312,12 @@ omap4_clk_hsusbhost_set_source(device_t #define PRM_RSTCTRL_RESET 0x2 static void -omap4_prcm_reset(device_t dev) +omap4_prcm_reset(void) { - struct omap4_prcm_softc *sc = device_get_softc(dev); - bus_write_4(sc->sc_mem_res[0], PRM_RSTCTRL, - bus_read_4(sc->sc_mem_res[0], PRM_RSTCTRL) | PRM_RSTCTRL_RESET); - bus_read_4(sc->sc_mem_res[0], PRM_RSTCTRL); -} - -static void -omap4_prcm_identify(driver_t *driver, device_t parent) -{ - - BUS_ADD_CHILD(parent, 0, "omap4_prcm", 0); + struct omap4_prcm_softc *sc = omap4_prcm_sc; + bus_write_4(sc->sc_res[0], PRM_RSTCTRL, + bus_read_4(sc->sc_res[0], PRM_RSTCTRL) | PRM_RSTCTRL_RESET); + bus_read_4(sc->sc_res[0], PRM_RSTCTRL); } /** @@ -1386,10 +1335,10 @@ omap4_prcm_identify(driver_t *driver, de static int omap4_prcm_probe(device_t dev) { + if (!ofw_bus_is_compatible(dev, "ti,omap4_prcm")) + return (ENXIO); + device_set_desc(dev, "TI OMAP Power, Reset and Clock Management"); - bus_set_resource(dev, SYS_RES_MEMORY, 0, 0x4A306000, 0x2000); - bus_set_resource(dev, SYS_RES_MEMORY, 1, 0x4A004000, 0x1000); - bus_set_resource(dev, SYS_RES_MEMORY, 2, 0x4A008000, 0x2000); return (0); } @@ -1410,57 +1359,21 @@ static int omap4_prcm_attach(device_t dev) { struct omap4_prcm_softc *sc = device_get_softc(dev); - int rid; - rid = 0; - /* Attempt to get the memory resource(s) */ - sc->sc_mem_res[PRM_INSTANCE_MEM_REGION] = - bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, - 0x4A306000, - 0x4A306000 + 0x2000, - 0x2000, RF_ACTIVE); - - if (sc->sc_mem_res[PRM_INSTANCE_MEM_REGION] == NULL) { - device_printf(dev, "failed to allocate resource for PRM region\n"); + if (bus_alloc_resources(dev, omap_scm_res_spec, sc->sc_res)) { + device_printf(dev, "could not allocate resources\n"); return (ENXIO); } - rid = 1; - sc->sc_mem_res[CM1_INSTANCE_MEM_REGION] = - bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, - 0x4A004000, - 0x4A004000 + 0x1000, - 0x1000, RF_ACTIVE); + omap4_prcm_sc = sc; + ti_cpu_reset = omap4_prcm_reset; - if (sc->sc_mem_res[CM1_INSTANCE_MEM_REGION] == NULL) { - device_printf(dev, "failed to allocate resource for CM1 region\n"); - return (ENXIO); - } - - rid = 2; - sc->sc_mem_res[CM2_INSTANCE_MEM_REGION] = - bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, - 0x4A008000, - 0x4A008000 + 0x8000, - 0x8000, RF_ACTIVE); - - if (sc->sc_mem_res[CM2_INSTANCE_MEM_REGION] == NULL) { - device_printf(dev, "failed to allocate resource for CM2 region\n"); - return (ENXIO); - } - - /* Initialize top-level OMAP PRCM API */ - omap_prcm_init(dev); - return (0); } static device_method_t omap4_prcm_methods[] = { - DEVMETHOD(device_identify, omap4_prcm_identify), DEVMETHOD(device_probe, omap4_prcm_probe), DEVMETHOD(device_attach, omap4_prcm_attach), - - DEVMETHOD(omap_prcm_reset, omap4_prcm_reset), {0, 0}, }; @@ -1472,5 +1385,5 @@ static driver_t omap4_prcm_driver = { static devclass_t omap4_prcm_devclass; -DRIVER_MODULE(omap4_prcm, omap, omap4_prcm_driver, omap4_prcm_devclass, 0, 0); +DRIVER_MODULE(omap4_prcm, simplebus, omap4_prcm_driver, omap4_prcm_devclass, 0, 0); MODULE_VERSION(omap4_prcm, 1); Modified: projects/armv6/sys/arm/ti/omap_prcm.c ============================================================================== --- projects/armv6/sys/arm/ti/omap_prcm.c Wed Feb 8 06:21:42 2012 (r231183) +++ projects/armv6/sys/arm/ti/omap_prcm.c Wed Feb 8 06:22:43 2012 (r231184) @@ -60,28 +60,6 @@ __FBSDID("$FreeBSD$"); #include -#include "omap_if.h" - -static device_t prcm_dev; -static struct mtx prcm_mtx; - -/** - * Structure that stores the driver context. - * - * This structure is allocated during driver attach, it is not designed to be - * deallocated and a pointer to it is stored globally (g_omap3_prcm_softc). - */ -struct omap_prcm_softc { - device_t sc_dev; - - /* - * The memory resource(s) for the PRCM register set, when the device is - * created the caller can assign up to 4 memory regions. - */ - struct resource* sc_mem_res[4]; -}; - - /** * omap_clk_devmap - Array of clock devices, should be defined one per SoC * @@ -91,25 +69,6 @@ struct omap_prcm_softc { */ extern struct omap_clock_dev omap_clk_devmap[]; - - -/** - * Macros for driver mutex locking - */ -#define OMAP_PRCM_LOCK mtx_lock(&prcm_mtx) -#define OMAP_PRCM_UNLOCK mtx_unlock(&prcm_mtx) -#define OMAP_PRCM_LOCK_DESTROY mtx_destroy(&prcm_mtx) -#define OMAP_PRCM_ASSERT_LOCKED mtx_assert(&prcm_mtx, MA_OWNED) -#define OMAP_PRCM_ASSERT_UNLOCKED mtx_assert(&prcm_mtx, MA_NOTOWNED) - -void -omap_prcm_init(device_t dev) -{ - prcm_dev = dev; - - mtx_init(&prcm_mtx, device_get_nameunit(dev), "omap_prcm", MTX_DEF); -} - /** * omap_prcm_clk_dev - returns a pointer to the clock device with given id * @clk: the ID of the clock device to get @@ -141,7 +100,7 @@ omap_prcm_clk_dev(clk_ident_t clk) } /* Sanity check we managed to find the clock */ - device_printf(prcm_dev, "Error: Failed to find clock device (%d)\n", clk); + printf("omap_prcm: Failed to find clock device (%d)\n", clk); return (NULL); } @@ -168,19 +127,9 @@ omap_prcm_clk_valid(clk_ident_t clk) { int ret = 0; - /* Sanity check */ - if (prcm_dev == NULL) { - device_printf(prcm_dev, "Error: PRCM module not setup (%s)\n", __func__); - return (EINVAL); - } - - OMAP_PRCM_LOCK; - if (omap_prcm_clk_dev(clk) == NULL) ret = EINVAL; - OMAP_PRCM_UNLOCK; - return (ret); } @@ -209,14 +158,6 @@ omap_prcm_clk_enable(clk_ident_t clk) struct omap_clock_dev *clk_dev; int ret; - /* Sanity check */ - if (prcm_dev == NULL) { - device_printf(prcm_dev, "Error: PRCM module not setup (%s)\n", __func__); - return (EINVAL); - } - - OMAP_PRCM_LOCK; - /* Find the clock within the devmap - it's a bit inefficent having a for * loop for this, but this function should only called when a driver is * being activated so IMHO not a big issue. @@ -224,20 +165,15 @@ omap_prcm_clk_enable(clk_ident_t clk) clk_dev = omap_prcm_clk_dev(clk); /* Sanity check we managed to find the clock */ - if (clk_dev == NULL) { - OMAP_PRCM_UNLOCK; + if (clk_dev == NULL) return (EINVAL); - } /* Activate the clock */ if (clk_dev->clk_activate) - ret = clk_dev->clk_activate(prcm_dev, clk_dev); + ret = clk_dev->clk_activate(clk_dev); else ret = EINVAL; - - OMAP_PRCM_UNLOCK; - return (ret); } @@ -266,14 +202,6 @@ omap_prcm_clk_disable(clk_ident_t clk) struct omap_clock_dev *clk_dev; int ret; *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 06:28:34 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DE7421065674; Wed, 8 Feb 2012 06:28:34 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id AECC18FC14; Wed, 8 Feb 2012 06:28:34 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q186SYSW026112; Wed, 8 Feb 2012 06:28:34 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q186SYX6026107; Wed, 8 Feb 2012 06:28:34 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080628.q186SYX6026107@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 06:28:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231185 - in projects/armv6/sys/arm/ti: . omap4 X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 06:28:35 -0000 Author: gonzo Date: Wed Feb 8 06:28:34 2012 New Revision: 231185 URL: http://svn.freebsd.org/changeset/base/231185 Log: Rename omapvar.h to tivar.h Added: projects/armv6/sys/arm/ti/tivar.h - copied, changed from r231182, projects/armv6/sys/arm/ti/omapvar.h Deleted: projects/armv6/sys/arm/ti/omapvar.h Modified: projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c projects/armv6/sys/arm/ti/omap4/omap4_scm_padconf.c projects/armv6/sys/arm/ti/ti_cpuid.c Modified: projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c ============================================================================== --- projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c Wed Feb 8 06:22:43 2012 (r231184) +++ projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c Wed Feb 8 06:28:34 2012 (r231185) @@ -47,7 +47,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include Modified: projects/armv6/sys/arm/ti/omap4/omap4_scm_padconf.c ============================================================================== --- projects/armv6/sys/arm/ti/omap4/omap4_scm_padconf.c Wed Feb 8 06:22:43 2012 (r231184) +++ projects/armv6/sys/arm/ti/omap4/omap4_scm_padconf.c Wed Feb 8 06:28:34 2012 (r231185) @@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include #include Modified: projects/armv6/sys/arm/ti/ti_cpuid.c ============================================================================== --- projects/armv6/sys/arm/ti/ti_cpuid.c Wed Feb 8 06:22:43 2012 (r231184) +++ projects/armv6/sys/arm/ti/ti_cpuid.c Wed Feb 8 06:28:34 2012 (r231185) @@ -46,7 +46,7 @@ __FBSDID("$FreeBSD$"); #include #include -#include +#include #include #include Copied and modified: projects/armv6/sys/arm/ti/tivar.h (from r231182, projects/armv6/sys/arm/ti/omapvar.h) ============================================================================== --- projects/armv6/sys/arm/ti/omapvar.h Wed Feb 8 06:15:38 2012 (r231182, copy source) +++ projects/armv6/sys/arm/ti/tivar.h Wed Feb 8 06:28:34 2012 (r231185) @@ -30,8 +30,8 @@ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _OMAPVAR_H_ -#define _OMAPVAR_H_ +#ifndef _TIVAR_H_ +#define _TIVAR_H_ #include #include From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 06:55:22 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DC2D41065694; Wed, 8 Feb 2012 06:55:22 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id C7C268FC16; Wed, 8 Feb 2012 06:55:22 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q186tMhW026986; Wed, 8 Feb 2012 06:55:22 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q186tMog026984; Wed, 8 Feb 2012 06:55:22 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202080655.q186tMog026984@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 06:55:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231186 - in projects/armv6/sys/arm/ti: . omap4 X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 06:55:22 -0000 Author: gonzo Date: Wed Feb 8 06:55:22 2012 New Revision: 231186 URL: http://svn.freebsd.org/changeset/base/231186 Log: Remove unused files Deleted: projects/armv6/sys/arm/ti/omap4/omap4_if.m projects/armv6/sys/arm/ti/omap4/omap4_intr.c projects/armv6/sys/arm/ti/omap_if.m Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 06:28:34 2012 (r231185) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 06:55:22 2012 (r231186) @@ -10,22 +10,18 @@ arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv7.S standard arm/arm/irq_dispatch.S standard - arm/ti/ti_machdep.c standard # arm/ti/omap.c standard arm/ti/ti_cpuid.c standard arm/ti/omap_prcm.c standard arm/ti/omap_scm.c standard -# arm/ti/omap_if.m standard arm/ti/mp_timer.c standard arm/ti/gic.c standard arm/ti/common.c standard arm/ti/bus_space.c standard -# arm/ti/omap4/omap4_if.m standard # arm/ti/omap4/omap44xx.c standard -# arm/ti/omap4/omap4_intr.c standard arm/ti/omap4/omap4_prcm_clks.c standard arm/ti/omap4/omap4_scm_padconf.c standard From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 22:33:51 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C063A106566B; Wed, 8 Feb 2012 22:33:51 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id ADC2C8FC14; Wed, 8 Feb 2012 22:33:51 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q18MXpjZ068035; Wed, 8 Feb 2012 22:33:51 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q18MXp0c068031; Wed, 8 Feb 2012 22:33:51 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202082233.q18MXp0c068031@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 8 Feb 2012 22:33:51 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231232 - in projects/armv6/sys: arm/ti arm/ti/omap4 boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 22:33:51 -0000 Author: gonzo Date: Wed Feb 8 22:33:51 2012 New Revision: 231232 URL: http://svn.freebsd.org/changeset/base/231232 Log: Add slightly modified (FDT support added) OMAP GPIO driver by Ben Gray Submitted by: Ben Gray Added: projects/armv6/sys/arm/ti/omap_gpio.c Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 22:29:41 2012 (r231231) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Wed Feb 8 22:33:51 2012 (r231232) @@ -10,16 +10,16 @@ arm/arm/cpufunc_asm_arm11.S standard arm/arm/cpufunc_asm_armv7.S standard arm/arm/irq_dispatch.S standard -arm/ti/ti_machdep.c standard -# arm/ti/omap.c standard -arm/ti/ti_cpuid.c standard +arm/ti/bus_space.c standard +arm/ti/common.c standard +arm/ti/gic.c standard +arm/ti/mp_timer.c standard arm/ti/omap_prcm.c standard arm/ti/omap_scm.c standard -arm/ti/mp_timer.c standard -arm/ti/gic.c standard +arm/ti/ti_cpuid.c standard +arm/ti/ti_machdep.c standard -arm/ti/common.c standard -arm/ti/bus_space.c standard +arm/ti/omap_gpio.c optional gpio # arm/ti/omap4/omap44xx.c standard arm/ti/omap4/omap4_prcm_clks.c standard Added: projects/armv6/sys/arm/ti/omap_gpio.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/omap_gpio.c Wed Feb 8 22:33:51 2012 (r231232) @@ -0,0 +1,896 @@ +/*- + * Copyright (c) 2011 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/** + * Very simple GPIO (general purpose IO) driver module for TI OMAP SoC's. + * + * Currently this driver only does the basics, get a value on a pin & set a + * value on a pin. Hopefully over time I'll expand this to be a bit more generic + * and support interrupts and other various bits on the SoC can do ... in the + * meantime this is all you get. + * + * Beware the OMA datasheet(s) lists GPIO banks 1-6, whereas I've used 0-5 here + * in the code. + * + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include "gpio_if.h" + +#define OMAP_GPIO_REVISION 0x0000 +#define OMAP_GPIO_SYSCONFIG 0x0010 + +/* Register offsets of the GPIO banks on OMAP3 devices */ +#define OMAP3_GPIO_SYSSTATUS 0x0014 +#define OMAP3_GPIO_IRQSTATUS1 0x0018 +#define OMAP3_GPIO_IRQENABLE1 0x001C +#define OMAP3_GPIO_WAKEUPENABLE 0x0020 +#define OMAP3_GPIO_IRQSTATUS2 0x0028 +#define OMAP3_GPIO_IRQENABLE2 0x002C +#define OMAP3_GPIO_CTRL 0x0030 +#define OMAP3_GPIO_OE 0x0034 +#define OMAP3_GPIO_DATAIN 0x0038 +#define OMAP3_GPIO_DATAOUT 0x003C +#define OMAP3_GPIO_LEVELDETECT0 0x0040 +#define OMAP3_GPIO_LEVELDETECT1 0x0044 +#define OMAP3_GPIO_RISINGDETECT 0x0048 +#define OMAP3_GPIO_FALLINGDETECT 0x004C +#define OMAP3_GPIO_DEBOUNCENABLE 0x0050 +#define OMAP3_GPIO_DEBOUNCINGTIME 0x0054 +#define OMAP3_GPIO_CLEARIRQENABLE1 0x0060 +#define OMAP3_GPIO_SETIRQENABLE1 0x0064 +#define OMAP3_GPIO_CLEARIRQENABLE2 0x0070 +#define OMAP3_GPIO_SETIRQENABLE2 0x0074 +#define OMAP3_GPIO_CLEARWKUENA 0x0080 +#define OMAP3_GPIO_SETWKUENA 0x0084 +#define OMAP3_GPIO_CLEARDATAOUT 0x0090 +#define OMAP3_GPIO_SETDATAOUT 0x0094 + +/* Register offsets of the GPIO banks on OMAP4 devices */ +#define OMAP4_GPIO_IRQSTATUS_RAW_0 0x0024 +#define OMAP4_GPIO_IRQSTATUS_RAW_1 0x0028 +#define OMAP4_GPIO_IRQSTATUS_0 0x002C +#define OMAP4_GPIO_IRQSTATUS_1 0x0030 +#define OMAP4_GPIO_IRQSTATUS_SET_0 0x0034 +#define OMAP4_GPIO_IRQSTATUS_SET_1 0x0038 +#define OMAP4_GPIO_IRQSTATUS_CLR_0 0x003C +#define OMAP4_GPIO_IRQSTATUS_CLR_1 0x0040 +#define OMAP4_GPIO_IRQWAKEN_0 0x0044 +#define OMAP4_GPIO_IRQWAKEN_1 0x0048 +#define OMAP4_GPIO_SYSSTATUS 0x0114 +#define OMAP4_GPIO_IRQSTATUS1 0x0118 +#define OMAP4_GPIO_IRQENABLE1 0x011C +#define OMAP4_GPIO_WAKEUPENABLE 0x0120 +#define OMAP4_GPIO_IRQSTATUS2 0x0128 +#define OMAP4_GPIO_IRQENABLE2 0x012C +#define OMAP4_GPIO_CTRL 0x0130 +#define OMAP4_GPIO_OE 0x0134 +#define OMAP4_GPIO_DATAIN 0x0138 +#define OMAP4_GPIO_DATAOUT 0x013C +#define OMAP4_GPIO_LEVELDETECT0 0x0140 +#define OMAP4_GPIO_LEVELDETECT1 0x0144 +#define OMAP4_GPIO_RISINGDETECT 0x0148 +#define OMAP4_GPIO_FALLINGDETECT 0x014C +#define OMAP4_GPIO_DEBOUNCENABLE 0x0150 +#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 +#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160 +#define OMAP4_GPIO_SETIRQENABLE1 0x0164 +#define OMAP4_GPIO_CLEARIRQENABLE2 0x0170 +#define OMAP4_GPIO_SETIRQENABLE2 0x0174 +#define OMAP4_GPIO_CLEARWKUPENA 0x0180 +#define OMAP4_GPIO_SETWKUENA 0x0184 +#define OMAP4_GPIO_CLEARDATAOUT 0x0190 +#define OMAP4_GPIO_SETDATAOUT 0x0194 + +#define MAX_GPIO_BANKS 6 +#define PINS_PER_BANK 32 + +/** + * The following H/W revision values were found be experimentation, TI don't + * publish the revision numbers. The TRM says "TI internal Data". + */ +#define OMAP3_GPIO_REV 0x00000025 +#define OMAP4_GPIO_REV 0x50600801 + +/** + * omap_gpio_mem_spec - Resource specification used when allocating resources + * omap_gpio_irq_spec - Resource specification used when allocating resources + * + * This driver module can have up to six independent memory regions, each + * region typically controls 32 GPIO pins. + */ +static struct resource_spec omap_gpio_mem_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_MEMORY, 1, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_MEMORY, 2, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_MEMORY, 3, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_MEMORY, 4, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_MEMORY, 5, RF_ACTIVE | RF_OPTIONAL }, + { -1, 0, 0 } +}; +static struct resource_spec omap_gpio_irq_spec[] = { + { SYS_RES_IRQ, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 1, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 2, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 3, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 4, RF_ACTIVE | RF_OPTIONAL }, + { SYS_RES_IRQ, 5, RF_ACTIVE | RF_OPTIONAL }, + { -1, 0, 0 } +}; + +/** + * Structure that stores the driver context. + * + * This structure is allocated during driver attach. + */ +struct omap_gpio_softc { + device_t sc_dev; + + /* The memory resource(s) for the PRCM register set, when the device is + * created the caller can assign up to 4 memory regions. + */ + struct resource* sc_mem_res[MAX_GPIO_BANKS]; + struct resource* sc_irq_res[MAX_GPIO_BANKS]; + + /* The handle for the register IRQ handlers */ + void* sc_irq_hdl[MAX_GPIO_BANKS]; + + /* The following describes the H/W revision of each of the GPIO banks */ + uint32_t sc_revision[MAX_GPIO_BANKS]; + + struct mtx sc_mtx; +}; + +/** + * Macros for driver mutex locking + */ +#define OMAP_GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define OMAP_GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define OMAP_GPIO_LOCK_INIT(_sc) \ + mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ + "omap_gpio", MTX_DEF) +#define OMAP_GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); +#define OMAP_GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); +#define OMAP_GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); + +/** + * omap_gpio_read_4 - reads a 16-bit value from one of the PADCONFS registers + * @sc: GPIO device context + * @bank: The bank to read from + * @off: The offset of a register from the GPIO register address range + * + * + * RETURNS: + * 32-bit value read from the register. + */ +static inline uint32_t +omap_gpio_read_4(struct omap_gpio_softc *sc, unsigned int bank, bus_size_t off) +{ + return (bus_read_4(sc->sc_mem_res[bank], off)); +} + +/** + * omap_gpio_write_4 - writes a 32-bit value to one of the PADCONFS registers + * @sc: GPIO device context + * @bank: The bank to write to + * @off: The offset of a register from the GPIO register address range + * @val: The value to write into the register + * + * RETURNS: + * nothing + */ +static inline void +omap_gpio_write_4(struct omap_gpio_softc *sc, unsigned int bank, bus_size_t off, + uint32_t val) +{ + bus_write_4(sc->sc_mem_res[bank], off, val); +} + +/** + * omap_gpio_is_omap4 - returns 1 if the GPIO module is from an OMAP4xxx chip + * omap_gpio_is_omap3 - returns 1 if the GPIO module is from an OMAP3xxx chip + * @sc: GPIO device context + * @bank: The bank to test the type of + * + * RETURNS: + * nothing + */ +static inline int +omap_gpio_is_omap4(struct omap_gpio_softc *sc, unsigned int bank) +{ + return (sc->sc_revision[bank] == OMAP4_GPIO_REV); +} + +static inline int +omap_gpio_is_omap3(struct omap_gpio_softc *sc, unsigned int bank) +{ + return (sc->sc_revision[bank] == OMAP3_GPIO_REV); +} + +/** + * omap_gpio_pin_max - Returns the maximum number of GPIO pins + * @dev: gpio device handle + * @maxpin: pointer to a value that upon return will contain the maximum number + * of pins in the device. + * + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise an error code + */ +static int +omap_gpio_pin_max(device_t dev, int *maxpin) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + unsigned int i; + unsigned int banks = 0; + + OMAP_GPIO_LOCK(sc); + + /* Calculate how many valid banks we have and then multiply that by 32 to + * give use the total number of pins. + */ + for (i = 0; i < MAX_GPIO_BANKS; i++) { + if (sc->sc_mem_res[i] != NULL) + banks++; + } + + *maxpin = (banks * PINS_PER_BANK); + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_getcaps - Gets the capabilties of a given pin + * @dev: gpio device handle + * @pin: the number of the pin + * @caps: pointer to a value that upon return will contain the capabilities + * + * Currently all pins have the same capability, notably: + * - GPIO_PIN_INPUT + * - GPIO_PIN_OUTPUT + * - GPIO_PIN_PULLUP + * - GPIO_PIN_PULLDOWN + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise an error code + */ +static int +omap_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + *caps = (GPIO_PIN_INPUT | + GPIO_PIN_OUTPUT | + GPIO_PIN_PULLUP | + GPIO_PIN_PULLDOWN); + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_getflags - Gets the current flags of a given pin + * @dev: gpio device handle + * @pin: the number of the pin + * @flags: upon return will contain the current flags of the pin + * + * Reads the current flags of a given pin, here we actually read the H/W + * registers to determine the flags, rather than storing the value in the + * setflags call. + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise an error code + */ +static int +omap_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + unsigned int state; + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Get the current pin state */ + if (omap_scm_padconf_get_gpiomode(pin, &state) != 0) + *flags = 0; + else { + switch (state) { + case PADCONF_PIN_OUTPUT: + *flags = GPIO_PIN_OUTPUT; + break; + case PADCONF_PIN_INPUT: + *flags = GPIO_PIN_INPUT; + break; + case PADCONF_PIN_INPUT_PULLUP: + *flags = GPIO_PIN_INPUT | GPIO_PIN_PULLUP; + break; + case PADCONF_PIN_INPUT_PULLDOWN: + *flags = GPIO_PIN_INPUT | GPIO_PIN_PULLDOWN; + break; + default: + *flags = 0; + break; + } + } + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_getname - Gets the name of a given pin + * @dev: gpio device handle + * @pin: the number of the pin + * @name: buffer to put the name in + * + * The driver simply calls the pins gpio_n, where 'n' is obviously the number + * of the pin. + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise an error code + */ +static int +omap_gpio_pin_getname(device_t dev, uint32_t pin, char *name) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Set a very simple name */ + snprintf(name, GPIOMAXNAME, "gpio_%u", pin); + name[GPIOMAXNAME - 1] = '\0'; + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_setflags - Sets the flags for a given pin + * @dev: gpio device handle + * @pin: the number of the pin + * @flags: the flags to set + * + * The flags of the pin correspond to things like input/output mode, pull-ups, + * pull-downs, etc. This driver doesn't support all flags, only the following: + * - GPIO_PIN_INPUT + * - GPIO_PIN_OUTPUT + * - GPIO_PIN_PULLUP + * - GPIO_PIN_PULLDOWN + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise an error code + */ +static int +omap_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + unsigned int state = 0; + uint32_t bank = (pin / PINS_PER_BANK); + uint32_t mask = (1UL << (pin % PINS_PER_BANK)); + uint32_t reg_off; + uint32_t reg_val; + + /* Sanity check the flags supplied are valid, i.e. not input and output */ + if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == 0x0000) + return (EINVAL); + if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == + (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) + return (EINVAL); + if ((flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) == + (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) + return (EINVAL); + + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* First the SCM driver needs to be told to put the pad into GPIO mode */ + if (flags & GPIO_PIN_OUTPUT) + state = PADCONF_PIN_OUTPUT; + else if (flags & GPIO_PIN_INPUT) { + if (flags & GPIO_PIN_PULLUP) + state = PADCONF_PIN_INPUT_PULLUP; + else if (flags & GPIO_PIN_PULLDOWN) + state = PADCONF_PIN_INPUT_PULLDOWN; + else + state = PADCONF_PIN_INPUT; + } + + /* Set the GPIO mode and state */ + if (omap_scm_padconf_set_gpiomode(pin, state) != 0) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + + /* Get the offset of the register to use */ + if (omap_gpio_is_omap3(sc, bank)) + reg_off = OMAP3_GPIO_OE; + else if (omap_gpio_is_omap4(sc, bank)) + reg_off = OMAP4_GPIO_OE; + else { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + + /* If configuring as an output set the "output enable" bit */ + reg_val = omap_gpio_read_4(sc, bank, reg_off); + if (flags & GPIO_PIN_INPUT) + reg_val |= mask; + else + reg_val &= ~mask; + omap_gpio_write_4(sc, bank, reg_off, reg_val); + + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_set - Sets the current level on a GPIO pin + * @dev: gpio device handle + * @pin: the number of the pin + * @value: non-zero value will drive the pin high, otherwise the pin is + * driven low. + * + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise a error code + */ +static int +omap_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + uint32_t mask = (1UL << (pin % PINS_PER_BANK)); + uint32_t reg_off; + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Set the pin value */ + if (omap_gpio_is_omap3(sc, bank)) + reg_off = (value == GPIO_PIN_LOW) ? OMAP3_GPIO_CLEARDATAOUT : + OMAP3_GPIO_SETDATAOUT; + else if (omap_gpio_is_omap4(sc, bank)) + reg_off = (value == GPIO_PIN_LOW) ? OMAP4_GPIO_CLEARDATAOUT : + OMAP4_GPIO_SETDATAOUT; + else { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + omap_gpio_write_4(sc, bank, reg_off, mask); + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_get - Gets the current level on a GPIO pin + * @dev: gpio device handle + * @pin: the number of the pin + * @value: pointer to a value that upond return will contain the pin value + * + * The pin must be configured as an input pin beforehand, otherwise this + * function will fail. + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise a error code + */ +static int +omap_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + uint32_t mask = (1UL << (pin % PINS_PER_BANK)); + uint32_t val = 0; + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Sanity check the pin is not configured as an output */ + if (omap_gpio_is_omap3(sc, bank)) + val = omap_gpio_read_4(sc, bank, OMAP3_GPIO_OE); + else if (omap_gpio_is_omap4(sc, bank)) + val = omap_gpio_read_4(sc, bank, OMAP4_GPIO_OE); + + if ((val & mask) == mask) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Read the value on the pin */ + if (omap_gpio_is_omap3(sc, bank)) + val = omap_gpio_read_4(sc, bank, OMAP3_GPIO_DATAIN); + else if (omap_gpio_is_omap4(sc, bank)) + val = omap_gpio_read_4(sc, bank, OMAP4_GPIO_DATAIN); + + *value = (val & mask) ? 1 : 0; + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_pin_toggle - Toggles a given GPIO pin + * @dev: gpio device handle + * @pin: the number of the pin + * + * + * LOCKING: + * Internally locks the context + * + * RETURNS: + * Returns 0 on success otherwise a error code + */ +static int +omap_gpio_pin_toggle(device_t dev, uint32_t pin) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + uint32_t bank = (pin / PINS_PER_BANK); + uint32_t mask = (1UL << (pin % PINS_PER_BANK)); + uint32_t val; + + OMAP_GPIO_LOCK(sc); + + /* Sanity check the pin number is valid */ + if ((bank > MAX_GPIO_BANKS) || (sc->sc_mem_res[bank] == NULL)) { + OMAP_GPIO_UNLOCK(sc); + return (EINVAL); + } + + /* Toggle the pin */ + if (omap_gpio_is_omap3(sc, bank)) { + val = omap_gpio_read_4(sc, bank, OMAP3_GPIO_DATAOUT); + if (val & mask) + omap_gpio_write_4(sc, bank, OMAP3_GPIO_CLEARDATAOUT, mask); + else + omap_gpio_write_4(sc, bank, OMAP3_GPIO_SETDATAOUT, mask); + } + else if (omap_gpio_is_omap4(sc, bank)) { + val = omap_gpio_read_4(sc, bank, OMAP4_GPIO_DATAOUT); + if (val & mask) + omap_gpio_write_4(sc, bank, OMAP4_GPIO_CLEARDATAOUT, mask); + else + omap_gpio_write_4(sc, bank, OMAP4_GPIO_SETDATAOUT, mask); + } + + OMAP_GPIO_UNLOCK(sc); + + return (0); +} + +/** + * omap_gpio_intr - ISR for all GPIO modules + * @arg: the soft context pointer + * + * Unsused + * + * LOCKING: + * Internally locks the context + * + */ +static void +omap_gpio_intr(void *arg) +{ + struct omap_gpio_softc *sc = arg; + + OMAP_GPIO_LOCK(sc); + /* TODO: something useful */ + OMAP_GPIO_UNLOCK(sc); +} + +/** + * omap_gpio_probe - probe function for the driver + * @dev: gpio device handle + * + * Simply sets the name of the driver + * + * LOCKING: + * None + * + * RETURNS: + * Always returns 0 + */ +static int +omap_gpio_probe(device_t dev) +{ + if (!ofw_bus_is_compatible(dev, "ti,omap_gpio")) + return (ENXIO); + + device_set_desc(dev, "TI OMAP General Purpose I/O (GPIO)"); + return (0); +} + +/** + * omap_gpio_attach - attach function for the driver + * @dev: gpio device handle + * + * Allocates and sets up the driver context for all GPIO banks. This function + * expects the memory ranges and IRQs to already be allocated to the driver. + * + * LOCKING: + * None + * + * RETURNS: + * Always returns 0 + */ +static int +omap_gpio_attach(device_t dev) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + unsigned int i; + int err = 0; + + sc->sc_dev = dev; + + OMAP_GPIO_LOCK_INIT(sc); + + + /* There are up to 6 different GPIO register sets located in different + * memory areas on the chip. The memory range should have been set for + * the driver when it was added as a child (for example in omap44xx.c). + */ + err = bus_alloc_resources(dev, omap_gpio_mem_spec, sc->sc_mem_res); + if (err) { + device_printf(dev, "Error: could not allocate mem resources\n"); + return (ENXIO); + } + + /* Request the IRQ resources */ + err = bus_alloc_resources(dev, omap_gpio_irq_spec, sc->sc_irq_res); + if (err) { + device_printf(dev, "Error: could not allocate irq resources\n"); + return (ENXIO); + } + + /* Setup the IRQ resources */ + for (i = 0; i < MAX_GPIO_BANKS; i++) { + if (sc->sc_irq_res[i] == NULL) + break; + + /* Register an interrupt handler for each of the IRQ resources */ + if ((bus_setup_intr(dev, sc->sc_irq_res[i], INTR_TYPE_MISC | INTR_MPSAFE, + NULL, omap_gpio_intr, sc, &(sc->sc_irq_hdl[i])))) { + device_printf(dev, "WARNING: unable to register interrupt handler\n"); + return (ENXIO); + } + } + + /* Store the device handle back in the sc */ + sc->sc_dev = dev; + + /* We need to go through each block and ensure the clocks are running and + * the module is enabled. It might be better to do this only when the + * pins are configured which would result in less power used if the GPIO + * pins weren't used ... + */ + for (i = 0; i < MAX_GPIO_BANKS; i++) { + if (sc->sc_mem_res[i] != NULL) { + + /* Enable the interface and functional clocks for the module */ + omap_prcm_clk_enable(GPIO1_CLK + i); + + /* Read the revision number of the module. TI don't publish the + * actual revision numbers, so instead the values have been + * determined by experimentation on OMAP4430 and OMAP3530 chips. + */ + sc->sc_revision[i] = omap_gpio_read_4(sc, i, OMAP_GPIO_REVISION); + + /* Check the revision */ + if (!omap_gpio_is_omap4(sc, i) && !omap_gpio_is_omap3(sc, i)) { + device_printf(dev, "Warning: could not determine the revision" + "of %u GPIO module (revision:0x%08x)\n", + i, sc->sc_revision[i]); + continue; + } + + /* Disable interrupts for all pins */ + if (omap_gpio_is_omap3(sc, i)) { + omap_gpio_write_4(sc, i, OMAP3_GPIO_CLEARIRQENABLE1, 0xffffffff); + omap_gpio_write_4(sc, i, OMAP3_GPIO_CLEARIRQENABLE2, 0xffffffff); + } + else if (omap_gpio_is_omap4(sc, i)) { + omap_gpio_write_4(sc, i, OMAP4_GPIO_CLEARIRQENABLE1, 0xffffffff); + omap_gpio_write_4(sc, i, OMAP4_GPIO_CLEARIRQENABLE2, 0xffffffff); + } + } + } + + /* Finish of the probe call */ + device_add_child(dev, "gpioc", device_get_unit(dev)); + device_add_child(dev, "gpiobus", device_get_unit(dev)); + return (bus_generic_attach(dev)); +} + +/** + * omap_gpio_detach - detach function for the driver + * @dev: scm device handle + * + * Allocates and sets up the driver context, this simply entails creating a + * bus mappings for the SCM register set. + * + * LOCKING: + * None + * + * RETURNS: + * Always returns 0 + */ +static int +omap_gpio_detach(device_t dev) +{ + struct omap_gpio_softc *sc = device_get_softc(dev); + unsigned int i; + + KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized")); + + /* Disable all interrupts */ + for (i = 0; i < MAX_GPIO_BANKS; i++) { + if (sc->sc_mem_res[i] != NULL) { + if (omap_gpio_is_omap3(sc, i)) { + omap_gpio_write_4(sc, i, OMAP3_GPIO_CLEARIRQENABLE1, 0xffffffff); + omap_gpio_write_4(sc, i, OMAP3_GPIO_CLEARIRQENABLE2, 0xffffffff); + } else if (omap_gpio_is_omap4(sc, i)) { + omap_gpio_write_4(sc, i, OMAP4_GPIO_CLEARIRQENABLE1, 0xffffffff); + omap_gpio_write_4(sc, i, OMAP4_GPIO_CLEARIRQENABLE2, 0xffffffff); + } + } + } + + bus_generic_detach(dev); + + /* Release the memory and IRQ resources */ + for (i = 0; i < MAX_GPIO_BANKS; i++) { + if (sc->sc_mem_res[i] != NULL) + bus_release_resource(dev, SYS_RES_MEMORY, i, sc->sc_mem_res[i]); + if (sc->sc_irq_res[i] != NULL) + bus_release_resource(dev, SYS_RES_IRQ, i, sc->sc_irq_res[i]); + } + + OMAP_GPIO_LOCK_DESTROY(sc); + + return(0); +} + +static device_method_t omap_gpio_methods[] = { + DEVMETHOD(device_probe, omap_gpio_probe), + DEVMETHOD(device_attach, omap_gpio_attach), + DEVMETHOD(device_detach, omap_gpio_detach), + + /* GPIO protocol */ + DEVMETHOD(gpio_pin_max, omap_gpio_pin_max), + DEVMETHOD(gpio_pin_getname, omap_gpio_pin_getname), + DEVMETHOD(gpio_pin_getflags, omap_gpio_pin_getflags), + DEVMETHOD(gpio_pin_getcaps, omap_gpio_pin_getcaps), + DEVMETHOD(gpio_pin_setflags, omap_gpio_pin_setflags), + DEVMETHOD(gpio_pin_get, omap_gpio_pin_get), + DEVMETHOD(gpio_pin_set, omap_gpio_pin_set), + DEVMETHOD(gpio_pin_toggle, omap_gpio_pin_toggle), + {0, 0}, +}; + +static driver_t omap_gpio_driver = { + "gpio", + omap_gpio_methods, + sizeof(struct omap_gpio_softc), +}; +static devclass_t omap_gpio_devclass; + +DRIVER_MODULE(omap_gpio, simplebus, omap_gpio_driver, omap_gpio_devclass, 0, 0); Modified: projects/armv6/sys/boot/fdt/dts/pandaboard.dts ============================================================================== --- projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 22:29:41 2012 (r231231) +++ projects/armv6/sys/boot/fdt/dts/pandaboard.dts Wed Feb 8 22:33:51 2012 (r231232) @@ -109,6 +109,19 @@ 0x4a008000 0x8000>; }; + GPIO: gpio { + #gpio-cells = <3>; + compatible = "ti,omap_gpio"; + gpio-controller; + reg =< 0x4a310000 0x1000 + 0x48055000 0x1000 + 0x48057000 0x1000 + 0x48059000 0x1000 + 0x4805b000 0x1000 + 0x4805d000 0x1000>; + interrupts = <61 62 63 64 65 66>; + interrupt-parent = <&GIC>; + }; }; chosen { From owner-svn-src-projects@FreeBSD.ORG Wed Feb 8 23:51:46 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 6A7B4106564A; Wed, 8 Feb 2012 23:51:46 +0000 (UTC) (envelope-from jamie@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 58D068FC15; Wed, 8 Feb 2012 23:51:46 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q18NpkmX070704; Wed, 8 Feb 2012 23:51:46 GMT (envelope-from jamie@svn.freebsd.org) Received: (from jamie@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q18NpkHd070699; Wed, 8 Feb 2012 23:51:46 GMT (envelope-from jamie@svn.freebsd.org) Message-Id: <201202082351.q18NpkHd070699@svn.freebsd.org> From: Jamie Gritton Date: Wed, 8 Feb 2012 23:51:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231238 - projects/jailconf/usr.sbin/jail X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Feb 2012 23:51:46 -0000 Author: jamie Date: Wed Feb 8 23:51:46 2012 New Revision: 231238 URL: http://svn.freebsd.org/changeset/base/231238 Log: Improvements in error messages: Some errors printed the jail name for unnamed (command line) jails. Attempting to create an already-existing jail from the command line returned with no error (even for non-root) due to bad logic in start_state. Ignore kvm_proc errors, which are typically caused by permission problems. Instead, stop ignoring permission errors when removing a jail (but continue to silently ignore other errors, i.e. the jail no longer existing). This makes non-root attempts at removing a jail give a clearer error message. Modified: projects/jailconf/usr.sbin/jail/command.c projects/jailconf/usr.sbin/jail/jail.c projects/jailconf/usr.sbin/jail/jailp.h projects/jailconf/usr.sbin/jail/state.c Modified: projects/jailconf/usr.sbin/jail/command.c ============================================================================== --- projects/jailconf/usr.sbin/jail/command.c Wed Feb 8 23:47:22 2012 (r231237) +++ projects/jailconf/usr.sbin/jail/command.c Wed Feb 8 23:51:46 2012 (r231238) @@ -274,7 +274,11 @@ run_command(struct cfjail *j) case IP__OP: if (down) { - (void)jail_remove(j->jid); + if (jail_remove(j->jid) < 0 && errno == EPERM) { + jail_warnx(j, "jail_remove: %s", + strerror(errno)); + return -1; + } if (verbose > 0 || (verbose == 0 && (j->flags & JF_STOP ? note_remove : j->name != NULL))) jail_note(j, "removed\n"); @@ -711,14 +715,14 @@ term_procs(struct cfjail *j) return 0; if (kd == NULL) { - kd = kvm_open(NULL, NULL, NULL, O_RDONLY, "jail"); + kd = kvm_open(NULL, NULL, NULL, O_RDONLY, NULL); if (kd == NULL) - exit(1); + return 0; } ki = kvm_getprocs(kd, KERN_PROC_PROC, 0, &pcnt); if (ki == NULL) - exit(1); + return 0; noted = 0; for (i = 0; i < pcnt; i++) if (ki[i].ki_jid == j->jid && Modified: projects/jailconf/usr.sbin/jail/jail.c ============================================================================== --- projects/jailconf/usr.sbin/jail/jail.c Wed Feb 8 23:47:22 2012 (r231237) +++ projects/jailconf/usr.sbin/jail/jail.c Wed Feb 8 23:51:46 2012 (r231238) @@ -62,6 +62,8 @@ static void clear_persist(struct cfjail static int update_jail(struct cfjail *j); static int rdtun_params(struct cfjail *j, int dofail); static void running_jid(struct cfjail *j, int dflag); +static void jail_quoted_warnx(const struct cfjail *j, const char *name_msg, + const char *noname_msg); static int jailparam_set_note(const struct cfjail *j, struct jailparam *jp, unsigned njp, int flags); static void print_jail(FILE *fp, struct cfjail *j, int oldcl); @@ -317,10 +319,10 @@ main(int argc, char **argv) error = 0; if (op == JF_STOP) { for (i = 0; i < argc; i++) - if (start_state(argv[i], op, Rflag) < 0) + if (start_state(argv[i], docf, op, Rflag) < 0) error = 1; } else { - if (start_state(docf ? argv[0] : NULL, op, 0) < 0) + if (start_state(argv[0], docf, op, 0) < 0) exit(1); } @@ -376,7 +378,8 @@ main(int argc, char **argv) break; case JF_SET_RESTART: if (j->jid < 0) { - warnx("\"%s\" not found", j->name); + jail_quoted_warnx(j, "not found", + "no jail specified"); failed(j); continue; } @@ -396,7 +399,8 @@ main(int argc, char **argv) if (j->comparam == NULL) { if (j->jid > 0 && !(j->flags & (JF_DEPEND | JF_WILD))) { - warnx("\"%s\" already exists", j->name); + jail_quoted_warnx(j, "already exists", + NULL); failed(j); continue; } @@ -420,7 +424,8 @@ main(int argc, char **argv) case JF_SET: if (j->jid < 0 && !(j->flags & JF_DEPEND)) { - warnx("\"%s\" not found", j->name); + jail_quoted_warnx(j, "not found", + "no jail specified"); failed(j); continue; } @@ -444,8 +449,8 @@ main(int argc, char **argv) if (j->jid < 0) { if (!(j->flags & (JF_DEPEND | JF_WILD)) && verbose >= 0) - warnx("\"%s\" not found", - j->name); + jail_quoted_warnx(j, + "not found", NULL); goto jail_remove_done; } j->comparam = stopcommands; @@ -834,6 +839,19 @@ running_jid(struct cfjail *j, int dflag) j->jid = jail_get(jiov, 2, dflag ? JAIL_DYING : 0); } +static void +jail_quoted_warnx(const struct cfjail *j, const char *name_msg, + const char *noname_msg) +{ + const char *pval; + + if ((pval = j->name) || (pval = string_param(j->intparams[KP_JID])) || + (pval = string_param(j->intparams[KP_NAME]))) + warnx("\"%s\" %s", pval, name_msg); + else + warnx("%s", noname_msg); +} + /* * Set jail parameters and possible print them out. */ Modified: projects/jailconf/usr.sbin/jail/jailp.h ============================================================================== --- projects/jailconf/usr.sbin/jail/jailp.h Wed Feb 8 23:47:22 2012 (r231237) +++ projects/jailconf/usr.sbin/jail/jailp.h Wed Feb 8 23:51:46 2012 (r231238) @@ -215,7 +215,8 @@ extern int dep_check(struct cfjail *j); extern void dep_done(struct cfjail *j, unsigned flags); extern void dep_reset(struct cfjail *j); extern struct cfjail *next_jail(void); -extern int start_state(const char *target, unsigned state, int running); +extern int start_state(const char *target, int docf, unsigned state, + int running); extern void requeue(struct cfjail *j, struct cfjails *queue); extern void yyerror(const char *); Modified: projects/jailconf/usr.sbin/jail/state.c ============================================================================== --- projects/jailconf/usr.sbin/jail/state.c Wed Feb 8 23:47:22 2012 (r231237) +++ projects/jailconf/usr.sbin/jail/state.c Wed Feb 8 23:51:46 2012 (r231238) @@ -128,7 +128,7 @@ dep_setup(int docf) /* Look for dependency loops. */ if (deps && (deps > 1 || ldeps)) { - (void)start_state(NULL, 0, 0); + (void)start_state(NULL, 0, 0, 0); while ((j = TAILQ_FIRST(&ready))) { requeue(j, &cfjails); dep_done(j, DF_NOFAIL); @@ -300,20 +300,23 @@ next_jail(void) * Set jails to the proper start state. */ int -start_state(const char *target, unsigned state, int running) +start_state(const char *target, int docf, unsigned state, int running) { struct iovec jiov[6]; struct cfjail *j, *tj; int jid; char namebuf[MAXHOSTNAMELEN]; - if (!target || (!running && !strcmp(target, "*"))) { + if (!target || (!docf && state != JF_STOP) || + (!running && !strcmp(target, "*"))) { /* - * If there's no target specified, set the state on all jails, - * and start with those that have no dependencies. + * For a global wildcard (including no target specified), + * set the state on all jails and start with those that + * have no dependencies. */ TAILQ_FOREACH_SAFE(j, &cfjails, tq, tj) { - j->flags = (j->flags & JF_FAILED) | state | JF_WILD; + j->flags = (j->flags & JF_FAILED) | state | + (docf ? JF_WILD : 0); dep_reset(j); requeue(j, j->ndeps ? &depend : &ready); } From owner-svn-src-projects@FreeBSD.ORG Thu Feb 9 04:57:32 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 85619106566B; Thu, 9 Feb 2012 04:57:32 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 728A48FC13; Thu, 9 Feb 2012 04:57:32 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q194vW44082279; Thu, 9 Feb 2012 04:57:32 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q194vW6Y082275; Thu, 9 Feb 2012 04:57:32 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202090457.q194vW6Y082275@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Thu, 9 Feb 2012 04:57:32 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231245 - in projects/armv6/sys: arm/ti/omap4 arm/ti/usb boot/fdt/dts X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Feb 2012 04:57:32 -0000 Author: gonzo Date: Thu Feb 9 04:57:32 2012 New Revision: 231245 URL: http://svn.freebsd.org/changeset/base/231245 Log: Add OMAP EHCI driver by Ben Gray with FDT compatibility layer coded by me Submitted by: Ben Gray Added: projects/armv6/sys/arm/ti/usb/ projects/armv6/sys/arm/ti/usb/omap_ehci.c projects/armv6/sys/arm/ti/usb/omap_usb.h Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/boot/fdt/dts/pandaboard.dts Modified: projects/armv6/sys/arm/ti/omap4/files.omap44xx ============================================================================== --- projects/armv6/sys/arm/ti/omap4/files.omap44xx Thu Feb 9 04:37:30 2012 (r231244) +++ projects/armv6/sys/arm/ti/omap4/files.omap44xx Thu Feb 9 04:57:32 2012 (r231245) @@ -20,6 +20,7 @@ arm/ti/ti_cpuid.c standard arm/ti/ti_machdep.c standard arm/ti/omap_gpio.c optional gpio +arm/ti/usb/omap_ehci.c optional usb ehci # arm/ti/omap4/omap44xx.c standard arm/ti/omap4/omap4_prcm_clks.c standard Added: projects/armv6/sys/arm/ti/usb/omap_ehci.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/usb/omap_ehci.c Thu Feb 9 04:57:32 2012 (r231245) @@ -0,0 +1,1024 @@ +/*- + * Copyright (c) 2011 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/** + * Driver for the High Speed USB EHCI module on the TI OMAP3530 SoC. + * + * WARNING: I've only tried this driver on a limited number of USB peripherals, + * it is still very raw and bound to have numerous bugs in it. + * + * This driver is based on the FreeBSD IXP4xx EHCI driver with a lot of the + * setup sequence coming from the Linux community and their EHCI driver for + * OMAP. Without these as a base I don't think I would have been able to get + * this driver working. + * + * The driver only contains the EHCI parts, the module also supports OHCI and + * USB on-the-go (OTG), currently neither are supported. + * + * CAUTION: This driver was written to run on the beaglebaord dev board, so I + * have made some assumptions about the type of PHY used and some of the other + * settings. Bare that in mind if you intend to use this driver on another + * platform. + * + * NOTE: This module uses a few different clocks, one being a 60Mhz clock for + * the TTL part of the module. This clock is derived from DPPL5 which must be + * configured prior to loading this driver - it is not configured by the + * bootloader. It took me a long time to figure this out, and caused much + * frustration. This PLL is now setup in the timer/clocks part of the BSP, + * check out the omap_prcm_setup_dpll5() function in omap_prcm.c for more info. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +#include "opt_bus.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "gpio_if.h" + +struct omap_ehci_softc { + ehci_softc_t base; /* storage for EHCI code */ + + device_t sc_dev; + device_t sc_gpio_dev; + + /* TLL register set */ + struct resource* tll_mem_res; + + /* UHH register set */ + struct resource* uhh_mem_res; + + /* The revision of the HS USB HOST read from UHH_REVISION */ + uint32_t ehci_rev; + + /* The following details are provided by conf hints */ + int port_mode[3]; + int phy_reset[3]; + int reset_gpio_pin[3]; +}; + +static device_attach_t omap_ehci_attach; +static device_detach_t omap_ehci_detach; +static device_shutdown_t omap_ehci_shutdown; +static device_suspend_t omap_ehci_suspend; +static device_resume_t omap_ehci_resume; + +/** + * omap_tll_readl - read a 32-bit value from the USBTLL registers + * omap_tll_writel - write a 32-bit value from the USBTLL registers + * omap_tll_readb - read an 8-bit value from the USBTLL registers + * omap_tll_writeb - write an 8-bit value from the USBTLL registers + * @sc: omap ehci device context + * @off: byte offset within the register set to read from + * @val: the value to write into the register + * + * + * LOCKING: + * None + * + * RETURNS: + * nothing in case of write function, if read function returns the value read. + */ +static inline uint32_t +omap_tll_readl(struct omap_ehci_softc *sc, bus_size_t off) +{ + return bus_read_4(sc->tll_mem_res, off); +} + +static inline void +omap_tll_writel(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) +{ + bus_write_4(sc->tll_mem_res, off, val); +} + +static inline uint8_t +omap_tll_readb(struct omap_ehci_softc *sc, bus_size_t off) +{ + return bus_read_1(sc->tll_mem_res, off); +} + +static inline void +omap_tll_writeb(struct omap_ehci_softc *sc, bus_size_t off, uint8_t val) +{ + bus_write_1(sc->tll_mem_res, off, val); +} + +/** + * omap_ehci_readl - read a 32-bit value from the EHCI registers + * omap_ehci_writel - write a 32-bit value from the EHCI registers + * @sc: omap ehci device context + * @off: byte offset within the register set to read from + * @val: the value to write into the register + * + * + * LOCKING: + * None + * + * RETURNS: + * nothing in case of write function, if read function returns the value read. + */ +static inline uint32_t +omap_ehci_readl(struct omap_ehci_softc *sc, bus_size_t off) +{ + return (bus_read_4(sc->base.sc_io_res, off)); +} +static inline void +omap_ehci_writel(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) +{ + bus_write_4(sc->base.sc_io_res, off, val); +} + +/** + * omap_uhh_readl - read a 32-bit value from the UHH registers + * omap_uhh_writel - write a 32-bit value from the UHH registers + * @sc: omap ehci device context + * @off: byte offset within the register set to read from + * @val: the value to write into the register + * + * + * LOCKING: + * None + * + * RETURNS: + * nothing in case of write function, if read function returns the value read. + */ +static inline uint32_t +omap_uhh_readl(struct omap_ehci_softc *sc, bus_size_t off) +{ + return bus_read_4(sc->uhh_mem_res, off); +} +static inline void +omap_uhh_writel(struct omap_ehci_softc *sc, bus_size_t off, uint32_t val) +{ + bus_write_4(sc->uhh_mem_res, off, val); +} + +/** + * omap_ehci_utmi_init - initialises the UTMI part of the controller + * @isc: omap ehci device context + * + * + * + * LOCKING: + * none + * + * RETURNS: + * nothing + */ +static void +omap_ehci_utmi_init(struct omap_ehci_softc *isc, unsigned int en_mask) +{ + unsigned int i; + uint32_t reg; + + /* There are 3 TLL channels, one per USB controller so set them all up the + * same, SDR mode, bit stuffing and no autoidle. + */ + for (i=0; i<3; i++) { + reg = omap_tll_readl(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); + + reg &= ~(TLL_CHANNEL_CONF_UTMIAUTOIDLE + | TLL_CHANNEL_CONF_ULPINOBITSTUFF + | TLL_CHANNEL_CONF_ULPIDDRMODE); + + omap_tll_writel(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); + } + + /* Program the common TLL register */ + reg = omap_tll_readl(isc, OMAP_USBTLL_TLL_SHARED_CONF); + + reg &= ~( TLL_SHARED_CONF_USB_90D_DDR_EN + | TLL_SHARED_CONF_USB_DIVRATIO_MASK); + reg |= ( TLL_SHARED_CONF_FCLK_IS_ON + | TLL_SHARED_CONF_USB_DIVRATIO_2 + | TLL_SHARED_CONF_USB_180D_SDR_EN); + + omap_tll_writel(isc, OMAP_USBTLL_TLL_SHARED_CONF, reg); + + /* Enable channels now */ + for (i = 0; i < 3; i++) { + reg = omap_tll_readl(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i)); + + /* Enable only the reg that is needed */ + if ((en_mask & (1 << i)) == 0) + continue; + + reg |= TLL_CHANNEL_CONF_CHANEN; + omap_tll_writel(isc, OMAP_USBTLL_TLL_CHANNEL_CONF(i), reg); + } +} + +/** + * omap_ehci_soft_phy_reset - resets the phy using the reset command + * @isc: omap ehci device context + * @port: port to send the reset over + * + * + * LOCKING: + * none + * + * RETURNS: + * nothing + */ +static void +omap_ehci_soft_phy_reset(struct omap_ehci_softc *isc, unsigned int port) +{ + unsigned long timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); + uint32_t reg; + + reg = ULPI_FUNC_CTRL_RESET + /* FUNCTION_CTRL_SET register */ + | (ULPI_SET(ULPI_FUNC_CTRL) << OMAP_USBHOST_INSNREG05_ULPI_REGADD_SHIFT) + /* Write */ + | (2 << OMAP_USBHOST_INSNREG05_ULPI_OPSEL_SHIFT) + /* PORTn */ + | ((port + 1) << OMAP_USBHOST_INSNREG05_ULPI_PORTSEL_SHIFT) + /* start ULPI access*/ + | (1 << OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT); + + omap_ehci_writel(isc, OMAP_USBHOST_INSNREG05_ULPI, reg); + + /* Wait for ULPI access completion */ + while ((omap_ehci_readl(isc, OMAP_USBHOST_INSNREG05_ULPI) + & (1 << OMAP_USBHOST_INSNREG05_ULPI_CONTROL_SHIFT))) { + + /* Sleep for a tick */ + pause("USBPHY_RESET", 1); + + if (timeout-- == 0) { + device_printf(isc->sc_dev, "PHY reset operation timed out\n"); + break; + } + } +} + + +/** + * omap_ehci_init - initialises the USB host EHCI controller + * @isc: omap ehci device context + * + * This initialisation routine is quite heavily based on the work done by the + * OMAP Linux team (for which I thank them very much). The init sequence is + * almost identical, diverging only for the FreeBSD specifics. + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success, a negative error code on failure. + */ +static int +omap_ehci_init(struct omap_ehci_softc *isc) +{ + unsigned long timeout; + int ret = 0; + uint8_t tll_ch_mask = 0; + uint32_t reg = 0; + int reset_performed = 0; + int i; + + device_printf(isc->sc_dev, "Starting TI EHCI USB Controller\n"); + + + /* Enable Clocks for high speed USBHOST */ + omap_prcm_clk_enable(USBHSHOST_CLK); + + /* Hold the PHY in reset while configuring */ + for (int i = 0; i < 3; i++) { + if (isc->phy_reset[i]) { + /* Configure the GPIO to drive low (hold in reset) */ + if ((isc->reset_gpio_pin[i] != -1) && (isc->sc_gpio_dev != NULL)) { + GPIO_PIN_SETFLAGS(isc->sc_gpio_dev, isc->reset_gpio_pin[i], + GPIO_PIN_OUTPUT); + GPIO_PIN_SET(isc->sc_gpio_dev, isc->reset_gpio_pin[i], + GPIO_PIN_LOW); + reset_performed = 1; + } + } + } + + /* Hold the PHY in RESET for enough time till DIR is high */ + if (reset_performed) + DELAY(10); + + /* Read the UHH revision */ + isc->ehci_rev = omap_uhh_readl(isc, OMAP_USBHOST_UHH_REVISION); + device_printf(isc->sc_dev, "UHH revision 0x%08x\n", isc->ehci_rev); + + /* Initilise the low level interface module(s) */ + if (isc->ehci_rev == OMAP_EHCI_REV1) { + + /* Enable the USB TLL */ + omap_prcm_clk_enable(USBTLL_CLK); + + /* Perform TLL soft reset, and wait until reset is complete */ + omap_tll_writel(isc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_SOFTRESET); + + /* Set the timeout to 100ms*/ + timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); + + /* Wait for TLL reset to complete */ + while ((omap_tll_readl(isc, OMAP_USBTLL_SYSSTATUS) & + TLL_SYSSTATUS_RESETDONE) == 0x00) { + + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(isc->sc_dev, "TLL reset operation timed out\n"); + ret = -EINVAL; + goto err_sys_status; + } + } + + device_printf(isc->sc_dev, "TLL RESET DONE\n"); + + /* CLOCKACTIVITY = 1 : OCP-derived internal clocks ON during idle + * SIDLEMODE = 2 : Smart-idle mode. Sidleack asserted after Idlereq + * assertion when no more activity on the USB. + * ENAWAKEUP = 1 : Wakeup generation enabled + */ + omap_tll_writel(isc, OMAP_USBTLL_SYSCONFIG, TLL_SYSCONFIG_ENAWAKEUP | + TLL_SYSCONFIG_AUTOIDLE | + TLL_SYSCONFIG_SIDLE_SMART_IDLE | + TLL_SYSCONFIG_CACTIVITY); + + } else if (isc->ehci_rev == OMAP_EHCI_REV2) { + + /* For OMAP44xx devices you have to enable the per-port clocks: + * PHY_MODE - External ULPI clock + * TTL_MODE - Internal UTMI clock + * HSIC_MODE - Internal 480Mhz and 60Mhz clocks + */ + if (isc->ehci_rev == OMAP_EHCI_REV2) { + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) { + omap_prcm_clk_set_source(USBP1_PHY_CLK, EXT_CLK); + omap_prcm_clk_enable(USBP1_PHY_CLK); + } else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) + omap_prcm_clk_enable(USBP1_UTMI_CLK); + else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_HSIC) + omap_prcm_clk_enable(USBP1_HSIC_CLK); + + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) { + omap_prcm_clk_set_source(USBP2_PHY_CLK, EXT_CLK); + omap_prcm_clk_enable(USBP2_PHY_CLK); + } else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) + omap_prcm_clk_enable(USBP2_UTMI_CLK); + else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC) + omap_prcm_clk_enable(USBP2_HSIC_CLK); + } + } + + /* Put UHH in SmartIdle/SmartStandby mode */ + reg = omap_uhh_readl(isc, OMAP_USBHOST_UHH_SYSCONFIG); + if (isc->ehci_rev == OMAP_EHCI_REV1) { + reg &= ~(UHH_SYSCONFIG_SIDLEMODE_MASK | + UHH_SYSCONFIG_MIDLEMODE_MASK); + reg |= (UHH_SYSCONFIG_ENAWAKEUP | + UHH_SYSCONFIG_AUTOIDLE | + UHH_SYSCONFIG_CLOCKACTIVITY | + UHH_SYSCONFIG_SIDLEMODE_SMARTIDLE | + UHH_SYSCONFIG_MIDLEMODE_SMARTSTANDBY); + } else if (isc->ehci_rev == OMAP_EHCI_REV2) { + reg &= ~UHH_SYSCONFIG_IDLEMODE_MASK; + reg |= UHH_SYSCONFIG_IDLEMODE_NOIDLE; + reg &= ~UHH_SYSCONFIG_STANDBYMODE_MASK; + reg |= UHH_SYSCONFIG_STANDBYMODE_NOSTDBY; + } + omap_uhh_writel(isc, OMAP_USBHOST_UHH_SYSCONFIG, reg); + device_printf(isc->sc_dev, "OMAP_UHH_SYSCONFIG: 0x%08x\n", reg); + + reg = omap_uhh_readl(isc, OMAP_USBHOST_UHH_HOSTCONFIG); + + /* Setup ULPI bypass and burst configurations */ + reg |= (UHH_HOSTCONFIG_ENA_INCR4 | + UHH_HOSTCONFIG_ENA_INCR8 | + UHH_HOSTCONFIG_ENA_INCR16); + reg &= ~UHH_HOSTCONFIG_ENA_INCR_ALIGN; + + if (isc->ehci_rev == OMAP_EHCI_REV1) { + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P1_CONNECT_STATUS; + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P2_CONNECT_STATUS; + if (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN) + reg &= ~UHH_HOSTCONFIG_P3_CONNECT_STATUS; + + /* Bypass the TLL module for PHY mode operation */ + if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) || + (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) || + (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) + reg &= ~UHH_HOSTCONFIG_P1_ULPI_BYPASS; + else + reg |= UHH_HOSTCONFIG_P1_ULPI_BYPASS; + + } else if (isc->ehci_rev == OMAP_EHCI_REV2) { + reg |= UHH_HOSTCONFIG_APP_START_CLK; + + /* Clear port mode fields for PHY mode*/ + reg &= ~UHH_HOSTCONFIG_P1_MODE_MASK; + reg &= ~UHH_HOSTCONFIG_P2_MODE_MASK; + + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) + reg |= UHH_HOSTCONFIG_P1_MODE_UTMI_PHY; + else if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_HSIC) + reg |= UHH_HOSTCONFIG_P1_MODE_HSIC; + + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) + reg |= UHH_HOSTCONFIG_P2_MODE_UTMI_PHY; + else if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_HSIC) + reg |= UHH_HOSTCONFIG_P2_MODE_HSIC; + } + + omap_uhh_writel(isc, OMAP_USBHOST_UHH_HOSTCONFIG, reg); + device_printf(isc->sc_dev, "UHH setup done, uhh_hostconfig=0x%08x\n", reg); + + + /* I found the code and comments in the Linux EHCI driver - thanks guys :) + * + * "An undocumented "feature" in the OMAP3 EHCI controller, causes suspended + * ports to be taken out of suspend when the USBCMD.Run/Stop bit is cleared + * (for example when we do ehci_bus_suspend). This breaks suspend-resume if + * the root-hub is allowed to suspend. Writing 1 to this undocumented + * register bit disables this feature and restores normal behavior." + */ +#if 0 + omap_ehci_writel(isc, OMAP_USBHOST_INSNREG04, + OMAP_USBHOST_INSNREG04_DISABLE_UNSUSPEND); +#endif + + /* If any of the ports are configured in TLL mode, enable them */ + if ((isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) || + (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) || + (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL)) { + + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) + tll_ch_mask |= 0x1; + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) + tll_ch_mask |= 0x2; + if (isc->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL) + tll_ch_mask |= 0x4; + + /* Enable UTMI mode for required TLL channels */ + omap_ehci_utmi_init(isc, tll_ch_mask); + } + + + /* Release the PHY reset signal now we have configured everything */ + if (reset_performed) { + + /* Delay for 10ms */ + DELAY(10000); + + for (i = 0; i < 3; i++) { + /* Release reset */ + + if (isc->phy_reset[i] && (isc->reset_gpio_pin[i] != -1) + && (isc->sc_gpio_dev != NULL)) { + GPIO_PIN_SET(isc->sc_gpio_dev, + isc->reset_gpio_pin[i], GPIO_PIN_HIGH); + } + } + } + + /* Set the interrupt threshold control, it controls the maximum rate at + * which the host controller issues interrupts. We set it to 1 microframe + * at startup - the default is 8 mircoframes (equates to 1ms). + */ + reg = omap_ehci_readl(isc, OMAP_USBHOST_USBCMD); + reg &= 0xff00ffff; + reg |= (1 << 16); + omap_ehci_writel(isc, OMAP_USBHOST_USBCMD, reg); + + /* Soft reset the PHY using PHY reset command over ULPI */ + if (isc->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) + omap_ehci_soft_phy_reset(isc, 0); + if (isc->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) + omap_ehci_soft_phy_reset(isc, 1); + + return(0); + +err_sys_status: + + /* Disable the TLL clocks */ + omap_prcm_clk_disable(USBTLL_CLK); + + /* Disable Clocks for USBHOST */ + omap_prcm_clk_disable(USBHSHOST_CLK); + + return(ret); +} + + +/** + * omap_ehci_fini - shutdown the EHCI controller + * @isc: omap ehci device context + * + * + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success, a negative error code on failure. + */ +static void +omap_ehci_fini(struct omap_ehci_softc *isc) +{ + unsigned long timeout; + + device_printf(isc->sc_dev, "Stopping TI EHCI USB Controller\n"); + + /* Set the timeout */ + if (hz < 10) + timeout = 1; + else + timeout = (100 * hz) / 1000; + + /* Reset the UHH, OHCI and EHCI modules */ + omap_uhh_writel(isc, OMAP_USBHOST_UHH_SYSCONFIG, 0x0002); + while ((omap_uhh_readl(isc, OMAP_USBHOST_UHH_SYSSTATUS) & 0x07) == 0x00) { + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(isc->sc_dev, "operation timed out\n"); + break; + } + } + + + /* Set the timeout */ + if (hz < 10) + timeout = 1; + else + timeout = (100 * hz) / 1000; + + /* Reset the TLL module */ + omap_tll_writel(isc, OMAP_USBTLL_SYSCONFIG, 0x0002); + while ((omap_tll_readl(isc, OMAP_USBTLL_SYSSTATUS) & (0x01)) == 0x00) { + /* Sleep for a tick */ + pause("USBRESET", 1); + + if (timeout-- == 0) { + device_printf(isc->sc_dev, "operation timed out\n"); + break; + } + } + + + /* Disable functional and interface clocks for the TLL and HOST modules */ + omap_prcm_clk_disable(USBTLL_CLK); + omap_prcm_clk_disable(USBHSHOST_CLK); + + device_printf(isc->sc_dev, "Clock to USB host has been disabled\n"); + +} + + + +/** + * omap_ehci_suspend - suspends the bus + * @dev: omap ehci device + * + * Effectively boilerplate EHCI suspend code. + * + * TODO: There is a lot more we could do here - i.e. force the controller into + * idle mode and disable all the clocks for start. + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success or a positive error code + */ +static int +omap_ehci_suspend(device_t dev) +{ + ehci_softc_t *sc = device_get_softc(dev); + int err; + + err = bus_generic_suspend(dev); + if (err) + return (err); + ehci_suspend(sc); + return (0); +} + + +/** + * omap_ehci_resume - resumes a suspended bus + * @dev: omap ehci device + * + * Effectively boilerplate EHCI resume code. + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success or a positive error code on failure + */ +static int +omap_ehci_resume(device_t dev) +{ + ehci_softc_t *sc = device_get_softc(dev); + + ehci_resume(sc); + + bus_generic_resume(dev); + + return (0); +} + + +/** + * omap_ehci_shutdown - starts the given command + * @dev: + * + * Effectively boilerplate EHCI shutdown code. + * + * LOCKING: + * none. + * + * RETURNS: + * 0 on success or a positive error code on failure + */ +static int +omap_ehci_shutdown(device_t dev) +{ + ehci_softc_t *sc = device_get_softc(dev); + int err; + + err = bus_generic_shutdown(dev); + if (err) + return (err); + ehci_shutdown(sc); + + return (0); +} + + +/** + * omap_ehci_probe - starts the given command + * @dev: + * + * Effectively boilerplate EHCI resume code. + * + * LOCKING: + * Caller should be holding the OMAP3_MMC lock. + * + * RETURNS: + * EH_HANDLED or EH_NOT_HANDLED + */ +static int +omap_ehci_probe(device_t dev) +{ + if (!ofw_bus_is_compatible(dev, "ti,usb-ehci")) + return (ENXIO); + + device_set_desc(dev, OMAP_EHCI_HC_DEVSTR); + + return (BUS_PROBE_DEFAULT); +} + +/** + * omap_ehci_attach - driver entry point, sets up the ECHI controller/driver + * @dev: the new device handle + * + * Sets up bus spaces, interrupt handles, etc for the EHCI controller. It also + * parses the resource hints and calls omap_ehci_init() to initialise the + * H/W. + * + * LOCKING: + * none + * + * RETURNS: + * 0 on success or a positive error code on failure. + */ +static int +omap_ehci_attach(device_t dev) +{ + struct omap_ehci_softc *isc = device_get_softc(dev); + phandle_t node; + /* 3 ports with 3 cells per port */ + pcell_t phyconf[3 * 3]; + pcell_t *phyconf_ptr; + ehci_softc_t *sc = &isc->base; + int err; + int rid; + int len, tuple_size; + int i; + + /* initialise some bus fields */ + sc->sc_bus.parent = dev; + sc->sc_bus.devices = sc->sc_devices; + sc->sc_bus.devices_max = EHCI_MAX_DEVICES; + + /* save the device */ + isc->sc_dev = dev; + + /* get all DMA memory */ + if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev), + &ehci_iterate_hw_softc)) { + return (ENOMEM); + } + + /* When the EHCI driver is added to the tree it is expected that 3 + * memory resources and 1 interrupt resource is assigned. The memory + * resources should be: + * 0 => EHCI register range + * 1 => UHH register range + * 2 => TLL register range + * + * The interrupt resource is just the single interupt for the controller. + */ + + /* Allocate resource for the EHCI register set */ + rid = 0; + sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (!sc->sc_io_res) { + device_printf(dev, "Error: Could not map EHCI memory\n"); + goto error; + } + /* Request an interrupt resource */ + rid = 0; + sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE); + if (sc->sc_irq_res == NULL) { + device_printf(dev, "Error: could not allocate irq\n"); + goto error; + } + + /* Allocate resource for the UHH register set */ + rid = 1; + isc->uhh_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (!isc->uhh_mem_res) { + device_printf(dev, "Error: Could not map UHH memory\n"); + goto error; + } + /* Allocate resource for the TLL register set */ + rid = 2; + isc->tll_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); + if (!isc->tll_mem_res) { + device_printf(dev, "Error: Could not map TLL memory\n"); + goto error; + } + + /* Add this device as a child of the USBus device */ + sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); + if (!sc->sc_bus.bdev) { + device_printf(dev, "Error: could not add USB device\n"); + goto error; + } + + device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); + device_set_desc(sc->sc_bus.bdev, OMAP_EHCI_HC_DEVSTR); + + /* Set the vendor name */ + sprintf(sc->sc_vendor, "Texas Instruments"); + + /* Get the GPIO device, we may need this if the driver needs to toggle + * some pins for external PHY resets. + */ + isc->sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0); + if (isc->sc_gpio_dev == NULL) { + device_printf(dev, "Error: failed to get the GPIO device\n"); + goto error; + } + + /* Set the defaults for the hints */ + for (i = 0; i < 3; i++) { + isc->phy_reset[i] = 0; + isc->port_mode[i] = EHCI_HCD_OMAP_MODE_UNKNOWN; + isc->reset_gpio_pin[i] = -1; + } + + tuple_size = sizeof(pcell_t) * 3; + node = ofw_bus_get_node(dev); + len = OF_getprop(node, "phy-config", phyconf, sizeof(phyconf)); + if (len > 0) { + if (len % tuple_size) + goto error; + if ((len / tuple_size) != 3) + goto error; + + phyconf_ptr = phyconf; + for (i = 0; i < 3; i++) { + isc->port_mode[i] = fdt32_to_cpu(*phyconf_ptr); + isc->phy_reset[i] = fdt32_to_cpu(*(phyconf_ptr + 1)); + isc->reset_gpio_pin[i] = fdt32_to_cpu(*(phyconf_ptr + 2)); + + phyconf_ptr += 3; + } + } + + /* Initialise the ECHI registers */ + err = omap_ehci_init(isc); + if (err) { + device_printf(dev, "Error: could not setup OMAP EHCI, %d\n", err); + goto error; + } + + + /* Set the tag and size of the register set in the EHCI context */ + sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res); + sc->sc_io_tag = rman_get_bustag(sc->sc_io_res); + sc->sc_io_size = rman_get_size(sc->sc_io_res); + + + /* Setup the interrupt */ + err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, + NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); + if (err) { + device_printf(dev, "Error: could not setup irq, %d\n", err); + sc->sc_intr_hdl = NULL; + goto error; + } + + + /* Finally we are ready to kick off the ECHI host controller */ + err = ehci_init(sc); + if (err == 0) { + err = device_probe_and_attach(sc->sc_bus.bdev); + } + if (err) { + device_printf(dev, "Error: USB init failed err=%d\n", err); + goto error; + } + + return (0); + +error: + omap_ehci_detach(dev); + return (ENXIO); +} + +/** + * omap_ehci_detach - detach the device and cleanup the driver + * @dev: device handle + * + * Clean-up routine where everything initialised in omap_ehci_attach is + * freed and cleaned up. This function calls omap_ehci_fini() to shutdown + * the on-chip module. + * + * LOCKING: + * none + * + * RETURNS: + * Always returns 0 (success). + */ +static int +omap_ehci_detach(device_t dev) +{ + struct omap_ehci_softc *isc = device_get_softc(dev); + ehci_softc_t *sc = &isc->base; + device_t bdev; + int err; + + if (sc->sc_bus.bdev) { + bdev = sc->sc_bus.bdev; + device_detach(bdev); + device_delete_child(dev, bdev); + } + + /* during module unload there are lots of children leftover */ + device_delete_children(dev); + + /* + * disable interrupts that might have been switched on in ehci_init + */ + if (sc->sc_io_res) { + EWRITE4(sc, EHCI_USBINTR, 0); + } + + if (sc->sc_irq_res && sc->sc_intr_hdl) { + /* + * only call ehci_detach() after ehci_init() + */ + ehci_detach(sc); + + err = bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl); + if (err) + device_printf(dev, "Error: could not tear down irq, %d\n", err); + sc->sc_intr_hdl = NULL; + } + + /* Free the resources stored in the base EHCI handler */ + if (sc->sc_irq_res) { + bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res); + sc->sc_irq_res = NULL; + } + if (sc->sc_io_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res); + sc->sc_io_res = NULL; + } + + /* Release the other register set memory maps */ + if (isc->tll_mem_res) { + bus_release_resource(dev, SYS_RES_MEMORY, 0, isc->tll_mem_res); + isc->tll_mem_res = NULL; *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-projects@FreeBSD.ORG Thu Feb 9 05:43:50 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B80B21065670; Thu, 9 Feb 2012 05:43:50 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A75918FC14; Thu, 9 Feb 2012 05:43:50 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q195hos4083699; Thu, 9 Feb 2012 05:43:50 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q195hoQT083697; Thu, 9 Feb 2012 05:43:50 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201202090543.q195hoQT083697@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Thu, 9 Feb 2012 05:43:50 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231246 - projects/armv6/sys/arm/ti X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Feb 2012 05:43:50 -0000 Author: gonzo Date: Thu Feb 9 05:43:50 2012 New Revision: 231246 URL: http://svn.freebsd.org/changeset/base/231246 Log: - Fix priority/target CPU setting code - Some minor style fixes Modified: projects/armv6/sys/arm/ti/gic.c Modified: projects/armv6/sys/arm/ti/gic.c ============================================================================== --- projects/armv6/sys/arm/ti/gic.c Thu Feb 9 04:57:32 2012 (r231245) +++ projects/armv6/sys/arm/ti/gic.c Thu Feb 9 05:43:50 2012 (r231246) @@ -49,10 +49,9 @@ __FBSDID("$FreeBSD$"); #include #include +/* We are using GICv2 register naming */ - /* We are using GICv2 register naming */ - - /* Distributor Registers */ +/* Distributor Registers */ #define GICD_CTLR 0x000 /* v1 ICDDCR */ #define GICD_TYPER 0x004 /* v1 ICDICTR */ #define GICD_IIDR 0x008 /* v1 ICDIIDR */ @@ -67,7 +66,7 @@ __FBSDID("$FreeBSD$"); #define GICD_ICFGR(n) (0x0C00 + ((n) * 4)) /* v1 ICDICFR */ #define GICD_SGIR(n) (0x0F00 + ((n) * 4)) /* v1 ICDSGIR */ - /* CPU Registers */ +/* CPU Registers */ #define GICC_CTLR 0x0000 /* v1 ICCICR */ #define GICC_PMR 0x0004 /* v1 ICCPMR */ #define GICC_BPR 0x0008 /* v1 ICCBPR */ @@ -78,8 +77,6 @@ __FBSDID("$FreeBSD$"); #define GICC_ABPR 0x001C /* v1 ICCABPR */ #define GICC_IIDR 0x00FC /* v1 ICCIIDR*/ - - struct arm_gic_softc { struct resource * gic_res[3]; bus_space_tag_t gic_c_bst; @@ -95,7 +92,6 @@ static struct resource_spec arm_gic_spec { -1, 0 } }; - static struct arm_gic_softc *arm_gic_sc = NULL; #define gic_c_read_4(reg) \ @@ -107,7 +103,6 @@ static struct arm_gic_softc *arm_gic_sc #define gic_d_write_4(reg, val) \ bus_space_write_4(arm_gic_sc->gic_d_bst, arm_gic_sc->gic_d_bsh, reg, val) - static int arm_gic_probe(device_t dev) { @@ -166,9 +161,9 @@ arm_gic_attach(device_t dev) } /* Route all interrupts to CPU0 and set priority to 0 */ - for (i = 32; i < nirqs; i += 32) { - gic_d_write_4(GICD_IPRIORITYR(i >> 5), 0x00000000); - gic_d_write_4(GICD_ITARGETSR(i >> 5), 0x01010101); + for (i = 32; i < nirqs; i += 4) { + gic_d_write_4(GICD_IPRIORITYR(i >> 2), 0x00000000); + gic_d_write_4(GICD_ITARGETSR(i >> 2), 0x01010101); } /* Enable CPU interface */ From owner-svn-src-projects@FreeBSD.ORG Fri Feb 10 22:55:22 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D1B34106577F; Fri, 10 Feb 2012 22:55:22 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id C0E3C8FC16; Fri, 10 Feb 2012 22:55:22 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1AMtMVZ099956; Fri, 10 Feb 2012 22:55:22 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1AMtMPn099954; Fri, 10 Feb 2012 22:55:22 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202102255.q1AMtMPn099954@svn.freebsd.org> From: Andrew Turner Date: Fri, 10 Feb 2012 22:55:22 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231461 - projects/arm_eabi/sys/boot/arm/uboot X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2012 22:55:22 -0000 Author: andrew Date: Fri Feb 10 22:55:22 2012 New Revision: 231461 URL: http://svn.freebsd.org/changeset/base/231461 Log: Link against libgcc to pull in the required __aeabi_* functions Modified: projects/arm_eabi/sys/boot/arm/uboot/Makefile Modified: projects/arm_eabi/sys/boot/arm/uboot/Makefile ============================================================================== --- projects/arm_eabi/sys/boot/arm/uboot/Makefile Fri Feb 10 22:54:58 2012 (r231460) +++ projects/arm_eabi/sys/boot/arm/uboot/Makefile Fri Feb 10 22:55:22 2012 (r231461) @@ -92,8 +92,8 @@ CFLAGS+= -I${.OBJDIR}/../../uboot/lib # where to get libstand from CFLAGS+= -I${.CURDIR}/../../../../lib/libstand/ -DPADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} ${LIBSTAND} -LDADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} -lstand +DPADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} ${LIBSTAND} ${LIBGCC} +LDADD= ${LIBFICL} ${LIBUBOOT} ${LIBFDT} -lstand -lgcc vers.c: ${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version sh ${.CURDIR}/../../common/newvers.sh ${.CURDIR}/version ${NEWVERSWHAT} From owner-svn-src-projects@FreeBSD.ORG Fri Feb 10 23:06:20 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9345C106564A; Fri, 10 Feb 2012 23:06:20 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 82A318FC17; Fri, 10 Feb 2012 23:06:20 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1AN6KdG000621; Fri, 10 Feb 2012 23:06:20 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1AN6KEK000619; Fri, 10 Feb 2012 23:06:20 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202102306.q1AN6KEK000619@svn.freebsd.org> From: Andrew Turner Date: Fri, 10 Feb 2012 23:06:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231465 - projects/arm_eabi/sys/arm/arm X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2012 23:06:20 -0000 Author: andrew Date: Fri Feb 10 23:06:20 2012 New Revision: 231465 URL: http://svn.freebsd.org/changeset/base/231465 Log: db_stack_trace_cmd is incorrect on ARM EABI, replace it with a reminder to fix it. Modified: projects/arm_eabi/sys/arm/arm/db_trace.c Modified: projects/arm_eabi/sys/arm/arm/db_trace.c ============================================================================== --- projects/arm_eabi/sys/arm/arm/db_trace.c Fri Feb 10 23:02:45 2012 (r231464) +++ projects/arm_eabi/sys/arm/arm/db_trace.c Fri Feb 10 23:06:20 2012 (r231465) @@ -81,6 +81,7 @@ __FBSDID("$FreeBSD$"); static void db_stack_trace_cmd(db_expr_t addr, db_expr_t count) { +#ifndef __ARM_EABI__ /* The frame format is differend in AAPCS */ u_int32_t *frame, *lastframe; c_db_sym_t sym; const char *name; @@ -171,6 +172,9 @@ db_stack_trace_cmd(db_expr_t addr, db_ex } } } +#else + printf("TODO: Implement db_stack_trace_cmd for AAPCS\n"); +#endif } /* XXX stubs */ From owner-svn-src-projects@FreeBSD.ORG Sat Feb 11 00:19:31 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5EAB71065674; Sat, 11 Feb 2012 00:19:31 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 4E6878FC0A; Sat, 11 Feb 2012 00:19:31 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1B0JVoC003942; Sat, 11 Feb 2012 00:19:31 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1B0JVoT003940; Sat, 11 Feb 2012 00:19:31 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201202110019.q1B0JVoT003940@svn.freebsd.org> From: Andrew Turner Date: Sat, 11 Feb 2012 00:19:31 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231484 - projects/arm_eabi/bin/ls X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2012 00:19:31 -0000 Author: andrew Date: Sat Feb 11 00:19:31 2012 New Revision: 231484 URL: http://svn.freebsd.org/changeset/base/231484 Log: Fix a warning by removing an unneeded test when wchar_t is unsigned. Modified: projects/arm_eabi/bin/ls/util.c Modified: projects/arm_eabi/bin/ls/util.c ============================================================================== --- projects/arm_eabi/bin/ls/util.c Fri Feb 10 23:55:40 2012 (r231483) +++ projects/arm_eabi/bin/ls/util.c Sat Feb 11 00:19:31 2012 (r231484) @@ -184,7 +184,10 @@ prn_octal(const char *s) for (i = 0; i < (int)clen; i++) putchar((unsigned char)s[i]); len += wcwidth(wc); - } else if (goodchar && f_octal_escape && wc >= 0 && + } else if (goodchar && f_octal_escape && +#if WCHAR_MIN < 0 + wc >= 0 && +#endif wc <= (wchar_t)UCHAR_MAX && (p = strchr(esc, (char)wc)) != NULL) { putchar('\\'); From owner-svn-src-projects@FreeBSD.ORG Sat Feb 11 11:34:53 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B1DE91065676; Sat, 11 Feb 2012 11:34:53 +0000 (UTC) (envelope-from dmarion@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 862F28FC08; Sat, 11 Feb 2012 11:34:53 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1BBYr8a029300; Sat, 11 Feb 2012 11:34:53 GMT (envelope-from dmarion@svn.freebsd.org) Received: (from dmarion@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1BBYrNI029297; Sat, 11 Feb 2012 11:34:53 GMT (envelope-from dmarion@svn.freebsd.org) Message-Id: <201202111134.q1BBYrNI029297@svn.freebsd.org> From: Damjan Marion Date: Sat, 11 Feb 2012 11:34:53 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231517 - in projects/armv6/sys/arm: include ti X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2012 11:34:53 -0000 Author: dmarion Date: Sat Feb 11 11:34:53 2012 New Revision: 231517 URL: http://svn.freebsd.org/changeset/base/231517 Log: Add PTE_DEVICE macro in pte.h Add DEVMAP_BOOTSTRAP_MAP_START in ti_machdep.h PTE_DEVICE is introduced as ARMv7 ARM strongly recommends use of shareable device memory. Approved by: cognet (mentor) Modified: projects/armv6/sys/arm/include/pmap.h projects/armv6/sys/arm/ti/ti_machdep.c Modified: projects/armv6/sys/arm/include/pmap.h ============================================================================== --- projects/armv6/sys/arm/include/pmap.h Sat Feb 11 11:24:30 2012 (r231516) +++ projects/armv6/sys/arm/include/pmap.h Sat Feb 11 11:34:53 2012 (r231517) @@ -62,6 +62,7 @@ #define PTE_NOCACHE 1 #endif #define PTE_CACHE 4 +#define PTE_DEVICE 2 #define PTE_PAGETABLE 4 #else #define PTE_NOCACHE 1 Modified: projects/armv6/sys/arm/ti/ti_machdep.c ============================================================================== --- projects/armv6/sys/arm/ti/ti_machdep.c Sat Feb 11 11:24:30 2012 (r231516) +++ projects/armv6/sys/arm/ti/ti_machdep.c Sat Feb 11 11:34:53 2012 (r231517) @@ -97,6 +97,9 @@ __FBSDID("$FreeBSD$"); #define debugf(fmt, args...) #endif +/* Start of address space used for bootstrap map */ +#define DEVMAP_BOOTSTRAP_MAP_START 0xE0000000 + /* * This is the number of L2 page tables required for covering max * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, @@ -368,7 +371,7 @@ initarm(void *mdp, void *unused __unused // while (1); /* Platform-specific initialisation */ - pmap_bootstrap_lastaddr = 0xE0000000 - ARM_NOCACHE_KVA_SIZE; + pmap_bootstrap_lastaddr = DEVMAP_BOOTSTRAP_MAP_START - ARM_NOCACHE_KVA_SIZE; pcpu0_init(); @@ -608,14 +611,14 @@ platform_devmap_init(void) fdt_devmap[i].pd_pa = 0x48000000; fdt_devmap[i].pd_size = 0x1000000; fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; - fdt_devmap[i].pd_cache = PTE_NOCACHE; + fdt_devmap[i].pd_cache = PTE_DEVICE; i++; #elif defined(SOC_TI_AM335X) fdt_devmap[i].pd_va = 0xE4C00000; fdt_devmap[i].pd_pa = 0x44C00000; /* L4_WKUP */ fdt_devmap[i].pd_size = 0x400000; /* 4 MB */ fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE; - fdt_devmap[i].pd_cache = 2; //PTE_NOCACHE; + fdt_devmap[i].pd_cache = PTE_DEVICE; i++; #else #error "Unknown SoC" From owner-svn-src-projects@FreeBSD.ORG Sat Feb 11 13:12:54 2012 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5D5311065670; Sat, 11 Feb 2012 13:12:54 +0000 (UTC) (envelope-from dmarion@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 4A35A8FC08; Sat, 11 Feb 2012 13:12:54 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q1BDCsLS032364; Sat, 11 Feb 2012 13:12:54 GMT (envelope-from dmarion@svn.freebsd.org) Received: (from dmarion@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q1BDCsRw032359; Sat, 11 Feb 2012 13:12:54 GMT (envelope-from dmarion@svn.freebsd.org) Message-Id: <201202111312.q1BDCsRw032359@svn.freebsd.org> From: Damjan Marion Date: Sat, 11 Feb 2012 13:12:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r231519 - in projects/armv6/sys/arm: conf ti ti/omap3 ti/omap4 ti/omap4/pandaboard X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2012 13:12:54 -0000 Author: dmarion Date: Sat Feb 11 13:12:53 2012 New Revision: 231519 URL: http://svn.freebsd.org/changeset/base/231519 Log: Make OMAP family naming consistent. Approved by: cognet (mentor) Added: projects/armv6/sys/arm/ti/omap3/omap3_reg.h projects/armv6/sys/arm/ti/omap4/files.omap4 projects/armv6/sys/arm/ti/omap4/omap4.c projects/armv6/sys/arm/ti/omap4/omap4_reg.h projects/armv6/sys/arm/ti/omap4/std.omap4 Deleted: projects/armv6/sys/arm/ti/omap3/omap35xx_reg.h projects/armv6/sys/arm/ti/omap4/files.omap44xx projects/armv6/sys/arm/ti/omap4/omap44xx.c projects/armv6/sys/arm/ti/omap4/omap44xx_reg.h projects/armv6/sys/arm/ti/omap4/std.omap44xx Modified: projects/armv6/sys/arm/conf/PANDABOARD.hints projects/armv6/sys/arm/ti/omap4/omap4_prcm_clks.c projects/armv6/sys/arm/ti/omap4/omap4_scm_padconf.c projects/armv6/sys/arm/ti/omap4/omap4_timer.c projects/armv6/sys/arm/ti/omap4/pandaboard/pandaboard.c projects/armv6/sys/arm/ti/omap4/pandaboard/std.pandaboard projects/armv6/sys/arm/ti/omap4/uart_cpu_omap4.c projects/armv6/sys/arm/ti/omap_gpio.c projects/armv6/sys/arm/ti/ti_cpuid.c projects/armv6/sys/arm/ti/ti_machdep.c Modified: projects/armv6/sys/arm/conf/PANDABOARD.hints ============================================================================== --- projects/armv6/sys/arm/conf/PANDABOARD.hints Sat Feb 11 12:03:44 2012 (r231518) +++ projects/armv6/sys/arm/conf/PANDABOARD.hints Sat Feb 11 13:12:53 2012 (r231519) @@ -39,7 +39,7 @@ hint.omap_clk.0.heartbeat_gpio="150" # but can be overridden here. These hints are applied to the H/W when the # SCM module is initialised. # -# The format is: +# The format is: # hint.omap_scm.0.padconf.= # # Where the options can be one of the following: @@ -47,15 +47,15 @@ hint.omap_clk.0.heartbeat_gpio="150" # # Setup the pin settings for the HS USB Host (PHY mode) -hint.omap44xx.0.padconf.ag19="usbb1_ulpiphy_stp:output" -hint.omap44xx.0.padconf.ae18="usbb1_ulpiphy_clk:input_pulldown" -hint.omap44xx.0.padconf.af19="usbb1_ulpiphy_dir:input_pulldown" -hint.omap44xx.0.padconf.ae19="usbb1_ulpiphy_nxt:input_pulldown" -hint.omap44xx.0.padconf.af18="usbb1_ulpiphy_dat0:input_pulldown" -hint.omap44xx.0.padconf.ag18="usbb1_ulpiphy_dat1:input_pulldown" -hint.omap44xx.0.padconf.ae17="usbb1_ulpiphy_dat2:input_pulldown" -hint.omap44xx.0.padconf.af17="usbb1_ulpiphy_dat3:input_pulldown" -hint.omap44xx.0.padconf.ah17="usbb1_ulpiphy_dat4:input_pulldown" -hint.omap44xx.0.padconf.ae16="usbb1_ulpiphy_dat5:input_pulldown" -hint.omap44xx.0.padconf.af16="usbb1_ulpiphy_dat6:input_pulldown" -hint.omap44xx.0.padconf.ag16="usbb1_ulpiphy_dat7:input_pulldown" +hint.omap4.0.padconf.ag19="usbb1_ulpiphy_stp:output" +hint.omap4.0.padconf.ae18="usbb1_ulpiphy_clk:input_pulldown" +hint.omap4.0.padconf.af19="usbb1_ulpiphy_dir:input_pulldown" +hint.omap4.0.padconf.ae19="usbb1_ulpiphy_nxt:input_pulldown" +hint.omap4.0.padconf.af18="usbb1_ulpiphy_dat0:input_pulldown" +hint.omap4.0.padconf.ag18="usbb1_ulpiphy_dat1:input_pulldown" +hint.omap4.0.padconf.ae17="usbb1_ulpiphy_dat2:input_pulldown" +hint.omap4.0.padconf.af17="usbb1_ulpiphy_dat3:input_pulldown" +hint.omap4.0.padconf.ah17="usbb1_ulpiphy_dat4:input_pulldown" +hint.omap4.0.padconf.ae16="usbb1_ulpiphy_dat5:input_pulldown" +hint.omap4.0.padconf.af16="usbb1_ulpiphy_dat6:input_pulldown" +hint.omap4.0.padconf.ag16="usbb1_ulpiphy_dat7:input_pulldown" Added: projects/armv6/sys/arm/ti/omap3/omap3_reg.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/omap3/omap3_reg.h Sat Feb 11 13:12:53 2012 (r231519) @@ -0,0 +1,778 @@ +/*- + * Copyright (c) 2011 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Texas Instruments - OMAP3xxx series processors + * + * Reference: + * OMAP35x Applications Processor + * Technical Reference Manual + * (omap35xx_techref.pdf) + * + * + * Note: + * The devices are mapped into address above 0xD000_0000 as the kernel space + * memory is at 0xC000_0000 and above. The first 256MB after this is reserved + * for the size of the kernel, everything above that is reserved for SoC + * devices. + * + */ +#ifndef _OMAP35XX_REG_H_ +#define _OMAP35XX_REG_H_ + +#ifndef _LOCORE +#include /* for uint32_t */ +#endif + + + + +#define OMAP35XX_SDRAM0_START 0x80000000UL +#define OMAP35XX_SDRAM1_START 0xA0000000UL +#define OMAP35XX_SDRAM_BANKS 2 +#define OMAP35XX_SDRAM_BANK_SIZE 0x20000000UL + + +/* Physical/Virtual address for SDRAM controller */ + +#define OMAP35XX_SMS_VBASE 0x6C000000UL +#define OMAP35XX_SMS_HWBASE 0x6C000000UL +#define OMAP35XX_SMS_SIZE 0x01000000UL + +#define OMAP35XX_SDRC_VBASE 0x6D000000UL +#define OMAP35XX_SDRC_HWBASE 0x6D000000UL +#define OMAP35XX_SDRC_SIZE 0x01000000UL + + + +/* Physical/Virtual address for I/O space */ + +#define OMAP35XX_L3_VBASE 0xD0000000UL +#define OMAP35XX_L3_HWBASE 0x68000000UL +#define OMAP35XX_L3_SIZE 0x01000000UL + +#define OMAP35XX_L4_CORE_VBASE 0xE8000000UL +#define OMAP35XX_L4_CORE_HWBASE 0x48000000UL +#define OMAP35XX_L4_CORE_SIZE 0x01000000UL + +#define OMAP35XX_L4_WAKEUP_VBASE 0xE8300000UL +#define OMAP35XX_L4_WAKEUP_HWBASE 0x48300000UL +#define OMAP35XX_L4_WAKEUP_SIZE 0x00040000UL + +#define OMAP35XX_L4_PERIPH_VBASE 0xE9000000UL +#define OMAP35XX_L4_PERIPH_HWBASE 0x49000000UL +#define OMAP35XX_L4_PERIPH_SIZE 0x00100000UL + + +/* + * L4-CORE Physical/Virtual addresss offsets + */ +#define OMAP35XX_SCM_OFFSET 0x00002000UL +#define OMAP35XX_CM_OFFSET 0x00004000UL +#define OMAP35XX_SDMA_OFFSET 0x00056000UL +#define OMAP35XX_I2C3_OFFSET 0x00060000UL +#define OMAP35XX_USB_TLL_OFFSET 0x00062000UL +#define OMAP35XX_USB_UHH_OFFSET 0x00064000UL +#define OMAP35XX_USB_EHCI_OFFSET 0x00064800UL + + +#define OMAP35XX_UART1_OFFSET 0x0006A000UL +#define OMAP35XX_UART2_OFFSET 0x0006C000UL +#define OMAP35XX_I2C1_OFFSET 0x00070000UL +#define OMAP35XX_I2C2_OFFSET 0x00072000UL +#define OMAP35XX_MCBSP1_OFFSET 0x00074000UL +#define OMAP35XX_GPTIMER10_OFFSET 0x00086000UL +#define OMAP35XX_GPTIMER11_OFFSET 0x00088000UL +#define OMAP35XX_MCBSP5_OFFSET 0x00096000UL +#define OMAP35XX_MMU1_OFFSET 0x000BD400UL +#define OMAP35XX_INTCPS_OFFSET 0x00200000UL + + +/* + * L4-WAKEUP Physical/Virtual addresss offsets + */ +#define OMAP35XX_PRM_OFFSET 0x00006000UL +#define OMAP35XX_GPIO1_OFFSET 0x00010000UL +#define OMAP35XX_GPTIMER1_OFFSET 0x00018000UL + + + +/* + * L4-PERIPH Physical/Virtual addresss offsets + */ +#define OMAP35XX_UART3_OFFSET 0x00020000UL +#define OMAP35XX_MCBSP2_OFFSET 0x00022000UL +#define OMAP35XX_MCBSP3_OFFSET 0x00024000UL +#define OMAP35XX_MCBSP4_OFFSET 0x00026000UL +#define OMAP35XX_SIDETONE_MCBSP2_OFFSET 0x00028000UL +#define OMAP35XX_SIDETONE_MCBSP3_OFFSET 0x0002A000UL +#define OMAP35XX_GPTIMER2_OFFSET 0x00032000UL +#define OMAP35XX_GPTIMER3_OFFSET 0x00034000UL +#define OMAP35XX_GPTIMER4_OFFSET 0x00036000UL +#define OMAP35XX_GPTIMER5_OFFSET 0x00038000UL +#define OMAP35XX_GPTIMER6_OFFSET 0x0003A000UL +#define OMAP35XX_GPTIMER7_OFFSET 0x0003C000UL +#define OMAP35XX_GPTIMER8_OFFSET 0x0003E000UL +#define OMAP35XX_GPTIMER9_OFFSET 0x00040000UL +#define OMAP35XX_GPIO2_OFFSET 0x00050000UL +#define OMAP35XX_GPIO3_OFFSET 0x00052000UL +#define OMAP35XX_GPIO4_OFFSET 0x00054000UL +#define OMAP35XX_GPIO5_OFFSET 0x00056000UL +#define OMAP35XX_GPIO6_OFFSET 0x00058000UL + + + + + + +/* + * System Control Module + */ +#define OMAP35XX_SCM_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_SCM_OFFSET) +#define OMAP35XX_SCM_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_SCM_OFFSET) +#define OMAP35XX_SCM_SIZE 0x00001000UL + +#define OMAP35XX_SCM_REVISION 0x00000000UL +#define OMAP35XX_SCM_SYSCONFIG 0x00000010UL +#define OMAP35XX_SCM_PADCONFS_BASE 0x00000030UL +#define OMAP35XX_SCM_DEVCONF0 0x00000274UL +#define OMAP35XX_SCM_MEM_DFTRW0 0x00000278UL + + + + +/* + * + */ +#define OMAP35XX_CM_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_CM_OFFSET) +#define OMAP35XX_CM_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_CM_OFFSET) +#define OMAP35XX_CM_SIZE 0x00001500UL + +#define OMAP35XX_CM_CORE_OFFSET 0x00000A00UL +#define OMAP35XX_CM_CORE_SIZE 0x00000100UL +#define OMAP35XX_CM_FCLKEN1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0000UL) +#define OMAP35XX_CM_FCLKEN3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0008UL) +#define OMAP35XX_CM_ICLKEN1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0010UL) +#define OMAP35XX_CM_ICLKEN2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0014UL) +#define OMAP35XX_CM_ICLKEN3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0018UL) +#define OMAP35XX_CM_IDLEST1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0020UL) +#define OMAP35XX_CM_IDLEST2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0024UL) +#define OMAP35XX_CM_IDLEST3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0028UL) +#define OMAP35XX_CM_AUTOIDLE1_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0030UL) +#define OMAP35XX_CM_AUTOIDLE2_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0034UL) +#define OMAP35XX_CM_AUTOIDLE3_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0038UL) +#define OMAP35XX_CM_CLKSEL_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0040UL) +#define OMAP35XX_CM_CLKSTCTRL_CORE (OMAP35XX_CM_CORE_OFFSET + 0x0048UL) +#define OMAP35XX_CM_CLKSTST_CORE (OMAP35XX_CM_CORE_OFFSET + 0x004CUL) + +#define OMAP35XX_CM_WKUP_OFFSET 0x00000C00UL +#define OMAP35XX_CM_WKUP_SIZE 0x00000100UL +#define OMAP35XX_CM_FCLKEN_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0000UL) +#define OMAP35XX_CM_ICLKEN_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0010UL) +#define OMAP35XX_CM_IDLEST_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0020UL) +#define OMAP35XX_CM_AUTOIDLE_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0030UL) +#define OMAP35XX_CM_CLKSEL_WKUP (OMAP35XX_CM_WKUP_OFFSET + 0x0040UL) + +#define OMAP35XX_CM_PLL_OFFSET 0x00000D00UL +#define OMAP35XX_CM_PLL_SIZE 0x00000100UL +#define OMAP35XX_CM_CLKEN_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0000UL) +#define OMAP35XX_CM_CLKEN2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0004UL) +#define OMAP35XX_CM_IDLEST_CKGEN (OMAP35XX_CM_PLL_OFFSET + 0x0020UL) +#define OMAP35XX_CM_IDLEST2_CKGEN (OMAP35XX_CM_PLL_OFFSET + 0x0024UL) +#define OMAP35XX_CM_AUTOIDLE_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0030UL) +#define OMAP35XX_CM_AUTOIDLE2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0034UL) +#define OMAP35XX_CM_CLKSEL1_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0040UL) +#define OMAP35XX_CM_CLKSEL2_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0044UL) +#define OMAP35XX_CM_CLKSEL3_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0048UL) +#define OMAP35XX_CM_CLKSEL4_PLL (OMAP35XX_CM_PLL_OFFSET + 0x004CUL) +#define OMAP35XX_CM_CLKSEL5_PLL (OMAP35XX_CM_PLL_OFFSET + 0x0050UL) +#define OMAP35XX_CM_CLKOUT_CTRL (OMAP35XX_CM_PLL_OFFSET + 0x0070UL) + +#define OMAP35XX_CM_PER_OFFSET 0x00001000UL +#define OMAP35XX_CM_PER_SIZE 0x00000100UL +#define OMAP35XX_CM_FCLKEN_PER (OMAP35XX_CM_PER_OFFSET + 0x0000UL) +#define OMAP35XX_CM_ICLKEN_PER (OMAP35XX_CM_PER_OFFSET + 0x0010UL) +#define OMAP35XX_CM_IDLEST_PER (OMAP35XX_CM_PER_OFFSET + 0x0020UL) +#define OMAP35XX_CM_AUTOIDLE_PER (OMAP35XX_CM_PER_OFFSET + 0x0030UL) +#define OMAP35XX_CM_CLKSEL_PER (OMAP35XX_CM_PER_OFFSET + 0x0040UL) +#define OMAP35XX_CM_SLEEPDEP_PER (OMAP35XX_CM_PER_OFFSET + 0x0044UL) +#define OMAP35XX_CM_CLKSTCTRL_PER (OMAP35XX_CM_PER_OFFSET + 0x0048UL) +#define OMAP35XX_CM_CLKSTST_PER (OMAP35XX_CM_PER_OFFSET + 0x004CUL) + +#define OMAP35XX_CM_USBHOST_OFFSET 0x00001400UL +#define OMAP35XX_CM_USBHOST_SIZE 0x00000100UL +#define OMAP35XX_CM_FCLKEN_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0000UL) +#define OMAP35XX_CM_ICLKEN_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0010UL) +#define OMAP35XX_CM_IDLEST_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0020UL) +#define OMAP35XX_CM_AUTOIDLE_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0030UL) +#define OMAP35XX_CM_SLEEPDEP_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0044UL) +#define OMAP35XX_CM_CLKSTCTRL_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x0048UL) +#define OMAP35XX_CM_CLKSTST_USBHOST (OMAP35XX_CM_USBHOST_OFFSET + 0x004CUL) + + + + +/* + * + */ +#define OMAP35XX_PRM_HWBASE (OMAP35XX_L4_WAKEUP_HWBASE + OMAP35XX_PRM_OFFSET) +#define OMAP35XX_PRM_VBASE (OMAP35XX_L4_WAKEUP_VBASE + OMAP35XX_PRM_OFFSET) +#define OMAP35XX_PRM_SIZE 0x00001600UL + +#define OMAP35XX_PRM_CLKCTRL_OFFSET 0x00000D00UL +#define OMAP35XX_PRM_CLKCTRL_SIZE 0x00000100UL +#define OMAP35XX_PRM_CLKSEL (OMAP35XX_PRM_CLKCTRL_OFFSET + 0x0040UL) +#define OMAP35XX_PRM_CLKOUT_CTRL (OMAP35XX_PRM_CLKCTRL_OFFSET + 0x0070UL) + +#define OMAP35XX_PRM_GLOBAL_OFFSET 0x00001200UL +#define OMAP35XX_PRM_GLOBAL_SIZE 0x00000100UL +#define OMAP35XX_PRM_CLKSRC_CTRL (OMAP35XX_PRM_GLOBAL_OFFSET + 0x0070UL) + + + + + +/* + * Uarts + */ +#define OMAP35XX_UART1_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_UART1_OFFSET) +#define OMAP35XX_UART1_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_UART1_OFFSET) +#define OMAP35XX_UART1_SIZE 0x00001000UL + +#define OMAP35XX_UART2_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_UART2_OFFSET) +#define OMAP35XX_UART2_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_UART2_OFFSET) +#define OMAP35XX_UART2_SIZE 0x00001000UL + +#define OMAP35XX_UART3_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_UART3_OFFSET) +#define OMAP35XX_UART3_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_UART3_OFFSET) +#define OMAP35XX_UART3_SIZE 0x00001000UL + + + + +/* + * I2C Modules + */ +#define OMAP35XX_I2C1_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C1_OFFSET) +#define OMAP35XX_I2C1_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C1_OFFSET) +#define OMAP35XX_I2C1_SIZE 0x00000080UL + +#define OMAP35XX_I2C2_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C2_OFFSET) +#define OMAP35XX_I2C2_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C2_OFFSET) +#define OMAP35XX_I2C2_SIZE 0x00000080UL + +#define OMAP35XX_I2C3_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_I2C3_OFFSET) +#define OMAP35XX_I2C3_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_I2C3_OFFSET) +#define OMAP35XX_I2C3_SIZE 0x00000080UL + +#define OMAP35XX_I2C_IE 0x04 +#define OMAP35XX_I2C_STAT 0x08 +#define OMAP35XX_I2C_WE 0x0C +#define OMAP35XX_I2C_SYSS 0x10 +#define OMAP35XX_I2C_BUF 0x14 +#define OMAP35XX_I2C_CNT 0x18 +#define OMAP35XX_I2C_DATA 0x1C +#define OMAP35XX_I2C_SYSC 0x20 +#define OMAP35XX_I2C_CON 0x24 +#define OMAP35XX_I2C_OA0 0x28 +#define OMAP35XX_I2C_SA 0x2C +#define OMAP35XX_I2C_PSC 0x30 +#define OMAP35XX_I2C_SCLL 0x34 +#define OMAP35XX_I2C_SCLH 0x38 +#define OMAP35XX_I2C_SYSTEST 0x3C +#define OMAP35XX_I2C_BUFSTAT 0x40 +#define OMAP35XX_I2C_OA1 0x44 +#define OMAP35XX_I2C_OA2 0x48 +#define OMAP35XX_I2C_OA3 0x4C +#define OMAP35XX_I2C_ACTOA 0x50 +#define OMAP35XX_I2C_SBLOCK 0x54 + + + +/* + * McBSP Modules + */ +#define OMAP35XX_MCBSP1_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_MCBSP1_OFFSET) +#define OMAP35XX_MCBSP1_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_MCBSP1_OFFSET) +#define OMAP35XX_MCBSP1_SIZE 0x00001000UL + +#define OMAP35XX_MCBSP2_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_MCBSP2_OFFSET) +#define OMAP35XX_MCBSP2_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_MCBSP2_OFFSET) +#define OMAP35XX_MCBSP2_SIZE 0x00001000UL + +#define OMAP35XX_MCBSP3_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_MCBSP3_OFFSET) +#define OMAP35XX_MCBSP3_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_MCBSP3_OFFSET) +#define OMAP35XX_MCBSP3_SIZE 0x00001000UL + +#define OMAP35XX_MCBSP4_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_MCBSP4_OFFSET) +#define OMAP35XX_MCBSP4_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_MCBSP4_OFFSET) +#define OMAP35XX_MCBSP4_SIZE 0x00001000UL + +#define OMAP35XX_MCBSP5_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_MCBSP5_OFFSET) +#define OMAP35XX_MCBSP5_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_MCBSP5_OFFSET) +#define OMAP35XX_MCBSP5_SIZE 0x00001000UL + +#define OMAP35XX_MCBSP_DRR 0x0000 +#define OMAP35XX_MCBSP_DXR 0x0008 +#define OMAP35XX_MCBSP_SPCR2 0x0010 +#define OMAP35XX_MCBSP_SPCR1 0x0014 +#define OMAP35XX_MCBSP_RCR2 0x0018 +#define OMAP35XX_MCBSP_RCR1 0x001C +#define OMAP35XX_MCBSP_XCR2 0x0020 +#define OMAP35XX_MCBSP_XCR1 0x0024 +#define OMAP35XX_MCBSP_SRGR2 0x0028 +#define OMAP35XX_MCBSP_SRGR1 0x002C +#define OMAP35XX_MCBSP_MCR2 0x0030 +#define OMAP35XX_MCBSP_MCR1 0x0034 +#define OMAP35XX_MCBSP_RCERA 0x0038 +#define OMAP35XX_MCBSP_RCERB 0x003C +#define OMAP35XX_MCBSP_XCERA 0x0040 +#define OMAP35XX_MCBSP_XCERB 0x0044 +#define OMAP35XX_MCBSP_PCR 0x0048 +#define OMAP35XX_MCBSP_RCERC 0x004C +#define OMAP35XX_MCBSP_RCERD 0x0050 +#define OMAP35XX_MCBSP_XCERC 0x0054 +#define OMAP35XX_MCBSP_XCERD 0x0058 +#define OMAP35XX_MCBSP_RCERE 0x005C +#define OMAP35XX_MCBSP_RCERF 0x0060 +#define OMAP35XX_MCBSP_XCERE 0x0064 +#define OMAP35XX_MCBSP_XCERF 0x0068 +#define OMAP35XX_MCBSP_RCERG 0x006C +#define OMAP35XX_MCBSP_RCERH 0x0070 +#define OMAP35XX_MCBSP_XCERG 0x0074 +#define OMAP35XX_MCBSP_XCERH 0x0078 +#define OMAP35XX_MCBSP_RINTCLR 0x0080 +#define OMAP35XX_MCBSP_XINTCLR 0x0084 +#define OMAP35XX_MCBSP_ROVFLCLR 0x0088 +#define OMAP35XX_MCBSP_SYSCONFIG 0x008C +#define OMAP35XX_MCBSP_THRSH2 0x0090 +#define OMAP35XX_MCBSP_THRSH1 0x0094 +#define OMAP35XX_MCBSP_IRQSTATUS 0x00A0 +#define OMAP35XX_MCBSP_IRQENABLE 0x00A4 +#define OMAP35XX_MCBSP_WAKEUPEN 0x00A8 +#define OMAP35XX_MCBSP_XCCR 0x00AC +#define OMAP35XX_MCBSP_RCCR 0x00B0 +#define OMAP35XX_MCBSP_XBUFFSTAT 0x00B4 +#define OMAP35XX_MCBSP_RBUFFSTAT 0x00B8 +#define OMAP35XX_MCBSP_SSELCR 0x00BC +#define OMAP35XX_MCBSP_STATUS 0x00C0 + + + +/* + * USB TTL Module + */ +#define OMAP35XX_USBTLL_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_USBTLL_OFFSET) +#define OMAP35XX_USBTLL_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_USBTLL_OFFSET) +#define OMAP35XX_USBTLL_SIZE 0x00001000UL + +#define OMAP35XX_USBTLL_REVISION 0x0000 +#define OMAP35XX_USBTLL_SYSCONFIG 0x0010 +#define OMAP35XX_USBTLL_SYSSTATUS 0x0014 +#define OMAP35XX_USBTLL_IRQSTATUS 0x0018 +#define OMAP35XX_USBTLL_IRQENABLE 0x001C +#define OMAP35XX_USBTLL_TLL_SHARED_CONF 0x0030 +#define OMAP35XX_USBTLL_TLL_CHANNEL_CONF(i) (0x0040 + (0x04 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_ID_LO(i) (0x0800 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_ID_HI(i) (0x0801 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_PRODUCT_ID_LO(i) (0x0802 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_PRODUCT_ID_HI(i) (0x0803 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_FUNCTION_CTRL(i) (0x0804 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_FUNCTION_CTRL_SET(i) (0x0805 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_FUNCTION_CTRL_CLR(i) (0x0806 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_INTERFACE_CTRL(i) (0x0807 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_INTERFACE_CTRL_SET(i) (0x0808 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_INTERFACE_CTRL_CLR(i) (0x0809 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_OTG_CTRL(i) (0x080A + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_OTG_CTRL_SET(i) (0x080B + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_OTG_CTRL_CLR(i) (0x080C + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_RISE(i) (0x080D + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_RISE_SET(i) (0x080E + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_RISE_CLR(i) (0x080F + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_FALL(i) (0x0810 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_FALL_SET(i) (0x0811 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_EN_FALL_CLR(i) (0x0812 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_STATUS(i) (0x0813 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_LATCH(i) (0x0814 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_DEBUG(i) (0x0815 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_SCRATCH_REGISTER(i) (0x0816 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_SCRATCH_REGISTER_SET(i) (0x0817 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_SCRATCH_REGISTER_CLR(i) (0x0818 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_EXTENDED_SET_ACCESS(i) (0x082F + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VCONTROL_EN(i) (0x0830 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VCONTROL_EN_SET(i) (0x0831 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VCONTROL_EN_CLR(i) (0x0832 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VCONTROL_STATUS(i) (0x0833 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VCONTROL_LATCH(i) (0x0834 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VSTATUS(i) (0x0835 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VSTATUS_SET(i) (0x0836 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_UTMI_VSTATUS_CLR(i) (0x0837 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_USB_INT_LATCH_NOCLR(i) (0x0838 + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_INT_EN(i) (0x083B + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_INT_EN_SET(i) (0x083C + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_INT_EN_CLR(i) (0x083D + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_INT_STATUS(i) (0x083E + (0x100 * (i))) +#define OMAP35XX_USBTLL_ULPI_VENDOR_INT_LATCH(i) (0x083F + (0x100 * (i))) + + +/* + * USB Host Module + */ +#define OMAP35XX_USB_TLL_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_USB_TLL_OFFSET) +#define OMAP35XX_USB_TLL_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_USB_TLL_OFFSET) +#define OMAP35XX_USB_TLL_SIZE 0x00001000UL + +#define OMAP35XX_USB_EHCI_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_USB_EHCI_OFFSET) +#define OMAP35XX_USB_EHCI_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_USB_EHCI_OFFSET) +#define OMAP35XX_USB_EHCI_SIZE 0x00000400UL + +#define OMAP35XX_USB_UHH_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_USB_UHH_OFFSET) +#define OMAP35XX_USB_UHH_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_USB_UHH_OFFSET) +#define OMAP35XX_USB_UHH_SIZE 0x00000400UL + + + + + +/* + * SDRAM Controler (SDRC) + * PA 0x6D00_0000 + */ + +#define OMAP35XX_SDRC_SYSCONFIG (OMAP35XX_SDRC_VBASE + 0x10) +#define OMAP35XX_SDRC_SYSSTATUS (OMAP35XX_SDRC_VBASE + 0x14) +#define OMAP35XX_SDRC_CS_CFG (OMAP35XX_SDRC_VBASE + 0x40) +#define OMAP35XX_SDRC_SHARING (OMAP35XX_SDRC_VBASE + 0x44) +#define OMAP35XX_SDRC_ERR_ADDR (OMAP35XX_SDRC_VBASE + 0x48) +#define OMAP35XX_SDRC_ERR_TYPE (OMAP35XX_SDRC_VBASE + 0x4C) +#define OMAP35XX_SDRC_DLLA_CTRL (OMAP35XX_SDRC_VBASE + 0x60) +#define OMAP35XX_SDRC_DLLA_STATUS (OMAP35XX_SDRC_VBASE + 0x64) +#define OMAP35XX_SDRC_POWER_REG (OMAP35XX_SDRC_VBASE + 0x70) +#define OMAP35XX_SDRC_MCFG(p) (OMAP35XX_SDRC_VBASE + 0x80 + (0x30 * (p))) +#define OMAP35XX_SDRC_MR(p) (OMAP35XX_SDRC_VBASE + 0x84 + (0x30 * (p))) +#define OMAP35XX_SDRC_EMR2(p) (OMAP35XX_SDRC_VBASE + 0x8C + (0x30 * (p))) +#define OMAP35XX_SDRC_ACTIM_CTRLA(p) (OMAP35XX_SDRC_VBASE + 0x9C + (0x28 * (p))) +#define OMAP35XX_SDRC_ACTIM_CTRLB(p) (OMAP35XX_SDRC_VBASE + 0xA0 + (0x28 * (p))) +#define OMAP35XX_SDRC_RFR_CTRL(p) (OMAP35XX_SDRC_VBASE + 0xA4 + (0x30 * (p))) +#define OMAP35XX_SDRC_MANUAL(p) (OMAP35XX_SDRC_VBASE + 0xA8 + (0x30 * (p))) + + +/* + * SDMA Offset + * PA 0x4805 6000 + */ + +#define OMAP35XX_SDMA_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_SDMA_OFFSET) +#define OMAP35XX_SDMA_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_SDMA_OFFSET) +#define OMAP35XX_SDMA_SIZE 0x00001000UL + + + +/* + * Interrupt Controller Unit. + * PA 0x4820_0000 + */ + +#define OMAP35XX_INTCPS_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_INTCPS_OFFSET) +#define OMAP35XX_INTCPS_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_INTCPS_OFFSET) +#define OMAP35XX_INTCPS_SIZE 0x00001000UL + +#define OMAP35XX_INTCPS_SYSCONFIG (OMAP35XX_INTCPS_VBASE + 0x10) +#define OMAP35XX_INTCPS_SYSSTATUS (OMAP35XX_INTCPS_VBASE + 0x14) +#define OMAP35XX_INTCPS_SIR_IRQ (OMAP35XX_INTCPS_VBASE + 0x40) +#define OMAP35XX_INTCPS_SIR_FIQ (OMAP35XX_INTCPS_VBASE + 0x44) +#define OMAP35XX_INTCPS_CONTROL (OMAP35XX_INTCPS_VBASE + 0x48) +#define OMAP35XX_INTCPS_PROTECTION (OMAP35XX_INTCPS_VBASE + 0x4C) +#define OMAP35XX_INTCPS_IDLE (OMAP35XX_INTCPS_VBASE + 0x50) +#define OMAP35XX_INTCPS_IRQ_PRIORITY (OMAP35XX_INTCPS_VBASE + 0x60) +#define OMAP35XX_INTCPS_FIQ_PRIORITY (OMAP35XX_INTCPS_VBASE + 0x64) +#define OMAP35XX_INTCPS_THRESHOLD (OMAP35XX_INTCPS_VBASE + 0x68) +#define OMAP35XX_INTCPS_ITR(n) (OMAP35XX_INTCPS_VBASE + 0x80 + (0x20 * (n))) +#define OMAP35XX_INTCPS_MIR(n) (OMAP35XX_INTCPS_VBASE + 0x84 + (0x20 * (n))) +#define OMAP35XX_INTCPS_MIR_CLEAR(n) (OMAP35XX_INTCPS_VBASE + 0x88 + (0x20 * (n))) +#define OMAP35XX_INTCPS_MIR_SET(n) (OMAP35XX_INTCPS_VBASE + 0x8C + (0x20 * (n))) +#define OMAP35XX_INTCPS_ISR_SET(n) (OMAP35XX_INTCPS_VBASE + 0x90 + (0x20 * (n))) +#define OMAP35XX_INTCPS_ISR_CLEAR(n) (OMAP35XX_INTCPS_VBASE + 0x94 + (0x20 * (n))) +#define OMAP35XX_INTCPS_PENDING_IRQ(n) (OMAP35XX_INTCPS_VBASE + 0x98 + (0x20 * (n))) +#define OMAP35XX_INTCPS_PENDING_FIQ(n) (OMAP35XX_INTCPS_VBASE + 0x9C + (0x20 * (n))) +#define OMAP35XX_INTCPS_ILR(m) (OMAP35XX_INTCPS_VBASE + 0x100 + (0x4 * (m))) + + +#define OMAP35XX_IRQ_EMUINT 0 /* MPU emulation(2) */ +#define OMAP35XX_IRQ_COMMTX 1 /* MPU emulation(2) */ +#define OMAP35XX_IRQ_COMMRX 2 /* MPU emulation(2) */ +#define OMAP35XX_IRQ_BENCH 3 /* MPU emulation(2) */ +#define OMAP35XX_IRQ_MCBSP2_ST 4 /* Sidetone MCBSP2 overflow */ +#define OMAP35XX_IRQ_MCBSP3_ST 5 /* Sidetone MCBSP3 overflow */ +#define OMAP35XX_IRQ_SSM_ABORT 6 /* MPU subsystem secure state-machine abort (2) */ +#define OMAP35XX_IRQ_SYS_NIRQ 7 /* External source (active low) */ +#define OMAP35XX_IRQ_RESERVED8 8 /* RESERVED */ +#define OMAP35XX_IRQ_SMX_DBG 9 /* SMX error for debug */ +#define OMAP35XX_IRQ_SMX_APP 10 /* SMX error for application */ +#define OMAP35XX_IRQ_PRCM_MPU 11 /* PRCM module IRQ */ +#define OMAP35XX_IRQ_SDMA0 12 /* System DMA request 0(3) */ +#define OMAP35XX_IRQ_SDMA1 13 /* System DMA request 1(3) */ +#define OMAP35XX_IRQ_SDMA2 14 /* System DMA request 2 */ +#define OMAP35XX_IRQ_SDMA3 15 /* System DMA request 3 */ +#define OMAP35XX_IRQ_MCBSP1 16 /* McBSP module 1 IRQ (3) */ +#define OMAP35XX_IRQ_MCBSP2 17 /* McBSP module 2 IRQ (3) */ +#define OMAP35XX_IRQ_SR1 18 /* SmartReflex™ 1 */ +#define OMAP35XX_IRQ_SR2 19 /* SmartReflex™ 2 */ +#define OMAP35XX_IRQ_GPMC 20 /* General-purpose memory controller module */ +#define OMAP35XX_IRQ_SGX 21 /* 2D/3D graphics module */ +#define OMAP35XX_IRQ_MCBSP3 22 /* McBSP module 3(3) */ +#define OMAP35XX_IRQ_MCBSP4 23 /* McBSP module 4(3) */ +#define OMAP35XX_IRQ_CAM0 24 /* Camera interface request 0 */ +#define OMAP35XX_IRQ_DSS 25 /* Display subsystem module(3) */ +#define OMAP35XX_IRQ_MAIL_U0 26 /* Mailbox user 0 request */ +#define OMAP35XX_IRQ_MCBSP5_IRQ1 27 /* McBSP module 5 (3) */ +#define OMAP35XX_IRQ_IVA2_MMU 28 /* IVA2 MMU */ +#define OMAP35XX_IRQ_GPIO1_MPU 29 /* GPIO module 1(3) */ +#define OMAP35XX_IRQ_GPIO2_MPU 30 /* GPIO module 2(3) */ +#define OMAP35XX_IRQ_GPIO3_MPU 31 /* GPIO module 3(3) */ +#define OMAP35XX_IRQ_GPIO4_MPU 32 /* GPIO module 4(3) */ +#define OMAP35XX_IRQ_GPIO5_MPU 33 /* GPIO module 5(3) */ +#define OMAP35XX_IRQ_GPIO6_MPU 34 /* GPIO module 6(3) */ +#define OMAP35XX_IRQ_USIM 35 /* USIM interrupt (HS devices only) (4) */ +#define OMAP35XX_IRQ_WDT3 36 /* Watchdog timer module 3 overflow */ +#define OMAP35XX_IRQ_GPT1 37 /* General-purpose timer module 1 */ +#define OMAP35XX_IRQ_GPT2 38 /* General-purpose timer module 2 */ +#define OMAP35XX_IRQ_GPT3 39 /* General-purpose timer module 3 */ +#define OMAP35XX_IRQ_GPT4 40 /* General-purpose timer module 4 */ +#define OMAP35XX_IRQ_GPT5 41 /* General-purpose timer module 5(3) */ +#define OMAP35XX_IRQ_GPT6 42 /* General-purpose timer module 6(3) */ +#define OMAP35XX_IRQ_GPT7 43 /* General-purpose timer module 7(3) */ +#define OMAP35XX_IRQ_GPT8 44 /* General-purpose timer module 8(3) */ +#define OMAP35XX_IRQ_GPT9 45 /* General-purpose timer module 9 */ +#define OMAP35XX_IRQ_GPT10 46 /* General-purpose timer module 10 */ +#define OMAP35XX_IRQ_GPT11 47 /* General-purpose timer module 11 */ +#define OMAP35XX_IRQ_SPI4 48 /* McSPI module 4 */ +#define OMAP35XX_IRQ_SHA1MD5_2 49 /* SHA-1/MD5 crypto-accelerator 2 (HS devices only)(4) */ +#define OMAP35XX_IRQ_FPKA_IRQREADY_N 50 /* PKA crypto-accelerator (HS devices only) (4) */ +#define OMAP35XX_IRQ_SHA2MD5 51 /* SHA-2/MD5 crypto-accelerator 1 (HS devices only) (4) */ +#define OMAP35XX_IRQ_RNG 52 /* RNG module (HS devices only) (4) */ +#define OMAP35XX_IRQ_MG 53 /* MG function (3) */ +#define OMAP35XX_IRQ_MCBSP4_TX 54 /* McBSP module 4 transmit(3) */ +#define OMAP35XX_IRQ_MCBSP4_RX 55 /* McBSP module 4 receive(3) */ +#define OMAP35XX_IRQ_I2C1 56 /* I2C module 1 */ +#define OMAP35XX_IRQ_I2C2 57 /* I2C module 2 */ +#define OMAP35XX_IRQ_HDQ 58 /* HDQ / One-wire */ +#define OMAP35XX_IRQ_MCBSP1_TX 59 /* McBSP module 1 transmit(3) */ +#define OMAP35XX_IRQ_MCBSP1_RX 60 /* McBSP module 1 receive(3) */ +#define OMAP35XX_IRQ_I2C3 61 /* I2C module 3 */ +#define OMAP35XX_IRQ_McBSP2_TX 62 /* McBSP module 2 transmit(3) */ +#define OMAP35XX_IRQ_McBSP2_RX 63 /* McBSP module 2 receive(3) */ +#define OMAP35XX_IRQ_FPKA_IRQRERROR_N 64 /* PKA crypto-accelerator (HS devices only) (4) */ +#define OMAP35XX_IRQ_SPI1 65 /* McSPI module 1 */ +#define OMAP35XX_IRQ_SPI2 66 /* McSPI module 2 */ +#define OMAP35XX_IRQ_RESERVED67 67 /* RESERVED */ +#define OMAP35XX_IRQ_RESERVED68 68 /* RESERVED */ +#define OMAP35XX_IRQ_RESERVED69 69 /* RESERVED */ +#define OMAP35XX_IRQ_RESERVED70 70 /* RESERVED */ +#define OMAP35XX_IRQ_RESERVED71 71 /* RESERVED */ +#define OMAP35XX_IRQ_UART1 72 /* UART module 1 */ +#define OMAP35XX_IRQ_UART2 73 /* UART module 2 */ +#define OMAP35XX_IRQ_UART3 74 /* UART module 3 (also infrared)(3) */ +#define OMAP35XX_IRQ_PBIAS 75 /* Merged interrupt for PBIASlite1 and 2 */ +#define OMAP35XX_IRQ_OHCI 76 /* OHCI controller HSUSB MP Host Interrupt */ +#define OMAP35XX_IRQ_EHCI 77 /* EHCI controller HSUSB MP Host Interrupt */ +#define OMAP35XX_IRQ_TLL 78 /* HSUSB MP TLL Interrupt */ +#define OMAP35XX_IRQ_PARTHASH 79 /* SHA2/MD5 crypto-accelerator 1 (HS devices only) (4) */ +#define OMAP35XX_IRQ_RESERVED80 80 /* Reserved */ +#define OMAP35XX_IRQ_MCBSP5_TX 81 /* McBSP module 5 transmit(3) */ +#define OMAP35XX_IRQ_MCBSP5_RX 82 /* McBSP module 5 receive(3) */ +#define OMAP35XX_IRQ_MMC1 83 /* MMC/SD module 1 */ +#define OMAP35XX_IRQ_MS 84 /* MS-PRO™ module */ +#define OMAP35XX_IRQ_RESERVED85 85 /* Reserved */ +#define OMAP35XX_IRQ_MMC2 86 /* MMC/SD module 2 */ +#define OMAP35XX_IRQ_MPU_ICR 87 /* MPU ICR */ +#define OMAP35XX_IRQ_RESERVED 88 /* RESERVED */ +#define OMAP35XX_IRQ_MCBSP3_TX 89 /* McBSP module 3 transmit(3) */ +#define OMAP35XX_IRQ_MCBSP3_RX 90 /* McBSP module 3 receive(3) */ +#define OMAP35XX_IRQ_SPI3 91 /* McSPI module 3 */ +#define OMAP35XX_IRQ_HSUSB_MC_NINT 92 /* High-Speed USB OTG controller */ +#define OMAP35XX_IRQ_HSUSB_DMA_NINT 93 /* High-Speed USB OTG DMA controller */ +#define OMAP35XX_IRQ_MMC3 94 /* MMC/SD module 3 */ +#define OMAP35XX_IRQ_GPT12 95 /* General-purpose timer module 12 */ + + + + +/* + * General Purpose Timers + */ +#define OMAP35XX_GPTIMER1_VBASE (OMAP35XX_L4_WAKEUP_VBASE + OMAP35XX_GPTIMER1_OFFSET) +#define OMAP35XX_GPTIMER1_HWBASE (OMAP35XX_L4_WAKEUP_HWBASE + OMAP35XX_GPTIMER1_OFFSET) +#define OMAP35XX_GPTIMER2_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER2_OFFSET) +#define OMAP35XX_GPTIMER2_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER2_OFFSET) +#define OMAP35XX_GPTIMER3_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER3_OFFSET) +#define OMAP35XX_GPTIMER3_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER3_OFFSET) +#define OMAP35XX_GPTIMER4_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER4_OFFSET) +#define OMAP35XX_GPTIMER4_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER4_OFFSET) +#define OMAP35XX_GPTIMER5_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER5_OFFSET) +#define OMAP35XX_GPTIMER5_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER5_OFFSET) +#define OMAP35XX_GPTIMER6_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER6_OFFSET) +#define OMAP35XX_GPTIMER6_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER6_OFFSET) +#define OMAP35XX_GPTIMER7_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER7_OFFSET) +#define OMAP35XX_GPTIMER7_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER7_OFFSET) +#define OMAP35XX_GPTIMER8_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER8_OFFSET) +#define OMAP35XX_GPTIMER8_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER8_OFFSET) +#define OMAP35XX_GPTIMER9_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPTIMER9_OFFSET) +#define OMAP35XX_GPTIMER9_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPTIMER9_OFFSET) +#define OMAP35XX_GPTIMER10_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_GPTIMER10_OFFSET) +#define OMAP35XX_GPTIMER10_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_GPTIMER10_OFFSET) +#define OMAP35XX_GPTIMER11_VBASE (OMAP35XX_L4_CORE_VBASE + OMAP35XX_GPTIMER11_OFFSET) +#define OMAP35XX_GPTIMER11_HWBASE (OMAP35XX_L4_CORE_HWBASE + OMAP35XX_GPTIMER11_OFFSET) +#define OMAP35XX_GPTIMER12_VBASE 0x48304000UL /* GPTIMER12 */ +#define OMAP35XX_GPTIMER_SIZE 0x00001000UL + + + +/* Timer register offsets */ +#define OMAP35XX_GPTIMER_TIOCP_CFG 0x010 +#define OMAP35XX_GPTIMER_TISTAT 0x014 +#define OMAP35XX_GPTIMER_TISR 0x018 +#define OMAP35XX_GPTIMER_TIER 0x01C +#define OMAP35XX_GPTIMER_TWER 0x020 +#define OMAP35XX_GPTIMER_TCLR 0x024 +#define OMAP35XX_GPTIMER_TCRR 0x028 +#define OMAP35XX_GPTIMER_TLDR 0x02C +#define OMAP35XX_GPTIMER_TTGR 0x030 +#define OMAP35XX_GPTIMER_TWPS 0x034 +#define OMAP35XX_GPTIMER_TMAR 0x038 +#define OMAP35XX_GPTIMER_TCAR1 0x03C +#define OMAP35XX_GPTIMER_TSICR 0x040 +#define OMAP35XX_GPTIMER_TCAR2 0x044 +#define OMAP35XX_GPTIMER_TPIR 0x048 +#define OMAP35XX_GPTIMER_TNIR 0x04C +#define OMAP35XX_GPTIMER_TCVR 0x050 +#define OMAP35XX_GPTIMER_TOCR 0x054 +#define OMAP35XX_GPTIMER_TOWR 0x058 + +/* Bit values */ +#define MAT_IT_FLAG 0x01 +#define OVF_IT_FLAG 0x02 +#define TCAR_IT_FLAG 0x04 + + + +/* + * GPIO - General Purpose IO + */ + +/* Base addresses for the GPIO modules */ +#define OMAP35XX_GPIO1_HWBASE (OMAP35XX_L4_WAKEUP_HWBASE + OMAP35XX_GPIO1_OFFSET) +#define OMAP35XX_GPIO1_VBASE (OMAP35XX_L4_WAKEUP_VBASE + OMAP35XX_GPIO1_OFFSET) +#define OMAP35XX_GPIO1_SIZE 0x00001000UL +#define OMAP35XX_GPIO2_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPIO2_OFFSET) +#define OMAP35XX_GPIO2_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPIO2_OFFSET) +#define OMAP35XX_GPIO2_SIZE 0x00001000UL +#define OMAP35XX_GPIO3_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPIO3_OFFSET) +#define OMAP35XX_GPIO3_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPIO3_OFFSET) +#define OMAP35XX_GPIO3_SIZE 0x00001000UL +#define OMAP35XX_GPIO4_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPIO4_OFFSET) +#define OMAP35XX_GPIO4_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPIO4_OFFSET) +#define OMAP35XX_GPIO4_SIZE 0x00001000UL +#define OMAP35XX_GPIO5_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPIO5_OFFSET) +#define OMAP35XX_GPIO5_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPIO5_OFFSET) +#define OMAP35XX_GPIO5_SIZE 0x00001000UL +#define OMAP35XX_GPIO6_HWBASE (OMAP35XX_L4_PERIPH_HWBASE + OMAP35XX_GPIO6_OFFSET) +#define OMAP35XX_GPIO6_VBASE (OMAP35XX_L4_PERIPH_VBASE + OMAP35XX_GPIO6_OFFSET) +#define OMAP35XX_GPIO6_SIZE 0x00001000UL + + + +/* Register offsets within the banks above */ +#define OMAP35XX_GPIO_SYSCONFIG 0x010 +#define OMAP35XX_GPIO_SYSSTATUS 0x014 +#define OMAP35XX_GPIO_IRQSTATUS1 0x018 +#define OMAP35XX_GPIO_IRQENABLE1 0x01C +#define OMAP35XX_GPIO_WAKEUPENABLE 0x020 +#define OMAP35XX_GPIO_IRQSTATUS2 0x028 +#define OMAP35XX_GPIO_IRQENABLE2 0x02C +#define OMAP35XX_GPIO_CTRL 0x030 +#define OMAP35XX_GPIO_OE 0x034 +#define OMAP35XX_GPIO_DATAIN 0x038 +#define OMAP35XX_GPIO_DATAOUT 0x03C +#define OMAP35XX_GPIO_LEVELDETECT0 0x040 +#define OMAP35XX_GPIO_LEVELDETECT1 0x044 +#define OMAP35XX_GPIO_RISINGDETECT 0x048 +#define OMAP35XX_GPIO_FALLINGDETECT 0x04C +#define OMAP35XX_GPIO_DEBOUNCENABLE 0x050 +#define OMAP35XX_GPIO_DEBOUNCINGTIME 0x054 +#define OMAP35XX_GPIO_CLEARIRQENABLE1 0x060 +#define OMAP35XX_GPIO_SETIRQENABLE1 0x064 +#define OMAP35XX_GPIO_CLEARIRQENABLE2 0x070 +#define OMAP35XX_GPIO_SETIRQENABLE2 0x074 +#define OMAP35XX_GPIO_CLEARWKUENA 0x080 +#define OMAP35XX_GPIO_SETWKUENA 0x084 +#define OMAP35XX_GPIO_CLEARDATAOUT 0x090 +#define OMAP35XX_GPIO_SETDATAOUT 0x094 + + +/* + * MMC/SD/SDIO + */ + +/* Base addresses for the MMC/SD/SDIO modules */ +#define OMAP35XX_MMCHS1_HWBASE (OMAP35XX_L4_CORE_HWBASE + 0x0009C000) +#define OMAP35XX_MMCHS1_VBASE (OMAP35XX_L4_CORE_VBASE + 0x0009C000) +#define OMAP35XX_MMCHS2_HWBASE (OMAP35XX_L4_CORE_HWBASE + 0x000B4000) +#define OMAP35XX_MMCHS2_VBASE (OMAP35XX_L4_CORE_VBASE + 0x000B4000) +#define OMAP35XX_MMCHS3_HWBASE (OMAP35XX_L4_CORE_HWBASE + 0x000AD000) +#define OMAP35XX_MMCHS3_VBASE (OMAP35XX_L4_CORE_VBASE + 0x000AD000) +#define OMAP35XX_MMCHS_SIZE 0x00000200UL + +/* Register offsets within each of the MMC/SD/SDIO controllers */ +#define OMAP35XX_MMCHS_SYSCONFIG 0x010 +#define OMAP35XX_MMCHS_SYSSTATUS 0x014 +#define OMAP35XX_MMCHS_CSRE 0x024 +#define OMAP35XX_MMCHS_SYSTEST 0x028 +#define OMAP35XX_MMCHS_CON 0x02C +#define OMAP35XX_MMCHS_PWCNT 0x030 +#define OMAP35XX_MMCHS_BLK 0x104 +#define OMAP35XX_MMCHS_ARG 0x108 +#define OMAP35XX_MMCHS_CMD 0x10C +#define OMAP35XX_MMCHS_RSP10 0x110 +#define OMAP35XX_MMCHS_RSP32 0x114 +#define OMAP35XX_MMCHS_RSP54 0x118 +#define OMAP35XX_MMCHS_RSP76 0x11C +#define OMAP35XX_MMCHS_DATA 0x120 +#define OMAP35XX_MMCHS_PSTATE 0x124 +#define OMAP35XX_MMCHS_HCTL 0x128 +#define OMAP35XX_MMCHS_SYSCTL 0x12C +#define OMAP35XX_MMCHS_STAT 0x130 +#define OMAP35XX_MMCHS_IE 0x134 +#define OMAP35XX_MMCHS_ISE 0x138 +#define OMAP35XX_MMCHS_AC12 0x13C +#define OMAP35XX_MMCHS_CAPA 0x140 +#define OMAP35XX_MMCHS_CUR_CAPA 0x148 +#define OMAP35XX_MMCHS_REV 0x1FC + + + +#endif /* _OMAP35XX_REG_H_ */ Added: projects/armv6/sys/arm/ti/omap4/files.omap4 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/omap4/files.omap4 Sat Feb 11 13:12:53 2012 (r231519) @@ -0,0 +1,29 @@ +#$FreeBSD$ + +kern/kern_clocksource.c standard + +arm/arm/bus_space_generic.c standard +arm/arm/bus_space_asm_generic.S standard +arm/arm/cpufunc_asm_armv5.S standard +arm/arm/cpufunc_asm_arm10.S standard +arm/arm/cpufunc_asm_arm11.S standard +arm/arm/cpufunc_asm_armv7.S standard +arm/arm/irq_dispatch.S standard + +arm/ti/bus_space.c standard +arm/ti/common.c standard +arm/ti/gic.c standard +arm/ti/mp_timer.c standard +arm/ti/omap_prcm.c standard +arm/ti/omap_scm.c standard +arm/ti/ti_cpuid.c standard +arm/ti/ti_machdep.c standard + +arm/ti/omap_gpio.c optional gpio +arm/ti/usb/omap_ehci.c optional usb ehci + +# arm/ti/omap4/omap4.c standard +arm/ti/omap4/omap4_prcm_clks.c standard +arm/ti/omap4/omap4_scm_padconf.c standard + +dev/uart/uart_dev_ns8250.c optional uart Added: projects/armv6/sys/arm/ti/omap4/omap4.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/armv6/sys/arm/ti/omap4/omap4.c Sat Feb 11 13:12:53 2012 (r231519) @@ -0,0 +1,438 @@ +/*- + * Copyright (c) 2011 + * Ben Gray . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include + +#define _ARM32_BUS_DMA_PRIVATE +#include + +#include +#include +#include +#include + +#include "omap_if.h" +#include "omap4_if.h" + +/* + * Standard priority levels for the system - 0 has the highest priority and 63 + * is the lowest. + * + * Currently these are all set to the same standard value. + */ +static const struct omap4_intr_conf omap4_irq_prio[] = +{ + { OMAP44XX_IRQ_L2CACHE, 0, 0x1}, /* L2 cache controller interrupt */ + { OMAP44XX_IRQ_CTI_0, 0, 0x1}, /* Cross-trigger module 0 (CTI0) interrupt */ + { OMAP44XX_IRQ_CTI_1, 0, 0x1}, /* Cross-trigger module 1 (CTI1) interrupt */ + { OMAP44XX_IRQ_ELM, 0, 0x1}, /* Error location process completion */ + { OMAP44XX_IRQ_SYS_NIRQ, 0, 0x1}, /* External source (active low) */ + { OMAP44XX_IRQ_L3_DBG, 0, 0x1}, /* L3 interconnect debug error */ + { OMAP44XX_IRQ_L3_APP, 0, 0x1}, /* L3 interconnect application error */ + { OMAP44XX_IRQ_PRCM_MPU, 0, 0x1}, /* PRCM module IRQ */ + { OMAP44XX_IRQ_SDMA0, 0, 0x1}, /* System DMA request 0(3) */ + { OMAP44XX_IRQ_SDMA1, 0, 0x1}, /* System DMA request 1(3) */ + { OMAP44XX_IRQ_SDMA2, 0, 0x1}, /* System DMA request 2 */ + { OMAP44XX_IRQ_SDMA3, 0, 0x1}, /* System DMA request 3 */ + { OMAP44XX_IRQ_MCBSP4, 0, 0x1}, /* McBSP module 4 IRQ */ + { OMAP44XX_IRQ_MCBSP1, 0, 0x1}, /* McBSP module 1 IRQ */ + { OMAP44XX_IRQ_SR1, 0, 0x1}, /* SmartReflex™ 1 */ + { OMAP44XX_IRQ_SR2, 0, 0x1}, /* SmartReflex™ 2 */ + { OMAP44XX_IRQ_GPMC, 0, 0x1}, /* General-purpose memory controller module */ + { OMAP44XX_IRQ_SGX, 0, 0x1}, /* 2D/3D graphics module */ + { OMAP44XX_IRQ_MCBSP2, 0, 0x1}, /* McBSP module 2 */ + { OMAP44XX_IRQ_MCBSP3, 0, 0x1}, /* McBSP module 3 */ + { OMAP44XX_IRQ_ISS5, 0, 0x1}, /* Imaging subsystem interrupt 5 */ + { OMAP44XX_IRQ_DSS, 0, 0x1}, /* Display subsystem module(3) */ + { OMAP44XX_IRQ_MAIL_U0, 0, 0x1}, /* Mailbox user 0 request */ + { OMAP44XX_IRQ_C2C_SSCM, 0, 0x1}, /* C2C status interrupt */ + { OMAP44XX_IRQ_DSP_MMU, 0, 0x1}, /* DSP MMU */ + { OMAP44XX_IRQ_GPIO1_MPU, 0, 0x1}, /* GPIO module 1(3) */ + { OMAP44XX_IRQ_GPIO2_MPU, 0, 0x1}, /* GPIO module 2(3) */ + { OMAP44XX_IRQ_GPIO3_MPU, 0, 0x1}, /* GPIO module 3(3) */ + { OMAP44XX_IRQ_GPIO4_MPU, 0, 0x1}, /* GPIO module 4(3) */ + { OMAP44XX_IRQ_GPIO5_MPU, 0, 0x1}, /* GPIO module 5(3) */ + { OMAP44XX_IRQ_GPIO6_MPU, 0, 0x1}, /* GPIO module 6(3) */ + { OMAP44XX_IRQ_WDT3, 0, 0x1}, /* Watchdog timer module 3 overflow */ + { OMAP44XX_IRQ_GPT1, 0, 0x1}, /* General-purpose timer module 1 */ + { OMAP44XX_IRQ_GPT2, 0, 0x1}, /* General-purpose timer module 2 */ + { OMAP44XX_IRQ_GPT3, 0, 0x1}, /* General-purpose timer module 3 */ + { OMAP44XX_IRQ_GPT4, 0, 0x1}, /* General-purpose timer module 4 */ + { OMAP44XX_IRQ_GPT5, 0, 0x1}, /* General-purpose timer module 5(3) */ + { OMAP44XX_IRQ_GPT6, 0, 0x1}, /* General-purpose timer module 6(3) */ + { OMAP44XX_IRQ_GPT7, 0, 0x1}, /* General-purpose timer module 7(3) */ + { OMAP44XX_IRQ_GPT8, 0, 0x1}, /* General-purpose timer module 8(3) */ + { OMAP44XX_IRQ_GPT9, 0, 0x1}, /* General-purpose timer module 9 */ + { OMAP44XX_IRQ_GPT10, 0, 0x1}, /* General-purpose timer module 10 */ + { OMAP44XX_IRQ_GPT11, 0, 0x1}, /* General-purpose timer module 11 */ + { OMAP44XX_IRQ_MCSPI4, 0, 0x1}, /* McSPI module 4 */ + { OMAP44XX_IRQ_DSS_DSI1, 0, 0x1}, /* Display Subsystem DSI1 interrupt */ + { OMAP44XX_IRQ_I2C1, 0, 0x1}, /* I2C module 1 */ + { OMAP44XX_IRQ_I2C2, 0, 0x1}, /* I2C module 2 */ + { OMAP44XX_IRQ_HDQ, 0, 0x1}, /* HDQ / One-wire */ + { OMAP44XX_IRQ_MMC5, 0, 0x1}, /* MMC5 interrupt */ + { OMAP44XX_IRQ_I2C3, 0, 0x1}, /* I2C module 3 */ + { OMAP44XX_IRQ_I2C4, 0, 0x1}, /* I2C module 4 */ + { OMAP44XX_IRQ_MCSPI1, 0, 0x1}, /* McSPI module 1 */ + { OMAP44XX_IRQ_MCSPI2, 0, 0x1}, /* McSPI module 2 */ + { OMAP44XX_IRQ_HSI_P1, 0, 0x1}, /* HSI Port 1 interrupt */ + { OMAP44XX_IRQ_HSI_P2, 0, 0x1}, /* HSI Port 2 interrupt */ + { OMAP44XX_IRQ_FDIF_3, 0, 0x1}, /* Face detect interrupt 3 */ + { OMAP44XX_IRQ_UART4, 0, 0x1}, /* UART module 4 interrupt */ + { OMAP44XX_IRQ_HSI_DMA, 0, 0x1}, /* HSI DMA engine MPU request */ + { OMAP44XX_IRQ_UART1, 0, 0x1}, /* UART module 1 */ + { OMAP44XX_IRQ_UART2, 0, 0x1}, /* UART module 2 */ + { OMAP44XX_IRQ_UART3, 0, 0x1}, /* UART module 3 (also infrared)(3) */ + { OMAP44XX_IRQ_PBIAS, 0, 0x1}, /* Merged interrupt for PBIASlite1 and 2 */ + { OMAP44XX_IRQ_OHCI, 0, 0x1}, /* OHCI controller HSUSB MP Host Interrupt */ + { OMAP44XX_IRQ_EHCI, 0, 0x1}, /* EHCI controller HSUSB MP Host Interrupt */ + { OMAP44XX_IRQ_TLL, 0, 0x1}, /* HSUSB MP TLL Interrupt */ + { OMAP44XX_IRQ_WDT2, 0, 0x1}, /* WDTIMER2 interrupt */ + { OMAP44XX_IRQ_MMC1, 0, 0x1}, /* MMC/SD module 1 */ + { OMAP44XX_IRQ_DSS_DSI2, 0, 0x1}, /* Display subsystem DSI2 interrupt */ + { OMAP44XX_IRQ_MMC2, 0, 0x1}, /* MMC/SD module 2 */ + { OMAP44XX_IRQ_MPU_ICR, 0, 0x1}, /* MPU ICR */ + { OMAP44XX_IRQ_C2C_GPI, 0, 0x1}, /* C2C GPI interrupt */ + { OMAP44XX_IRQ_FSUSB, 0, 0x1}, /* FS-USB - host controller Interrupt */ + { OMAP44XX_IRQ_FSUSB_SMI, 0, 0x1}, /* FS-USB - host controller SMI Interrupt */ + { OMAP44XX_IRQ_MCSPI3, 0, 0x1}, /* McSPI module 3 */ + { OMAP44XX_IRQ_HSUSB_OTG, 0, 0x1}, /* High-Speed USB OTG controller */ + { OMAP44XX_IRQ_HSUSB_OTG_DMA, 0, 0x1}, /* High-Speed USB OTG DMA controller */ + { OMAP44XX_IRQ_MMC3, 0, 0x1}, /* MMC/SD module 3 */ + { OMAP44XX_IRQ_MMC4, 0, 0x1}, /* MMC4 interrupt */ + { OMAP44XX_IRQ_SLIMBUS1, 0, 0x1}, /* SLIMBUS1 interrupt */ + { OMAP44XX_IRQ_SLIMBUS2, 0, 0x1}, /* SLIMBUS2 interrupt */ + { OMAP44XX_IRQ_ABE, 0, 0x1}, /* Audio back-end interrupt */ + { OMAP44XX_IRQ_CORTEXM3_MMU, 0, 0x1}, /* Cortex-M3 MMU interrupt */ + { OMAP44XX_IRQ_DSS_HDMI, 0, 0x1}, /* Display subsystem HDMI interrupt */ + { OMAP44XX_IRQ_SR_IVA, 0, 0x1}, /* SmartReflex IVA interrupt */ + { OMAP44XX_IRQ_IVAHD1, 0, 0x1}, /* Sync interrupt from iCONT2 (vDMA) */ + { OMAP44XX_IRQ_IVAHD2, 0, 0x1}, /* Sync interrupt from iCONT1 */ + { OMAP44XX_IRQ_IVAHD_MAILBOX0, 0, 0x1}, /* IVAHD mailbox interrupt */ *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***