From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:34 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4012DCD21CE; Sun, 5 Feb 2017 19:37:34 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E570E168C; Sun, 5 Feb 2017 19:37:33 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JbXs1038737; Sun, 5 Feb 2017 19:37:33 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbVg8038724; Sun, 5 Feb 2017 19:37:31 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbVg8038724@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:31 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313289 - in vendor/llvm/dist: lib/CodeGen/SelectionDAG lib/Transforms/InstCombine lib/Transforms/Scalar test/CodeGen/AMDGPU test/CodeGen/NVPTX test/CodeGen/PowerPC test/Object/Inputs t... X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:34 -0000 Author: dim Date: Sun Feb 5 19:37:31 2017 New Revision: 313289 URL: https://svnweb.freebsd.org/changeset/base/313289 Log: Vendor import of llvm release_40 branch r294123: https://llvm.org/svn/llvm-project/llvm/branches/release_40@294123 Added: vendor/llvm/dist/test/Object/Inputs/phdr-note.elf-x86-64 (contents, props changed) vendor/llvm/dist/test/Object/Inputs/phdrs.elf-x86-64 (contents, props changed) vendor/llvm/dist/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll vendor/llvm/dist/test/tools/llvm-objdump/X86/openbsd-headers.test vendor/llvm/dist/test/tools/llvm-objdump/X86/phdrs.test Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp vendor/llvm/dist/test/CodeGen/AMDGPU/fma-combine.ll vendor/llvm/dist/test/CodeGen/AMDGPU/mad-combine.ll vendor/llvm/dist/test/CodeGen/NVPTX/fma-assoc.ll vendor/llvm/dist/test/CodeGen/PowerPC/fma-assoc.ll vendor/llvm/dist/test/Transforms/InstCombine/minmax-fold.ll vendor/llvm/dist/tools/llvm-objdump/ELFDump.cpp vendor/llvm/dist/utils/release/test-release.sh Modified: vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Feb 5 19:37:31 2017 (r313289) @@ -8123,9 +8123,12 @@ SDValue DAGCombiner::visitFADDForFMAComb } // More folding opportunities when target permits. - if ((AllowFusion || HasFMAD) && Aggressive) { + if (Aggressive) { // fold (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y (fma u, v, z)) - if (N0.getOpcode() == PreferredFusedOpcode && + // FIXME: The UnsafeAlgebra flag should be propagated to FMA/FMAD, but FMF + // are currently only supported on binary nodes. + if (Options.UnsafeFPMath && + N0.getOpcode() == PreferredFusedOpcode && N0.getOperand(2).getOpcode() == ISD::FMUL && N0->hasOneUse() && N0.getOperand(2)->hasOneUse()) { return DAG.getNode(PreferredFusedOpcode, SL, VT, @@ -8137,7 +8140,10 @@ SDValue DAGCombiner::visitFADDForFMAComb } // fold (fadd x, (fma y, z, (fmul u, v)) -> (fma y, z (fma u, v, x)) - if (N1->getOpcode() == PreferredFusedOpcode && + // FIXME: The UnsafeAlgebra flag should be propagated to FMA/FMAD, but FMF + // are currently only supported on binary nodes. + if (Options.UnsafeFPMath && + N1->getOpcode() == PreferredFusedOpcode && N1.getOperand(2).getOpcode() == ISD::FMUL && N1->hasOneUse() && N1.getOperand(2)->hasOneUse()) { return DAG.getNode(PreferredFusedOpcode, SL, VT, @@ -8367,10 +8373,13 @@ SDValue DAGCombiner::visitFSUBForFMAComb } // More folding opportunities when target permits. - if ((AllowFusion || HasFMAD) && Aggressive) { + if (Aggressive) { // fold (fsub (fma x, y, (fmul u, v)), z) // -> (fma x, y (fma u, v, (fneg z))) - if (N0.getOpcode() == PreferredFusedOpcode && + // FIXME: The UnsafeAlgebra flag should be propagated to FMA/FMAD, but FMF + // are currently only supported on binary nodes. + if (Options.UnsafeFPMath && + N0.getOpcode() == PreferredFusedOpcode && N0.getOperand(2).getOpcode() == ISD::FMUL && N0->hasOneUse() && N0.getOperand(2)->hasOneUse()) { return DAG.getNode(PreferredFusedOpcode, SL, VT, @@ -8384,7 +8393,10 @@ SDValue DAGCombiner::visitFSUBForFMAComb // fold (fsub x, (fma y, z, (fmul u, v))) // -> (fma (fneg y), z, (fma (fneg u), v, x)) - if (N1.getOpcode() == PreferredFusedOpcode && + // FIXME: The UnsafeAlgebra flag should be propagated to FMA/FMAD, but FMF + // are currently only supported on binary nodes. + if (Options.UnsafeFPMath && + N1.getOpcode() == PreferredFusedOpcode && N1.getOperand(2).getOpcode() == ISD::FMUL) { SDValue N20 = N1.getOperand(2).getOperand(0); SDValue N21 = N1.getOperand(2).getOperand(1); Modified: vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp ============================================================================== --- vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp Sun Feb 5 19:37:31 2017 (r313289) @@ -4039,11 +4039,6 @@ Instruction *InstCombiner::foldICmpUsing Constant *CMinus1 = ConstantInt::get(Op0->getType(), *CmpC - 1); return new ICmpInst(ICmpInst::ICMP_EQ, Op0, CMinus1); } - // (x (x >s -1) -> true if sign bit clear - if (CmpC->isMinSignedValue()) { - Constant *AllOnes = Constant::getAllOnesValue(Op0->getType()); - return new ICmpInst(ICmpInst::ICMP_SGT, Op0, AllOnes); - } } break; } @@ -4063,11 +4058,6 @@ Instruction *InstCombiner::foldICmpUsing if (*CmpC == Op0Max - 1) return new ICmpInst(ICmpInst::ICMP_EQ, Op0, ConstantInt::get(Op1->getType(), *CmpC + 1)); - - // (x >u 2147483647) -> (x true if sign bit set - if (CmpC->isMaxSignedValue()) - return new ICmpInst(ICmpInst::ICMP_SLT, Op0, - Constant::getNullValue(Op0->getType())); } break; } @@ -4299,6 +4289,27 @@ Instruction *InstCombiner::visitICmpInst (SI->getOperand(2) == Op0 && SI->getOperand(1) == Op1)) return nullptr; + // FIXME: We only do this after checking for min/max to prevent infinite + // looping caused by a reverse canonicalization of these patterns for min/max. + // FIXME: The organization of folds is a mess. These would naturally go into + // canonicalizeCmpWithConstant(), but we can't move all of the above folds + // down here after the min/max restriction. + ICmpInst::Predicate Pred = I.getPredicate(); + const APInt *C; + if (match(Op1, m_APInt(C))) { + // For i32: x >u 2147483647 -> x true if sign bit set + if (Pred == ICmpInst::ICMP_UGT && C->isMaxSignedValue()) { + Constant *Zero = Constant::getNullValue(Op0->getType()); + return new ICmpInst(ICmpInst::ICMP_SLT, Op0, Zero); + } + + // For i32: x x >s -1 -> true if sign bit clear + if (Pred == ICmpInst::ICMP_ULT && C->isMinSignedValue()) { + Constant *AllOnes = Constant::getAllOnesValue(Op0->getType()); + return new ICmpInst(ICmpInst::ICMP_SGT, Op0, AllOnes); + } + } + if (Instruction *Res = foldICmpInstWithConstant(I)) return Res; Modified: vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp ============================================================================== --- vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/lib/Transforms/Scalar/LoopStrengthReduce.cpp Sun Feb 5 19:37:31 2017 (r313289) @@ -158,8 +158,9 @@ struct MemAccessTy { bool operator!=(MemAccessTy Other) const { return !(*this == Other); } - static MemAccessTy getUnknown(LLVMContext &Ctx) { - return MemAccessTy(Type::getVoidTy(Ctx), UnknownAddressSpace); + static MemAccessTy getUnknown(LLVMContext &Ctx, + unsigned AS = UnknownAddressSpace) { + return MemAccessTy(Type::getVoidTy(Ctx), AS); } }; @@ -2279,8 +2280,10 @@ bool LSRInstance::reconcileNewOffset(LSR // TODO: Be less conservative when the type is similar and can use the same // addressing modes. if (Kind == LSRUse::Address) { - if (AccessTy != LU.AccessTy) - NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext()); + if (AccessTy.MemTy != LU.AccessTy.MemTy) { + NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext(), + AccessTy.AddrSpace); + } } // Conservatively assume HasBaseReg is true for now. Modified: vendor/llvm/dist/test/CodeGen/AMDGPU/fma-combine.ll ============================================================================== --- vendor/llvm/dist/test/CodeGen/AMDGPU/fma-combine.ll Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/test/CodeGen/AMDGPU/fma-combine.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -1,6 +1,6 @@ -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI-NOFMA -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI-NOFMA -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast -enable-no-infs-fp-math -mattr=+fp32-denormals < %s | FileCheck -check-prefix=SI-FMA -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI-NOFMA -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI-NOFMA -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast -enable-no-infs-fp-math -enable-unsafe-fp-math -mattr=+fp32-denormals < %s | FileCheck -check-prefix=SI-FMA -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s ; Note: The SI-FMA conversions of type x * (y + 1) --> x * y + x would be ; beneficial even without fp32 denormals, but they do require no-infs-fp-math @@ -308,8 +308,14 @@ define void @combine_to_fma_fsub_2_f64_2 ; SI-DAG: buffer_load_dwordx2 [[Z:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16{{$}} ; SI-DAG: buffer_load_dwordx2 [[U:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:24{{$}} ; SI-DAG: buffer_load_dwordx2 [[V:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:32{{$}} -; SI: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], [[U]], [[V]], -[[Z]] -; SI: v_fma_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[X]], [[Y]], [[FMA0]] + +; SI-SAFE: v_mul_f64 [[TMP0:v\[[0-9]+:[0-9]+\]]], [[U]], [[V]] +; SI-SAFE: v_fma_f64 [[TMP1:v\[[0-9]+:[0-9]+\]]], [[X]], [[Y]], [[TMP0]] +; SI-SAFE: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[TMP1]], -[[Z]] + +; SI-UNSAFE: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], [[U]], [[V]], -[[Z]] +; SI-UNSAFE: v_fma_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[X]], [[Y]], [[FMA0]] + ; SI: buffer_store_dwordx2 [[RESULT]] define void @aggressive_combine_to_fma_fsub_0_f64(double addrspace(1)* noalias %out, double addrspace(1)* noalias %in) #1 { %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0 @@ -343,8 +349,14 @@ define void @aggressive_combine_to_fma_f ; SI-DAG: buffer_load_dwordx2 [[Z:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16{{$}} ; SI-DAG: buffer_load_dwordx2 [[U:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:24{{$}} ; SI-DAG: buffer_load_dwordx2 [[V:v\[[0-9]+:[0-9]+\]]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:32{{$}} -; SI: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[U]], [[V]], [[X]] -; SI: v_fma_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], -[[Y]], [[Z]], [[FMA0]] + +; SI-SAFE: v_mul_f64 [[TMP0:v\[[0-9]+:[0-9]+\]]], [[U]], [[V]] +; SI-SAFE: v_fma_f64 [[TMP1:v\[[0-9]+:[0-9]+\]]], [[Y]], [[Z]], [[TMP0]] +; SI-SAFE: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[X]], -[[TMP1]] + +; SI-UNSAFE: v_fma_f64 [[FMA0:v\[[0-9]+:[0-9]+\]]], -[[U]], [[V]], [[X]] +; SI-UNSAFE: v_fma_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], -[[Y]], [[Z]], [[FMA0]] + ; SI: buffer_store_dwordx2 [[RESULT]] define void @aggressive_combine_to_fma_fsub_1_f64(double addrspace(1)* noalias %out, double addrspace(1)* noalias %in) #1 { %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0 Modified: vendor/llvm/dist/test/CodeGen/AMDGPU/mad-combine.ll ============================================================================== --- vendor/llvm/dist/test/CodeGen/AMDGPU/mad-combine.ll Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/test/CodeGen/AMDGPU/mad-combine.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -1,12 +1,12 @@ ; Make sure we still form mad even when unsafe math or fp-contract is allowed instead of fma. -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=FUNC %s -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=FUNC %s -; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=SI-STD-SAFE -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -fp-contract=fast < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=SI-STD-SAFE -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-STD -check-prefix=SI-STD-UNSAFE -check-prefix=FUNC %s ; Make sure we don't form mad with denormals -; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-DENORM -check-prefix=FUNC %s -; RUN: llc -march=amdgcn -mcpu=verde -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-DENORM-SLOWFMAF -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-DENORM -check-prefix=SI-DENORM-FASTFMAF -check-prefix=FUNC %s +; RUN: llc -march=amdgcn -mcpu=verde -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-DENORM -check-prefix=SI-DENORM-SLOWFMAF -check-prefix=FUNC %s declare i32 @llvm.amdgcn.workitem.id.x() #0 declare float @llvm.fabs.f32(float) #0 @@ -21,7 +21,7 @@ declare float @llvm.fmuladd.f32(float, f ; SI-STD: v_mac_f32_e32 [[C]], [[B]], [[A]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[C]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[C]] ; SI-DENORM-SLOWFMAF-NOT: v_fma ; SI-DENORM-SLOWFMAF-NOT: v_mad @@ -58,8 +58,8 @@ define void @combine_to_mad_f32_0(float ; SI-STD-DAG: v_mac_f32_e32 [[C]], [[B]], [[A]] ; SI-STD-DAG: v_mac_f32_e32 [[D]], [[B]], [[A]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[A]], [[B]], [[C]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], [[D]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[A]], [[B]], [[C]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], [[D]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF-DAG: v_add_f32_e32 [[RESULT0:v[0-9]+]], [[C]], [[TMP]] @@ -100,7 +100,7 @@ define void @combine_to_mad_f32_0_2use(f ; SI-DAG: buffer_load_dword [[C:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8{{$}} ; SI-STD: v_mac_f32_e32 [[C]], [[B]], [[A]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[C]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[C]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF: v_add_f32_e32 [[RESULT:v[0-9]+]], [[TMP]], [[C]] @@ -131,7 +131,7 @@ define void @combine_to_mad_f32_1(float ; SI-DAG: buffer_load_dword [[C:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8{{$}} ; SI-STD: v_mad_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], -[[C]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], -[[C]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], -[[C]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP]] @@ -164,8 +164,8 @@ define void @combine_to_mad_fsub_0_f32(f ; SI-STD-DAG: v_mad_f32 [[RESULT0:v[0-9]+]], [[A]], [[B]], -[[C]] ; SI-STD-DAG: v_mad_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[A]], [[B]], -[[C]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[A]], [[B]], -[[C]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF-DAG: v_subrev_f32_e32 [[RESULT0:v[0-9]+]], [[C]], [[TMP]] @@ -203,7 +203,7 @@ define void @combine_to_mad_fsub_0_f32_2 ; SI-DAG: buffer_load_dword [[C:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8{{$}} ; SI-STD: v_mad_f32 [[RESULT:v[0-9]+]], -[[A]], [[B]], [[C]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], -[[A]], [[B]], [[C]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[RESULT:v[0-9]+]], -[[A]], [[B]], [[C]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP]], [[C]] @@ -235,8 +235,8 @@ define void @combine_to_mad_fsub_1_f32(f ; SI-STD-DAG: v_mad_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], [[C]] ; SI-STD-DAG: v_mad_f32 [[RESULT1:v[0-9]+]], -[[A]], [[B]], [[D]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], [[C]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], -[[A]], [[B]], [[D]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], [[C]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], -[[A]], [[B]], [[D]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF-DAG: v_subrev_f32_e32 [[RESULT0:v[0-9]+]], [[TMP]], [[C]] @@ -275,7 +275,7 @@ define void @combine_to_mad_fsub_1_f32_2 ; SI-STD: v_mad_f32 [[RESULT:v[0-9]+]], [[A]], -[[B]], -[[C]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], -[[A]], [[B]], -[[C]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[RESULT:v[0-9]+]], -[[A]], [[B]], -[[C]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e64 [[TMP:v[0-9]+]], [[A]], -[[B]] ; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP]] @@ -309,8 +309,8 @@ define void @combine_to_mad_fsub_2_f32(f ; SI-STD-DAG: v_mad_f32 [[RESULT0:v[0-9]+]], [[A]], -[[B]], -[[C]] ; SI-STD-DAG: v_mad_f32 [[RESULT1:v[0-9]+]], [[A]], -[[B]], -[[D]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], -[[C]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], -[[A]], [[B]], -[[D]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], -[[C]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], -[[A]], [[B]], -[[D]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e64 [[TMP:v[0-9]+]], [[A]], -[[B]] ; SI-DENORM-SLOWFMAF-DAG: v_subrev_f32_e32 [[RESULT0:v[0-9]+]], [[C]], [[TMP]] @@ -352,8 +352,8 @@ define void @combine_to_mad_fsub_2_f32_2 ; SI-STD-DAG: v_mad_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], -[[C]] ; SI-STD-DAG: v_mad_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], -[[C]] -; SI-DENORM-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], -[[A]], [[B]], -[[C]] +; SI-DENORM-FASTFMAF-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[A]], [[B]], -[[D]] ; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF-DAG: v_sub_f32_e64 [[RESULT0:v[0-9]+]], -[[TMP]], [[C]] @@ -399,12 +399,9 @@ define void @combine_to_mad_fsub_2_f32_2 ; SI-STD: v_fma_f32 [[TMP1:v[0-9]+]], [[A]], [[B]], [[TMP0]] ; SI-STD: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP1]] -; SI-DENORM: v_fma_f32 [[TMP0:v[0-9]+]], [[D]], [[E]], -[[C]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[TMP0]] - -; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] -; SI-DENORM-SLOWFMAF: v_fma_f32 [[TMP1:v[0-9]+]], [[A]], [[B]], [[TMP0]] -; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT1:v[0-9]+]], [[C]], [[TMP1]] +; SI-DENORM: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-DENORM: v_fma_f32 [[TMP1:v[0-9]+]], [[A]], [[B]], [[TMP0]] +; SI-DENORM: v_subrev_f32_e32 [[RESULT1:v[0-9]+]], [[C]], [[TMP1]] ; SI: buffer_store_dword [[RESULT]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} define void @aggressive_combine_to_mad_fsub_0_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in) #1 { @@ -444,12 +441,9 @@ define void @aggressive_combine_to_mad_f ; SI-STD: v_fma_f32 [[TMP1:v[0-9]+]], [[B]], [[C]], [[TMP0]] ; SI-STD: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP1]], [[A]] -; SI-DENORM: v_fma_f32 [[TMP0:v[0-9]+]], -[[D]], [[E]], [[A]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], -[[B]], [[C]], [[TMP0]] - -; SI-DENORM-SLOWFMAF: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] -; SI-DENORM-SLOWFMAF: v_fma_f32 [[TMP1:v[0-9]+]], [[B]], [[C]], [[TMP0]] -; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP1]], [[A]] +; SI-DENORM: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-DENORM: v_fma_f32 [[TMP1:v[0-9]+]], [[B]], [[C]], [[TMP0]] +; SI-DENORM: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP1]], [[A]] ; SI: buffer_store_dword [[RESULT]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; SI: s_endpgm @@ -485,19 +479,23 @@ define void @aggressive_combine_to_mad_f ; SI-DAG: buffer_load_dword [[D:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:12{{$}} ; SI-DAG: buffer_load_dword [[E:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16{{$}} -; SI-STD: v_mad_f32 [[TMP:v[0-9]+]], [[D]], [[E]], -[[C]] -; SI-STD: v_mac_f32_e32 [[TMP]], [[B]], [[A]] - -; SI-DENORM: v_fma_f32 [[TMP:v[0-9]+]], [[D]], [[E]], -[[C]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], [[A]], [[B]], [[TMP]] +; SI-STD-SAFE: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-STD-SAFE: v_mac_f32_e32 [[TMP0]], [[B]], [[A]] +; SI-STD-SAFE: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP0]] + +; SI-STD-UNSAFE: v_mad_f32 [[RESULT:v[0-9]+]], [[D]], [[E]], -[[C]] +; SI-STD-UNSAFE: v_mac_f32_e32 [[RESULT]], [[B]], [[A]] + +; SI-DENORM-FASTFMAF: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[TMP1:v[0-9]+]], [[A]], [[B]], [[TMP0]] +; SI-DENORM-FASTFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP1]] ; SI-DENORM-SLOWFMAF-DAG: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] ; SI-DENORM-SLOWFMAF-DAG: v_mul_f32_e32 [[TMP1:v[0-9]+]], [[B]], [[A]] ; SI-DENORM-SLOWFMAF: v_add_f32_e32 [[TMP2:v[0-9]+]], [[TMP0]], [[TMP1]] ; SI-DENORM-SLOWFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[C]], [[TMP2]] -; SI-DENORM: buffer_store_dword [[RESULT]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} -; SI-STD: buffer_store_dword [[TMP]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} +; SI: buffer_store_dword [[RESULT]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} ; SI: s_endpgm define void @aggressive_combine_to_mad_fsub_2_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in) #1 { %tid = tail call i32 @llvm.amdgcn.workitem.id.x() #0 @@ -532,11 +530,16 @@ define void @aggressive_combine_to_mad_f ; SI-DAG: buffer_load_dword [[D:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:12{{$}} ; SI-DAG: buffer_load_dword [[E:v[0-9]+]], v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:16{{$}} -; SI-STD: v_mad_f32 [[TMP:v[0-9]+]], -[[D]], [[E]], [[A]] -; SI-STD: v_mad_f32 [[RESULT:v[0-9]+]], -[[B]], [[C]], [[TMP]] - -; SI-DENORM: v_fma_f32 [[TMP:v[0-9]+]], -[[D]], [[E]], [[A]] -; SI-DENORM: v_fma_f32 [[RESULT:v[0-9]+]], -[[B]], [[C]], [[TMP]] +; SI-STD-SAFE: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-STD-SAFE: v_mac_f32_e32 [[TMP0]], [[C]], [[B]] +; SI-STD-SAFE: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP0]], [[A]] + +; SI-STD-UNSAFE: v_mad_f32 [[TMP:v[0-9]+]], -[[D]], [[E]], [[A]] +; SI-STD-UNSAFE: v_mad_f32 [[RESULT:v[0-9]+]], -[[B]], [[C]], [[TMP]] + +; SI-DENORM-FASTFMAF: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] +; SI-DENORM-FASTFMAF: v_fma_f32 [[TMP1:v[0-9]+]], [[B]], [[C]], [[TMP0]] +; SI-DENORM-FASTFMAF: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[TMP1]], [[A]] ; SI-DENORM-SLOWFMAF-DAG: v_mul_f32_e32 [[TMP0:v[0-9]+]], [[E]], [[D]] ; SI-DENORM-SLOWFMAF-DAG: v_mul_f32_e32 [[TMP1:v[0-9]+]], [[C]], [[B]] Modified: vendor/llvm/dist/test/CodeGen/NVPTX/fma-assoc.ll ============================================================================== --- vendor/llvm/dist/test/CodeGen/NVPTX/fma-assoc.ll Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/test/CodeGen/NVPTX/fma-assoc.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -1,9 +1,10 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_20 -fp-contract=fast | FileCheck %s +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -fp-contract=fast | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -fp-contract=fast -enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-UNSAFE define ptx_device float @t1_f32(float %x, float %y, float %z, float %u, float %v) { -; CHECK: fma.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; -; CHECK: fma.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK-UNSAFE: fma.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; +; CHECK-UNSAFE: fma.rn.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}; ; CHECK: ret; %a = fmul float %x, %y %b = fmul float %u, %v @@ -14,8 +15,8 @@ define ptx_device float @t1_f32(float %x define ptx_device double @t1_f64(double %x, double %y, double %z, double %u, double %v) { -; CHECK: fma.rn.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; -; CHECK: fma.rn.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK-UNSAFE: fma.rn.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; +; CHECK-UNSAFE: fma.rn.f64 %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}; ; CHECK: ret; %a = fmul double %x, %y %b = fmul double %u, %v Modified: vendor/llvm/dist/test/CodeGen/PowerPC/fma-assoc.ll ============================================================================== --- vendor/llvm/dist/test/CodeGen/PowerPC/fma-assoc.ll Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/test/CodeGen/PowerPC/fma-assoc.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -1,5 +1,7 @@ -; RUN: llc -verify-machineinstrs < %s -march=ppc32 -fp-contract=fast -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s -; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -fp-contract=fast -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX %s +; RUN: llc -verify-machineinstrs < %s -march=ppc32 -fp-contract=fast -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SAFE %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -fp-contract=fast -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX -check-prefix=CHECK-VSX-SAFE %s +; RUN: llc -verify-machineinstrs < %s -march=ppc32 -fp-contract=fast -enable-unsafe-fp-math -mattr=-vsx -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK -check-prefix=CHECK-UNSAFE %s +; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -fp-contract=fast -enable-unsafe-fp-math -mattr=+vsx -mcpu=pwr7 -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX -check-prefix=CHECK-UNSAFE-VSX %s define double @test_FMADD_ASSOC1(double %A, double %B, double %C, double %D, double %E) { @@ -8,16 +10,28 @@ define double @test_FMADD_ASSOC1(double %H = fadd double %F, %G ; [#uses=1] %I = fadd double %H, %E ; [#uses=1] ret double %I -; CHECK-LABEL: test_FMADD_ASSOC1: -; CHECK: fmadd -; CHECK-NEXT: fmadd -; CHECK-NEXT: blr - -; CHECK-VSX-LABEL: test_FMADD_ASSOC1: -; CHECK-VSX: xsmaddmdp -; CHECK-VSX-NEXT: xsmaddadp -; CHECK-VSX-NEXT: fmr -; CHECK-VSX-NEXT: blr +; CHECK-SAFE-LABEL: test_FMADD_ASSOC1: +; CHECK-SAFE: fmul +; CHECK-SAFE-NEXT: fmadd +; CHECK-SAFE-NEXT: fadd +; CHECK-SAFE-NEXT: blr + +; CHECK-UNSAFE-LABEL: test_FMADD_ASSOC1: +; CHECK-UNSAFE: fmadd +; CHECK-UNSAFE-NEXT: fmadd +; CHECK-UNSAFE-NEXT: blr + +; CHECK-VSX-SAFE-LABEL: test_FMADD_ASSOC1: +; CHECK-VSX-SAFE: xsmuldp +; CHECK-VSX-SAFE-NEXT: xsmaddadp +; CHECK-VSX-SAFE-NEXT: xsadddp +; CHECK-VSX-SAFE-NEXT: blr + +; CHECK-VSX-UNSAFE-LABEL: test_FMADD_ASSOC1: +; CHECK-VSX-UNSAFE: xsmaddmdp +; CHECK-VSX-UNSAFE-NEXT: xsmaddadp +; CHECK-VSX-UNSAFE-NEXT: fmr +; CHECK-VSX-UNSAFE-NEXT: blr } define double @test_FMADD_ASSOC2(double %A, double %B, double %C, @@ -27,16 +41,28 @@ define double @test_FMADD_ASSOC2(double %H = fadd double %F, %G ; [#uses=1] %I = fadd double %E, %H ; [#uses=1] ret double %I -; CHECK-LABEL: test_FMADD_ASSOC2: -; CHECK: fmadd -; CHECK-NEXT: fmadd -; CHECK-NEXT: blr - -; CHECK-VSX-LABEL: test_FMADD_ASSOC2: -; CHECK-VSX: xsmaddmdp -; CHECK-VSX-NEXT: xsmaddadp -; CHECK-VSX-NEXT: fmr -; CHECK-VSX-NEXT: blr +; CHECK-SAFE-LABEL: test_FMADD_ASSOC2: +; CHECK-SAFE: fmul +; CHECK-SAFE-NEXT: fmadd +; CHECK-SAFE-NEXT: fadd +; CHECK-SAFE-NEXT: blr + +; CHECK-UNSAFE-LABEL: test_FMADD_ASSOC2: +; CHECK-UNSAFE: fmadd +; CHECK-UNSAFE-NEXT: fmadd +; CHECK-UNSAFE-NEXT: blr + +; CHECK-VSX-SAFE-LABEL: test_FMADD_ASSOC2: +; CHECK-VSX-SAFE: xsmuldp +; CHECK-VSX-SAFE-NEXT: xsmaddadp +; CHECK-VSX-SAFE-NEXT: xsadddp +; CHECK-VSX-SAFE-NEXT: blr + +; CHECK-VSX-UNSAFE-LABEL: test_FMADD_ASSOC2: +; CHECK-VSX-UNSAFE: xsmaddmdp +; CHECK-VSX-UNSAFE-NEXT: xsmaddadp +; CHECK-VSX-UNSAFE-NEXT: fmr +; CHECK-VSX-UNSAFE-NEXT: blr } define double @test_FMSUB_ASSOC1(double %A, double %B, double %C, @@ -46,16 +72,28 @@ define double @test_FMSUB_ASSOC1(double %H = fadd double %F, %G ; [#uses=1] %I = fsub double %H, %E ; [#uses=1] ret double %I -; CHECK-LABEL: test_FMSUB_ASSOC1: -; CHECK: fmsub -; CHECK-NEXT: fmadd -; CHECK-NEXT: blr - -; CHECK-VSX-LABEL: test_FMSUB_ASSOC1: -; CHECK-VSX: xsmsubmdp -; CHECK-VSX-NEXT: xsmaddadp -; CHECK-VSX-NEXT: fmr -; CHECK-VSX-NEXT: blr +; CHECK-SAFE-LABEL: test_FMSUB_ASSOC1: +; CHECK-SAFE: fmul +; CHECK-SAFE-NEXT: fmadd +; CHECK-SAFE-NEXT: fsub +; CHECK-SAFE-NEXT: blr + +; CHECK-UNSAFE-LABEL: test_FMSUB_ASSOC1: +; CHECK-UNSAFE: fmsub +; CHECK-UNSAFE-NEXT: fmadd +; CHECK-UNSAFE-NEXT: blr + +; CHECK-SAFE-VSX-LABEL: test_FMSUB_ASSOC1: +; CHECK-SAFE-VSX: xsmuldp +; CHECK-SAFE-VSX-NEXT: xsmaddadp +; CHECK-SAFE-VSX-NEXT: xssubdp +; CHECK-SAFE-VSX-NEXT: blr + +; CHECK-UNSAFE-VSX-LABEL: test_FMSUB_ASSOC1: +; CHECK-UNSAFE-VSX: xsmsubmdp +; CHECK-UNSAFE-VSX-NEXT: xsmaddadp +; CHECK-UNSAFE-VSX-NEXT: fmr +; CHECK-UNSAFE-VSX-NEXT: blr } define double @test_FMSUB_ASSOC2(double %A, double %B, double %C, @@ -65,16 +103,28 @@ define double @test_FMSUB_ASSOC2(double %H = fadd double %F, %G ; [#uses=1] %I = fsub double %E, %H ; [#uses=1] ret double %I -; CHECK-LABEL: test_FMSUB_ASSOC2: -; CHECK: fnmsub -; CHECK-NEXT: fnmsub -; CHECK-NEXT: blr - -; CHECK-VSX-LABEL: test_FMSUB_ASSOC2: -; CHECK-VSX: xsnmsubmdp -; CHECK-VSX-NEXT: xsnmsubadp -; CHECK-VSX-NEXT: fmr -; CHECK-VSX-NEXT: blr +; CHECK-SAFE-LABEL: test_FMSUB_ASSOC2: +; CHECK-SAFE: fmul +; CHECK-SAFE-NEXT: fmadd +; CHECK-SAFE-NEXT: fsub +; CHECK-SAFE-NEXT: blr + +; CHECK-UNSAFE-LABEL: test_FMSUB_ASSOC2: +; CHECK-UNSAFE: fnmsub +; CHECK-UNSAFE-NEXT: fnmsub +; CHECK-UNSAFE-NEXT: blr + +; CHECK-SAFE-VSX-LABEL: test_FMSUB_ASSOC2: +; CHECK-SAFE-VSX: xsmuldp +; CHECK-SAFE-VSX-NEXT: xsmaddadp +; CHECK-SAFE-VSX-NEXT: xssubdp +; CHECK-SAFE-VSX-NEXT: blr + +; CHECK-UNSAFE-VSX-LABEL: test_FMSUB_ASSOC2: +; CHECK-UNSAFE-VSX: xsnmsubmdp +; CHECK-UNSAFE-VSX-NEXT: xsnmsubadp +; CHECK-UNSAFE-VSX-NEXT: fmr +; CHECK-UNSAFE-VSX-NEXT: blr } define double @test_FMADD_ASSOC_EXT1(float %A, float %B, double %C, Added: vendor/llvm/dist/test/Object/Inputs/phdr-note.elf-x86-64 ============================================================================== Binary file. No diff available. Added: vendor/llvm/dist/test/Object/Inputs/phdrs.elf-x86-64 ============================================================================== Binary file. No diff available. Modified: vendor/llvm/dist/test/Transforms/InstCombine/minmax-fold.ll ============================================================================== --- vendor/llvm/dist/test/Transforms/InstCombine/minmax-fold.ll Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/test/Transforms/InstCombine/minmax-fold.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -339,3 +339,84 @@ define i32 @test75(i32 %x) { ret i32 %retval } +; The next 3 min tests should canonicalize to the same form...and not infinite loop. + +define double @PR31751_umin1(i32 %x) { +; CHECK-LABEL: @PR31751_umin1( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %x, 2147483647 +; CHECK-NEXT: [[CONV1:%.*]] = select i1 [[TMP1]], i32 %x, i32 2147483647 +; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[CONV1]] to double +; CHECK-NEXT: ret double [[TMP2]] +; + %cmp = icmp slt i32 %x, 0 + %sel = select i1 %cmp, i32 2147483647, i32 %x + %conv = sitofp i32 %sel to double + ret double %conv +} + +define double @PR31751_umin2(i32 %x) { +; CHECK-LABEL: @PR31751_umin2( +; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 2147483647 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647 +; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double +; CHECK-NEXT: ret double [[CONV]] +; + %cmp = icmp ult i32 %x, 2147483647 + %sel = select i1 %cmp, i32 %x, i32 2147483647 + %conv = sitofp i32 %sel to double + ret double %conv +} + +define double @PR31751_umin3(i32 %x) { +; CHECK-LABEL: @PR31751_umin3( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %x, 2147483647 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 %x, i32 2147483647 +; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double +; CHECK-NEXT: ret double [[CONV]] +; + %cmp = icmp ugt i32 %x, 2147483647 + %sel = select i1 %cmp, i32 2147483647, i32 %x + %conv = sitofp i32 %sel to double + ret double %conv +} + +; The next 3 max tests should canonicalize to the same form...and not infinite loop. + +define double @PR31751_umax1(i32 %x) { +; CHECK-LABEL: @PR31751_umax1( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 %x, -2147483648 +; CHECK-NEXT: [[CONV1:%.*]] = select i1 [[TMP1]], i32 %x, i32 -2147483648 +; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[CONV1]] to double +; CHECK-NEXT: ret double [[TMP2]] +; + %cmp = icmp sgt i32 %x, -1 + %sel = select i1 %cmp, i32 2147483648, i32 %x + %conv = sitofp i32 %sel to double + ret double %conv +} + +define double @PR31751_umax2(i32 %x) { +; CHECK-LABEL: @PR31751_umax2( +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, -2147483648 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648 +; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double +; CHECK-NEXT: ret double [[CONV]] +; + %cmp = icmp ugt i32 %x, 2147483648 + %sel = select i1 %cmp, i32 %x, i32 2147483648 + %conv = sitofp i32 %sel to double + ret double %conv +} + +define double @PR31751_umax3(i32 %x) { +; CHECK-LABEL: @PR31751_umax3( +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 %x, -2147483648 +; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 %x, i32 -2147483648 +; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double +; CHECK-NEXT: ret double [[CONV]] +; + %cmp = icmp ult i32 %x, 2147483648 + %sel = select i1 %cmp, i32 2147483648, i32 %x + %conv = sitofp i32 %sel to double + ret double %conv +} Added: vendor/llvm/dist/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/llvm/dist/test/Transforms/LoopStrengthReduce/AMDGPU/preserve-addrspace-assert.ll Sun Feb 5 19:37:31 2017 (r313289) @@ -0,0 +1,54 @@ +; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -loop-reduce %s | FileCheck %s + +; Test for assert resulting from inconsistent isLegalAddressingMode +; answers when the address space was dropped from the query. + +target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" + +%0 = type { i32, double, i32, float } + +; CHECK-LABEL: @lsr_crash_preserve_addrspace_unknown_type( +; CHECK: %tmp4 = bitcast %0 addrspace(3)* %tmp to double addrspace(3)* +; CHECK: %scevgep5 = getelementptr double, double addrspace(3)* %tmp4, i32 1 +; CHEC: load double, double addrspace(3)* %scevgep5 + +; CHECK: %scevgep = getelementptr i32, i32 addrspace(3)* %tmp1, i32 4 +; CHECK:%tmp14 = load i32, i32 addrspace(3)* %scevgep +define void @lsr_crash_preserve_addrspace_unknown_type() #0 { +bb: + br label %bb1 + +bb1: ; preds = %bb17, %bb + %tmp = phi %0 addrspace(3)* [ undef, %bb ], [ %tmp18, %bb17 ] + %tmp2 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 1 + %tmp3 = load double, double addrspace(3)* %tmp2, align 8 + br label %bb4 + +bb4: ; preds = %bb1 + br i1 undef, label %bb8, label %bb5 + +bb5: ; preds = %bb4 + unreachable + +bb8: ; preds = %bb4 + %tmp9 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 0 + %tmp10 = load i32, i32 addrspace(3)* %tmp9, align 4 + %tmp11 = icmp eq i32 0, %tmp10 + br i1 %tmp11, label %bb12, label %bb17 + +bb12: ; preds = %bb8 + %tmp13 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 0, i32 2 + %tmp14 = load i32, i32 addrspace(3)* %tmp13, align 4 + %tmp15 = icmp eq i32 0, %tmp14 + br i1 %tmp15, label %bb16, label %bb17 + +bb16: ; preds = %bb12 + unreachable + +bb17: ; preds = %bb12, %bb8 + %tmp18 = getelementptr inbounds %0, %0 addrspace(3)* %tmp, i64 2 + br label %bb1 +} + +attributes #0 = { nounwind } +attributes #1 = { nounwind readnone } Added: vendor/llvm/dist/test/tools/llvm-objdump/X86/openbsd-headers.test ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/llvm/dist/test/tools/llvm-objdump/X86/openbsd-headers.test Sun Feb 5 19:37:31 2017 (r313289) @@ -0,0 +1,20 @@ +## openbsd-phdrs.elf-x86-64 was generated using GNU ld (GNU Binutils for Ubuntu) 2.26.1. +## llvm-mc -filetype=obj -triple=x86_64-pc-linux test.s -o main.o +## ld -script linker.script main.o -o openbsd-phdrs.elf-x86-64 +## +## test.s is an empty file. +## linker.script: +## PHDRS { text PT_LOAD FILEHDR PHDRS; foo 0x65a3dbe6; bar 0x65a3dbe7; zed 0x65a41be6; } +## Where 0x65a3dbe6 is the value of PT_OPENBSD_RANDOMIZE, +## 0x65a3dbe7 is the value of PT_OPENBSD_WXNEEDED, +## 0x65a41be6 is the value of PT_OPENBSD_BOOTDATA +## SECTIONS { . = SIZEOF_HEADERS; .all : { *(.*) } : text } +RUN: llvm-objdump -p %p/../../../Object/Inputs/openbsd-phdrs.elf-x86-64 \ +RUN: | FileCheck %s + +CHECK: OPENBSD_RANDOMIZE off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**3 +CHECK-NEXT: filesz 0x0000000000000000 memsz 0x0000000000000000 flags --- +CHECK-NEXT: OPENBSD_WXNEEDED off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**3 +CHECK-NEXT: filesz 0x0000000000000000 memsz 0x0000000000000000 flags --- +CHECK-NEXT: OPENBSD_BOOTDATA off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**3 +CHECK-NEXT: filesz 0x0000000000000000 memsz 0x0000000000000000 flags --- Added: vendor/llvm/dist/test/tools/llvm-objdump/X86/phdrs.test ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/llvm/dist/test/tools/llvm-objdump/X86/phdrs.test Sun Feb 5 19:37:31 2017 (r313289) @@ -0,0 +1,32 @@ +## phdrs.elf-x86-64 was generated using lld (3.9). +## llvm-mc -filetype=obj -triple=x86_64-unknown-linux test.s -o test.o +## lld test.o -o phdrs.elf-x86-64 +## +## test.s: +## .global _start +## _start: +## +## .global d +## .section .foo,"awT",@progbits +## d: +## .long 2 +## +RUN: llvm-objdump -p %p/../../../Object/Inputs/phdrs.elf-x86-64 \ +RUN: | FileCheck %s + +CHECK: RELRO off 0x0000000000001000 vaddr 0x0000000000201000 paddr 0x0000000000201000 align 2**0 +CHECK-NEXT: filesz 0x0000000000000004 memsz 0x0000000000001000 flags r-- + +## phdr-note.elf-x86-64 was generated using lld (3.9). +## llvm-mc -filetype=obj -triple=x86_64-pc-linux test.s -o test.o +## lld test.o -o phdr-note.elf-x86-64 -shared +## +## test.s: +## .section .note.test,"a",@note +## .quad 42 + +RUN: llvm-objdump -p %p/../../../Object/Inputs/phdr-note.elf-x86-64 \ +RUN: | FileCheck %s --check-prefix=NOTE + +NOTE: NOTE off 0x0000000000000200 vaddr 0x0000000000000200 paddr 0x0000000000000200 align 2**0 +NOTE-NEXT: filesz 0x0000000000000008 memsz 0x0000000000000008 flags r-- Modified: vendor/llvm/dist/tools/llvm-objdump/ELFDump.cpp ============================================================================== --- vendor/llvm/dist/tools/llvm-objdump/ELFDump.cpp Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/tools/llvm-objdump/ELFDump.cpp Sun Feb 5 19:37:31 2017 (r313289) @@ -36,6 +36,9 @@ template void printProgramH case ELF::PT_GNU_EH_FRAME: outs() << "EH_FRAME "; break; + case ELF::PT_GNU_RELRO: + outs() << " RELRO "; + break; case ELF::PT_GNU_STACK: outs() << " STACK "; break; @@ -45,6 +48,18 @@ template void printProgramH case ELF::PT_LOAD: outs() << " LOAD "; break; + case ELF::PT_NOTE: + outs() << " NOTE "; + break; + case ELF::PT_OPENBSD_BOOTDATA: + outs() << " OPENBSD_BOOTDATA "; + break; + case ELF::PT_OPENBSD_RANDOMIZE: + outs() << " OPENBSD_RANDOMIZE "; + break; + case ELF::PT_OPENBSD_WXNEEDED: + outs() << " OPENBSD_WXNEEDED "; + break; case ELF::PT_PHDR: outs() << " PHDR "; break; Modified: vendor/llvm/dist/utils/release/test-release.sh ============================================================================== --- vendor/llvm/dist/utils/release/test-release.sh Sun Feb 5 15:46:05 2017 (r313288) +++ vendor/llvm/dist/utils/release/test-release.sh Sun Feb 5 19:37:31 2017 (r313289) @@ -36,6 +36,7 @@ do_libs="yes" do_libunwind="yes" do_test_suite="yes" do_openmp="yes" +do_lld="yes" do_lldb="no" do_polly="no" BuildDir="`pwd`" @@ -64,6 +65,7 @@ function usage() { echo " -no-libunwind Disable check-out & build libunwind" echo " -no-test-suite Disable check-out & build test-suite" echo " -no-openmp Disable check-out & build libomp" + echo " -no-lld Disable check-out & build lld" echo " -lldb Enable check-out & build lldb" echo " -no-lldb Disable check-out & build lldb (default)" echo " -polly Enable check-out & build Polly" @@ -143,6 +145,9 @@ while [ $# -gt 0 ]; do -no-openmp ) do_openmp="no" ;; + -no-lld ) + do_lld="no" + ;; -lldb ) do_lldb="yes" ;; @@ -225,6 +230,9 @@ esac if [ $do_openmp = "yes" ]; then projects="$projects openmp" fi +if [ $do_lld = "yes" ]; then + projects="$projects lld" +fi if [ $do_lldb = "yes" ]; then projects="$projects lldb" fi @@ -297,7 +305,7 @@ function export_sources() { cfe) projsrc=llvm.src/tools/clang ;; - lldb|polly) + lld|lldb|polly) projsrc=llvm.src/tools/$proj ;; clang-tools-extra) From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:36 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E5DF1CD21D3; Sun, 5 Feb 2017 19:37:36 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 9BCD0168D; Sun, 5 Feb 2017 19:37:36 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JbZCK038785; Sun, 5 Feb 2017 19:37:35 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbZUg038784; Sun, 5 Feb 2017 19:37:35 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbZUg038784@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313290 - vendor/llvm/llvm-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:37 -0000 Author: dim Date: Sun Feb 5 19:37:35 2017 New Revision: 313290 URL: https://svnweb.freebsd.org/changeset/base/313290 Log: Tag llvm release_40 branch r294123. Added: vendor/llvm/llvm-release_40-r294123/ - copied from r313289, vendor/llvm/dist/ From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:42 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B2CF3CD2215; Sun, 5 Feb 2017 19:37:42 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 753E216E9; Sun, 5 Feb 2017 19:37:42 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15Jbfjd038842; Sun, 5 Feb 2017 19:37:41 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15Jbe9m038834; Sun, 5 Feb 2017 19:37:40 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15Jbe9m038834@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:40 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313291 - in vendor/clang/dist: lib/Sema lib/StaticAnalyzer/Checkers lib/StaticAnalyzer/Core test/Analysis test/SemaObjCXX X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:42 -0000 Author: dim Date: Sun Feb 5 19:37:40 2017 New Revision: 313291 URL: https://svnweb.freebsd.org/changeset/base/313291 Log: Vendor import of clang release_40 branch r294123: https://llvm.org/svn/llvm-project/cfe/branches/release_40@294123 Added: vendor/clang/dist/test/Analysis/null-deref-static.m Modified: vendor/clang/dist/lib/Sema/SemaExprCXX.cpp vendor/clang/dist/lib/Sema/TreeTransform.h vendor/clang/dist/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp vendor/clang/dist/lib/StaticAnalyzer/Core/MemRegion.cpp vendor/clang/dist/lib/StaticAnalyzer/Core/RegionStore.cpp vendor/clang/dist/test/Analysis/dispatch-once.m vendor/clang/dist/test/SemaObjCXX/typo-correction.mm Modified: vendor/clang/dist/lib/Sema/SemaExprCXX.cpp ============================================================================== --- vendor/clang/dist/lib/Sema/SemaExprCXX.cpp Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/lib/Sema/SemaExprCXX.cpp Sun Feb 5 19:37:40 2017 (r313291) @@ -7190,14 +7190,6 @@ public: ExprResult TransformBlockExpr(BlockExpr *E) { return Owned(E); } - ExprResult TransformObjCPropertyRefExpr(ObjCPropertyRefExpr *E) { - return Owned(E); - } - - ExprResult TransformObjCIvarRefExpr(ObjCIvarRefExpr *E) { - return Owned(E); - } - ExprResult Transform(Expr *E) { ExprResult Res; while (true) { Modified: vendor/clang/dist/lib/Sema/TreeTransform.h ============================================================================== --- vendor/clang/dist/lib/Sema/TreeTransform.h Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/lib/Sema/TreeTransform.h Sun Feb 5 19:37:40 2017 (r313291) @@ -2932,16 +2932,17 @@ public: ExprResult RebuildObjCIvarRefExpr(Expr *BaseArg, ObjCIvarDecl *Ivar, SourceLocation IvarLoc, bool IsArrow, bool IsFreeIvar) { - // FIXME: We lose track of the IsFreeIvar bit. CXXScopeSpec SS; DeclarationNameInfo NameInfo(Ivar->getDeclName(), IvarLoc); - return getSema().BuildMemberReferenceExpr(BaseArg, BaseArg->getType(), - /*FIXME:*/IvarLoc, IsArrow, - SS, SourceLocation(), - /*FirstQualifierInScope=*/nullptr, - NameInfo, - /*TemplateArgs=*/nullptr, - /*S=*/nullptr); + ExprResult Result = getSema().BuildMemberReferenceExpr( + BaseArg, BaseArg->getType(), + /*FIXME:*/ IvarLoc, IsArrow, SS, SourceLocation(), + /*FirstQualifierInScope=*/nullptr, NameInfo, + /*TemplateArgs=*/nullptr, + /*S=*/nullptr); + if (IsFreeIvar && Result.isUsable()) + cast(Result.get())->setIsFreeIvar(IsFreeIvar); + return Result; } /// \brief Build a new Objective-C property reference expression. Modified: vendor/clang/dist/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp ============================================================================== --- vendor/clang/dist/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/lib/StaticAnalyzer/Checkers/MacOSXAPIChecker.cpp Sun Feb 5 19:37:40 2017 (r313291) @@ -94,11 +94,18 @@ void MacOSXAPIChecker::CheckDispatchOnce bool SuggestStatic = false; os << "Call to '" << FName << "' uses"; if (const VarRegion *VR = dyn_cast(RB)) { + const VarDecl *VD = VR->getDecl(); + // FIXME: These should have correct memory space and thus should be filtered + // out earlier. This branch only fires when we're looking from a block, + // which we analyze as a top-level declaration, onto a static local + // in a function that contains the block. + if (VD->isStaticLocal()) + return; // We filtered out globals earlier, so it must be a local variable // or a block variable which is under UnknownSpaceRegion. if (VR != R) os << " memory within"; - if (VR->getDecl()->hasAttr()) + if (VD->hasAttr()) os << " the block variable '"; else os << " the local variable '"; Modified: vendor/clang/dist/lib/StaticAnalyzer/Core/MemRegion.cpp ============================================================================== --- vendor/clang/dist/lib/StaticAnalyzer/Core/MemRegion.cpp Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/lib/StaticAnalyzer/Core/MemRegion.cpp Sun Feb 5 19:37:40 2017 (r313291) @@ -816,9 +816,11 @@ const VarRegion* MemRegionManager::getVa const StackFrameContext *STC = V.get(); - if (!STC) + if (!STC) { + // FIXME: Assign a more sensible memory space to static locals + // we see from within blocks that we analyze as top-level declarations. sReg = getUnknownRegion(); - else { + } else { if (D->hasLocalStorage()) { sReg = isa(D) || isa(D) ? static_cast(getStackArgumentsRegion(STC)) Modified: vendor/clang/dist/lib/StaticAnalyzer/Core/RegionStore.cpp ============================================================================== --- vendor/clang/dist/lib/StaticAnalyzer/Core/RegionStore.cpp Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/lib/StaticAnalyzer/Core/RegionStore.cpp Sun Feb 5 19:37:40 2017 (r313291) @@ -1849,6 +1849,8 @@ SVal RegionStoreManager::getBindingForVa // Function-scoped static variables are default-initialized to 0; if they // have an initializer, it would have been processed by now. + // FIXME: This is only true when we're starting analysis from main(). + // We're losing a lot of coverage here. if (isa(MS)) return svalBuilder.makeZeroVal(T); Modified: vendor/clang/dist/test/Analysis/dispatch-once.m ============================================================================== --- vendor/clang/dist/test/Analysis/dispatch-once.m Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/test/Analysis/dispatch-once.m Sun Feb 5 19:37:40 2017 (r313291) @@ -107,3 +107,10 @@ void test_block_var_from_outside_block() }; dispatch_once(&once, ^{}); // expected-warning{{Call to 'dispatch_once' uses the block variable 'once' for the predicate value.}} } + +void test_static_var_from_outside_block() { + static dispatch_once_t once; + ^{ + dispatch_once(&once, ^{}); // no-warning + }; +} Added: vendor/clang/dist/test/Analysis/null-deref-static.m ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/clang/dist/test/Analysis/null-deref-static.m Sun Feb 5 19:37:40 2017 (r313291) @@ -0,0 +1,35 @@ +// RUN: %clang_cc1 -w -fblocks -analyze -analyzer-checker=core,deadcode,alpha.core,debug.ExprInspection -verify %s + +void *malloc(unsigned long); +void clang_analyzer_warnIfReached(); + +void test_static_from_block() { + static int *x; + ^{ + *x; // no-warning + }; +} + +void test_static_within_block() { + ^{ + static int *x; + *x; // expected-warning{{Dereference of null pointer}} + }; +} + +void test_static_control_flow(int y) { + static int *x; + if (x) { + // FIXME: Should be reachable. + clang_analyzer_warnIfReached(); // no-warning + } + if (y) { + // We are not sure if this branch is possible, because the developer + // may argue that function is always called with y == 1 for the first time. + // In this case, we can only advise the developer to add assertions + // for suppressing such path. + *x; // expected-warning{{Dereference of null pointer}} + } else { + x = malloc(1); + } +} Modified: vendor/clang/dist/test/SemaObjCXX/typo-correction.mm ============================================================================== --- vendor/clang/dist/test/SemaObjCXX/typo-correction.mm Sun Feb 5 19:37:35 2017 (r313290) +++ vendor/clang/dist/test/SemaObjCXX/typo-correction.mm Sun Feb 5 19:37:40 2017 (r313291) @@ -21,3 +21,18 @@ public: self.m_prop2 = new ClassB(m_prop1); // expected-error {{use of undeclared identifier 'm_prop1'; did you mean '_m_prop1'?}} } @end + +// rdar://30310772 + +@interface InvalidNameInIvarAndPropertyBase +{ +@public + float _a; +} +@property float _b; +@end + +void invalidNameInIvarAndPropertyBase() { + float a = ((InvalidNameInIvarAndPropertyBase*)node)->_a; // expected-error {{use of undeclared identifier 'node'}} + float b = ((InvalidNameInIvarAndPropertyBase*)node)._b; // expected-error {{use of undeclared identifier 'node'}} +} From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:45 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 982E6CD222D; Sun, 5 Feb 2017 19:37:45 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4BFCB1741; Sun, 5 Feb 2017 19:37:45 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15Jbihr038888; Sun, 5 Feb 2017 19:37:44 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbivT038887; Sun, 5 Feb 2017 19:37:44 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbivT038887@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313292 - vendor/clang/clang-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:45 -0000 Author: dim Date: Sun Feb 5 19:37:44 2017 New Revision: 313292 URL: https://svnweb.freebsd.org/changeset/base/313292 Log: Tag clang release_40 branch r294123. Added: vendor/clang/clang-release_40-r294123/ - copied from r313291, vendor/clang/dist/ From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:49 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9A213CD2269; Sun, 5 Feb 2017 19:37:49 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7259F17CA; Sun, 5 Feb 2017 19:37:49 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15Jbmoi038942; Sun, 5 Feb 2017 19:37:48 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JblIs038935; Sun, 5 Feb 2017 19:37:47 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JblIs038935@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313293 - in vendor/compiler-rt/dist: lib/asan lib/lsan lib/sanitizer_common lib/sanitizer_common/tests test/asan/TestCases X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:49 -0000 Author: dim Date: Sun Feb 5 19:37:47 2017 New Revision: 313293 URL: https://svnweb.freebsd.org/changeset/base/313293 Log: Vendor import of compiler-rt release_40 branch r294123: https://llvm.org/svn/llvm-project/compiler-rt/branches/release_40@294123 Added: vendor/compiler-rt/dist/test/asan/TestCases/malloc-no-intercept.c (contents, props changed) Modified: vendor/compiler-rt/dist/lib/asan/asan_malloc_linux.cc vendor/compiler-rt/dist/lib/asan/asan_malloc_win.cc vendor/compiler-rt/dist/lib/lsan/lsan_interceptors.cc vendor/compiler-rt/dist/lib/sanitizer_common/sanitizer_platform_interceptors.h vendor/compiler-rt/dist/lib/sanitizer_common/tests/sanitizer_allocator_testlib.cc Modified: vendor/compiler-rt/dist/lib/asan/asan_malloc_linux.cc ============================================================================== --- vendor/compiler-rt/dist/lib/asan/asan_malloc_linux.cc Sun Feb 5 19:37:44 2017 (r313292) +++ vendor/compiler-rt/dist/lib/asan/asan_malloc_linux.cc Sun Feb 5 19:37:47 2017 (r313293) @@ -50,12 +50,14 @@ INTERCEPTOR(void, free, void *ptr) { asan_free(ptr, &stack, FROM_MALLOC); } +#if SANITIZER_INTERCEPT_CFREE INTERCEPTOR(void, cfree, void *ptr) { GET_STACK_TRACE_FREE; if (UNLIKELY(IsInDlsymAllocPool(ptr))) return; asan_free(ptr, &stack, FROM_MALLOC); } +#endif // SANITIZER_INTERCEPT_CFREE INTERCEPTOR(void*, malloc, uptr size) { if (UNLIKELY(!asan_inited)) @@ -91,22 +93,24 @@ INTERCEPTOR(void*, realloc, void *ptr, u return asan_realloc(ptr, size, &stack); } +#if SANITIZER_INTERCEPT_MEMALIGN INTERCEPTOR(void*, memalign, uptr boundary, uptr size) { GET_STACK_TRACE_MALLOC; return asan_memalign(boundary, size, &stack, FROM_MALLOC); } -INTERCEPTOR(void*, aligned_alloc, uptr boundary, uptr size) { - GET_STACK_TRACE_MALLOC; - return asan_memalign(boundary, size, &stack, FROM_MALLOC); -} - INTERCEPTOR(void*, __libc_memalign, uptr boundary, uptr size) { GET_STACK_TRACE_MALLOC; void *res = asan_memalign(boundary, size, &stack, FROM_MALLOC); DTLS_on_libc_memalign(res, size); return res; } +#endif // SANITIZER_INTERCEPT_MEMALIGN + +INTERCEPTOR(void*, aligned_alloc, uptr boundary, uptr size) { + GET_STACK_TRACE_MALLOC; + return asan_memalign(boundary, size, &stack, FROM_MALLOC); +} INTERCEPTOR(uptr, malloc_usable_size, void *ptr) { GET_CURRENT_PC_BP_SP; @@ -114,6 +118,7 @@ INTERCEPTOR(uptr, malloc_usable_size, vo return asan_malloc_usable_size(ptr, pc, bp); } +#if SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO // We avoid including malloc.h for portability reasons. // man mallinfo says the fields are "long", but the implementation uses int. // It doesn't matter much -- we just need to make sure that the libc's mallinfo @@ -131,6 +136,7 @@ INTERCEPTOR(struct fake_mallinfo, mallin INTERCEPTOR(int, mallopt, int cmd, int value) { return -1; } +#endif // SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO INTERCEPTOR(int, posix_memalign, void **memptr, uptr alignment, uptr size) { GET_STACK_TRACE_MALLOC; @@ -143,10 +149,12 @@ INTERCEPTOR(void*, valloc, uptr size) { return asan_valloc(size, &stack); } +#if SANITIZER_INTERCEPT_PVALLOC INTERCEPTOR(void*, pvalloc, uptr size) { GET_STACK_TRACE_MALLOC; return asan_pvalloc(size, &stack); } +#endif // SANITIZER_INTERCEPT_PVALLOC INTERCEPTOR(void, malloc_stats, void) { __asan_print_accumulated_stats(); Modified: vendor/compiler-rt/dist/lib/asan/asan_malloc_win.cc ============================================================================== --- vendor/compiler-rt/dist/lib/asan/asan_malloc_win.cc Sun Feb 5 19:37:44 2017 (r313292) +++ vendor/compiler-rt/dist/lib/asan/asan_malloc_win.cc Sun Feb 5 19:37:47 2017 (r313293) @@ -56,11 +56,6 @@ void _free_base(void *ptr) { } ALLOCATION_FUNCTION_ATTRIBUTE -void cfree(void *ptr) { - CHECK(!"cfree() should not be used on Windows"); -} - -ALLOCATION_FUNCTION_ATTRIBUTE void *malloc(size_t size) { GET_STACK_TRACE_MALLOC; return asan_malloc(size, &stack); Modified: vendor/compiler-rt/dist/lib/lsan/lsan_interceptors.cc ============================================================================== --- vendor/compiler-rt/dist/lib/lsan/lsan_interceptors.cc Sun Feb 5 19:37:44 2017 (r313292) +++ vendor/compiler-rt/dist/lib/lsan/lsan_interceptors.cc Sun Feb 5 19:37:47 2017 (r313293) @@ -19,6 +19,7 @@ #include "sanitizer_common/sanitizer_flags.h" #include "sanitizer_common/sanitizer_internal_defs.h" #include "sanitizer_common/sanitizer_linux.h" +#include "sanitizer_common/sanitizer_platform_interceptors.h" #include "sanitizer_common/sanitizer_platform_limits_posix.h" #include "sanitizer_common/sanitizer_tls_get_addr.h" #include "lsan.h" @@ -86,11 +87,26 @@ INTERCEPTOR(void*, realloc, void *q, upt return Reallocate(stack, q, size, 1); } +#if SANITIZER_INTERCEPT_MEMALIGN INTERCEPTOR(void*, memalign, uptr alignment, uptr size) { ENSURE_LSAN_INITED; GET_STACK_TRACE_MALLOC; return Allocate(stack, size, alignment, kAlwaysClearMemory); } +#define LSAN_MAYBE_INTERCEPT_MEMALIGN INTERCEPT_FUNCTION(memalign) + +INTERCEPTOR(void *, __libc_memalign, uptr alignment, uptr size) { + ENSURE_LSAN_INITED; + GET_STACK_TRACE_MALLOC; + void *res = Allocate(stack, size, alignment, kAlwaysClearMemory); + DTLS_on_libc_memalign(res, size); + return res; +} +#define LSAN_MAYBE_INTERCEPT___LIBC_MEMALIGN INTERCEPT_FUNCTION(__libc_memalign) +#else +#define LSAN_MAYBE_INTERCEPT_MEMALIGN +#define LSAN_MAYBE_INTERCEPT___LIBC_MEMALIGN +#endif // SANITIZER_INTERCEPT_MEMALIGN INTERCEPTOR(void*, aligned_alloc, uptr alignment, uptr size) { ENSURE_LSAN_INITED; @@ -106,14 +122,6 @@ INTERCEPTOR(int, posix_memalign, void ** return 0; } -INTERCEPTOR(void *, __libc_memalign, uptr alignment, uptr size) { - ENSURE_LSAN_INITED; - GET_STACK_TRACE_MALLOC; - void *res = Allocate(stack, size, alignment, kAlwaysClearMemory); - DTLS_on_libc_memalign(res, size); - return res; -} - INTERCEPTOR(void*, valloc, uptr size) { ENSURE_LSAN_INITED; GET_STACK_TRACE_MALLOC; @@ -127,6 +135,7 @@ INTERCEPTOR(uptr, malloc_usable_size, vo return GetMallocUsableSize(ptr); } +#if SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO struct fake_mallinfo { int x[10]; }; @@ -136,11 +145,18 @@ INTERCEPTOR(struct fake_mallinfo, mallin internal_memset(&res, 0, sizeof(res)); return res; } +#define LSAN_MAYBE_INTERCEPT_MALLINFO INTERCEPT_FUNCTION(mallinfo) INTERCEPTOR(int, mallopt, int cmd, int value) { return -1; } +#define LSAN_MAYBE_INTERCEPT_MALLOPT INTERCEPT_FUNCTION(mallopt) +#else +#define LSAN_MAYBE_INTERCEPT_MALLINFO +#define LSAN_MAYBE_INTERCEPT_MALLOPT +#endif // SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO +#if SANITIZER_INTERCEPT_PVALLOC INTERCEPTOR(void*, pvalloc, uptr size) { ENSURE_LSAN_INITED; GET_STACK_TRACE_MALLOC; @@ -152,8 +168,17 @@ INTERCEPTOR(void*, pvalloc, uptr size) { } return Allocate(stack, size, GetPageSizeCached(), kAlwaysClearMemory); } +#define LSAN_MAYBE_INTERCEPT_PVALLOC INTERCEPT_FUNCTION(pvalloc) +#else +#define LSAN_MAYBE_INTERCEPT_PVALLOC +#endif // SANITIZER_INTERCEPT_PVALLOC +#if SANITIZER_INTERCEPT_CFREE INTERCEPTOR(void, cfree, void *p) ALIAS(WRAPPER_NAME(free)); +#define LSAN_MAYBE_INTERCEPT_CFREE INTERCEPT_FUNCTION(cfree) +#else +#define LSAN_MAYBE_INTERCEPT_CFREE +#endif // SANITIZER_INTERCEPT_CFREE #define OPERATOR_NEW_BODY \ ENSURE_LSAN_INITED; \ @@ -277,17 +302,18 @@ namespace __lsan { void InitializeInterceptors() { INTERCEPT_FUNCTION(malloc); INTERCEPT_FUNCTION(free); - INTERCEPT_FUNCTION(cfree); + LSAN_MAYBE_INTERCEPT_CFREE; INTERCEPT_FUNCTION(calloc); INTERCEPT_FUNCTION(realloc); - INTERCEPT_FUNCTION(memalign); + LSAN_MAYBE_INTERCEPT_MEMALIGN; + LSAN_MAYBE_INTERCEPT___LIBC_MEMALIGN; + INTERCEPT_FUNCTION(aligned_alloc); INTERCEPT_FUNCTION(posix_memalign); - INTERCEPT_FUNCTION(__libc_memalign); INTERCEPT_FUNCTION(valloc); - INTERCEPT_FUNCTION(pvalloc); + LSAN_MAYBE_INTERCEPT_PVALLOC; INTERCEPT_FUNCTION(malloc_usable_size); - INTERCEPT_FUNCTION(mallinfo); - INTERCEPT_FUNCTION(mallopt); + LSAN_MAYBE_INTERCEPT_MALLINFO; + LSAN_MAYBE_INTERCEPT_MALLOPT; INTERCEPT_FUNCTION(pthread_create); INTERCEPT_FUNCTION(pthread_join); Modified: vendor/compiler-rt/dist/lib/sanitizer_common/sanitizer_platform_interceptors.h ============================================================================== --- vendor/compiler-rt/dist/lib/sanitizer_common/sanitizer_platform_interceptors.h Sun Feb 5 19:37:44 2017 (r313292) +++ vendor/compiler-rt/dist/lib/sanitizer_common/sanitizer_platform_interceptors.h Sun Feb 5 19:37:47 2017 (r313293) @@ -316,4 +316,9 @@ #define SANITIZER_INTERCEPT_UTMP SI_NOT_WINDOWS && !SI_MAC && !SI_FREEBSD #define SANITIZER_INTERCEPT_UTMPX SI_LINUX_NOT_ANDROID || SI_MAC || SI_FREEBSD +#define SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO (!SI_FREEBSD && !SI_MAC) +#define SANITIZER_INTERCEPT_MEMALIGN (!SI_FREEBSD && !SI_MAC) +#define SANITIZER_INTERCEPT_PVALLOC (!SI_FREEBSD && !SI_MAC) +#define SANITIZER_INTERCEPT_CFREE (!SI_FREEBSD && !SI_MAC) + #endif // #ifndef SANITIZER_PLATFORM_INTERCEPTORS_H Modified: vendor/compiler-rt/dist/lib/sanitizer_common/tests/sanitizer_allocator_testlib.cc ============================================================================== --- vendor/compiler-rt/dist/lib/sanitizer_common/tests/sanitizer_allocator_testlib.cc Sun Feb 5 19:37:44 2017 (r313292) +++ vendor/compiler-rt/dist/lib/sanitizer_common/tests/sanitizer_allocator_testlib.cc Sun Feb 5 19:37:47 2017 (r313293) @@ -139,6 +139,7 @@ void *realloc(void *p, size_t size) { return p; } +#if SANITIZER_INTERCEPT_MEMALIGN void *memalign(size_t alignment, size_t size) { if (UNLIKELY(!thread_inited)) thread_init(); @@ -146,6 +147,7 @@ void *memalign(size_t alignment, size_t SANITIZER_MALLOC_HOOK(p, size); return p; } +#endif // SANITIZER_INTERCEPT_MEMALIGN int posix_memalign(void **memptr, size_t alignment, size_t size) { if (UNLIKELY(!thread_inited)) @@ -165,18 +167,26 @@ void *valloc(size_t size) { return p; } +#if SANITIZER_INTERCEPT_CFREE void cfree(void *p) ALIAS("free"); +#endif // SANITIZER_INTERCEPT_CFREE +#if SANITIZER_INTERCEPT_PVALLOC void *pvalloc(size_t size) ALIAS("valloc"); +#endif // SANITIZER_INTERCEPT_PVALLOC +#if SANITIZER_INTERCEPT_MEMALIGN void *__libc_memalign(size_t alignment, size_t size) ALIAS("memalign"); +#endif // SANITIZER_INTERCEPT_MEMALIGN void malloc_usable_size() { } +#if SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO void mallinfo() { } void mallopt() { } +#endif // SANITIZER_INTERCEPT_MALLOPT_AND_MALLINFO } // extern "C" namespace std { Added: vendor/compiler-rt/dist/test/asan/TestCases/malloc-no-intercept.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/compiler-rt/dist/test/asan/TestCases/malloc-no-intercept.c Sun Feb 5 19:37:47 2017 (r313293) @@ -0,0 +1,24 @@ +// Test that on non-glibc platforms, a number of malloc-related functions are +// not intercepted. + +// RUN: not %clang_asan -Dtestfunc=mallinfo %s -o %t +// RUN: not %clang_asan -Dtestfunc=mallopt %s -o %t +// RUN: not %clang_asan -Dtestfunc=memalign %s -o %t +// RUN: not %clang_asan -Dtestfunc=pvalloc %s -o %t +// RUN: not %clang_asan -Dtestfunc=cfree %s -o %t + +#include + +// For glibc, cause link failures by referencing a nonexistent function. +#ifdef __GLIBC__ +#undef testfunc +#define testfunc nonexistent_function +#endif + +void testfunc(void); + +int main(void) +{ + testfunc(); + return 0; +} From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:52 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 88AB5CD228A; Sun, 5 Feb 2017 19:37:52 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3A3551830; Sun, 5 Feb 2017 19:37:52 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JbpND038989; Sun, 5 Feb 2017 19:37:51 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbpEe038988; Sun, 5 Feb 2017 19:37:51 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbpEe038988@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:51 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313294 - vendor/compiler-rt/compiler-rt-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:52 -0000 Author: dim Date: Sun Feb 5 19:37:51 2017 New Revision: 313294 URL: https://svnweb.freebsd.org/changeset/base/313294 Log: Tag compiler-rt release_40 branch r294123. Added: vendor/compiler-rt/compiler-rt-release_40-r294123/ - copied from r313293, vendor/compiler-rt/dist/ From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:56 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 61575CD22E3; Sun, 5 Feb 2017 19:37:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2FE1918BC; Sun, 5 Feb 2017 19:37:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JbtIZ039038; Sun, 5 Feb 2017 19:37:55 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbtND039036; Sun, 5 Feb 2017 19:37:55 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbtND039036@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:55 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313295 - in vendor/libc++/dist: include test/libcxx/containers/associative X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:56 -0000 Author: dim Date: Sun Feb 5 19:37:54 2017 New Revision: 313295 URL: https://svnweb.freebsd.org/changeset/base/313295 Log: Vendor import of libc++ release_40 branch r294123: https://llvm.org/svn/llvm-project/libcxx/branches/release_40@294123 Added: vendor/libc++/dist/test/libcxx/containers/associative/undef_min_max.pass.cpp (contents, props changed) Modified: vendor/libc++/dist/include/__tree Modified: vendor/libc++/dist/include/__tree ============================================================================== --- vendor/libc++/dist/include/__tree Sun Feb 5 19:37:51 2017 (r313294) +++ vendor/libc++/dist/include/__tree Sun Feb 5 19:37:54 2017 (r313295) @@ -17,6 +17,8 @@ #include #include +#include <__undef_min_max> + #if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) #pragma GCC system_header #endif Added: vendor/libc++/dist/test/libcxx/containers/associative/undef_min_max.pass.cpp ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/libc++/dist/test/libcxx/containers/associative/undef_min_max.pass.cpp Sun Feb 5 19:37:54 2017 (r313295) @@ -0,0 +1,22 @@ +//===----------------------------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is dual licensed under the MIT and the University of Illinois Open +// Source Licenses. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#if defined(__GNUC__) +#pragma GCC diagnostic ignored "-W#warnings" +#endif + +#define min THIS IS A NASTY MACRO! +#define max THIS IS A NASTY MACRO! + +#include + +int main() { + std::map m; + ((void)m); +} From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:37:59 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 45B53CD231F; Sun, 5 Feb 2017 19:37:59 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id EE97B1919; Sun, 5 Feb 2017 19:37:58 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JbwWZ039086; Sun, 5 Feb 2017 19:37:58 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JbwhV039085; Sun, 5 Feb 2017 19:37:58 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051937.v15JbwhV039085@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:37:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313296 - vendor/libc++/libc++-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:37:59 -0000 Author: dim Date: Sun Feb 5 19:37:57 2017 New Revision: 313296 URL: https://svnweb.freebsd.org/changeset/base/313296 Log: Tag libc++ release_40 branch r294123. Added: vendor/libc++/libc++-release_40-r294123/ - copied from r313295, vendor/libc++/dist/ From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:38:04 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7A3B9CD236C; Sun, 5 Feb 2017 19:38:04 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 130A019CC; Sun, 5 Feb 2017 19:38:03 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15Jc3xl039163; Sun, 5 Feb 2017 19:38:03 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15Jc0jU039136; Sun, 5 Feb 2017 19:38:00 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051938.v15Jc0jU039136@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:38:00 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313297 - in vendor/lld/dist: ELF test/ELF X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:38:04 -0000 Author: dim Date: Sun Feb 5 19:38:00 2017 New Revision: 313297 URL: https://svnweb.freebsd.org/changeset/base/313297 Log: Vendor import of lld release_40 branch r294123: https://llvm.org/svn/llvm-project/lld/branches/release_40@294123 Added: vendor/lld/dist/test/ELF/relocatable-common.s (contents, props changed) Modified: vendor/lld/dist/ELF/Config.h vendor/lld/dist/ELF/Driver.cpp vendor/lld/dist/ELF/Options.td vendor/lld/dist/ELF/Symbols.cpp vendor/lld/dist/ELF/SyntheticSections.cpp vendor/lld/dist/ELF/Writer.cpp vendor/lld/dist/test/ELF/basic-mips.s vendor/lld/dist/test/ELF/eh-frame-hdr-abs-fde.s vendor/lld/dist/test/ELF/mips-64-disp.s vendor/lld/dist/test/ELF/mips-64-got.s vendor/lld/dist/test/ELF/mips-64-rels.s vendor/lld/dist/test/ELF/mips-got-and-copy.s vendor/lld/dist/test/ELF/mips-got-extsym.s vendor/lld/dist/test/ELF/mips-got-hilo.s vendor/lld/dist/test/ELF/mips-got-redundant.s vendor/lld/dist/test/ELF/mips-got-relocs.s vendor/lld/dist/test/ELF/mips-got-weak.s vendor/lld/dist/test/ELF/mips-got16.s vendor/lld/dist/test/ELF/mips-gp-ext.s vendor/lld/dist/test/ELF/mips-gp-lowest.s vendor/lld/dist/test/ELF/mips-gprel32-relocs-gp0.s vendor/lld/dist/test/ELF/mips-gprel32-relocs.s vendor/lld/dist/test/ELF/mips-hilo-gp-disp.s vendor/lld/dist/test/ELF/mips-n32-rels.s vendor/lld/dist/test/ELF/mips-options.s vendor/lld/dist/test/ELF/mips-tls-64.s vendor/lld/dist/test/ELF/mips-tls-hilo.s vendor/lld/dist/test/ELF/mips-tls-static.s vendor/lld/dist/test/ELF/mips-tls.s vendor/lld/dist/test/ELF/mips-xgot-order.s Modified: vendor/lld/dist/ELF/Config.h ============================================================================== --- vendor/lld/dist/ELF/Config.h Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/Config.h Sun Feb 5 19:38:00 2017 (r313297) @@ -98,6 +98,7 @@ struct Configuration { bool Bsymbolic; bool BsymbolicFunctions; bool ColorDiagnostics = false; + bool DefineCommon; bool Demangle = true; bool DisableVerify; bool EhFrameHdr; Modified: vendor/lld/dist/ELF/Driver.cpp ============================================================================== --- vendor/lld/dist/ELF/Driver.cpp Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/Driver.cpp Sun Feb 5 19:38:00 2017 (r313297) @@ -496,6 +496,8 @@ void LinkerDriver::readConfigs(opt::Inpu Config->Pie = getArg(Args, OPT_pie, OPT_nopie, false); Config->PrintGcSections = Args.hasArg(OPT_print_gc_sections); Config->Relocatable = Args.hasArg(OPT_relocatable); + Config->DefineCommon = getArg(Args, OPT_define_common, OPT_no_define_common, + !Config->Relocatable); Config->Discard = getDiscardOption(Args); Config->SaveTemps = Args.hasArg(OPT_save_temps); Config->SingleRoRx = Args.hasArg(OPT_no_rosegment); Modified: vendor/lld/dist/ELF/Options.td ============================================================================== --- vendor/lld/dist/ELF/Options.td Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/Options.td Sun Feb 5 19:38:00 2017 (r313297) @@ -45,6 +45,9 @@ def color_diagnostics: F<"color-diagnost def color_diagnostics_eq: J<"color-diagnostics=">, HelpText<"Use colors in diagnostics">; +def define_common: F<"define-common">, + HelpText<"Assign space to common symbols">; + def disable_new_dtags: F<"disable-new-dtags">, HelpText<"Disable new dynamic tags">; @@ -130,6 +133,9 @@ def no_as_needed: F<"no-as-needed">, def no_color_diagnostics: F<"no-color-diagnostics">, HelpText<"Do not use colors in diagnostics">; +def no_define_common: F<"no-define-common">, + HelpText<"Do not assign space to common symbols">; + def no_demangle: F<"no-demangle">, HelpText<"Do not demangle symbol names">; @@ -255,6 +261,9 @@ def alias_Bstatic_dn: F<"dn">, Alias, Alias; def alias_Bstatic_static: F<"static">, Alias; def alias_L__library_path: J<"library-path=">, Alias; +def alias_define_common_d: Flag<["-"], "d">, Alias; +def alias_define_common_dc: F<"dc">, Alias; +def alias_define_common_dp: F<"dp">, Alias; def alias_discard_all_x: Flag<["-"], "x">, Alias; def alias_discard_locals_X: Flag<["-"], "X">, Alias; def alias_dynamic_list: J<"dynamic-list=">, Alias; @@ -320,7 +329,6 @@ def plugin_opt_eq: J<"plugin-opt=">; // Options listed below are silently ignored for now for compatibility. def allow_shlib_undefined: F<"allow-shlib-undefined">; def cref: Flag<["--"], "cref">; -def define_common: F<"define-common">; def demangle: F<"demangle">; def detect_odr_violations: F<"detect-odr-violations">; def g: Flag<["-"], "g">; @@ -347,9 +355,6 @@ def G: JoinedOrSeparate<["-"], "G">; def Qy : F<"Qy">; // Aliases for ignored options -def alias_define_common_d: Flag<["-"], "d">, Alias; -def alias_define_common_dc: F<"dc">, Alias; -def alias_define_common_dp: F<"dp">, Alias; def alias_Map_eq: J<"Map=">, Alias; def alias_version_script_version_script: J<"version-script=">, Alias; Modified: vendor/lld/dist/ELF/Symbols.cpp ============================================================================== --- vendor/lld/dist/ELF/Symbols.cpp Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/Symbols.cpp Sun Feb 5 19:38:00 2017 (r313297) @@ -73,6 +73,8 @@ static typename ELFT::uint getSymVA(cons return VA; } case SymbolBody::DefinedCommonKind: + if (!Config->DefineCommon) + return 0; return In::Common->OutSec->Addr + In::Common->OutSecOff + cast(Body).Offset; case SymbolBody::SharedKind: { Modified: vendor/lld/dist/ELF/SyntheticSections.cpp ============================================================================== --- vendor/lld/dist/ELF/SyntheticSections.cpp Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/SyntheticSections.cpp Sun Feb 5 19:38:00 2017 (r313297) @@ -59,6 +59,9 @@ template InputSection ArrayRef(), "COMMON"); Ret->Live = true; + if (!Config->DefineCommon) + return Ret; + // Sort the common symbols by alignment as an heuristic to pack them better. std::vector Syms = getCommonSymbols(); std::stable_sort(Syms.begin(), Syms.end(), @@ -434,7 +437,7 @@ template void GotSection MipsGotSection::MipsGotSection() : SyntheticSection(SHF_ALLOC | SHF_WRITE | SHF_MIPS_GPREL, - SHT_PROGBITS, Target->GotEntrySize, ".got") {} + SHT_PROGBITS, 16, ".got") {} template void MipsGotSection::addEntry(SymbolBody &Sym, uintX_t Addend, @@ -1168,10 +1171,14 @@ void SymbolTableSection::writeGlob ESym->setVisibility(Body->symbol()->Visibility); ESym->st_value = Body->getVA(); - if (const OutputSectionBase *OutSec = getOutputSection(Body)) + if (const OutputSectionBase *OutSec = getOutputSection(Body)) { ESym->st_shndx = OutSec->SectionIndex; - else if (isa>(Body)) + } else if (isa>(Body)) { ESym->st_shndx = SHN_ABS; + } else if (isa(Body)) { + ESym->st_shndx = SHN_COMMON; + ESym->st_value = cast(Body)->Alignment; + } if (Config->EMachine == EM_MIPS) { // On MIPS we need to mark symbol which has a PLT entry and requires @@ -1203,6 +1210,8 @@ SymbolTableSection::getOutputSecti break; } case SymbolBody::DefinedCommonKind: + if (!Config->DefineCommon) + return nullptr; return In::Common->OutSec; case SymbolBody::SharedKind: { auto &SS = cast>(*Sym); Modified: vendor/lld/dist/ELF/Writer.cpp ============================================================================== --- vendor/lld/dist/ELF/Writer.cpp Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/ELF/Writer.cpp Sun Feb 5 19:38:00 2017 (r313297) @@ -476,6 +476,16 @@ static int getPPC64SectionRank(StringRef .Default(1); } +// All sections with SHF_MIPS_GPREL flag should be grouped together +// because data in these sections is addressable with a gp relative address. +static int getMipsSectionRank(const OutputSectionBase *S) { + if ((S->Flags & SHF_MIPS_GPREL) == 0) + return 0; + if (S->getName() == ".got") + return 1; + return 2; +} + template bool elf::isRelroSection(const OutputSectionBase *Sec) { if (!Config->ZRelro) return false; @@ -494,8 +504,6 @@ template bool elf::isRelroS return true; if (In::Got && Sec == In::Got->OutSec) return true; - if (In::MipsGot && Sec == In::MipsGot->OutSec) - return true; if (Sec == Out::BssRelRo) return true; StringRef S = Sec->getName(); @@ -595,6 +603,8 @@ static bool compareSectionsNonScript(con if (Config->EMachine == EM_PPC64) return getPPC64SectionRank(A->getName()) < getPPC64SectionRank(B->getName()); + if (Config->EMachine == EM_MIPS) + return getMipsSectionRank(A) < getMipsSectionRank(B); return false; } Modified: vendor/lld/dist/test/ELF/basic-mips.s ============================================================================== --- vendor/lld/dist/test/ELF/basic-mips.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/basic-mips.s Sun Feb 5 19:38:00 2017 (r313297) @@ -35,7 +35,7 @@ __start: # CHECK-NEXT: ] # CHECK-NEXT: HeaderSize: 52 # CHECK-NEXT: ProgramHeaderEntrySize: 32 -# CHECK-NEXT: ProgramHeaderCount: 6 +# CHECK-NEXT: ProgramHeaderCount: 5 # CHECK-NEXT: SectionHeaderEntrySize: 40 # CHECK-NEXT: SectionHeaderCount: 11 # CHECK-NEXT: StringTableSectionIndex: 9 @@ -62,8 +62,8 @@ __start: # CHECK-NEXT: Flags [ (0x2) # CHECK-NEXT: SHF_ALLOC (0x2) # CHECK-NEXT: ] -# CHECK-NEXT: Address: 0x100F8 -# CHECK-NEXT: Offset: 0xF8 +# CHECK-NEXT: Address: 0x100D8 +# CHECK-NEXT: Offset: 0xD8 # CHECK-NEXT: Size: 24 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 @@ -77,8 +77,8 @@ __start: # CHECK-NEXT: Flags [ (0x2) # CHECK-NEXT: SHF_ALLOC (0x2) # CHECK-NEXT: ] -# CHECK-NEXT: Address: 0x10110 -# CHECK-NEXT: Offset: 0x110 +# CHECK-NEXT: Address: 0x100F0 +# CHECK-NEXT: Offset: 0xF0 # CHECK-NEXT: Size: 24 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 @@ -131,7 +131,7 @@ __start: # CHECK-NEXT: Size: 8 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 -# CHECK-NEXT: AddressAlignment: 4 +# CHECK-NEXT: AddressAlignment: 16 # CHECK-NEXT: EntrySize: 0 # CHECK-NEXT: } # CHECK-NEXT: Section { @@ -142,7 +142,7 @@ __start: # CHECK-NEXT: SHF_ALLOC (0x2) # CHECK-NEXT: SHF_WRITE (0x1) # CHECK-NEXT: ] -# CHECK-NEXT: Address: 0x40000 +# CHECK-NEXT: Address: 0x30010 # CHECK-NEXT: Offset: 0x20008 # CHECK-NEXT: Size: 0 # CHECK-NEXT: Link: 0 @@ -246,8 +246,8 @@ __start: # CHECK-NEXT: Offset: 0x34 # CHECK-NEXT: VirtualAddress: 0x10034 # CHECK-NEXT: PhysicalAddress: 0x10034 -# CHECK-NEXT: FileSize: 192 -# CHECK-NEXT: MemSize: 192 +# CHECK-NEXT: FileSize: 160 +# CHECK-NEXT: MemSize: 160 # CHECK-NEXT: Flags [ (0x4) # CHECK-NEXT: PF_R (0x4) # CHECK-NEXT: ] @@ -258,8 +258,8 @@ __start: # CHECK-NEXT: Offset: 0x0 # CHECK-NEXT: VirtualAddress: 0x10000 # CHECK-NEXT: PhysicalAddress: 0x10000 -# CHECK-NEXT: FileSize: 296 -# CHECK-NEXT: MemSize: 296 +# CHECK-NEXT: FileSize: 264 +# CHECK-NEXT: MemSize: 264 # CHECK-NEXT: Flags [ (0x4) # CHECK-NEXT: PF_R (0x4) # CHECK-NEXT: ] @@ -284,7 +284,7 @@ __start: # CHECK-NEXT: VirtualAddress: 0x30000 # CHECK-NEXT: PhysicalAddress: 0x30000 # CHECK-NEXT: FileSize: 8 -# CHECK-NEXT: MemSize: 65536 +# CHECK-NEXT: MemSize: 16 # CHECK-NEXT: Flags [ # CHECK-NEXT: PF_R # CHECK-NEXT: PF_W @@ -292,18 +292,6 @@ __start: # CHECK-NEXT: Alignment: 65536 # CHECK-NEXT: } # CHECK-NEXT: ProgramHeader { -# CHECK-NEXT: Type: PT_GNU_RELRO (0x6474E552) -# CHECK-NEXT: Offset: 0x20000 -# CHECK-NEXT: VirtualAddress: 0x30000 -# CHECK-NEXT: PhysicalAddress: 0x30000 -# CHECK-NEXT: FileSize: 8 -# CHECK-NEXT: MemSize: 65536 -# CHECK-NEXT: Flags [ (0x4) -# CHECK-NEXT: PF_R (0x4) -# CHECK-NEXT: ] -# CHECK-NEXT: Alignment: 1 -# CHECK-NEXT: } -# CHECK-NEXT: ProgramHeader { # CHECK-NEXT: Type: PT_GNU_STACK # CHECK-NEXT: Offset: 0x0 # CHECK-NEXT: VirtualAddress: 0x0 Modified: vendor/lld/dist/test/ELF/eh-frame-hdr-abs-fde.s ============================================================================== --- vendor/lld/dist/test/ELF/eh-frame-hdr-abs-fde.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/eh-frame-hdr-abs-fde.s Sun Feb 5 19:38:00 2017 (r313297) @@ -9,10 +9,10 @@ # REQUIRES: mips # CHECK: Contents of section .eh_frame_hdr: -# CHECK-NEXT: 10148 011b033b 00000010 00000001 0000feb8 -# ^-- 0x20000 - 0x10148 +# CHECK-NEXT: 10128 011b033b 00000010 00000001 0000fed8 +# ^-- 0x20000 - 0x10138 # .text - .eh_frame_hdr -# CHECK-NEXT: 10158 0000002c +# CHECK-NEXT: 10138 0000002c # CHECK: Contents of section .text: # CHECK-NEXT: 20000 00000000 Modified: vendor/lld/dist/test/ELF/mips-64-disp.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-64-disp.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-64-disp.s Sun Feb 5 19:38:00 2017 (r313297) @@ -18,23 +18,22 @@ # CHECK-NEXT: 20010: 24 42 80 38 addiu $2, $2, -32712 # CHECK: 0000000000020014 .text 00000000 foo -# CHECK: 0000000000047ff0 *ABS* 00000000 .hidden _gp # CHECK: 0000000000020000 .text 00000000 __start # CHECK: 0000000000000000 g F *UND* 00000000 foo1a # GOT: Relocations [ # GOT-NEXT: ] # GOT-NEXT: Primary GOT { -# GOT-NEXT: Canonical gp value: 0x47FF0 +# GOT-NEXT: Canonical gp value: # GOT-NEXT: Reserved entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40000 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32752 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Purpose: Lazy resolver # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40008 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32744 # GOT-NEXT: Initial: 0x8000000000000000 # GOT-NEXT: Purpose: Module pointer (GNU extension) @@ -42,29 +41,29 @@ # GOT-NEXT: ] # GOT-NEXT: Local entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40010 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32736 # GOT-NEXT: Initial: 0x20014 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40018 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32728 # GOT-NEXT: Initial: 0x20004 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40020 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32720 # GOT-NEXT: Initial: 0x20008 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40028 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32712 # GOT-NEXT: Initial: 0x2000C # GOT-NEXT: } # GOT-NEXT: ] # GOT-NEXT: Global entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40030 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32704 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-64-got.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-64-got.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-64-got.s Sun Feb 5 19:38:00 2017 (r313297) @@ -19,23 +19,22 @@ # CHECK-NEXT: 20010: 24 42 80 38 addiu $2, $2, -32712 # CHECK: 0000000000020018 .text 00000000 foo -# CHECK: 0000000000047ff0 *ABS* 00000000 .hidden _gp # CHECK: 0000000000020000 .text 00000000 __start # CHECK: 0000000000020014 .text 00000000 bar # GOT: Relocations [ # GOT-NEXT: ] # GOT-NEXT: Primary GOT { -# GOT-NEXT: Canonical gp value: 0x47FF0 +# GOT-NEXT: Canonical gp value: # GOT-NEXT: Reserved entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40000 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32752 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Purpose: Lazy resolver # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40008 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32744 # GOT-NEXT: Initial: 0x8000000000000000 # GOT-NEXT: Purpose: Module pointer (GNU extension) @@ -43,29 +42,29 @@ # GOT-NEXT: ] # GOT-NEXT: Local entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40010 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32736 # GOT-NEXT: Initial: 0x20000 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40018 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32728 # GOT-NEXT: Initial: 0x30000 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40020 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32720 # GOT-NEXT: Initial: 0x20014 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40028 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32712 # GOT-NEXT: Initial: 0x20018 # GOT-NEXT: } # GOT-NEXT: ] # GOT-NEXT: Global entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x40030 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32704 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-64-rels.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-64-rels.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-64-rels.s Sun Feb 5 19:38:00 2017 (r313297) @@ -20,7 +20,7 @@ # ^-- %lo(0x17ff0) # CHECK: Contents of section .rodata: -# CHECK-NEXT: 10190 ffffffff fffe8014 +# CHECK-NEXT: 10158 ffffffff fffe8014 # ^-- 0x20004 - 0x37ff0 = 0xfffffffffffe8014 # CHECK: 0000000000020004 .text 00000000 loc Modified: vendor/lld/dist/test/ELF/mips-got-and-copy.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-and-copy.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-and-copy.s Sun Feb 5 19:38:00 2017 (r313297) @@ -14,29 +14,29 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (7) .rel.dyn { -# CHECK-NEXT: 0x{{[0-9A-F]+}} R_MIPS_COPY data0 -# CHECK-NEXT: 0x{{[0-9A-F]+}} R_MIPS_COPY data1 +# CHECK-NEXT: 0x[[DATA0:[0-9A-F]+]] R_MIPS_COPY data0 +# CHECK-NEXT: 0x[[DATA1:[0-9A-F]+]] R_MIPS_COPY data1 # CHECK-NEXT: } # CHECK-NEXT: ] # CHECK-NEXT: Primary GOT { -# CHECK-NEXT: Canonical gp value: 0x47FF0 +# CHECK-NEXT: Canonical gp value: # CHECK-NEXT: Reserved entries [ # CHECK: ] # CHECK-NEXT: Local entries [ # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x40008 +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32744 -# CHECK-NEXT: Initial: 0x50000 +# CHECK-NEXT: Initial: 0x[[DATA0]] # CHECK-NEXT: } # CHECK-NEXT: ] # CHECK-NEXT: Global entries [ # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x4000C +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32740 -# CHECK-NEXT: Initial: 0x50004 -# CHECK-NEXT: Value: 0x50004 -# CHECK-NEXT: Type: Object (0x1) -# CHECK-NEXT: Section: .bss (0xD) +# CHECK-NEXT: Initial: 0x[[DATA1]] +# CHECK-NEXT: Value: 0x[[DATA1]] +# CHECK-NEXT: Type: Object +# CHECK-NEXT: Section: .bss # CHECK-NEXT: Name: data1@ # CHECK-NEXT: } # CHECK-NEXT: ] Modified: vendor/lld/dist/test/ELF/mips-got-extsym.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-extsym.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-extsym.s Sun Feb 5 19:38:00 2017 (r313297) @@ -30,7 +30,7 @@ # CHECK: Local entries [ # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x40008 +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32744 # CHECK-NEXT: Initial: 0x20008 # ^-- bar @@ -38,7 +38,7 @@ # CHECK-NEXT: ] # CHECK-NEXT: Global entries [ # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x4000C +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32740 # CHECK-NEXT: Initial: 0x0 # CHECK-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-got-hilo.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-hilo.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-hilo.s Sun Feb 5 19:38:00 2017 (r313297) @@ -20,22 +20,22 @@ # GOT-NEXT: ] # GOT: Primary GOT { -# GOT-NEXT: Canonical gp value: 0x37FF0 +# GOT-NEXT: Canonical gp value: # GOT: Local entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x30008 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32744 # GOT-NEXT: Initial: 0x20000 # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x3000C +# GOT-NEXT: Address: # GOT-NEXT: Access: -32740 # GOT-NEXT: Initial: 0x20004 # GOT-NEXT: } # GOT-NEXT: ] # GOT-NEXT: Global entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x30010 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32736 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-got-redundant.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-redundant.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-redundant.s Sun Feb 5 19:38:00 2017 (r313297) @@ -8,25 +8,25 @@ # CHECK: Local entries [ # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x40008 +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32744 # CHECK-NEXT: Initial: 0x20000 # ^-- loc1 # CHECK-NEXT: } # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x4000C +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32740 # CHECK-NEXT: Initial: 0x30000 # ^-- loc2, loc3, loc4 # CHECK-NEXT: } # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x40010 +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32736 # CHECK-NEXT: Initial: 0x40000 # ^-- redundant # CHECK-NEXT: } # CHECK-NEXT: Entry { -# CHECK-NEXT: Address: 0x40014 +# CHECK-NEXT: Address: # CHECK-NEXT: Access: -32732 # CHECK-NEXT: Initial: 0x30008 # ^-- glb1 Modified: vendor/lld/dist/test/ELF/mips-got-relocs.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-relocs.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-relocs.s Sun Feb 5 19:38:00 2017 (r313297) @@ -45,21 +45,21 @@ v1: .word 0 # EXE_SYM: Sections: -# EXE_SYM: .got 0000000c 0000000000040000 DATA +# EXE_SYM: .got 0000000c 0000000000030010 DATA # EXE_SYM: SYMBOL TABLE: -# EXE_SYM: 00047ff0 *ABS* 00000000 .hidden _gp +# EXE_SYM: 00038000 *ABS* 00000000 .hidden _gp # ^-- .got + GP offset (0x7ff0) # EXE_SYM: 00030000 g .data 00000004 v1 # EXE_GOT_BE: Contents of section .got: -# EXE_GOT_BE: 40000 00000000 80000000 00030000 +# EXE_GOT_BE: 30010 00000000 80000000 00030000 # ^ ^ ^-- v1 (0x30000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) # EXE_GOT_EL: Contents of section .got: -# EXE_GOT_EL: 40000 00000000 00000080 00000300 +# EXE_GOT_EL: 30010 00000000 00000080 00000300 # ^ ^ ^-- v1 (0x30000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) @@ -69,20 +69,20 @@ v1: # EXE_DIS_EL: 20000: 18 80 02 3c lui $2, 32792 # DSO_SYM: Sections: -# DSO_SYM: .got 0000000c 0000000000030000 DATA +# DSO_SYM: .got 0000000c 0000000000020010 DATA # DSO_SYM: SYMBOL TABLE: -# DSO_SYM: 00037ff0 *ABS* 00000000 .hidden _gp +# DSO_SYM: 00028000 *ABS* 00000000 .hidden _gp # ^-- .got + GP offset (0x7ff0) # DSO_SYM: 00020000 g .data 00000004 v1 # DSO_GOT_BE: Contents of section .got: -# DSO_GOT_BE: 30000 00000000 80000000 00020000 +# DSO_GOT_BE: 20010 00000000 80000000 00020000 # ^ ^ ^-- v1 (0x20000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) # DSO_GOT_EL: Contents of section .got: -# DSO_GOT_EL: 30000 00000000 00000080 00000200 +# DSO_GOT_EL: 20010 00000000 00000080 00000200 # ^ ^ ^-- v1 (0x20000) # | +-- Module pointer (0x80000000) # +-- Lazy resolver (0x0) Modified: vendor/lld/dist/test/ELF/mips-got-weak.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got-weak.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got-weak.s Sun Feb 5 19:38:00 2017 (r313297) @@ -47,16 +47,16 @@ # NOSYM-NEXT: 0x70000013 MIPS_GOTSYM 0x1 # NOSYM: Primary GOT { -# NOSYM-NEXT: Canonical gp value: 0x37FF0 +# NOSYM-NEXT: Canonical gp value: # NOSYM-NEXT: Reserved entries [ # NOSYM-NEXT: Entry { -# NOSYM-NEXT: Address: 0x30000 +# NOSYM-NEXT: Address: # NOSYM-NEXT: Access: -32752 # NOSYM-NEXT: Initial: 0x0 # NOSYM-NEXT: Purpose: Lazy resolver # NOSYM-NEXT: } # NOSYM-NEXT: Entry { -# NOSYM-NEXT: Address: 0x30004 +# NOSYM-NEXT: Address: # NOSYM-NEXT: Access: -32748 # NOSYM-NEXT: Initial: 0x80000000 # NOSYM-NEXT: Purpose: Module pointer (GNU extension) @@ -66,7 +66,7 @@ # NOSYM-NEXT: ] # NOSYM-NEXT: Global entries [ # NOSYM-NEXT: Entry { -# NOSYM-NEXT: Address: 0x30008 +# NOSYM-NEXT: Address: # NOSYM-NEXT: Access: -32744 # NOSYM-NEXT: Initial: 0x20000 # NOSYM-NEXT: Value: 0x20000 @@ -75,7 +75,7 @@ # NOSYM-NEXT: Name: foo # NOSYM-NEXT: } # NOSYM-NEXT: Entry { -# NOSYM-NEXT: Address: 0x3000C +# NOSYM-NEXT: Address: # NOSYM-NEXT: Access: -32740 # NOSYM-NEXT: Initial: 0x0 # NOSYM-NEXT: Value: 0x0 @@ -84,7 +84,7 @@ # NOSYM-NEXT: Name: bar # NOSYM-NEXT: } # NOSYM-NEXT: Entry { -# NOSYM-NEXT: Address: 0x30010 +# NOSYM-NEXT: Address: # NOSYM-NEXT: Access: -32736 # NOSYM-NEXT: Initial: 0x20004 # NOSYM-NEXT: Value: 0x20004 @@ -115,16 +115,16 @@ # SYM-NEXT: 0x70000013 MIPS_GOTSYM 0x3 # SYM: Primary GOT { -# SYM-NEXT: Canonical gp value: 0x37FF0 +# SYM-NEXT: Canonical gp value: # SYM-NEXT: Reserved entries [ # SYM-NEXT: Entry { -# SYM-NEXT: Address: 0x30000 +# SYM-NEXT: Address: # SYM-NEXT: Access: -32752 # SYM-NEXT: Initial: 0x0 # SYM-NEXT: Purpose: Lazy resolver # SYM-NEXT: } # SYM-NEXT: Entry { -# SYM-NEXT: Address: 0x30004 +# SYM-NEXT: Address: # SYM-NEXT: Access: -32748 # SYM-NEXT: Initial: 0x80000000 # SYM-NEXT: Purpose: Module pointer (GNU extension) @@ -132,19 +132,19 @@ # SYM-NEXT: ] # SYM-NEXT: Local entries [ # SYM-NEXT: Entry { -# SYM-NEXT: Address: 0x30008 +# SYM-NEXT: Address: # SYM-NEXT: Access: -32744 # SYM-NEXT: Initial: 0x20000 # SYM-NEXT: } # SYM-NEXT: Entry { -# SYM-NEXT: Address: 0x3000C +# SYM-NEXT: Address: # SYM-NEXT: Access: -32740 # SYM-NEXT: Initial: 0x20004 # SYM-NEXT: } # SYM-NEXT: ] # SYM-NEXT: Global entries [ # SYM-NEXT: Entry { -# SYM-NEXT: Address: 0x30010 +# SYM-NEXT: Address: # SYM-NEXT: Access: -32736 # SYM-NEXT: Initial: 0x0 # SYM-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-got16.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-got16.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-got16.s Sun Feb 5 19:38:00 2017 (r313297) @@ -29,16 +29,16 @@ # GOT-NEXT: ] # GOT: Primary GOT { -# GOT-NEXT: Canonical gp value: 0x57FF0 +# GOT-NEXT: Canonical gp value: # GOT-NEXT: Reserved entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50000 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32752 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Purpose: Lazy resolver # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50004 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32748 # GOT-NEXT: Initial: 0x80000000 # GOT-NEXT: Purpose: Module pointer (GNU extension) @@ -46,44 +46,44 @@ # GOT-NEXT: ] # GOT-NEXT: Local entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50008 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32744 # GOT-NEXT: Initial: 0x10000 # ^-- (0x1002c + 0x8000) & ~0xffff # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x5000C +# GOT-NEXT: Address: # GOT-NEXT: Access: -32740 # GOT-NEXT: Initial: 0x20000 # ^-- redundant unused entry # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50010 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32736 # GOT-NEXT: Initial: 0x20000 # ^-- redundant unused entry # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50014 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32732 # GOT-NEXT: Initial: 0x30000 # ^-- (0x29000 + 0x8000) & ~0xffff # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50018 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32728 # GOT-NEXT: Initial: 0x40000 # ^-- (0x29000 + 0x10004 + 0x8000) & ~0xffff # ^-- (0x29000 + 0x18004 + 0x8000) & ~0xffff # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x5001C +# GOT-NEXT: Address: # GOT-NEXT: Access: -32724 # GOT-NEXT: Initial: 0x50000 # ^-- redundant unused entry # GOT-NEXT: } # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50020 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32720 # GOT-NEXT: Initial: 0x41008 # ^-- 'bar' address @@ -91,7 +91,7 @@ # GOT-NEXT: ] # GOT-NEXT: Global entries [ # GOT-NEXT: Entry { -# GOT-NEXT: Address: 0x50024 +# GOT-NEXT: Address: # GOT-NEXT: Access: -32716 # GOT-NEXT: Initial: 0x0 # GOT-NEXT: Value: 0x0 Modified: vendor/lld/dist/test/ELF/mips-gp-ext.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-gp-ext.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-gp-ext.s Sun Feb 5 19:38:00 2017 (r313297) @@ -20,10 +20,10 @@ # REQUIRES: mips # REL: Contents of section .text: -# REL-NEXT: 0000 3c080000 2108010c 8f82fff0 +# REL-NEXT: 0000 3c080000 2108010c 8f82fffc # ^-- %hi(_gp_disp) # ^-- %lo(_gp_disp) -# ^-- 8 - (0x10c - 0xf4) +# ^-- 8 - (0x10c - 0x100) # G - (GP - .got) # REL: Contents of section .reginfo: @@ -40,10 +40,10 @@ # REL: 0000010c *ABS* 00000000 .hidden _gp # ABS: Contents of section .text: -# ABS-NEXT: 0000 3c080000 21080200 8f82fefc +# ABS-NEXT: 0000 3c080000 21080200 8f82ff08 # ^-- %hi(_gp_disp) # ^-- %lo(_gp_disp) -# ^-- 8 - (0x200 - 0xf4) +# ^-- 8 - (0x200 - 0x100) # G - (GP - .got) # ABS: Contents of section .reginfo: Modified: vendor/lld/dist/test/ELF/mips-gp-lowest.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-gp-lowest.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-gp-lowest.s Sun Feb 5 19:38:00 2017 (r313297) @@ -26,7 +26,7 @@ foo: # CHECK-NEXT: SHF_MIPS_GPREL # CHECK-NEXT: SHF_WRITE # CHECK-NEXT: ] -# CHECK-NEXT: Address: 0xDD +# CHECK-NEXT: Address: 0xE0 # CHECK: } # CHECK: Section { # CHECK: Name: .got @@ -40,5 +40,5 @@ foo: # CHECK: } # CHECK: Name: _gp (5) -# CHECK-NEXT: Value: 0x80CD -# ^-- 0xDD + 0x7ff0 +# CHECK-NEXT: Value: 0x80D0 +# ^-- 0xE0 + 0x7ff0 Modified: vendor/lld/dist/test/ELF/mips-gprel32-relocs-gp0.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-gprel32-relocs-gp0.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-gprel32-relocs-gp0.s Sun Feb 5 19:38:00 2017 (r313297) @@ -22,7 +22,7 @@ # DSO: GP: 0x27FF0 # DUMP: Contents of section .rodata: -# DUMP: 0114 ffff0004 ffff0008 +# DUMP: 00f4 ffff0004 ffff0008 # ^ 0x10004 + 0x7ff0 - 0x27ff0 # ^ 0x10008 + 0x7ff0 - 0x27ff0 Modified: vendor/lld/dist/test/ELF/mips-gprel32-relocs.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-gprel32-relocs.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-gprel32-relocs.s Sun Feb 5 19:38:00 2017 (r313297) @@ -21,7 +21,7 @@ v1: .gpword bar # CHECK: Contents of section .rodata: -# CHECK: 0114 fffe8014 fffe8018 +# CHECK: 00f4 fffe8014 fffe8018 # ^ 0x10004 - 0x27ff0 # ^ 0x10008 - 0x27ff0 Modified: vendor/lld/dist/test/ELF/mips-hilo-gp-disp.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-hilo-gp-disp.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-hilo-gp-disp.s Sun Feb 5 19:38:00 2017 (r313297) @@ -24,32 +24,32 @@ bar: # EXE-NEXT: __start: # EXE-NEXT: 20000: 3c 08 00 02 lui $8, 2 # ^-- %hi(0x47ff0-0x20000) -# EXE-NEXT: 20004: 21 08 7f f0 addi $8, $8, 32752 -# ^-- %lo(0x47ff0-0x20004+4) +# EXE-NEXT: 20004: 21 08 80 00 addi $8, $8, -32768 +# ^-- %lo(0x38000-0x20004+4) # EXE: bar: -# EXE-NEXT: 2000c: 3c 08 00 02 lui $8, 2 -# ^-- %hi(0x47ff0-0x2000c) -# EXE-NEXT: 20010: 21 08 7f e4 addi $8, $8, 32740 -# ^-- %lo(0x47ff0-0x20010+4) +# EXE-NEXT: 2000c: 3c 08 00 01 lui $8, 1 +# ^-- %hi(0x38000-0x2000c) +# EXE-NEXT: 20010: 21 08 7f f4 addi $8, $8, 32756 +# ^-- %lo(0x38000-0x20010+4) # EXE: SYMBOL TABLE: # EXE: 0002000c .text 00000000 bar -# EXE: 00047ff0 *ABS* 00000000 .hidden _gp +# EXE: 00038000 *ABS* 00000000 .hidden _gp # EXE: 00020000 .text 00000000 __start # SO: Disassembly of section .text: # SO-NEXT: __start: # SO-NEXT: 10000: 3c 08 00 02 lui $8, 2 -# ^-- %hi(0x37ff0-0x10000) -# SO-NEXT: 10004: 21 08 7f f0 addi $8, $8, 32752 -# ^-- %lo(0x37ff0-0x10004+4) +# ^-- %hi(0x28000-0x10000) +# SO-NEXT: 10004: 21 08 80 00 addi $8, $8, -32768 +# ^-- %lo(0x28000-0x10004+4) # SO: bar: -# SO-NEXT: 1000c: 3c 08 00 02 lui $8, 2 -# ^-- %hi(0x37ff0-0x1000c) -# SO-NEXT: 10010: 21 08 7f e4 addi $8, $8, 32740 -# ^-- %lo(0x37ff0-0x10010+4) +# SO-NEXT: 1000c: 3c 08 00 01 lui $8, 1 +# ^-- %hi(0x28000-0x1000c) +# SO-NEXT: 10010: 21 08 7f f4 addi $8, $8, 32756 +# ^-- %lo(0x28000-0x10010+4) # SO: SYMBOL TABLE: # SO: 0001000c .text 00000000 bar -# SO: 00037ff0 *ABS* 00000000 .hidden _gp +# SO: 00028000 *ABS* 00000000 .hidden _gp # SO: 00010000 .text 00000000 __start Modified: vendor/lld/dist/test/ELF/mips-n32-rels.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-n32-rels.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-n32-rels.s Sun Feb 5 19:38:00 2017 (r313297) @@ -38,7 +38,7 @@ # ^-- %lo(0x17ff0) # CHECK: Contents of section .rodata: -# CHECK-NEXT: 100f4 00020004 +# CHECK-NEXT: 100d4 00020004 # ^-- loc # CHECK: 00020004 .text 00000000 loc Modified: vendor/lld/dist/test/ELF/mips-options.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-options.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-options.s Sun Feb 5 19:38:00 2017 (r313297) @@ -17,11 +17,11 @@ __start: lui $gp, %hi(%neg(%gp_rel(g1))) # CHECK: Name: _gp -# CHECK-NEXT: Value: 0x100008258 +# CHECK-NEXT: Value: 0x[[GP:[0-9A-F]+]] # CHECK: MIPS Options { # CHECK-NEXT: ODK_REGINFO { -# CHECK-NEXT: GP: 0x100008258 +# CHECK-NEXT: GP: 0x[[GP]] # CHECK-NEXT: General Mask: 0x10000001 # CHECK-NEXT: Co-Proc Mask0: 0x0 # CHECK-NEXT: Co-Proc Mask1: 0x0 Modified: vendor/lld/dist/test/ELF/mips-tls-64.s ============================================================================== --- vendor/lld/dist/test/ELF/mips-tls-64.s Sun Feb 5 19:37:57 2017 (r313296) +++ vendor/lld/dist/test/ELF/mips-tls-64.s Sun Feb 5 19:38:00 2017 (r313297) @@ -23,11 +23,11 @@ # DIS-NEXT: 20010: 24 62 80 58 addiu $2, $3, -32680 # DIS: Contents of section .got: -# DIS-NEXT: 40008 00000000 00000000 80000000 00000000 -# DIS-NEXT: 40018 00000000 00000000 00000000 00000000 -# DIS-NEXT: 40028 00000000 00000000 00000000 00000001 -# DIS-NEXT: 40038 00000000 00000000 00000000 00000001 -# DIS-NEXT: 40048 ffffffff ffff8004 ffffffff ffff9004 +# DIS-NEXT: 30010 00000000 00000000 80000000 00000000 +# DIS-NEXT: 30020 00000000 00000000 00000000 00000000 +# DIS-NEXT: 30030 00000000 00000000 00000000 00000001 +# DIS-NEXT: 30040 00000000 00000000 00000000 00000001 +# DIS-NEXT: 30050 ffffffff ffff8004 ffffffff ffff9004 # DIS: 0000000000040000 l .tdata 00000000 .tdata # DIS: 0000000000040000 l .tdata 00000000 loc @@ -36,13 +36,13 @@ # CHECK: Relocations [ # CHECK-NEXT: Section (7) .rela.dyn { -# CHECK-NEXT: 0x40018 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# CHECK-NEXT: 0x40020 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# CHECK-NEXT: 0x40028 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# CHECK-NEXT: 0x30020 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# CHECK-NEXT: 0x30028 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# CHECK-NEXT: 0x30030 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 # CHECK-NEXT: } # CHECK-NEXT: ] # CHECK-NEXT: Primary GOT { -# CHECK-NEXT: Canonical gp value: 0x47FF8 +# CHECK-NEXT: Canonical gp value: 0x38000 # CHECK-NEXT: Reserved entries [ # CHECK: ] # CHECK-NEXT: Local entries [ @@ -60,25 +60,25 @@ # ^-- -32680 R_MIPS_TLS_GOTTPREL VA - 0x7000 bar # DIS-SO: Contents of section .got: -# DIS-SO-NEXT: 20008 00000000 00000000 80000000 00000000 -# DIS-SO-NEXT: 20018 00000000 00000000 00000000 00000000 -# DIS-SO-NEXT: 20028 00000000 00000000 00000000 00000000 -# DIS-SO-NEXT: 20038 00000000 00000000 00000000 00000000 -# DIS-SO-NEXT: 20048 00000000 00000000 00000000 00000000 +# DIS-SO-NEXT: 20000 00000000 00000000 80000000 00000000 +# DIS-SO-NEXT: 20010 00000000 00000000 00000000 00000000 +# DIS-SO-NEXT: 20020 00000000 00000000 00000000 00000000 +# DIS-SO-NEXT: 20030 00000000 00000000 00000000 00000000 +# DIS-SO-NEXT: 20040 00000000 00000000 00000000 00000000 # SO: Relocations [ # SO-NEXT: Section (7) .rela.dyn { -# SO-NEXT: 0x20030 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - 0x0 -# SO-NEXT: 0x20040 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x20048 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x20050 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 -# SO-NEXT: 0x20018 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# SO-NEXT: 0x20020 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 -# SO-NEXT: 0x20028 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# SO-NEXT: 0x20028 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE - 0x0 +# SO-NEXT: 0x20038 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 +# SO-NEXT: 0x20040 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 +# SO-NEXT: 0x20048 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE bar 0x0 +# SO-NEXT: 0x20010 R_MIPS_TLS_DTPMOD64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# SO-NEXT: 0x20018 R_MIPS_TLS_DTPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 +# SO-NEXT: 0x20020 R_MIPS_TLS_TPREL64/R_MIPS_NONE/R_MIPS_NONE foo 0x0 # SO-NEXT: } # SO-NEXT: ] # SO-NEXT: Primary GOT { -# SO-NEXT: Canonical gp value: 0x27FF8 +# SO-NEXT: Canonical gp value: 0x27FF0 # SO-NEXT: Reserved entries [ # SO: ] # SO-NEXT: Local entries [ @@ -86,14 +86,14 @@ # SO-NEXT: Global entries [ # SO-NEXT: ] # SO-NEXT: Number of TLS and multi-GOT entries: 8 -# ^-- 0x20018 R_MIPS_TLS_GD R_MIPS_TLS_DTPMOD64 foo *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:38:07 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2E598CD2388; Sun, 5 Feb 2017 19:38:07 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id CCB7D1A24; Sun, 5 Feb 2017 19:38:06 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15Jc5aG039211; Sun, 5 Feb 2017 19:38:05 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15Jc5cb039210; Sun, 5 Feb 2017 19:38:05 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051938.v15Jc5cb039210@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:38:05 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313298 - vendor/lld/lld-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:38:07 -0000 Author: dim Date: Sun Feb 5 19:38:05 2017 New Revision: 313298 URL: https://svnweb.freebsd.org/changeset/base/313298 Log: Tag lld release_40 branch r294123. Added: vendor/lld/lld-release_40-r294123/ - copied from r313297, vendor/lld/dist/ From owner-svn-src-vendor@freebsd.org Sun Feb 5 19:38:11 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id AB09ECD23DE; Sun, 5 Feb 2017 19:38:11 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 5D9A21AB6; Sun, 5 Feb 2017 19:38:11 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v15JcA4E039260; Sun, 5 Feb 2017 19:38:10 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v15JcASk039259; Sun, 5 Feb 2017 19:38:10 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702051938.v15JcASk039259@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sun, 5 Feb 2017 19:38:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313299 - vendor/lldb/lldb-release_40-r294123 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Feb 2017 19:38:11 -0000 Author: dim Date: Sun Feb 5 19:38:10 2017 New Revision: 313299 URL: https://svnweb.freebsd.org/changeset/base/313299 Log: Tag lldb release_40 branch r294123. Added: vendor/lldb/lldb-release_40-r294123/ - copied from r313298, vendor/lldb/dist/ From owner-svn-src-vendor@freebsd.org Fri Feb 10 23:12:40 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 78FECCD9A02; Fri, 10 Feb 2017 23:12:40 +0000 (UTC) (envelope-from mm@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 3DA19A38; Fri, 10 Feb 2017 23:12:40 +0000 (UTC) (envelope-from mm@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1ANCdq7017255; Fri, 10 Feb 2017 23:12:39 GMT (envelope-from mm@FreeBSD.org) Received: (from mm@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1ANCcn5017250; Fri, 10 Feb 2017 23:12:38 GMT (envelope-from mm@FreeBSD.org) Message-Id: <201702102312.v1ANCcn5017250@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mm set sender to mm@FreeBSD.org using -f From: Martin Matuska Date: Fri, 10 Feb 2017 23:12:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313569 - in vendor/libarchive/dist: . libarchive X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2017 23:12:40 -0000 Author: mm Date: Fri Feb 10 23:12:38 2017 New Revision: 313569 URL: https://svnweb.freebsd.org/changeset/base/313569 Log: Update vendor/libarchive to git b3bd0b81a1a06909f766dea8be4072ef81de62b8 Vendor bugfixes: cpio reader sanity fix (OSS-Fuzz 504) WARC reader sanity fixes (OSS-Fuzz 511, 526, 532, 552) mtree reader time parsing fix (OSS-Fuzz 538) XAR reader memleak fix (OSS-Fuzz 551) Modified: vendor/libarchive/dist/Makefile.am vendor/libarchive/dist/libarchive/archive_read_support_format_cpio.c vendor/libarchive/dist/libarchive/archive_read_support_format_mtree.c vendor/libarchive/dist/libarchive/archive_read_support_format_warc.c vendor/libarchive/dist/libarchive/archive_read_support_format_xar.c Modified: vendor/libarchive/dist/Makefile.am ============================================================================== --- vendor/libarchive/dist/Makefile.am Fri Feb 10 22:02:45 2017 (r313568) +++ vendor/libarchive/dist/Makefile.am Fri Feb 10 23:12:38 2017 (r313569) @@ -634,7 +634,7 @@ libarchive_test_EXTRA_DIST=\ libarchive/test/test_compat_mac-2.tar.Z.uu \ libarchive/test/test_compat_pax_libarchive_2x.tar.Z.uu \ libarchive/test/test_compat_perl_archive_tar.tar.uu \ - libarchive/test/test_compat_plexus_archiver_tar.uu \ + libarchive/test/test_compat_plexus_archiver_tar.tar.uu \ libarchive/test/test_compat_solaris_pax_sparse_1.pax.Z.uu \ libarchive/test/test_compat_solaris_pax_sparse_2.pax.Z.uu \ libarchive/test/test_compat_solaris_tar_acl.tar.uu \ @@ -830,6 +830,7 @@ libarchive_test_EXTRA_DIST=\ libarchive/test/test_read_large_splitted_rar_ac.uu \ libarchive/test/test_read_large_splitted_rar_ad.uu \ libarchive/test/test_read_large_splitted_rar_ae.uu \ + libarchive/test/test_read_pax_schily_xattr.tar.uu \ libarchive/test/test_read_splitted_rar_aa.uu \ libarchive/test/test_read_splitted_rar_ab.uu \ libarchive/test/test_read_splitted_rar_ac.uu \ Modified: vendor/libarchive/dist/libarchive/archive_read_support_format_cpio.c ============================================================================== --- vendor/libarchive/dist/libarchive/archive_read_support_format_cpio.c Fri Feb 10 22:02:45 2017 (r313568) +++ vendor/libarchive/dist/libarchive/archive_read_support_format_cpio.c Fri Feb 10 23:12:38 2017 (r313569) @@ -356,7 +356,7 @@ archive_read_format_cpio_read_header(str struct archive_entry *entry) { struct cpio *cpio; - const void *h; + const void *h, *hl; struct archive_string_conv *sconv; size_t namelength; size_t name_pad; @@ -406,11 +406,11 @@ archive_read_format_cpio_read_header(str "Rejecting malformed cpio archive: symlink contents exceed 1 megabyte"); return (ARCHIVE_FATAL); } - h = __archive_read_ahead(a, + hl = __archive_read_ahead(a, (size_t)cpio->entry_bytes_remaining, NULL); - if (h == NULL) + if (hl == NULL) return (ARCHIVE_FATAL); - if (archive_entry_copy_symlink_l(entry, (const char *)h, + if (archive_entry_copy_symlink_l(entry, (const char *)hl, (size_t)cpio->entry_bytes_remaining, sconv) != 0) { if (errno == ENOMEM) { archive_set_error(&a->archive, ENOMEM, @@ -434,7 +434,7 @@ archive_read_format_cpio_read_header(str * header. XXX */ /* Compare name to "TRAILER!!!" to test for end-of-archive. */ - if (namelength == 11 && memcmp((const char *)h, "TRAILER!!!", + if (namelength == 11 && strncmp((const char *)h, "TRAILER!!!", 11) == 0) { /* TODO: Store file location of start of block. */ archive_clear_error(&a->archive); Modified: vendor/libarchive/dist/libarchive/archive_read_support_format_mtree.c ============================================================================== --- vendor/libarchive/dist/libarchive/archive_read_support_format_mtree.c Fri Feb 10 22:02:45 2017 (r313568) +++ vendor/libarchive/dist/libarchive/archive_read_support_format_mtree.c Fri Feb 10 23:12:38 2017 (r313569) @@ -1608,8 +1608,11 @@ parse_keyword(struct archive_read *a, st if (*val == '.') { ++val; ns = (long)mtree_atol10(&val); - } else - ns = 0; + if (ns < 0) + ns = 0; + else if (ns > 999999999) + ns = 999999999; + } if (m > my_time_t_max) m = my_time_t_max; else if (m < my_time_t_min) Modified: vendor/libarchive/dist/libarchive/archive_read_support_format_warc.c ============================================================================== --- vendor/libarchive/dist/libarchive/archive_read_support_format_warc.c Fri Feb 10 22:02:45 2017 (r313568) +++ vendor/libarchive/dist/libarchive/archive_read_support_format_warc.c Fri Feb 10 23:12:38 2017 (r313569) @@ -134,8 +134,8 @@ static ssize_t _warc_rdlen(const char *b static time_t _warc_rdrtm(const char *buf, size_t bsz); static time_t _warc_rdmtm(const char *buf, size_t bsz); static const char *_warc_find_eoh(const char *buf, size_t bsz); +static const char *_warc_find_eol(const char *buf, size_t bsz); - int archive_read_support_format_warc(struct archive *_a) { @@ -198,8 +198,8 @@ _warc_bid(struct archive_read *a, int be /* otherwise snarf the record's version number */ ver = _warc_rdver(hdr, nrd); - if (ver == 0U || ver > 10000U) { - /* oh oh oh, best not to wager ... */ + if (ver < 1200U || ver > 10000U) { + /* we only support WARC 0.12 to 1.0 */ return -1; } @@ -254,23 +254,32 @@ start_over: &a->archive, ARCHIVE_ERRNO_MISC, "Bad record header"); return (ARCHIVE_FATAL); - } else if ((ver = _warc_rdver(buf, eoh - buf)) > 10000U) { - /* nawww, I wish they promised backward compatibility - * anyhoo, in their infinite wisdom the 28500 guys might - * come up with something we can't possibly handle so - * best end things here */ + } + ver = _warc_rdver(buf, eoh - buf); + /* we currently support WARC 0.12 to 1.0 */ + if (ver == 0U) { archive_set_error( &a->archive, ARCHIVE_ERRNO_MISC, - "Unsupported record version"); + "Invalid record version"); return (ARCHIVE_FATAL); - } else if ((cntlen = _warc_rdlen(buf, eoh - buf)) < 0) { + } else if (ver < 1200U || ver > 10000U) { + archive_set_error( + &a->archive, ARCHIVE_ERRNO_MISC, + "Unsupported record version: %u.%u", + ver / 10000, (ver % 10000) / 100); + return (ARCHIVE_FATAL); + } + cntlen = _warc_rdlen(buf, eoh - buf); + if (cntlen < 0) { /* nightmare! the specs say content-length is mandatory * so I don't feel overly bad stopping the reader here */ archive_set_error( &a->archive, EINVAL, "Bad content length"); return (ARCHIVE_FATAL); - } else if ((rtime = _warc_rdrtm(buf, eoh - buf)) == (time_t)-1) { + } + rtime = _warc_rdrtm(buf, eoh - buf); + if (rtime == (time_t)-1) { /* record time is mandatory as per WARC/1.0, * so just barf here, fast and loud */ archive_set_error( @@ -284,7 +293,7 @@ start_over: if (ver != w->pver) { /* stringify this entry's version */ archive_string_sprintf(&w->sver, - "WARC/%u.%u", ver / 10000, ver % 10000); + "WARC/%u.%u", ver / 10000, (ver % 10000) / 100); /* remember the version */ w->pver = ver; } @@ -577,51 +586,41 @@ out: } static unsigned int -_warc_rdver(const char buf[10], size_t bsz) +_warc_rdver(const char *buf, size_t bsz) { static const char magic[] = "WARC/"; - unsigned int ver; - - (void)bsz; /* UNUSED */ + unsigned int ver = 0U; + unsigned int end = 0U; - if (memcmp(buf, magic, sizeof(magic) - 1U) != 0) { - /* nope */ - return 99999U; + if (bsz < 12 || memcmp(buf, magic, sizeof(magic) - 1U) != 0) { + /* buffer too small or invalid magic */ + return ver; } /* looks good so far, read the version number for a laugh */ buf += sizeof(magic) - 1U; - /* most common case gets a quick-check here */ - if (memcmp(buf, "1.0\r\n", 5U) == 0) { - ver = 10000U; - } else { - switch (*buf) { - case '0': - case '1': - case '2': - case '3': - case '4': - case '5': - case '6': - case '7': - case '8': - if (buf[1U] == '.') { - char *on; - - /* set up major version */ - ver = (buf[0U] - '0') * 10000U; - /* minor version, anyone? */ - ver += (strtol(buf + 2U, &on, 10)) * 100U; - /* don't parse anything else */ - if (on > buf + 2U) { - break; - } - } - /* FALLTHROUGH */ - case '9': - default: - /* just make the version ridiculously high */ - ver = 999999U; - break; + + if (isdigit(buf[0U]) && (buf[1U] == '.') && isdigit(buf[2U])) { + /* we support a maximum of 2 digits in the minor version */ + if (isdigit(buf[3U])) + end = 1U; + /* set up major version */ + ver = (buf[0U] - '0') * 10000U; + /* set up minor version */ + if (end == 1U) { + ver += (buf[2U] - '0') * 1000U; + ver += (buf[3U] - '0') * 100U; + } else + ver += (buf[2U] - '0') * 100U; + /* + * WARC below version 0.12 has a space-separated header + * WARC 0.12 and above terminates the version with a CRLF + */ + if (ver >= 1200U) { + if (memcmp(buf + 3U + end, "\r\n", 2U) != 0) + ver = 0U; + } else if (ver < 1200U) { + if (!isblank(*(buf + 3U + end))) + ver = 0U; } } return ver; @@ -631,34 +630,27 @@ static unsigned int _warc_rdtyp(const char *buf, size_t bsz) { static const char _key[] = "\r\nWARC-Type:"; - const char *const eob = buf + bsz; - const char *val; + const char *val, *eol; if ((val = xmemmem(buf, bsz, _key, sizeof(_key) - 1U)) == NULL) { /* no bother */ return WT_NONE; } - /* overread whitespace */ val += sizeof(_key) - 1U; - while (val < eob && isspace((unsigned char)*val)) + if ((eol = _warc_find_eol(val, buf + bsz - val)) == NULL) { + /* no end of line */ + return WT_NONE; + } + + /* overread whitespace */ + while (val < eol && isblank((unsigned char)*val)) ++val; - if (val + 8U > eob) { - ; - } else if (memcmp(val, "resource", 8U) == 0) { - return WT_RSRC; - } else if (memcmp(val, "warcinfo", 8U) == 0) { - return WT_INFO; - } else if (memcmp(val, "metadata", 8U) == 0) { - return WT_META; - } else if (memcmp(val, "request", 7U) == 0) { - return WT_REQ; - } else if (memcmp(val, "response", 8U) == 0) { - return WT_RSP; - } else if (memcmp(val, "conversi", 8U) == 0) { - return WT_CONV; - } else if (memcmp(val, "continua", 8U) == 0) { - return WT_CONT; + if (val + 8U == eol) { + if (memcmp(val, "resource", 8U) == 0) + return WT_RSRC; + else if (memcmp(val, "response", 8U) == 0) + return WT_RSP; } return WT_NONE; } @@ -667,10 +659,7 @@ static warc_string_t _warc_rduri(const char *buf, size_t bsz) { static const char _key[] = "\r\nWARC-Target-URI:"; - const char *const eob = buf + bsz; - const char *val; - const char *uri; - const char *eol; + const char *val, *uri, *eol, *p; warc_string_t res = {0U, NULL}; if ((val = xmemmem(buf, bsz, _key, sizeof(_key) - 1U)) == NULL) { @@ -679,25 +668,32 @@ _warc_rduri(const char *buf, size_t bsz) } /* overread whitespace */ val += sizeof(_key) - 1U; - while (val < eob && isspace((unsigned char)*val)) + if ((eol = _warc_find_eol(val, buf + bsz - val)) == NULL) { + /* no end of line */ + return res; + } + + while (val < eol && isblank((unsigned char)*val)) ++val; /* overread URL designators */ - if ((uri = xmemmem(val, eob - val, "://", 3U)) == NULL) { + if ((uri = xmemmem(val, eol - val, "://", 3U)) == NULL) { /* not touching that! */ return res; - } else if ((eol = memchr(uri, '\n', eob - uri)) == NULL) { - /* no end of line? :O */ - return res; } - /* massage uri to point to after :// */ + /* spaces inside uri are not allowed, CRLF should follow */ + for (p = val; p < eol; p++) { + if (isspace(*p)) + return res; + } + + /* there must be at least space for ftp */ + if (uri < (val + 3U)) + return res; + + /* move uri to point to after :// */ uri += 3U; - /* also massage eol to point to the first whitespace - * after the last non-whitespace character before - * the end of the line */ - while (eol > uri && isspace((unsigned char)eol[-1])) - --eol; /* now then, inspect the URI */ if (memcmp(val, "file", 4U) == 0) { @@ -720,7 +716,7 @@ static ssize_t _warc_rdlen(const char *buf, size_t bsz) { static const char _key[] = "\r\nContent-Length:"; - const char *val; + const char *val, *eol; char *on = NULL; long int len; @@ -728,14 +724,24 @@ _warc_rdlen(const char *buf, size_t bsz) /* no bother */ return -1; } - - /* strtol kindly overreads whitespace for us, so use that */ val += sizeof(_key) - 1U; + if ((eol = _warc_find_eol(val, buf + bsz - val)) == NULL) { + /* no end of line */ + return -1; + } + + /* skip leading whitespace */ + while (val < eol && isblank(*val)) + val++; + /* there must be at least one digit */ + if (!isdigit(*val)) + return -1; len = strtol(val, &on, 10); - if (on == NULL || !isspace((unsigned char)*on)) { - /* hm, can we trust that number? Best not. */ + if (on != eol) { + /* line must end here */ return -1; } + return (size_t)len; } @@ -743,7 +749,7 @@ static time_t _warc_rdrtm(const char *buf, size_t bsz) { static const char _key[] = "\r\nWARC-Date:"; - const char *val; + const char *val, *eol; char *on = NULL; time_t res; @@ -751,13 +757,17 @@ _warc_rdrtm(const char *buf, size_t bsz) /* no bother */ return (time_t)-1; } + val += sizeof(_key) - 1U; + if ((eol = _warc_find_eol(val, buf + bsz - val)) == NULL ) { + /* no end of line */ + return -1; + } /* xstrpisotime() kindly overreads whitespace for us, so use that */ - val += sizeof(_key) - 1U; res = xstrpisotime(val, &on); - if (on == NULL || !isspace((unsigned char)*on)) { - /* hm, can we trust that number? Best not. */ - return (time_t)-1; + if (on != eol) { + /* line must end here */ + return -1; } return res; } @@ -766,7 +776,7 @@ static time_t _warc_rdmtm(const char *buf, size_t bsz) { static const char _key[] = "\r\nLast-Modified:"; - const char *val; + const char *val, *eol; char *on = NULL; time_t res; @@ -774,13 +784,17 @@ _warc_rdmtm(const char *buf, size_t bsz) /* no bother */ return (time_t)-1; } + val += sizeof(_key) - 1U; + if ((eol = _warc_find_eol(val, buf + bsz - val)) == NULL ) { + /* no end of line */ + return -1; + } /* xstrpisotime() kindly overreads whitespace for us, so use that */ - val += sizeof(_key) - 1U; res = xstrpisotime(val, &on); - if (on == NULL || !isspace((unsigned char)*on)) { - /* hm, can we trust that number? Best not. */ - return (time_t)-1; + if (on != eol) { + /* line must end here */ + return -1; } return res; } @@ -797,4 +811,12 @@ _warc_find_eoh(const char *buf, size_t b return hit; } +static const char* +_warc_find_eol(const char *buf, size_t bsz) +{ + static const char _marker[] = "\r\n"; + const char *hit = xmemmem(buf, bsz, _marker, sizeof(_marker) - 1U); + + return hit; +} /* archive_read_support_format_warc.c ends here */ Modified: vendor/libarchive/dist/libarchive/archive_read_support_format_xar.c ============================================================================== --- vendor/libarchive/dist/libarchive/archive_read_support_format_xar.c Fri Feb 10 22:02:45 2017 (r313568) +++ vendor/libarchive/dist/libarchive/archive_read_support_format_xar.c Fri Feb 10 23:12:38 2017 (r313569) @@ -394,6 +394,7 @@ static void checksum_update(struct archi size_t, const void *, size_t); static int checksum_final(struct archive_read *, const void *, size_t, const void *, size_t); +static void checksum_cleanup(struct archive_read *); static int decompression_init(struct archive_read *, enum enctype); static int decompress(struct archive_read *, const void **, size_t *, const void *, size_t *); @@ -923,6 +924,7 @@ xar_cleanup(struct archive_read *a) int r; xar = (struct xar *)(a->format->data); + checksum_cleanup(a); r = decompression_cleanup(a); hdlink = xar->hdlink_list; while (hdlink != NULL) { @@ -1720,6 +1722,16 @@ decompression_cleanup(struct archive_rea } static void +checksum_cleanup(struct archive_read *a) { + struct xar *xar; + + xar = (struct xar *)(a->format->data); + + _checksum_final(&(xar->a_sumwrk), NULL, 0); + _checksum_final(&(xar->e_sumwrk), NULL, 0); +} + +static void xmlattr_cleanup(struct xmlattr_list *list) { struct xmlattr *attr, *next; From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:30 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id CDC2ECDB144; Sat, 11 Feb 2017 13:25:30 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 829C492E; Sat, 11 Feb 2017 13:25:30 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPT1f075343; Sat, 11 Feb 2017 13:25:29 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPTht075342; Sat, 11 Feb 2017 13:25:29 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPTht075342@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313634 - vendor/llvm/llvm-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:30 -0000 Author: dim Date: Sat Feb 11 13:25:29 2017 New Revision: 313634 URL: https://svnweb.freebsd.org/changeset/base/313634 Log: Tag llvm release_40 branch r294803. Added: vendor/llvm/llvm-release_40-r294803/ - copied from r313633, vendor/llvm/dist/ From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:28 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 25D38CDB13A; Sat, 11 Feb 2017 13:25:28 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B7F2892B; Sat, 11 Feb 2017 13:25:27 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPQNF075295; Sat, 11 Feb 2017 13:25:26 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPOx4075273; Sat, 11 Feb 2017 13:25:24 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPOx4075273@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:24 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313633 - in vendor/llvm/dist: docs include/llvm/ADT include/llvm/CodeGen include/llvm/IR include/llvm/Target lib/Bitcode/Reader lib/CodeGen lib/MC lib/Target/AArch64 lib/Target/X86 tes... X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:28 -0000 Author: dim Date: Sat Feb 11 13:25:24 2017 New Revision: 313633 URL: https://svnweb.freebsd.org/changeset/base/313633 Log: Vendor import of llvm release_40 branch r294803: https://llvm.org/svn/llvm-project/llvm/branches/release_40@294803 Added: vendor/llvm/dist/test/CodeGen/AArch64/ldst-zero.ll vendor/llvm/dist/test/CodeGen/AArch64/misched-stp.ll vendor/llvm/dist/test/CodeGen/ARM/machine-copyprop.mir Deleted: vendor/llvm/dist/test/CodeGen/X86/conditional-tailcall.ll vendor/llvm/dist/test/CodeGen/X86/tail-call-conditional.mir Modified: vendor/llvm/dist/docs/ReleaseNotes.rst vendor/llvm/dist/docs/conf.py vendor/llvm/dist/include/llvm/ADT/ilist_iterator.h vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h vendor/llvm/dist/include/llvm/IR/PassManager.h vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp vendor/llvm/dist/lib/CodeGen/MachineCopyPropagation.cpp vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp vendor/llvm/dist/lib/MC/MCCodeView.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp vendor/llvm/dist/lib/Target/X86/X86ExpandPseudo.cpp vendor/llvm/dist/lib/Target/X86/X86InstrControl.td vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h vendor/llvm/dist/lib/Target/X86/X86MCInstLower.cpp vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll.bc vendor/llvm/dist/test/Bitcode/dityperefs-3.8.ll vendor/llvm/dist/test/CodeGen/AArch64/regcoal-physreg.mir vendor/llvm/dist/test/CodeGen/X86/shrink-compare.ll vendor/llvm/dist/test/MC/COFF/cv-def-range-gap.s vendor/llvm/dist/unittests/ADT/IListIteratorTest.cpp vendor/llvm/dist/unittests/CodeGen/MachineInstrBundleIteratorTest.cpp vendor/llvm/dist/utils/release/build_llvm_package.bat Modified: vendor/llvm/dist/docs/ReleaseNotes.rst ============================================================================== --- vendor/llvm/dist/docs/ReleaseNotes.rst Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/docs/ReleaseNotes.rst Sat Feb 11 13:25:24 2017 (r313633) @@ -55,6 +55,12 @@ Non-comprehensive list of changes in thi * LLVM now handles invariant.group across different basic blocks, which makes it possible to devirtualize virtual calls inside loops. +* The aggressive dead code elimination phase ("adce") now remove + branches which do not effect program behavior. Loops are retained by + default since they may be infinite but these can also be removed + with LLVM option -adce-remove-loops when the loop body otherwise has + no live operations. + * ... next change ... .. NOTE @@ -75,6 +81,95 @@ Non-comprehensive list of changes in thi * Significant build-time and binary-size improvements when compiling with debug info (-g). +Code Generation Testing +----------------------- + +Passes that work on the machine instruction representation can be tested with +the .mir serialization format. ``llc`` supports the ``-run-pass``, +``-stop-after``, ``-stop-before``, ``-start-after``, ``-start-before`` to to +run a single pass of the code generation pipeline, or to stop or start the code +generation pipeline at a given point. + +Additional information can be found in the :doc:`MIRLangRef`. The format is +used by the tests ending in ``.mir`` in the ``test/CodeGen`` directory. + +This feature is available since 2015. It is used more often lately and was not +mentioned in the release notes yet. + +Intrusive list API overhaul +--------------------------- + +The intrusive list infrastructure was substantially rewritten over the last +couple of releases, primarily to excise undefined behaviour. The biggest +changes landed in this release. + +* ``simple_ilist`` is a lower-level intrusive list that never takes + ownership of its nodes. New intrusive-list clients should consider using it + instead of ``ilist``. + + * ``ilist_tag`` allows a single data type to be inserted into two + parallel intrusive lists. A type can inherit twice from ``ilist_node``, + first using ``ilist_node>`` (enabling insertion into + ``simple_ilist>``) and second using + ``ilist_node>`` (enabling insertion into + ``simple_ilist>``), where ``A`` and ``B`` are arbitrary + types. + + * ``ilist_sentinel_tracking`` controls whether an iterator knows + whether it's pointing at the sentinel (``end()``). By default, sentinel + tracking is on when ABI-breaking checks are enabled, and off otherwise; + this is used for an assertion when dereferencing ``end()`` (this assertion + triggered often in practice, and many backend bugs were fixed). Explicitly + turning on sentinel tracking also enables ``iterator::isEnd()``. This is + used by ``MachineInstrBundleIterator`` to iterate over bundles. + +* ``ilist`` is built on top of ``simple_ilist``, and supports the same + configuration options. As before (and unlike ``simple_ilist``), + ``ilist`` takes ownership of its nodes. However, it no longer supports + *allocating* nodes, and is now equivalent to ``iplist``. ``iplist`` + will likely be removed in the future. + + * ``ilist`` now always uses ``ilist_traits``. Instead of passing a + custom traits class in via a template parameter, clients that want to + customize the traits should specialize ``ilist_traits``. Clients that + want to avoid ownership can specialize ``ilist_alloc_traits`` to inherit + from ``ilist_noalloc_traits`` (or to do something funky); clients that + need callbacks can specialize ``ilist_callback_traits`` directly. + +* The underlying data structure is now a simple recursive linked list. The + sentinel node contains only a "next" (``begin()``) and "prev" (``rbegin()``) + pointer and is stored in the same allocation as ``simple_ilist``. + Previously, it was malloc-allocated on-demand by default, although the + now-defunct ``ilist_sentinel_traits`` was sometimes specialized to avoid + this. + +* The ``reverse_iterator`` class no longer uses ``std::reverse_iterator``. + Instead, it now has a handle to the same node that it dereferences to. + Reverse iterators now have the same iterator invalidation semantics as + forward iterators. + + * ``iterator`` and ``reverse_iterator`` have explicit conversion constructors + that match ``std::reverse_iterator``'s off-by-one semantics, so that + reversing the end points of an iterator range results in the same range + (albeit in reverse). I.e., ``reverse_iterator(begin())`` equals + ``rend()``. + + * ``iterator::getReverse()`` and ``reverse_iterator::getReverse()`` return an + iterator that dereferences to the *same* node. I.e., + ``begin().getReverse()`` equals ``--rend()``. + + * ``ilist_node::getIterator()`` and + ``ilist_node::getReverseIterator()`` return the forward and reverse + iterators that dereference to the current node. I.e., + ``begin()->getIterator()`` equals ``begin()`` and + ``rbegin()->getReverseIterator()`` equals ``rbegin()``. + +* ``iterator`` now stores an ``ilist_node_base*`` instead of a ``T*``. The + implicit conversions between ``ilist::iterator`` and ``T*`` have been + removed. Clients may use ``N->getIterator()`` (if not ``nullptr``) or + ``&*I`` (if not ``end()``); alternatively, clients may refactor to use + references for known-good nodes. + Changes to the LLVM IR ---------------------- @@ -133,9 +228,23 @@ Changes to the AMDGPU Target Changes to the AVR Target ----------------------------- -* The entire backend has been merged in-tree with all tests passing. All of - the instruction selection code and the machine code backend has landed - recently and is fully usable. +This marks the first release where the AVR backend has been completely merged +from a fork into LLVM trunk. The backend is still marked experimental, but +is generally quite usable. All downstream development has halted on +`GitHub `_, and changes now go directly into +LLVM trunk. + +* Instruction selector and pseudo instruction expansion pass landed +* `read_register` and `write_register` intrinsics are now supported +* Support stack stores greater than 63-bytes from the bottom of the stack +* A number of assertion errors have been fixed +* Support stores to `undef` locations +* Very basic support for the target has been added to clang +* Small optimizations to some 16-bit boolean expressions + +Most of the work behind the scenes has been on correctness of generated +assembly, and also fixing some assertions we would hit on some well-formed +inputs. Changes to the OCaml bindings ----------------------------- Modified: vendor/llvm/dist/docs/conf.py ============================================================================== --- vendor/llvm/dist/docs/conf.py Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/docs/conf.py Sat Feb 11 13:25:24 2017 (r313633) @@ -48,9 +48,9 @@ copyright = u'2003-%d, LLVM Project' % d # built documents. # # The short X.Y version. -version = '4.0' +version = '4' # The full version, including alpha/beta/rc tags. -release = '4.0' +release = '4' # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. Modified: vendor/llvm/dist/include/llvm/ADT/ilist_iterator.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/ilist_iterator.h Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/include/llvm/ADT/ilist_iterator.h Sat Feb 11 13:25:24 2017 (r313633) @@ -102,10 +102,23 @@ public: return *this; } - /// Convert from an iterator to its reverse. + /// Explicit conversion between forward/reverse iterators. /// - /// TODO: Roll this into the implicit constructor once we're sure that no one - /// is relying on the std::reverse_iterator off-by-one semantics. + /// Translate between forward and reverse iterators without changing range + /// boundaries. The resulting iterator will dereference (and have a handle) + /// to the previous node, which is somewhat unexpected; but converting the + /// two endpoints in a range will give the same range in reverse. + /// + /// This matches std::reverse_iterator conversions. + explicit ilist_iterator( + const ilist_iterator &RHS) + : ilist_iterator(++RHS.getReverse()) {} + + /// Get a reverse iterator to the same node. + /// + /// Gives a reverse iterator that will dereference (and have a handle) to the + /// same node. Converting the endpoint iterators in a range will give a + /// different range; for range operations, use the explicit conversions. ilist_iterator getReverse() const { if (NodePtr) return ilist_iterator(*NodePtr); Modified: vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h ============================================================================== --- vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/include/llvm/CodeGen/MachineInstrBundleIterator.h Sat Feb 11 13:25:24 2017 (r313633) @@ -153,6 +153,18 @@ public: : MII(I.getInstrIterator()) {} MachineInstrBundleIterator() : MII(nullptr) {} + /// Explicit conversion between forward/reverse iterators. + /// + /// Translate between forward and reverse iterators without changing range + /// boundaries. The resulting iterator will dereference (and have a handle) + /// to the previous node, which is somewhat unexpected; but converting the + /// two endpoints in a range will give the same range in reverse. + /// + /// This matches std::reverse_iterator conversions. + explicit MachineInstrBundleIterator( + const MachineInstrBundleIterator &I) + : MachineInstrBundleIterator(++I.getReverse()) {} + /// Get the bundle iterator for the given instruction's bundle. static MachineInstrBundleIterator getAtBundleBegin(instr_iterator MI) { return MachineInstrBundleIteratorHelper::getBundleBegin(MI); @@ -258,6 +270,11 @@ public: nonconst_iterator getNonConstIterator() const { return MII.getNonConst(); } + /// Get a reverse iterator to the same node. + /// + /// Gives a reverse iterator that will dereference (and have a handle) to the + /// same node. Converting the endpoint iterators in a range will give a + /// different range; for range operations, use the explicit conversions. reverse_iterator getReverse() const { return MII.getReverse(); } }; Modified: vendor/llvm/dist/include/llvm/IR/PassManager.h ============================================================================== --- vendor/llvm/dist/include/llvm/IR/PassManager.h Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/include/llvm/IR/PassManager.h Sat Feb 11 13:25:24 2017 (r313633) @@ -311,6 +311,8 @@ template struct PassInfoMixin { /// Gets the name of the pass we are mixed into. static StringRef name() { + static_assert(std::is_base_of::value, + "Must pass the derived type as the template argument!"); StringRef Name = getTypeName(); if (Name.startswith("llvm::")) Name = Name.drop_front(strlen("llvm::")); @@ -339,7 +341,11 @@ struct AnalysisInfoMixin : PassInfoMixin /// known platform with this limitation is Windows DLL builds, specifically /// building each part of LLVM as a DLL. If we ever remove that build /// configuration, this mixin can provide the static key as well. - static AnalysisKey *ID() { return &DerivedT::Key; } + static AnalysisKey *ID() { + static_assert(std::is_base_of::value, + "Must pass the derived type as the template argument!"); + return &DerivedT::Key; + } }; /// This templated class represents "all analyses that operate over \ class OuterAnalysisManagerProxy : public AnalysisInfoMixin< - OuterAnalysisManagerProxy> { + OuterAnalysisManagerProxy> { public: /// \brief Result proxy object for \c OuterAnalysisManagerProxy. class Result { @@ -1072,7 +1078,7 @@ public: private: friend AnalysisInfoMixin< - OuterAnalysisManagerProxy>; + OuterAnalysisManagerProxy>; static AnalysisKey Key; const AnalysisManagerT *AM; Modified: vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h Sat Feb 11 13:25:24 2017 (r313633) @@ -1108,25 +1108,6 @@ public: /// terminator instruction that has not been predicated. virtual bool isUnpredicatedTerminator(const MachineInstr &MI) const; - /// Returns true if MI is an unconditional tail call. - virtual bool isUnconditionalTailCall(const MachineInstr &MI) const { - return false; - } - - /// Returns true if the tail call can be made conditional on BranchCond. - virtual bool - canMakeTailCallConditional(SmallVectorImpl &Cond, - const MachineInstr &TailCall) const { - return false; - } - - /// Replace the conditional branch in MBB with a conditional tail call. - virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB, - SmallVectorImpl &Cond, - const MachineInstr &TailCall) const { - llvm_unreachable("Target didn't implement replaceBranchWithTailCall!"); - } - /// Convert the instruction into a predicated instruction. /// It returns true if the operation was successful. virtual bool PredicateInstruction(MachineInstr &MI, Modified: vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp ============================================================================== --- vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -448,6 +448,7 @@ class MetadataLoader::MetadataLoaderImpl bool StripTBAA = false; bool HasSeenOldLoopTags = false; + bool NeedUpgradeToDIGlobalVariableExpression = false; /// True if metadata is being parsed for a module being ThinLTO imported. bool IsImporting = false; @@ -473,6 +474,45 @@ class MetadataLoader::MetadataLoaderImpl CUSubprograms.clear(); } + /// Upgrade old-style bare DIGlobalVariables to DIGlobalVariableExpressions. + void upgradeCUVariables() { + if (!NeedUpgradeToDIGlobalVariableExpression) + return; + + // Upgrade list of variables attached to the CUs. + if (NamedMDNode *CUNodes = TheModule.getNamedMetadata("llvm.dbg.cu")) + for (unsigned I = 0, E = CUNodes->getNumOperands(); I != E; ++I) { + auto *CU = cast(CUNodes->getOperand(I)); + if (auto *GVs = dyn_cast_or_null(CU->getRawGlobalVariables())) + for (unsigned I = 0; I < GVs->getNumOperands(); I++) + if (auto *GV = + dyn_cast_or_null(GVs->getOperand(I))) { + auto *DGVE = + DIGlobalVariableExpression::getDistinct(Context, GV, nullptr); + GVs->replaceOperandWith(I, DGVE); + } + } + + // Upgrade variables attached to globals. + for (auto &GV : TheModule.globals()) { + SmallVector MDs, NewMDs; + GV.getMetadata(LLVMContext::MD_dbg, MDs); + GV.eraseMetadata(LLVMContext::MD_dbg); + for (auto *MD : MDs) + if (auto *DGV = dyn_cast_or_null(MD)) { + auto *DGVE = + DIGlobalVariableExpression::getDistinct(Context, DGV, nullptr); + GV.addMetadata(LLVMContext::MD_dbg, *DGVE); + } else + GV.addMetadata(LLVMContext::MD_dbg, *MD); + } + } + + void upgradeDebugInfo() { + upgradeCUSubprograms(); + upgradeCUVariables(); + } + public: MetadataLoaderImpl(BitstreamCursor &Stream, Module &TheModule, BitcodeReaderValueList &ValueList, @@ -726,7 +766,7 @@ Error MetadataLoader::MetadataLoaderImpl // Reading the named metadata created forward references and/or // placeholders, that we flush here. resolveForwardRefsAndPlaceholders(Placeholders); - upgradeCUSubprograms(); + upgradeDebugInfo(); // Return at the beginning of the block, since it is easy to skip it // entirely from there. Stream.ReadBlockEnd(); // Pop the abbrev block context. @@ -750,7 +790,7 @@ Error MetadataLoader::MetadataLoaderImpl return error("Malformed block"); case BitstreamEntry::EndBlock: resolveForwardRefsAndPlaceholders(Placeholders); - upgradeCUSubprograms(); + upgradeDebugInfo(); return Error::success(); case BitstreamEntry::Record: // The interesting case. @@ -1420,11 +1460,17 @@ Error MetadataLoader::MetadataLoaderImpl getDITypeRefOrNull(Record[6]), Record[7], Record[8], getMDOrNull(Record[10]), AlignInBits)); - auto *DGVE = DIGlobalVariableExpression::getDistinct(Context, DGV, Expr); - MetadataList.assignValue(DGVE, NextMetadataNo); - NextMetadataNo++; + DIGlobalVariableExpression *DGVE = nullptr; + if (Attach || Expr) + DGVE = DIGlobalVariableExpression::getDistinct(Context, DGV, Expr); + else + NeedUpgradeToDIGlobalVariableExpression = true; if (Attach) Attach->addDebugInfo(DGVE); + + auto *MDNode = Expr ? cast(DGVE) : cast(DGV); + MetadataList.assignValue(MDNode, NextMetadataNo); + NextMetadataNo++; } else return error("Invalid record"); Modified: vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/CodeGen/BranchFolding.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -49,7 +49,6 @@ STATISTIC(NumDeadBlocks, "Number of dead STATISTIC(NumBranchOpts, "Number of branches optimized"); STATISTIC(NumTailMerge , "Number of block tails merged"); STATISTIC(NumHoist , "Number of times common instructions are hoisted"); -STATISTIC(NumTailCalls, "Number of tail calls optimized"); static cl::opt FlagEnableTailMerge("enable-tail-merge", cl::init(cl::BOU_UNSET), cl::Hidden); @@ -1387,42 +1386,6 @@ ReoptimizeBlock: } } - if (!IsEmptyBlock(MBB) && MBB->pred_size() == 1 && - MF.getFunction()->optForSize()) { - // Changing "Jcc foo; foo: jmp bar;" into "Jcc bar;" might change the branch - // direction, thereby defeating careful block placement and regressing - // performance. Therefore, only consider this for optsize functions. - MachineInstr &TailCall = *MBB->getFirstNonDebugInstr(); - if (TII->isUnconditionalTailCall(TailCall)) { - MachineBasicBlock *Pred = *MBB->pred_begin(); - MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr; - SmallVector PredCond; - bool PredAnalyzable = - !TII->analyzeBranch(*Pred, PredTBB, PredFBB, PredCond, true); - - if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB) { - // The predecessor has a conditional branch to this block which consists - // of only a tail call. Try to fold the tail call into the conditional - // branch. - if (TII->canMakeTailCallConditional(PredCond, TailCall)) { - // TODO: It would be nice if analyzeBranch() could provide a pointer - // to the branch insturction so replaceBranchWithTailCall() doesn't - // have to search for it. - TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall); - ++NumTailCalls; - Pred->removeSuccessor(MBB); - MadeChange = true; - return MadeChange; - } - } - // If the predecessor is falling through to this block, we could reverse - // the branch condition and fold the tail call into that. However, after - // that we might have to re-arrange the CFG to fall through to the other - // block and there is a high risk of regressing code size rather than - // improving it. - } - } - // Analyze the branch in the current block. MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr; SmallVector CurCond; Modified: vendor/llvm/dist/lib/CodeGen/MachineCopyPropagation.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/MachineCopyPropagation.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/CodeGen/MachineCopyPropagation.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -61,6 +61,7 @@ namespace { private: void ClobberRegister(unsigned Reg); + void ReadRegister(unsigned Reg); void CopyPropagateBlock(MachineBasicBlock &MBB); bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def); @@ -120,6 +121,18 @@ void MachineCopyPropagation::ClobberRegi } } +void MachineCopyPropagation::ReadRegister(unsigned Reg) { + // If 'Reg' is defined by a copy, the copy is no longer a candidate + // for elimination. + for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { + Reg2MIMap::iterator CI = CopyMap.find(*AI); + if (CI != CopyMap.end()) { + DEBUG(dbgs() << "MCP: Copy is used - not dead: "; CI->second->dump()); + MaybeDeadCopies.remove(CI->second); + } + } +} + /// Return true if \p PreviousCopy did copy register \p Src to register \p Def. /// This fact may have been obscured by sub register usage or may not be true at /// all even though Src and Def are subregisters of the registers used in @@ -212,12 +225,14 @@ void MachineCopyPropagation::CopyPropaga // If Src is defined by a previous copy, the previous copy cannot be // eliminated. - for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI) { - Reg2MIMap::iterator CI = CopyMap.find(*AI); - if (CI != CopyMap.end()) { - DEBUG(dbgs() << "MCP: Copy is no longer dead: "; CI->second->dump()); - MaybeDeadCopies.remove(CI->second); - } + ReadRegister(Src); + for (const MachineOperand &MO : MI->implicit_operands()) { + if (!MO.isReg() || !MO.readsReg()) + continue; + unsigned Reg = MO.getReg(); + if (!Reg) + continue; + ReadRegister(Reg); } DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump()); @@ -234,6 +249,14 @@ void MachineCopyPropagation::CopyPropaga // ... // %xmm2 = copy %xmm9 ClobberRegister(Def); + for (const MachineOperand &MO : MI->implicit_operands()) { + if (!MO.isReg() || !MO.isDef()) + continue; + unsigned Reg = MO.getReg(); + if (!Reg) + continue; + ClobberRegister(Reg); + } // Remember Def is defined by the copy. for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); @@ -268,17 +291,8 @@ void MachineCopyPropagation::CopyPropaga if (MO.isDef()) { Defs.push_back(Reg); - continue; - } - - // If 'Reg' is defined by a copy, the copy is no longer a candidate - // for elimination. - for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { - Reg2MIMap::iterator CI = CopyMap.find(*AI); - if (CI != CopyMap.end()) { - DEBUG(dbgs() << "MCP: Copy is used - not dead: "; CI->second->dump()); - MaybeDeadCopies.remove(CI->second); - } + } else { + ReadRegister(Reg); } // Treat undef use like defs for copy propagation but not for // dead copy. We would need to do a liveness check to be sure the copy Modified: vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp ============================================================================== --- vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/CodeGen/RegisterCoalescer.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -1556,9 +1556,10 @@ bool RegisterCoalescer::joinCopy(Machine bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) { unsigned DstReg = CP.getDstReg(); + unsigned SrcReg = CP.getSrcReg(); assert(CP.isPhys() && "Must be a physreg copy"); assert(MRI->isReserved(DstReg) && "Not a reserved register"); - LiveInterval &RHS = LIS->getInterval(CP.getSrcReg()); + LiveInterval &RHS = LIS->getInterval(SrcReg); DEBUG(dbgs() << "\t\tRHS = " << RHS << '\n'); assert(RHS.containsOneValue() && "Invalid join with reserved register"); @@ -1592,17 +1593,36 @@ bool RegisterCoalescer::joinReservedPhys // Delete the identity copy. MachineInstr *CopyMI; if (CP.isFlipped()) { - CopyMI = MRI->getVRegDef(RHS.reg); + // Physreg is copied into vreg + // %vregY = COPY %X + // ... //< no other def of %X here + // use %vregY + // => + // ... + // use %X + CopyMI = MRI->getVRegDef(SrcReg); } else { - if (!MRI->hasOneNonDBGUse(RHS.reg)) { + // VReg is copied into physreg: + // %vregX = def + // ... //< no other def or use of %Y here + // %Y = COPY %vregX + // => + // %Y = def + // ... + if (!MRI->hasOneNonDBGUse(SrcReg)) { DEBUG(dbgs() << "\t\tMultiple vreg uses!\n"); return false; } - MachineInstr *DestMI = MRI->getVRegDef(RHS.reg); - CopyMI = &*MRI->use_instr_nodbg_begin(RHS.reg); - const SlotIndex CopyRegIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot(); - const SlotIndex DestRegIdx = LIS->getInstructionIndex(*DestMI).getRegSlot(); + if (!LIS->intervalIsInOneMBB(RHS)) { + DEBUG(dbgs() << "\t\tComplex control flow!\n"); + return false; + } + + MachineInstr &DestMI = *MRI->getVRegDef(SrcReg); + CopyMI = &*MRI->use_instr_nodbg_begin(SrcReg); + SlotIndex CopyRegIdx = LIS->getInstructionIndex(*CopyMI).getRegSlot(); + SlotIndex DestRegIdx = LIS->getInstructionIndex(DestMI).getRegSlot(); if (!MRI->isConstantPhysReg(DstReg)) { // We checked above that there are no interfering defs of the physical @@ -1629,8 +1649,8 @@ bool RegisterCoalescer::joinReservedPhys // We're going to remove the copy which defines a physical reserved // register, so remove its valno, etc. - DEBUG(dbgs() << "\t\tRemoving phys reg def of " << DstReg << " at " - << CopyRegIdx << "\n"); + DEBUG(dbgs() << "\t\tRemoving phys reg def of " << PrintReg(DstReg, TRI) + << " at " << CopyRegIdx << "\n"); LIS->removePhysRegDefAt(DstReg, CopyRegIdx); // Create a new dead def at the new def location. Modified: vendor/llvm/dist/lib/MC/MCCodeView.cpp ============================================================================== --- vendor/llvm/dist/lib/MC/MCCodeView.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/MC/MCCodeView.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -509,17 +509,17 @@ void CodeViewContext::encodeDefRange(MCA // are artificially constructing. size_t RecordSize = FixedSizePortion.size() + sizeof(LocalVariableAddrRange) + 4 * NumGaps; - // Write out the recrod size. - support::endian::Writer(OS).write(RecordSize); + // Write out the record size. + LEWriter.write(RecordSize); // Write out the fixed size prefix. OS << FixedSizePortion; // Make space for a fixup that will eventually have a section relative // relocation pointing at the offset where the variable becomes live. Fixups.push_back(MCFixup::create(Contents.size(), BE, FK_SecRel_4)); - Contents.resize(Contents.size() + 4); // Fixup for code start. + LEWriter.write(0); // Fixup for code start. // Make space for a fixup that will record the section index for the code. Fixups.push_back(MCFixup::create(Contents.size(), BE, FK_SecRel_2)); - Contents.resize(Contents.size() + 2); // Fixup for section index. + LEWriter.write(0); // Fixup for section index. // Write down the range's extent. LEWriter.write(Chunk); @@ -529,7 +529,7 @@ void CodeViewContext::encodeDefRange(MCA } while (RangeSize > 0); // Emit the gaps afterwards. - assert((NumGaps == 0 || Bias < MaxDefRange) && + assert((NumGaps == 0 || Bias <= MaxDefRange) && "large ranges should not have gaps"); unsigned GapStartOffset = GapAndRangeSizes[I].second; for (++I; I != J; ++I) { @@ -537,7 +537,7 @@ void CodeViewContext::encodeDefRange(MCA assert(I < GapAndRangeSizes.size()); std::tie(GapSize, RangeSize) = GapAndRangeSizes[I]; LEWriter.write(GapStartOffset); - LEWriter.write(RangeSize); + LEWriter.write(GapSize); GapStartOffset += GapSize + RangeSize; } } Modified: vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -8934,8 +8934,9 @@ static SDValue splitStoreSplat(Selection // instructions (stp). SDLoc DL(&St); SDValue BasePtr = St.getBasePtr(); + const MachinePointerInfo &PtrInfo = St.getPointerInfo(); SDValue NewST1 = - DAG.getStore(St.getChain(), DL, SplatVal, BasePtr, St.getPointerInfo(), + DAG.getStore(St.getChain(), DL, SplatVal, BasePtr, PtrInfo, OrigAlignment, St.getMemOperand()->getFlags()); unsigned Offset = EltOffset; @@ -8944,7 +8945,7 @@ static SDValue splitStoreSplat(Selection SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr, DAG.getConstant(Offset, DL, MVT::i64)); NewST1 = DAG.getStore(NewST1.getValue(0), DL, SplatVal, OffsetPtr, - St.getPointerInfo(), Alignment, + PtrInfo.getWithOffset(Offset), Alignment, St.getMemOperand()->getFlags()); Offset += EltOffset; } Modified: vendor/llvm/dist/lib/Target/X86/X86ExpandPseudo.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/X86/X86ExpandPseudo.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/X86/X86ExpandPseudo.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -77,11 +77,9 @@ bool X86ExpandPseudo::ExpandMI(MachineBa default: return false; case X86::TCRETURNdi: - case X86::TCRETURNdicc: case X86::TCRETURNri: case X86::TCRETURNmi: case X86::TCRETURNdi64: - case X86::TCRETURNdi64cc: case X86::TCRETURNri64: case X86::TCRETURNmi64: { bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64; @@ -99,10 +97,6 @@ bool X86ExpandPseudo::ExpandMI(MachineBa Offset = StackAdj - MaxTCDelta; assert(Offset >= 0 && "Offset should never be negative"); - if (Opcode == X86::TCRETURNdicc || Opcode == X86::TCRETURNdi64cc) { - assert(Offset == 0 && "Conditional tail call cannot adjust the stack."); - } - if (Offset) { // Check for possible merge with preceding ADD instruction. Offset += X86FL->mergeSPUpdates(MBB, MBBI, true); @@ -111,21 +105,12 @@ bool X86ExpandPseudo::ExpandMI(MachineBa // Jump to label or value in register. bool IsWin64 = STI->isTargetWin64(); - if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdicc || - Opcode == X86::TCRETURNdi64 || Opcode == X86::TCRETURNdi64cc) { + if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) { unsigned Op; switch (Opcode) { case X86::TCRETURNdi: Op = X86::TAILJMPd; break; - case X86::TCRETURNdicc: - Op = X86::TAILJMPd_CC; - break; - case X86::TCRETURNdi64cc: - assert(!IsWin64 && "Conditional tail calls confuse the Win64 unwinder."); - // TODO: We could do it for Win64 "leaf" functions though; PR30337. - Op = X86::TAILJMPd64_CC; - break; default: // Note: Win64 uses REX prefixes indirect jumps out of functions, but // not direct ones. @@ -141,10 +126,6 @@ bool X86ExpandPseudo::ExpandMI(MachineBa MIB.addExternalSymbol(JumpTarget.getSymbolName(), JumpTarget.getTargetFlags()); } - if (Op == X86::TAILJMPd_CC || Op == X86::TAILJMPd64_CC) { - MIB.addImm(MBBI->getOperand(2).getImm()); - } - } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) { unsigned Op = (Opcode == X86::TCRETURNmi) ? X86::TAILJMPm Modified: vendor/llvm/dist/lib/Target/X86/X86InstrControl.td ============================================================================== --- vendor/llvm/dist/lib/Target/X86/X86InstrControl.td Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/X86/X86InstrControl.td Sat Feb 11 13:25:24 2017 (r313633) @@ -264,21 +264,6 @@ let isCall = 1, isTerminator = 1, isRetu "jmp{l}\t{*}$dst", [], IIC_JMP_MEM>; } -// Conditional tail calls are similar to the above, but they are branches -// rather than barriers, and they use EFLAGS. -let isCall = 1, isTerminator = 1, isReturn = 1, isBranch = 1, - isCodeGenOnly = 1, SchedRW = [WriteJumpLd] in - let Uses = [ESP, EFLAGS] in { - def TCRETURNdicc : PseudoI<(outs), - (ins i32imm_pcrel:$dst, i32imm:$offset, i32imm:$cond), []>; - - // This gets substituted to a conditional jump instruction in MC lowering. - def TAILJMPd_CC : Ii32PCRel<0x80, RawFrm, (outs), - (ins i32imm_pcrel:$dst, i32imm:$cond), - "", - [], IIC_JMP_REL>; -} - //===----------------------------------------------------------------------===// // Call Instructions... @@ -340,19 +325,3 @@ let isCall = 1, isTerminator = 1, isRetu "rex64 jmp{q}\t{*}$dst", [], IIC_JMP_MEM>; } } - -// Conditional tail calls are similar to the above, but they are branches -// rather than barriers, and they use EFLAGS. -let isCall = 1, isTerminator = 1, isReturn = 1, isBranch = 1, - isCodeGenOnly = 1, SchedRW = [WriteJumpLd] in - let Uses = [RSP, EFLAGS] in { - def TCRETURNdi64cc : PseudoI<(outs), - (ins i64i32imm_pcrel:$dst, i32imm:$offset, - i32imm:$cond), []>; - - // This gets substituted to a conditional jump instruction in MC lowering. - def TAILJMPd64_CC : Ii32PCRel<0x80, RawFrm, (outs), - (ins i64i32imm_pcrel:$dst, i32imm:$cond), - "", - [], IIC_JMP_REL>; -} Modified: vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -5108,85 +5108,6 @@ bool X86InstrInfo::isUnpredicatedTermina return !isPredicated(MI); } -bool X86InstrInfo::isUnconditionalTailCall(const MachineInstr &MI) const { - switch (MI.getOpcode()) { - case X86::TCRETURNdi: - case X86::TCRETURNri: - case X86::TCRETURNmi: - case X86::TCRETURNdi64: - case X86::TCRETURNri64: - case X86::TCRETURNmi64: - return true; - default: - return false; - } -} - -bool X86InstrInfo::canMakeTailCallConditional( - SmallVectorImpl &BranchCond, - const MachineInstr &TailCall) const { - if (TailCall.getOpcode() != X86::TCRETURNdi && - TailCall.getOpcode() != X86::TCRETURNdi64) { - // Only direct calls can be done with a conditional branch. - return false; - } - - if (Subtarget.isTargetWin64()) { - // Conditional tail calls confuse the Win64 unwinder. - // TODO: Allow them for "leaf" functions; PR30337. - return false; - } - - assert(BranchCond.size() == 1); - if (BranchCond[0].getImm() > X86::LAST_VALID_COND) { - // Can't make a conditional tail call with this condition. - return false; - } - - const X86MachineFunctionInfo *X86FI = - TailCall.getParent()->getParent()->getInfo(); - if (X86FI->getTCReturnAddrDelta() != 0 || - TailCall.getOperand(1).getImm() != 0) { - // A conditional tail call cannot do any stack adjustment. - return false; - } - - return true; -} - -void X86InstrInfo::replaceBranchWithTailCall( - MachineBasicBlock &MBB, SmallVectorImpl &BranchCond, - const MachineInstr &TailCall) const { - assert(canMakeTailCallConditional(BranchCond, TailCall)); - - MachineBasicBlock::iterator I = MBB.end(); - while (I != MBB.begin()) { - --I; - if (I->isDebugValue()) - continue; - if (!I->isBranch()) - assert(0 && "Can't find the branch to replace!"); - - X86::CondCode CC = getCondFromBranchOpc(I->getOpcode()); - assert(BranchCond.size() == 1); - if (CC != BranchCond[0].getImm()) - continue; - - break; - } - - unsigned Opc = TailCall.getOpcode() == X86::TCRETURNdi ? X86::TCRETURNdicc - : X86::TCRETURNdi64cc; - - auto MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opc)); - MIB->addOperand(TailCall.getOperand(0)); // Destination. - MIB.addImm(0); // Stack offset (not used). - MIB->addOperand(BranchCond[0]); // Condition. - MIB.copyImplicitOps(TailCall); // Regmask and (imp-used) parameters. - - I->eraseFromParent(); -} - // Given a MBB and its TBB, find the FBB which was a fallthrough MBB (it may // not be a fallthrough MBB now due to layout changes). Return nullptr if the // fallthrough MBB cannot be identified. Modified: vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h ============================================================================== --- vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h Sat Feb 11 13:25:24 2017 (r313633) @@ -316,13 +316,6 @@ public: // Branch analysis. bool isUnpredicatedTerminator(const MachineInstr &MI) const override; - bool isUnconditionalTailCall(const MachineInstr &MI) const override; - bool canMakeTailCallConditional(SmallVectorImpl &Cond, - const MachineInstr &TailCall) const override; - void replaceBranchWithTailCall(MachineBasicBlock &MBB, - SmallVectorImpl &Cond, - const MachineInstr &TailCall) const override; - bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl &Cond, Modified: vendor/llvm/dist/lib/Target/X86/X86MCInstLower.cpp ============================================================================== --- vendor/llvm/dist/lib/Target/X86/X86MCInstLower.cpp Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/lib/Target/X86/X86MCInstLower.cpp Sat Feb 11 13:25:24 2017 (r313633) @@ -498,16 +498,11 @@ ReSimplify: break; } - // TAILJMPd, TAILJMPd64, TailJMPd_cc - Lower to the correct jump instruction. + // TAILJMPd, TAILJMPd64 - Lower to the correct jump instruction. { unsigned Opcode; case X86::TAILJMPr: Opcode = X86::JMP32r; goto SetTailJmpOpcode; case X86::TAILJMPd: case X86::TAILJMPd64: Opcode = X86::JMP_1; goto SetTailJmpOpcode; - case X86::TAILJMPd_CC: - case X86::TAILJMPd64_CC: - Opcode = X86::GetCondBranchFromCond( - static_cast(MI->getOperand(1).getImm())); - goto SetTailJmpOpcode; SetTailJmpOpcode: MCOperand Saved = OutMI.getOperand(0); @@ -1281,11 +1276,9 @@ void X86AsmPrinter::EmitInstruction(cons case X86::TAILJMPr: case X86::TAILJMPm: case X86::TAILJMPd: - case X86::TAILJMPd_CC: case X86::TAILJMPr64: case X86::TAILJMPm64: case X86::TAILJMPd64: - case X86::TAILJMPd64_CC: case X86::TAILJMPr64_REX: case X86::TAILJMPm64_REX: // Lower these as normal, but add some comments. Modified: vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll ============================================================================== --- vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll Sat Feb 11 13:25:24 2017 (r313633) @@ -7,12 +7,16 @@ ; CHECK: @h = common global i32 0, align 4, !dbg ![[H:[0-9]+]] ; CHECK: ![[G]] = {{.*}}!DIGlobalVariableExpression(var: ![[GVAR:[0-9]+]], expr: ![[GEXPR:[0-9]+]]) ; CHECK: ![[GVAR]] = distinct !DIGlobalVariable(name: "g", +; CHECK: DICompileUnit({{.*}}, imports: ![[IMPORTS:[0-9]+]] ; CHECK: !DIGlobalVariableExpression(var: ![[CVAR:[0-9]+]], expr: ![[CEXPR:[0-9]+]]) ; CHECK: ![[CVAR]] = distinct !DIGlobalVariable(name: "c", ; CHECK: ![[CEXPR]] = !DIExpression(DW_OP_constu, 23, DW_OP_stack_value) -; CHECK: ![[H]] = {{.*}}!DIGlobalVariableExpression(var: ![[HVAR:[0-9]+]]) -; CHECK: ![[HVAR]] = distinct !DIGlobalVariable(name: "h", +; CHECK: ![[HVAR:[0-9]+]] = distinct !DIGlobalVariable(name: "h", +; CHECK: ![[IMPORTS]] = !{![[CIMPORT:[0-9]+]]} +; CHECK: ![[CIMPORT]] = !DIImportedEntity({{.*}}entity: ![[HVAR]] ; CHECK: ![[GEXPR]] = !DIExpression(DW_OP_plus, 1) +; CHECK: ![[H]] = {{.*}}!DIGlobalVariableExpression(var: ![[HVAR]]) + @g = common global i32 0, align 4, !dbg !0 @h = common global i32 0, align 4, !dbg !11 @@ -21,9 +25,9 @@ !llvm.ident = !{!9} !0 = distinct !DIGlobalVariable(name: "g", scope: !1, file: !2, line: 1, type: !5, isLocal: false, isDefinition: true, expr: !DIExpression(DW_OP_plus, 1)) -!1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, producer: "clang version 4.0.0 (trunk 286129) (llvm/trunk 286128)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !3, globals: !4) +!1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, producer: "clang version 4.0.0 (trunk 286129) (llvm/trunk 286128)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, globals: !4, imports: !3) !2 = !DIFile(filename: "a.c", directory: "/") -!3 = !{} +!3 = !{!12} !4 = !{!0, !10, !11} !5 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed) !6 = !{i32 2, !"Dwarf Version", i32 4} @@ -32,3 +36,4 @@ !9 = !{!"clang version 4.0.0 (trunk 286129) (llvm/trunk 286128)"} !10 = distinct !DIGlobalVariable(name: "c", scope: !1, file: !2, line: 1, type: !5, isLocal: false, isDefinition: true, expr: !DIExpression(DW_OP_constu, 23, DW_OP_stack_value)) !11 = distinct !DIGlobalVariable(name: "h", scope: !1, file: !2, line: 2, type: !5, isLocal: false, isDefinition: true) +!12 = !DIImportedEntity(tag: DW_TAG_imported_declaration, line: 1, scope: !1, entity: !11) Modified: vendor/llvm/dist/test/Bitcode/DIGlobalVariableExpression.ll.bc ============================================================================== Binary file (source and/or target). No diff available. Modified: vendor/llvm/dist/test/Bitcode/dityperefs-3.8.ll ============================================================================== --- vendor/llvm/dist/test/Bitcode/dityperefs-3.8.ll Sat Feb 11 07:35:27 2017 (r313632) +++ vendor/llvm/dist/test/Bitcode/dityperefs-3.8.ll Sat Feb 11 13:25:24 2017 (r313633) @@ -18,14 +18,13 @@ ; CHECK-NEXT: !7 = !DILocalVariable(name: "V1", scope: !6, type: !2) ; CHECK-NEXT: !8 = !DIObjCProperty(name: "P1", type: !1) ; CHECK-NEXT: !9 = !DITemplateTypeParameter(type: !1) -; CHECK-NEXT: !10 = distinct !DIGlobalVariableExpression(var: !11) -; CHECK-NEXT: !11 = !DIGlobalVariable(name: "G",{{.*}} type: !1, -; CHECK-NEXT: !12 = !DITemplateValueParameter(type: !1, value: i32* @G1) -; CHECK-NEXT: !13 = !DIImportedEntity(tag: DW_TAG_imported_module, name: "T2", scope: !0, entity: !1) -; CHECK-NEXT: !14 = !DICompositeType(tag: DW_TAG_structure_type, name: "T3", file: !0, elements: !15, identifier: "T3") -; CHECK-NEXT: !15 = !{!16} -; CHECK-NEXT: !16 = !DISubprogram(scope: !14, -; CHECK-NEXT: !17 = !DIDerivedType(tag: DW_TAG_ptr_to_member_type,{{.*}} extraData: !14) +; CHECK-NEXT: !10 = !DIGlobalVariable(name: "G",{{.*}} type: !1, +; CHECK-NEXT: !11 = !DITemplateValueParameter(type: !1, value: i32* @G1) +; CHECK-NEXT: !12 = !DIImportedEntity(tag: DW_TAG_imported_module, name: "T2", scope: !0, entity: !1) +; CHECK-NEXT: !13 = !DICompositeType(tag: DW_TAG_structure_type, name: "T3", file: !0, elements: !14, identifier: "T3") +; CHECK-NEXT: !14 = !{!15} +; CHECK-NEXT: !15 = !DISubprogram(scope: !13, +; CHECK-NEXT: !16 = !DIDerivedType(tag: DW_TAG_ptr_to_member_type,{{.*}} extraData: !13) !0 = !DIFile(filename: "path/to/file", directory: "/path/to/dir") !1 = !DICompositeType(tag: DW_TAG_structure_type, name: "T1", file: !0, identifier: "T1") Added: vendor/llvm/dist/test/CodeGen/AArch64/ldst-zero.ll ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ vendor/llvm/dist/test/CodeGen/AArch64/ldst-zero.ll Sat Feb 11 13:25:24 2017 (r313633) @@ -0,0 +1,74 @@ +; RUN: llc -mtriple=aarch64 -mcpu=cortex-a53 < %s | FileCheck %s + +; Tests to check that zero stores which are generated as STP xzr, xzr aren't +; scheduled incorrectly due to incorrect alias information + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) +%struct.tree_common = type { i8*, i8*, i32 } + +; Original test case which exhibited the bug +define void @test1(%struct.tree_common* %t, i32 %code, i8* %type) { +; CHECK-LABEL: test1: +; CHECK: stp xzr, xzr, [x0, #8] +; CHECK: stp xzr, x2, [x0] +; CHECK: str w1, [x0, #16] +entry: + %0 = bitcast %struct.tree_common* %t to i8* + tail call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 24, i32 8, i1 false) + %code1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2 + store i32 %code, i32* %code1, align 8 + %type2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1 + store i8* %type, i8** %type2, align 8 + ret void +} + +; Store to each struct element instead of using memset +define void @test2(%struct.tree_common* %t, i32 %code, i8* %type) { +; CHECK-LABEL: test2: +; CHECK: stp xzr, xzr, [x0] +; CHECK: str wzr, [x0, #16] +; CHECK: str w1, [x0, #16] +; CHECK: str x2, [x0, #8] +entry: + %0 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 0 + %1 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 1 + %2 = getelementptr inbounds %struct.tree_common, %struct.tree_common* %t, i64 0, i32 2 + store i8* zeroinitializer, i8** %0, align 8 + store i8* zeroinitializer, i8** %1, align 8 + store i32 zeroinitializer, i32* %2, align 8 + store i32 %code, i32* %2, align 8 + store i8* %type, i8** %1, align 8 + ret void +} + +; Vector store instead of memset +define void @test3(%struct.tree_common* %t, i32 %code, i8* %type) { +; CHECK-LABEL: test3: +; CHECK: stp xzr, xzr, [x0, #8] *** DIFF OUTPUT TRUNCATED AT 1000 LINES *** From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:35 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 600ADCDB178; Sat, 11 Feb 2017 13:25:35 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2E5BE959; Sat, 11 Feb 2017 13:25:35 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPYQU075392; Sat, 11 Feb 2017 13:25:34 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPYoE075391; Sat, 11 Feb 2017 13:25:34 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPYoE075391@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:34 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313635 - vendor/clang/dist/docs X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:35 -0000 Author: dim Date: Sat Feb 11 13:25:34 2017 New Revision: 313635 URL: https://svnweb.freebsd.org/changeset/base/313635 Log: Vendor import of clang release_40 branch r294803: https://llvm.org/svn/llvm-project/cfe/branches/release_40@294803 Modified: vendor/clang/dist/docs/conf.py Modified: vendor/clang/dist/docs/conf.py ============================================================================== --- vendor/clang/dist/docs/conf.py Sat Feb 11 13:25:29 2017 (r313634) +++ vendor/clang/dist/docs/conf.py Sat Feb 11 13:25:34 2017 (r313635) @@ -49,9 +49,9 @@ copyright = u'2007-%d, The Clang Team' % # built documents. # # The short X.Y version. -version = '4.0' +version = '4' # The full version, including alpha/beta/rc tags. -release = '4.0' +release = '4' # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:41 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2EE3CCDB1B8; Sat, 11 Feb 2017 13:25:41 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id D2FA6A14; Sat, 11 Feb 2017 13:25:40 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPd63075487; Sat, 11 Feb 2017 13:25:39 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPdxO075486; Sat, 11 Feb 2017 13:25:39 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPdxO075486@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313637 - vendor/compiler-rt/compiler-rt-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:41 -0000 Author: dim Date: Sat Feb 11 13:25:39 2017 New Revision: 313637 URL: https://svnweb.freebsd.org/changeset/base/313637 Log: Tag compiler-rt release_40 branch r294803. Added: vendor/compiler-rt/compiler-rt-release_40-r294803/ - copied from r313636, vendor/compiler-rt/dist/ From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:38 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 475BCCDB19A; Sat, 11 Feb 2017 13:25:38 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id EFEEC9AD; Sat, 11 Feb 2017 13:25:37 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPaEZ075439; Sat, 11 Feb 2017 13:25:36 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPa3K075437; Sat, 11 Feb 2017 13:25:36 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPa3K075437@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313636 - vendor/clang/clang-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:38 -0000 Author: dim Date: Sat Feb 11 13:25:36 2017 New Revision: 313636 URL: https://svnweb.freebsd.org/changeset/base/313636 Log: Tag clang release_40 branch r294803. Added: vendor/clang/clang-release_40-r294803/ - copied from r313635, vendor/clang/dist/ From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:44 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E8661CDB1ED; Sat, 11 Feb 2017 13:25:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A83F1A8D; Sat, 11 Feb 2017 13:25:44 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPhxC075545; Sat, 11 Feb 2017 13:25:43 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPhX9075539; Sat, 11 Feb 2017 13:25:43 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPhX9075539@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313638 - in vendor/libc++/dist: docs include src test/std/utilities/optional/optional.bad_optional_access test/std/utilities/variant/variant.visit X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:45 -0000 Author: dim Date: Sat Feb 11 13:25:42 2017 New Revision: 313638 URL: https://svnweb.freebsd.org/changeset/base/313638 Log: Vendor import of libc++ release_40 branch r294803: https://llvm.org/svn/llvm-project/libcxx/branches/release_40@294803 Modified: vendor/libc++/dist/docs/conf.py vendor/libc++/dist/include/optional vendor/libc++/dist/include/variant vendor/libc++/dist/src/optional.cpp vendor/libc++/dist/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp vendor/libc++/dist/test/std/utilities/variant/variant.visit/visit.pass.cpp Modified: vendor/libc++/dist/docs/conf.py ============================================================================== --- vendor/libc++/dist/docs/conf.py Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/docs/conf.py Sat Feb 11 13:25:42 2017 (r313638) @@ -47,9 +47,9 @@ copyright = u'2011-2017, LLVM Project' # built documents. # # The short X.Y version. -version = '4.0' +version = '4' # The full version, including alpha/beta/rc tags. -release = '4.0' +release = '4' # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. Modified: vendor/libc++/dist/include/optional ============================================================================== --- vendor/libc++/dist/include/optional Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/include/optional Sat Feb 11 13:25:42 2017 (r313638) @@ -160,14 +160,12 @@ namespace std // purposefully not using { class _LIBCPP_EXCEPTION_ABI bad_optional_access - : public logic_error + : public exception { public: - _LIBCPP_INLINE_VISIBILITY - bad_optional_access() : logic_error("bad optional access") {} - // Get the key function ~bad_optional_access() into the dylib virtual ~bad_optional_access() _NOEXCEPT; + virtual const char* what() const _NOEXCEPT; }; } // std Modified: vendor/libc++/dist/include/variant ============================================================================== --- vendor/libc++/dist/include/variant Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/include/variant Sat Feb 11 13:25:42 2017 (r313638) @@ -574,7 +574,7 @@ private: constexpr decltype(auto) operator()(_Alts&&... __alts) const { __std_visit_exhaustive_visitor_check< _Visitor, - decltype(_VSTD::forward<_Alts>(__alts).__value)...>(); + decltype((_VSTD::forward<_Alts>(__alts).__value))...>(); return __invoke_constexpr(_VSTD::forward<_Visitor>(__visitor), _VSTD::forward<_Alts>(__alts).__value...); } Modified: vendor/libc++/dist/src/optional.cpp ============================================================================== --- vendor/libc++/dist/src/optional.cpp Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/src/optional.cpp Sat Feb 11 13:25:42 2017 (r313638) @@ -15,6 +15,10 @@ namespace std bad_optional_access::~bad_optional_access() _NOEXCEPT = default; +const char* bad_optional_access::what() const _NOEXCEPT { + return "bad_optional_access"; + } + } // std _LIBCPP_BEGIN_NAMESPACE_EXPERIMENTAL Modified: vendor/libc++/dist/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp ============================================================================== --- vendor/libc++/dist/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp Sat Feb 11 13:25:42 2017 (r313638) @@ -11,7 +11,7 @@ // -// class bad_optional_access : public logic_error +// class bad_optional_access : public exception #include #include @@ -20,6 +20,6 @@ int main() { using std::bad_optional_access; - static_assert(std::is_base_of::value, ""); - static_assert(std::is_convertible::value, ""); + static_assert(std::is_base_of::value, ""); + static_assert(std::is_convertible::value, ""); } Modified: vendor/libc++/dist/test/std/utilities/variant/variant.visit/visit.pass.cpp ============================================================================== --- vendor/libc++/dist/test/std/utilities/variant/variant.visit/visit.pass.cpp Sat Feb 11 13:25:39 2017 (r313637) +++ vendor/libc++/dist/test/std/utilities/variant/variant.visit/visit.pass.cpp Sat Feb 11 13:25:42 2017 (r313638) @@ -283,9 +283,20 @@ void test_exceptions() { #endif } +// See http://llvm.org/PR31916 +void test_caller_accepts_nonconst() { + struct A {}; + struct Visitor { + void operator()(A&) {} + }; + std::variant v; + std::visit(Visitor{}, v); +} + int main() { test_call_operator_forwarding(); test_argument_forwarding(); test_constexpr(); test_exceptions(); + test_caller_accepts_nonconst(); } From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:49 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 11D67CDB22C; Sat, 11 Feb 2017 13:25:49 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id B095DAF8; Sat, 11 Feb 2017 13:25:48 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPlH3075594; Sat, 11 Feb 2017 13:25:47 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPlit075593; Sat, 11 Feb 2017 13:25:47 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPlit075593@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313639 - vendor/libc++/libc++-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:49 -0000 Author: dim Date: Sat Feb 11 13:25:47 2017 New Revision: 313639 URL: https://svnweb.freebsd.org/changeset/base/313639 Log: Tag libc++ release_40 branch r294803. Added: vendor/libc++/libc++-release_40-r294803/ - copied from r313638, vendor/libc++/dist/ From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:51 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7D8A2CDB255; Sat, 11 Feb 2017 13:25:51 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 49F61B59; Sat, 11 Feb 2017 13:25:51 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPo26075641; Sat, 11 Feb 2017 13:25:50 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPoOr075640; Sat, 11 Feb 2017 13:25:50 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPoOr075640@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:50 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313640 - vendor/lld/dist/docs X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:51 -0000 Author: dim Date: Sat Feb 11 13:25:50 2017 New Revision: 313640 URL: https://svnweb.freebsd.org/changeset/base/313640 Log: Vendor import of lld release_40 branch r294803: https://llvm.org/svn/llvm-project/lld/branches/release_40@294803 Modified: vendor/lld/dist/docs/conf.py Modified: vendor/lld/dist/docs/conf.py ============================================================================== --- vendor/lld/dist/docs/conf.py Sat Feb 11 13:25:47 2017 (r313639) +++ vendor/lld/dist/docs/conf.py Sat Feb 11 13:25:50 2017 (r313640) @@ -48,9 +48,9 @@ copyright = u'2011-%d, LLVM Project' % d # built documents. # # The short X.Y version. -version = '4.0' +version = '4' # The full version, including alpha/beta/rc tags. -release = '4.0' +release = '4' # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:59 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 61D36CDB2EB; Sat, 11 Feb 2017 13:25:59 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 13F5DC5F; Sat, 11 Feb 2017 13:25:59 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPwk5075736; Sat, 11 Feb 2017 13:25:58 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPwKL075735; Sat, 11 Feb 2017 13:25:58 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPwKL075735@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313642 - vendor/lldb/lldb-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:59 -0000 Author: dim Date: Sat Feb 11 13:25:57 2017 New Revision: 313642 URL: https://svnweb.freebsd.org/changeset/base/313642 Log: Tag lldb release_40 branch r294803. Added: vendor/lldb/lldb-release_40-r294803/ - copied from r313641, vendor/lldb/dist/ From owner-svn-src-vendor@freebsd.org Sat Feb 11 13:25:56 2017 Return-Path: Delivered-To: svn-src-vendor@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 0BD98CDB2A1; Sat, 11 Feb 2017 13:25:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A809EBFD; Sat, 11 Feb 2017 13:25:55 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v1BDPsGP075689; Sat, 11 Feb 2017 13:25:54 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v1BDPsHo075688; Sat, 11 Feb 2017 13:25:54 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201702111325.v1BDPsHo075688@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Sat, 11 Feb 2017 13:25:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r313641 - vendor/lld/lld-release_40-r294803 X-SVN-Group: vendor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-vendor@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the vendor work area tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 11 Feb 2017 13:25:56 -0000 Author: dim Date: Sat Feb 11 13:25:54 2017 New Revision: 313641 URL: https://svnweb.freebsd.org/changeset/base/313641 Log: Tag lld release_40 branch r294803. Added: vendor/lld/lld-release_40-r294803/ - copied from r313640, vendor/lld/dist/