From owner-svn-src-head@freebsd.org Sat May 13 13:03:21 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 97B68D6A19D; Sat, 13 May 2017 13:03:21 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 69E6B19E5; Sat, 13 May 2017 13:03:21 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v4DD3KKo041947; Sat, 13 May 2017 13:03:20 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v4DD3Kai041946; Sat, 13 May 2017 13:03:20 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201705131303.v4DD3Kai041946@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sat, 13 May 2017 13:03:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r318253 - head/sys/arm64/include X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 13 May 2017 13:03:21 -0000 Author: andrew Date: Sat May 13 13:03:20 2017 New Revision: 318253 URL: https://svnweb.freebsd.org/changeset/base/318253 Log: Allocate a cacheline when reading or writing to write through memory. The hardware will still write to memory, however following reads will be from the cache. MFC after: 1 week Sponsored by: DARPA, AFRL Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h ============================================================================== --- head/sys/arm64/include/armreg.h Sat May 13 13:01:15 2017 (r318252) +++ head/sys/arm64/include/armreg.h Sat May 13 13:03:20 2017 (r318253) @@ -360,7 +360,7 @@ #define MAIR_ATTR(attr, idx) ((attr) << ((idx) * 8)) #define MAIR_DEVICE_nGnRnE 0x00 #define MAIR_NORMAL_NC 0x44 -#define MAIR_NORMAL_WT 0x88 +#define MAIR_NORMAL_WT 0xbb #define MAIR_NORMAL_WB 0xff /* PAR_EL1 - Physical Address Register */