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From: Hans Petter Selasky <hselasky@c2i.net>
To: Warner Losh <imp@bsdimp.com>
Date: Sat, 29 Sep 2007 13:09:04 +0200
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Cc: scottl@samsco.org, freebsd-arch@freebsd.org
Subject: Re: Request for feedback on common data backstore in the kernel
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On Friday 28 September 2007, Warner Losh wrote:
> Hans Petter Selasky wrote:
> > > Well, the point is that I'm not sure why you're so worried about
> > > performance issues with USB and busdma.  Do you have any test data that
> > > shows that it's a problem?
> >
> > It is a problem on embedded devices. Typically not for an ordinary PC
> > user.
>
> I'm curious.  What's the problem?

Technically, if you load a buffer pointer and length that is not cache aligned 
nor host aligned then you should bounce all the data no matter what. If you 
do not bounce under those conditions you might get trouble.

struct my_softc {
  uint8_t hdr[2];
  uint8_t eth_pkt[1500];
  uint8_t other_important_stuff[546];
} __aligned(PAGE_SIZE);

Can "eth_pkt" be loaded into DMA ? No, it has an offset of 2.

struct my_softc {
  uint8_t eth_pkt[1500];
  uint8_t other_important_stuff[548];
} __aligned(PAGE_SIZE);

Can "eth_pkt" be loaded into DMA ? No, "other_important_stuff" might get lost 
when the cache is invalidated.

struct my_softc {
  uint8_t eth_pkt[1500];
} __aligned(PAGE_SIZE);

Can "eth_pkt" be loaded into DMA ? Yes, I see no problem.

Is it guaranteed that the "m_data" field of a mbuf will always be correctly 
aligned for the CPU/DMA cache in addition to the host alignment ?

Does bus_dma support bouncing using multiple pages instead of using one 
contiguous segment ?

Please correct me if I am wrong.

--HPS