From owner-freebsd-bugs@FreeBSD.ORG Thu Mar 30 08:10:41 2006 Return-Path: X-Original-To: freebsd-bugs@hub.freebsd.org Delivered-To: freebsd-bugs@hub.freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 1037716A41F for ; Thu, 30 Mar 2006 08:10:41 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [216.136.204.21]) by mx1.FreeBSD.org (Postfix) with ESMTP id A1FCD43D48 for ; Thu, 30 Mar 2006 08:10:22 +0000 (GMT) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (gnats@localhost [127.0.0.1]) by freefall.freebsd.org (8.13.4/8.13.4) with ESMTP id k2U8AMRV044528 for ; Thu, 30 Mar 2006 08:10:22 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.13.4/8.13.4/Submit) id k2U8AMRI044527; Thu, 30 Mar 2006 08:10:22 GMT (envelope-from gnats) Date: Thu, 30 Mar 2006 08:10:22 GMT Message-Id: <200603300810.k2U8AMRI044527@freefall.freebsd.org> To: freebsd-bugs@FreeBSD.org From: "Devon H. O'Dell" Cc: Subject: Re: kern/94939: [acpi] [patch] reboot(8) fails on IBM / Intel blades X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: "Devon H. O'Dell" List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Mar 2006 08:10:41 -0000 The following reply was made to PR kern/94939; it has been noted by GNATS. From: "Devon H. O'Dell" To: Nate Lawson Cc: John Baldwin , bug-followup@freebsd.org Subject: Re: kern/94939: [acpi] [patch] reboot(8) fails on IBM / Intel blades Date: Tue, 28 Mar 2006 11:22:35 -0800 On Tue, Mar 28, 2006 at 11:08:02AM -0800, Nate Lawson wrote: > John Baldwin wrote: > > Nate, > > > > I'm curious where you think this code should go if not here? I'd imagine > > we don't want to do this after AcpiTerminate() since perhaps the specified > > register may no longer be available (I might be wrong though, I haven't > > checked the spec). > > > > I don't have a specific idea since I didn't look at it closely. I think > there might be some requirements of writes to the reset register > (delays, expectation of chipset configuration, order with other shutdown > tasks). Here are the requirements from the spec: > > >>> > 4.7.3.6 Reset Register > The optional ACPI reset mechanism specifies a standard mechanism that > provides a complete system reset. When implemented, this mechanism must > reset the entire system. This includes processors, core logic, all > buses, and all peripherals. From an OSPM perspective, asserting the > reset mechanism is the logical equivalent to power cycling the machine. > Upon gaining control after a reset, OSPM will perform actions in > like manner to a cold boot. > ... > The system must reset immediately following the write to this register. > OSPM assumes that the processor will not execute beyond the write > instruction. OSPM should execute spin loops on the CPUs in the system > following a write to this register. > >>> My interpretation of this is ``don't do anything else after the write to the register, because you can't expect to do it.'' Since they say that the system ``must reset immediately following the write'', it seems that this is implemented in hardware, and we can't assume that we will be able to do anything afterwards, anyway. > So I'm ok with the patch being committed if no other tasks need to > happen after this shutdown handler is called. Also, all APs should be > stopped before this happens and it should only occur once on the BSP. I was curious if anything happens after this handler is called -- if there is, we definitely need to move it back to later in the process. Again, I put the code here because it looked to me like the procedure already assumed nothing else is happening, but it sounds like there are other procedures that are in the call queue after this one. --Devon > -- > Nate