Date: Wed, 25 Feb 1998 09:15:03 -0800 (PST) From: Vincent Poy <vince@venus.GAIANET.NET> To: Dag-Erling Coidan Smørgrav <dag-erli@ifi.uio.no> Cc: Satoshi Asami <asami@FreeBSD.ORG>, hardware@FreeBSD.ORG Subject: Re: Intel Pentium Chipsets Message-ID: <Pine.BSF.3.96.980225091400.254L-100000@venus.GAIANET.NET> In-Reply-To: <xzpwwej393l.fsf@gnipahellir.ifi.uio.no>
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On 25 Feb 1998, Dag-Erling Coidan Smørgrav wrote: > Vincent Poy <vince@venus.GAIANET.NET> writes: > > On Wed, 25 Feb 1998, Satoshi Asami wrote: > > > Go to www.intel.com for Intel chipset datasheets. > > I did and the link went to the development site. It seems like > > the datasheets have changed. The ones a few months ago used to mention > > the amount of cacheable ram but the new ones don't. > > Look harder, and keep in mind that for the Pentium II, it's not the > chipset that determines the amount of cacheable memory, but the > processor, since the L2 cache is located on the processor card. > > The datasheet for the 430HX chipset, for instance, has cacheability > information in section 4.3 "Secondary Cache Interface", on page 35. It > indicates that the HX chipset can support up to 512 MB of cached RAM > when equipped with 11-bit tag chips. > > BTW, the datasheets I read were those listed on > <http://developer.intel.com/design/pcisets/datashts/>. I think I know what I did wrong now. Before, they used to have a comparison chart or a summary of each chipset but now it's in .pdf so that's why I couldn't find it. Cheers, Vince - vince@MCESTATE.COM - vince@GAIANET.NET ________ __ ____ Unix Networking Operations - FreeBSD-Real Unix for Free / / / / | / |[__ ] GaiaNet Corporation - M & C Estate / / / / | / | __] ] Beverly Hills, California USA 90210 / / / / / |/ / | __] ] HongKong Stars/Gravis UltraSound Mailing Lists Admin /_/_/_/_/|___/|_|[____] To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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