Date: Thu, 21 May 1998 05:15:00 +1000 From: Bruce Evans <bde@zeta.org.au> To: bde@zeta.org.au, mike@smith.net.au Cc: current@FreeBSD.ORG, grog@lemis.com, hardware@FreeBSD.ORG, tarkhil@asteroid.svib.ru Subject: Re: IWill and sio, again and again Message-ID: <199805201915.FAA23917@godzilla.zeta.org.au>
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>> No, I only worked around the problem on one IWill system. The PIC (or >> something beteween the UART and the PIC) apparently latches rising edges >> of IRQ signals even for IRQs that are masked in the PIC. > >Is this perhaps related to the 'serialized IRQ protocol' that the ACER >UART claims to support? Some more research indicates that this is a >"new feature" in the TX and LX chipsets. The descriptions I've been >able to find of this so far seem to indicate that it might fit the bill. >Look for it in the PIIX4 documentation, if you have that. You may need >to pester Acer for a copy of the 513X datasheet as well. Don't have it. I couldn't find your old mail about this. >> It should not-work even for non-IWill UARTs, since the attach assumes >> certain values in the cfcr, ier and mcr registers. > >That sounds like "I agree". How much effort would be required to make >the attach assume a completely indeterminate ground state, predicated >simply on knowing that the port is present? 3 lines... plus not more than a few thousand lines to configure it :-). Bruce To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hardware" in the body of the message
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