From owner-freebsd-questions Wed Sep 2 17:59:34 1998 Return-Path: Received: (from majordom@localhost) by hub.freebsd.org (8.8.8/8.8.8) id RAA11425 for freebsd-questions-outgoing; Wed, 2 Sep 1998 17:59:34 -0700 (PDT) (envelope-from owner-freebsd-questions@FreeBSD.ORG) Received: from laker.net (jet.laker.net [205.245.74.2]) by hub.freebsd.org (8.8.8/8.8.8) with ESMTP id RAA11419 for ; Wed, 2 Sep 1998 17:59:33 -0700 (PDT) (envelope-from sfriedri@laker.net) Received: from nt (digital-pbi-121.laker.net [208.0.233.21]) by laker.net (8.9.0/8.9.LAKERNET.NO-SPAM.SPAMMERS.AND.RELAYS.WILL.BE.TRACKED.AND.PROSECUTED.) with SMTP id UAA12645; Wed, 2 Sep 1998 20:58:25 -0400 Message-Id: <199809030058.UAA12645@laker.net> From: "Steve Friedrich" To: "brandon@virage.com" Cc: "FreeBSD Questions" Date: Wed, 02 Sep 1998 20:58:49 -0500 Reply-To: "Steve Friedrich" X-Mailer: PMMail 98 Professional (2.00.1500) For Windows NT (4.0.1381;3) MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Subject: Re: cpu considerations for packet filtering Sender: owner-freebsd-questions@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG On Wed, 02 Sep 1998 14:40:20 -0700, Brandon Huey wrote: >i guess i've been misled in a >way by the PII's... thinking L2 cache is something integrated on-chip. >i generally see systems marketed with L2 cache and cpu vaguely suggested >as one feature, ie: "Pentium II/266 w/512KB L2 cache" The L2 cache is on the chip or the processor "card" for Pentium IIs and also for Pentium Pros, but for previous Intel, Cyrix, and AMD chips, the L2 cache was on the motherboard. It will become more common. > >but if it were just a matter of getting the right mobo, what explains >the introduction of the celeron and the two version of the pentium pro >with varrying cache sizes? Varying sizes of cache have been the norm. Cache memories are faster and more expensive than "main" memory and so it's always been a matter of how much cash do you have... The Celeron is Intel's attempt at taking advantage of people who don't know anything about CPU architectures. Modern CPU designs depend heavily on cache to ensure good performance. To give an example, I have an AMD-K6 233 with 64MB SDRAM (two 32MB SDRAMs to be precise). This is my number two machine at home with FreeBSD on it. It runs fine, except when I want to "buildworld", which is compiling and assembling ALL the FreeBSD sources. This should take around, maybe 8 to 12 hours, I suspect, but it's never gotten thru it without me disabling both L1 and L2 cache systems. When those caches are disabled, it takes almost 48 hours to do the build, but at least it works. After I'm done, I re-enable the cache and everything appears ok. Someone told me about an AMD cache bug, but I believe this is not my problem because that bug gets relief when you lower memory to 32MB or lower. I've used the kernel option MAXMEM to restrict my memory to 32MB or 16MB, to no avail. Anyway, the point is, performance drops rather dramatically when you turn off the cache. I would avoid a Celeron. The AMD 3D does have an integrated L1 cache, but you could get by with a non-3D chip and it would be cheaper. I'd get either a Cyrix or AMD without 3D or MMX for your purpose... Good luck. Others may have ideas they'll send to you too... >let me ask a more broad question to stay on track: for packet filtering >and heavy network usage, how important is cpu and should i give up >on-chip cache to keep the cost of this unit down? To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message