Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 03 Dec 2012 00:37:05 +0100
From:      Andreas Longwitz <longwitz@incore.de>
To:        Andriy Gapon <avg@FreeBSD.org>
Cc:        freebsd-stable@FreeBSD.org
Subject:   Re: page fault on verbose boot
Message-ID:  <50BBE621.8050907@incore.de>
In-Reply-To: <50BA4CC2.1010908@FreeBSD.org>
References:  <50ABE8BC.1010904@incore.de> <50B8CD59.1050308@FreeBSD.org> <50B8DD1C.4010308@incore.de> <50B8ED1B.8080009@FreeBSD.org> <50B9463C.3090005@incore.de> <50BA4CC2.1010908@FreeBSD.org>

next in thread | previous in thread | raw e-mail | index | archive | help
>>> "Andriy Gapon wrote"
>>> Looking at the code in ioapic_program_intpin() this seems to be possible indeed:
>>>
>>> /* Write the values to the APIC. */
>>> intpin->io_lowreg = low;
>>> ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
>>>
>>> The line above reprograms vector number AND _unmasks_ the pin (which was
>>> specifically masked before reprogramming in ioapic_assign_cpu).
>>> The lines below reprogram the destination LAPIC/CPU:
>>>
>>> value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
>>> value &= ~IOART_DEST;
>>> value |= high;
>>> ioapic_write(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin), value);
>>>
>>> So a pending interrupt would be happily delivered to a wrong destination (new
>>> vector + old lapic).
>>> I am not sure if just swapping these two blocks of lines would fix the issue, but
>>> I hope that it would.  Could you please try that?
>> Yes I did and the first bootverbose run with your block switching patch
>> was ok. I will do some more expansive tests next week.
> 
> Thank you very much.
> I've committed this change to head.

After several tests I can state: the patch is ok for me.

Thanks for your quick help!


-- 
Andreas Longwitz




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?50BBE621.8050907>