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Date:      Fri, 24 Jan 1997 09:31:42 -0700 (MST)
From:      Terry Lambert <terry@lambert.org>
To:        thorpej@nas.nasa.gov
Cc:        terry@lambert.org, deischen@iworks.interworks.org, freebsd-hackers@freebsd.org
Subject:   Re: FreeBSD and VME
Message-ID:  <199701241631.JAA27247@phaeton.artisoft.com>
In-Reply-To: <199701240029.QAA03246@lestat.nas.nasa.gov> from "Jason Thorpe" at Jan 23, 97 04:28:13 pm

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> On Thu, 23 Jan 1997 16:49:44 -0700 (MST) 
>  Terry Lambert <terry@lambert.org> wrote:
> 
>  > Unfortunately neither NetBSD nor FreeBSD have abstracted bus bridging
>  > very well (IMO, anyway), so there will be mapping issues to fight
>  > with.
> 
> ...you're kidding, right?

No, actually... I did say "IMO".

The definition of a huge amount of string data for PCI is not a win.

Also, there is no concept of running ISA devices over a passive PCI
backplane.  There are a number of ruggedized systems becoming available
which place the bridge chip and the ISA devices on the other side of
a PCI/ISA bridge; ie:

        ISA Mult-I/O + PIA + IDE  <--> ISA/PCI bridge <--> PCI slot
                                                              ^
                                                              |
                                                              v
        Memory + CPU + L2 cache   <--> PCI chipset    <--> PCI slot
                                                              ^
                                                              |
                                                              v
                                       PCI video card <--> PCI slot
                                                              ^
                                                              |
                                                              v
                                  PCI disk controller <--> PCI slot
                                                              ^
                                                              |
                                                              v
                              PCI ethernet controller <--> PCI slot

Most of the code in the OS's assume the local processor bus will
not be PCI (except CGD's and Jeffrey Hsu's DEC Alpha 21064/21066
stuff).

For example, there are a number of PCI interrupt sharing issues for
PCI devices on PCI/PCI bridged busses (AHA3940 channel 2, etc.).


There is also not the concept of an ISA PnP bus being bridged
seperately from a ISA non-PnP bus, nor is there a concept of the
ENPIC bus bridge being a bridge in the formal sense for PCMCIA
devices onto any bus.  Boith of these are necessary to establish
probe-order for a fully PnP OS, and to resolve PnP/non-PnP ISA
issues, like the Acer IRQ-12 consuming bus mouse (if it's any
consolation, both Windows95 and Windows NT fail to identify the
use of IRQ-12 by the bus mouse on this system).

Busses need to be probed and attached in a precedence order in the
same way that cards are probed and attached in a precedence order
on an ISA bus to prevent destructive probes from making hardware
useless.

Finally, neither OS is fully PnP aware, such that OS level
configuration can be used to allocate PnP assignments (this is
needed for PnP cards in a non-PnP BIOS equipped system).


					Regards,
					Terry Lambert
					terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.



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