Date: Sat, 28 Aug 2010 22:14:24 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r211952 - in user/imp/tbemd: contrib/top sys/cddl/contrib/opensolaris/uts/common sys/cddl/contrib/opensolaris/uts/common/fs/zfs sys/fs/nfs sys/fs/nfsserver sys/mips/rmi sys/mips/rmi/dev... Message-ID: <201008282214.o7SMEOqe044946@svn.freebsd.org>
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Author: imp Date: Sat Aug 28 22:14:24 2010 New Revision: 211952 URL: http://svn.freebsd.org/changeset/base/211952 Log: Merge from head at 211951 Added: user/imp/tbemd/sys/mips/rmi/dev/nlge/ - copied from r211951, head/sys/mips/rmi/dev/nlge/ Modified: user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/Makefile.files user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/rrwlock.c user/imp/tbemd/sys/fs/nfs/nfs_commonsubs.c user/imp/tbemd/sys/fs/nfs/nfs_var.h user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdsocket.c user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdstate.c user/imp/tbemd/sys/mips/rmi/board.c user/imp/tbemd/sys/mips/rmi/board.h user/imp/tbemd/sys/mips/rmi/files.xlr user/imp/tbemd/sys/mips/rmi/iodi.c user/imp/tbemd/sys/netinet/sctp.h user/imp/tbemd/sys/netinet/sctp_cc_functions.c user/imp/tbemd/sys/netinet/sctp_indata.c user/imp/tbemd/sys/netinet/sctp_input.c user/imp/tbemd/sys/netinet/sctp_output.c user/imp/tbemd/sys/netinet/sctp_pcb.c user/imp/tbemd/sys/netinet/sctp_pcb.h user/imp/tbemd/sys/netinet/sctp_peeloff.c user/imp/tbemd/sys/netinet/sctp_timer.c user/imp/tbemd/sys/netinet/sctp_usrreq.c user/imp/tbemd/sys/netinet/sctputil.c user/imp/tbemd/sys/netinet6/sctp6_usrreq.c Directory Properties: user/imp/tbemd/ (props changed) user/imp/tbemd/cddl/contrib/opensolaris/ (props changed) user/imp/tbemd/contrib/bind9/ (props changed) user/imp/tbemd/contrib/ee/ (props changed) user/imp/tbemd/contrib/expat/ (props changed) user/imp/tbemd/contrib/file/ (props changed) user/imp/tbemd/contrib/gdb/ (props changed) user/imp/tbemd/contrib/gdtoa/ (props changed) user/imp/tbemd/contrib/gnu-sort/ (props changed) user/imp/tbemd/contrib/groff/ (props changed) user/imp/tbemd/contrib/less/ (props changed) user/imp/tbemd/contrib/libpcap/ (props changed) user/imp/tbemd/contrib/llvm/ (props changed) user/imp/tbemd/contrib/llvm/tools/clang/ (props changed) user/imp/tbemd/contrib/ncurses/ (props changed) user/imp/tbemd/contrib/netcat/ (props changed) user/imp/tbemd/contrib/ntp/ (props changed) user/imp/tbemd/contrib/one-true-awk/ (props changed) user/imp/tbemd/contrib/openbsm/ (props changed) user/imp/tbemd/contrib/openpam/ (props changed) user/imp/tbemd/contrib/pf/ (props changed) user/imp/tbemd/contrib/sendmail/ (props changed) user/imp/tbemd/contrib/tcpdump/ (props changed) user/imp/tbemd/contrib/tcsh/ (props changed) user/imp/tbemd/contrib/top/ (props changed) user/imp/tbemd/contrib/top/install-sh (props changed) user/imp/tbemd/contrib/tzcode/stdtime/ (props changed) user/imp/tbemd/contrib/tzcode/zic/ (props changed) user/imp/tbemd/contrib/tzdata/ (props changed) user/imp/tbemd/contrib/wpa/ (props changed) user/imp/tbemd/crypto/openssh/ (props changed) user/imp/tbemd/crypto/openssl/ (props changed) user/imp/tbemd/lib/libc/ (props changed) user/imp/tbemd/lib/libc/stdtime/ (props changed) user/imp/tbemd/lib/libutil/ (props changed) user/imp/tbemd/lib/libz/ (props changed) user/imp/tbemd/sbin/ (props changed) user/imp/tbemd/sbin/ipfw/ (props changed) user/imp/tbemd/share/zoneinfo/ (props changed) user/imp/tbemd/sys/ (props changed) user/imp/tbemd/sys/amd64/include/xen/ (props changed) user/imp/tbemd/sys/cddl/contrib/opensolaris/ (props changed) user/imp/tbemd/sys/contrib/dev/acpica/ (props changed) user/imp/tbemd/sys/contrib/pf/ (props changed) user/imp/tbemd/sys/contrib/x86emu/ (props changed) user/imp/tbemd/sys/dev/xen/xenpci/ (props changed) user/imp/tbemd/usr.bin/csup/ (props changed) user/imp/tbemd/usr.bin/procstat/ (props changed) user/imp/tbemd/usr.sbin/zic/ (props changed) Modified: user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/Makefile.files ============================================================================== --- user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/Makefile.files Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/Makefile.files Sat Aug 28 22:14:24 2010 (r211952) @@ -19,9 +19,6 @@ # CDDL HEADER END # -ZUT_OBJS += \ - zut.o - # # Copyright 2008 Sun Microsystems, Inc. All rights reserved. # Use is subject to license terms. @@ -109,3 +106,6 @@ ZFS_OBJS += \ zfs_vfsops.o \ zfs_vnops.o \ zvol.o + +ZUT_OBJS += \ + zut.o Modified: user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/rrwlock.c ============================================================================== --- user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/rrwlock.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/rrwlock.c Sat Aug 28 22:14:24 2010 (r211952) @@ -82,7 +82,7 @@ rrn_find(rrwlock_t *rrl) rrw_node_t *rn; if (refcount_count(&rrl->rr_linked_rcount) == 0) - return (B_FALSE); + return (NULL); for (rn = tsd_get(rrw_tsd_key); rn != NULL; rn = rn->rn_next) { if (rn->rn_rrl == rrl) Modified: user/imp/tbemd/sys/fs/nfs/nfs_commonsubs.c ============================================================================== --- user/imp/tbemd/sys/fs/nfs/nfs_commonsubs.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/fs/nfs/nfs_commonsubs.c Sat Aug 28 22:14:24 2010 (r211952) @@ -1824,6 +1824,21 @@ nfsv4_getref(struct nfsv4lock *lp, int * } /* + * Get a reference as above, but return failure instead of sleeping if + * an exclusive lock is held. + */ +APPLESTATIC int +nfsv4_getref_nonblock(struct nfsv4lock *lp) +{ + + if ((lp->nfslock_lock & NFSV4LOCK_LOCK) != 0) + return (0); + + lp->nfslock_usecnt++; + return (1); +} + +/* * Test for a lock. Return 1 if locked, 0 otherwise. */ APPLESTATIC int Modified: user/imp/tbemd/sys/fs/nfs/nfs_var.h ============================================================================== --- user/imp/tbemd/sys/fs/nfs/nfs_var.h Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/fs/nfs/nfs_var.h Sat Aug 28 22:14:24 2010 (r211952) @@ -251,6 +251,7 @@ int nfsv4_lock(struct nfsv4lock *, int, void nfsv4_unlock(struct nfsv4lock *, int); void nfsv4_relref(struct nfsv4lock *); void nfsv4_getref(struct nfsv4lock *, int *, void *); +int nfsv4_getref_nonblock(struct nfsv4lock *); int nfsv4_testlock(struct nfsv4lock *); int nfsrv_mtostr(struct nfsrv_descript *, char *, int); int nfsrv_checkutf8(u_int8_t *, int); Modified: user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdsocket.c ============================================================================== --- user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdsocket.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdsocket.c Sat Aug 28 22:14:24 2010 (r211952) @@ -533,8 +533,6 @@ nfsrvd_compound(struct nfsrv_descript *n NFSV4ROOTLOCKMUTEXPTR); NFSUNLOCKV4ROOTMUTEX(); if (igotlock) { - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ /* * If I got the lock, I can update the stable storage file. * Done when the grace period is over or a client has long Modified: user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdstate.c ============================================================================== --- user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdstate.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/fs/nfsserver/nfs_nfsdstate.c Sat Aug 28 22:14:24 2010 (r211952) @@ -164,8 +164,6 @@ nfsrv_setclient(struct nfsrv_descript *n NFSV4ROOTLOCKMUTEXPTR); } while (!igotlock); NFSUNLOCKV4ROOTMUTEX(); - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ /* * Search for a match in the client list. @@ -416,8 +414,6 @@ nfsrv_getclient(nfsquad_t clientid, int NFSV4ROOTLOCKMUTEXPTR); } while (!igotlock); NFSUNLOCKV4ROOTMUTEX(); - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ } else if (opflags != CLOPS_RENEW) { NFSLOCKSTATE(); } @@ -547,8 +543,6 @@ nfsrv_adminrevoke(struct nfsd_clid *revo NFSV4ROOTLOCKMUTEXPTR); } while (!igotlock); NFSUNLOCKV4ROOTMUTEX(); - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ /* * Search for a match in the client list. @@ -824,11 +818,8 @@ nfsrv_dumplocks(vnode_t vp, struct nfsd_ /* * Server timer routine. It can scan any linked list, so long - * as it holds the spin lock and there is no exclusive lock on + * as it holds the spin/mutex lock and there is no exclusive lock on * nfsv4rootfs_lock. - * Must be called by a kernel thread and not a timer interrupt, - * so that it only runs when the nfsd threads are sleeping on a - * uniprocessor and uses the State spin lock for an SMP system. * (For OpenBSD, a kthread is ok. For FreeBSD, I think it is ok * to do this from a callout, since the spin locks work. For * Darwin, I'm not sure what will work correctly yet.) @@ -839,7 +830,7 @@ nfsrv_servertimer(void) { struct nfsclient *clp, *nclp; struct nfsstate *stp, *nstp; - int i; + int got_ref, i; /* * Make sure nfsboottime is set. This is used by V3 as well @@ -867,13 +858,14 @@ nfsrv_servertimer(void) } /* - * Return now if an nfsd thread has the exclusive lock on - * nfsv4rootfs_lock. The dirty trick here is that we have - * the spin lock already and the nfsd threads do a: - * NFSLOCKSTATE, NFSUNLOCKSTATE after getting the exclusive - * lock, so they won't race with code after this check. + * Try and get a reference count on the nfsv4rootfs_lock so that + * no nfsd thread can acquire an exclusive lock on it before this + * call is done. If it is already exclusively locked, just return. */ - if (nfsv4rootfs_lock.nfslock_lock & NFSV4LOCK_LOCK) { + NFSLOCKV4ROOTMUTEX(); + got_ref = nfsv4_getref_nonblock(&nfsv4rootfs_lock); + NFSUNLOCKV4ROOTMUTEX(); + if (got_ref == 0) { NFSUNLOCKSTATE(); return; } @@ -945,6 +937,9 @@ nfsrv_servertimer(void) } } NFSUNLOCKSTATE(); + NFSLOCKV4ROOTMUTEX(); + nfsv4_relref(&nfsv4rootfs_lock); + NFSUNLOCKV4ROOTMUTEX(); } /* @@ -4224,8 +4219,6 @@ nfsrv_clientconflict(struct nfsclient *c NFSV4ROOTLOCKMUTEXPTR); } while (!gotlock); NFSUNLOCKV4ROOTMUTEX(); - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ *haslockp = 1; NFSVOPLOCK(vp, LK_EXCLUSIVE | LK_RETRY, p); return (1); @@ -4390,8 +4383,6 @@ nfsrv_delegconflict(struct nfsstate *stp NFSV4ROOTLOCKMUTEXPTR); } while (!gotlock); NFSUNLOCKV4ROOTMUTEX(); - NFSLOCKSTATE(); /* to avoid a race with */ - NFSUNLOCKSTATE(); /* nfsrv_servertimer() */ *haslockp = 1; NFSVOPLOCK(vp, LK_EXCLUSIVE | LK_RETRY, p); return (-1); Modified: user/imp/tbemd/sys/mips/rmi/board.c ============================================================================== --- user/imp/tbemd/sys/mips/rmi/board.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/mips/rmi/board.c Sat Aug 28 22:14:24 2010 (r211952) @@ -78,13 +78,12 @@ static int xls_rxstn_to_txstn_map[128] = [120 ... 127] = TX_STN_SAE }; -struct stn_cc *xlr_core_cc_configs[] = {&cc_table_cpu_0, &cc_table_cpu_1, - &cc_table_cpu_2, &cc_table_cpu_3, - &cc_table_cpu_4, &cc_table_cpu_5, -&cc_table_cpu_6, &cc_table_cpu_7}; +struct stn_cc *xlr_core_cc_configs[] = { &cc_table_cpu_0, &cc_table_cpu_1, + &cc_table_cpu_2, &cc_table_cpu_3, &cc_table_cpu_4, &cc_table_cpu_5, + &cc_table_cpu_6, &cc_table_cpu_7}; -struct stn_cc *xls_core_cc_configs[] = {&xls_cc_table_cpu_0, &xls_cc_table_cpu_1, -&xls_cc_table_cpu_2, &xls_cc_table_cpu_3}; +struct stn_cc *xls_core_cc_configs[] = { &xls_cc_table_cpu_0, &xls_cc_table_cpu_1, + &xls_cc_table_cpu_2, &xls_cc_table_cpu_3 }; struct xlr_board_info xlr_board_info; @@ -98,6 +97,174 @@ xlr_pcmcia_present(void) return ((resetconf & 0x4000) != 0); } +static void +xlr_board_specific_overrides(struct xlr_board_info* board) +{ + struct xlr_gmac_block_t *blk1, *blk2; + + blk1 = &board->gmac_block[1]; + blk2 = &board->gmac_block[2]; + + switch (xlr_boot1_info.board_major_version) { + case RMI_XLR_BOARD_ARIZONA_I: + /* ATX-I has SPI-4, not XGMAC */ + blk1->type = XLR_SPI4; + blk1->enabled = 0; /* nlge does not + support SPI-4 */ + blk2->type = XLR_SPI4; + blk2->enabled = 0; + break; + + case RMI_XLR_BOARD_ARIZONA_II: + /* XGMII_A --> VSC7281, XGMII_B --> VSC7281 */ + blk1->enabled = 1; + blk1->num_ports = 1; + blk1->gmac_port[0].valid = 1; + + blk2->enabled = 1; + blk2->num_ports = 1; + blk2->gmac_port[0].valid = 1; + default: + break; + } +} + +static int +quad0_xaui(void) +{ + xlr_reg_t *gpio_mmio = + (unsigned int *)(DEFAULT_XLR_IO_BASE + XLR_IO_GPIO_OFFSET); + uint32_t bit24; + + bit24 = (xlr_read_reg(gpio_mmio, 0x15) >> 24) & 0x1; + return (bit24); +} + +static int +quad1_xaui(void) +{ + xlr_reg_t *gpio_mmio = + (unsigned int *)(DEFAULT_XLR_IO_BASE + XLR_IO_GPIO_OFFSET); + uint32_t bit25; + + bit25 = (xlr_read_reg(gpio_mmio, 0x15) >> 25) & 0x1; + return (bit25); +} + +static void +xls_board_specific_overrides(struct xlr_board_info* board) +{ + struct xlr_gmac_block_t *blk0, *blk1; + int i; + + blk0 = &board->gmac_block[0]; + blk1 = &board->gmac_block[1]; + + switch (xlr_boot1_info.board_major_version) { + case RMI_XLR_BOARD_ARIZONA_VI: + blk0->mode = XLR_PORT0_RGMII; + blk0->gmac_port[0].type = XLR_RGMII; + blk0->gmac_port[0].phy_addr = 0; + blk0->gmac_port[0].mii_addr = XLR_IO_GMAC_4_OFFSET; + /* Because of the Octal PHY, SGMII Quad1 is MII is also bound + * to the PHY attached to SGMII0_MDC/MDIO/MDINT. */ + for (i = 0; i < 4; i++) { + blk1->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET; + } + blk1->gmac_port[1].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[2].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[3].mii_addr = XLR_IO_GMAC_0_OFFSET; + + blk1->gmac_port[1].serdes_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[2].serdes_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[3].serdes_addr = XLR_IO_GMAC_0_OFFSET; + + /* RGMII MDIO interrupt is thru NA1 and SGMII MDIO + * interrupts for ports in blk1 are from NA0 */ + blk0->gmac_port[0].mdint_id = 1; + + blk1->gmac_port[0].mdint_id = 0; + blk1->gmac_port[1].mdint_id = 0; + blk1->gmac_port[2].mdint_id = 0; + blk1->gmac_port[3].mdint_id = 0; + break; + + case RMI_XLR_BOARD_ARIZONA_VIII: + /* There is just one Octal PHY on the board and it is + * connected to the MII interface for NA Quad 0. */ + blk1->gmac_port[0].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[1].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[2].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk1->gmac_port[3].mii_addr = XLR_IO_GMAC_0_OFFSET; + + /* Board 8.3 (Lite) has XLS108 */ + if (xlr_boot1_info.board_minor_version == 3) { + /* NA0 has 3 ports */ + blk0->gmac_port[3].valid = 1; + blk0->num_ports--; + /* NA1 is completely disabled */ + blk1->enabled = 0; + } + + break; + + case RMI_XLR_BOARD_ARIZONA_XI: + case RMI_XLR_BOARD_ARIZONA_XII: + if (quad0_xaui()) { /* GMAC ports 0-3 are set to XAUI */ + /* only GMAC0 is active i.e, the 0-th port on this quad. + * Disable all the other 7 possible ports. */ + for (i = 1; i < MAX_NA_PORTS; i++) { + memset(&blk0->gmac_port[i], 0, + sizeof(blk0->gmac_port[i])); + } + /* Setup for XAUI on N/w Acc0: gmac0 */ + blk0->type = XLR_XGMAC; + blk0->mode = XLR_XAUI; + blk0->num_ports = 1; + blk0->gmac_port[0].type = XLR_XAUI; + blk1->gmac_port[0].phy_addr = 16; + blk0->gmac_port[0].tx_bucket_id = blk0->station_txbase; + /* Other addresses etc need not be modified as XAUI_0 + * shares its addresses with SGMII GMAC_0, which was + * set in the caller. */ + } + else { + blk0->num_ports = 1; /* only 1 RGMII port */ + blk0->mode = XLR_PORT0_RGMII; + blk0->gmac_port[0].type = XLR_RGMII; + blk0->gmac_port[0].phy_addr = 0; + blk0->gmac_port[0].mii_addr = XLR_IO_GMAC_0_OFFSET; + } + + if (quad1_xaui()) { /* GMAC ports 4-7 are used for XAUI */ + /* only GMAC4 is active i.e, the 0-th port on this quad. + * Disable all the other 7 possible ports. */ + for (i = 1; i < MAX_NA_PORTS; i++) { + memset(&blk1->gmac_port[i], 0, + sizeof(blk1->gmac_port[i])); + } + /* Setup for XAUI on N/w Acc1: gmac4 */ + blk1->type = XLR_XGMAC; + blk1->mode = XLR_XAUI; + blk1->num_ports = 1; + /* XAUI and SGMII ports share FMN buckets on N/w Acc 1; + so, station_txbase, station_rfr need not be + patched up. */ + blk1->gmac_port[0].type = XLR_XAUI; + blk1->gmac_port[0].phy_addr = 16; + blk1->gmac_port[0].tx_bucket_id = blk1->station_txbase; + /* Other addresses etc need not be modified as XAUI_1 + * shares its addresses with SGMII GMAC_4, which was + * set in the caller. */ + } + break; + + default: + break; + } +} + /* * All our knowledge of chip and board that cannot be detected by probing * at run-time goes here @@ -105,6 +272,57 @@ xlr_pcmcia_present(void) int xlr_board_info_setup() { + struct xlr_gmac_block_t *blk0, *blk1, *blk2; + int i; + + /* This setup code is long'ish because the same base driver + * (if_nlge.c) is used for different: + * - CPUs (XLR/XLS) + * - boards (for each CPU, multiple board configs are possible + * and available). + * + * At the time of writing, there are atleast 12 boards, 4 with XLR + * and 8 with XLS. This means that the base driver needs to work with + * 12 different configurations, with varying levels of differences. + * To accomodate the different configs, the xlr_board_info struct + * has various attributes for paramters that could be different. + * These attributes are setup here and can be used directly in the + * base driver. + * It was seen that the setup code is not entirely trivial and + * it is possible to organize it in different ways. In the following, + * we choose an approach that sacrifices code-compactness/speed for + * readability. This is because configuration code executes once + * per reboot and hence has a minimal performance impact. + * On the other hand, driver debugging/enhancements require + * that different engineers can quickly comprehend the setup + * sequence. Hence, readability is seen as the key requirement for + * this code. It is for the reader to decide how much of this + * requirement is met with the current code organization !! + * + * The initialization is organized thus: + * + * if (CPU is XLS) { + * // initialize per XLS architecture + * // default inits (per chip spec) + * // board-specific overrides + * } else if (CPU is XLR) { + * // initialize per XLR architecture + * // default inits (per chip spec) + * // board-specific overrides + * } + * + * Within each CPU-specific initialization, all the default + * initializations are done first. This is followed up with + * board specific overrides. + */ + + /* start with a clean slate */ + memset(&xlr_board_info, 0, sizeof(xlr_board_info)); + xlr_board_info.ata = xlr_pcmcia_present(); + + blk0 = &xlr_board_info.gmac_block[0]; + blk1 = &xlr_board_info.gmac_block[1]; + blk2 = &xlr_board_info.gmac_block[2]; if (xlr_is_xls()) { xlr_board_info.is_xls = 1; @@ -113,98 +331,154 @@ xlr_board_info_setup() /* Board version 8 has NAND flash */ xlr_board_info.cfi = (xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII); - xlr_board_info.ata = xlr_pcmcia_present(); xlr_board_info.pci_irq = 0; xlr_board_info.credit_configs = xls_core_cc_configs; - xlr_board_info.bucket_sizes = &xls_bucket_sizes; - xlr_board_info.msgmap = xls_rxstn_to_txstn_map; - xlr_board_info.gmacports = 8; - - /* network block 0 */ - xlr_board_info.gmac_block[0].type = XLR_GMAC; - xlr_board_info.gmac_block[0].enabled = 0xf; - xlr_board_info.gmac_block[0].credit_config = &xls_cc_table_gmac0; - xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0; - xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0; - if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI || - xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XI || - xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XII) - xlr_board_info.gmac_block[0].mode = XLR_PORT0_RGMII; - else - xlr_board_info.gmac_block[0].mode = XLR_SGMII; - xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET; - xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ; - xlr_board_info.gmac_block[0].baseinst = 0; - - /* network block 1 */ - xlr_board_info.gmac_block[1].type = XLR_GMAC; - xlr_board_info.gmac_block[1].enabled = xlr_is_xls1xx() ? 0 : 0xf; - if (xlr_is_xls4xx_lite()) { - xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET); - uint32_t tmp; - - /* some ports are not enabled on the condor 4xx, figure this - out from the GPIO fuse bank */ - tmp = xlr_read_reg(mmio, 35); - if (tmp & (1<<28)) - xlr_board_info.gmac_block[1].enabled &= ~0x8; - if (tmp & (1<<29)) - xlr_board_info.gmac_block[1].enabled &= ~0x4; - } - xlr_board_info.gmac_block[1].credit_config = &xls_cc_table_gmac1; - xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_GMAC1_TX0; - xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_GMAC1_FR_0; - xlr_board_info.gmac_block[1].mode = XLR_SGMII; - xlr_board_info.gmac_block[1].baseaddr = XLR_IO_GMAC_4_OFFSET; - xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ; - xlr_board_info.gmac_block[1].baseinst = 4; - - /* network block 2 */ - xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */ - } else { + xlr_board_info.bucket_sizes = &xls_bucket_sizes; + xlr_board_info.msgmap = xls_rxstn_to_txstn_map; + xlr_board_info.gmacports = MAX_NA_PORTS; + + /* ---------------- Network Acc 0 ---------------- */ + + blk0->type = XLR_GMAC; + blk0->enabled = 0xf; + blk0->credit_config = &xls_cc_table_gmac0; + blk0->station_id = TX_STN_GMAC0; + blk0->station_txbase = MSGRNG_STNID_GMACTX0; + blk0->station_rfr = MSGRNG_STNID_GMACRFR_0; + blk0->mode = XLR_SGMII; + blk0->baseaddr = XLR_IO_GMAC_0_OFFSET; + blk0->baseirq = PIC_GMAC_0_IRQ; + blk0->baseinst = 0; + + /* By default, assume SGMII is setup. But this can change based + on board-specific or setting-specific info. */ + for (i = 0; i < 4; i++) { + blk0->gmac_port[i].valid = 1; + blk0->gmac_port[i].instance = i + blk0->baseinst; + blk0->gmac_port[i].type = XLR_SGMII; + blk0->gmac_port[i].phy_addr = i + 16; + blk0->gmac_port[i].tx_bucket_id = + blk0->station_txbase + i; + blk0->gmac_port[i].mdint_id = 0; + blk0->num_ports++; + blk0->gmac_port[i].base_addr = XLR_IO_GMAC_0_OFFSET + i * 0x1000; + blk0->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET; + blk0->gmac_port[i].pcs_addr = XLR_IO_GMAC_0_OFFSET; + blk0->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET; + } + + /* ---------------- Network Acc 1 ---------------- */ + blk1->type = XLR_GMAC; + blk1->enabled = 0xf; + blk1->credit_config = &xls_cc_table_gmac1; + blk1->station_id = TX_STN_GMAC1; + blk1->station_txbase = MSGRNG_STNID_GMAC1_TX0; + blk1->station_rfr = MSGRNG_STNID_GMAC1_FR_0; + blk1->mode = XLR_SGMII; + blk1->baseaddr = XLR_IO_GMAC_4_OFFSET; + blk1->baseirq = PIC_XGS_0_IRQ; + blk1->baseinst = 4; + + for (i = 0; i < 4; i++) { + blk1->gmac_port[i].valid = 1; + blk1->gmac_port[i].instance = i + blk1->baseinst; + blk1->gmac_port[i].type = XLR_SGMII; + blk1->gmac_port[i].phy_addr = i + 20; + blk1->gmac_port[i].tx_bucket_id = + blk1->station_txbase + i; + blk1->gmac_port[i].mdint_id = 1; + blk1->num_ports++; + blk1->gmac_port[i].base_addr = XLR_IO_GMAC_4_OFFSET + i * 0x1000; + blk1->gmac_port[i].mii_addr = XLR_IO_GMAC_4_OFFSET; + blk1->gmac_port[i].pcs_addr = XLR_IO_GMAC_4_OFFSET; + blk1->gmac_port[i].serdes_addr = XLR_IO_GMAC_0_OFFSET; + } + + /* ---------------- Network Acc 2 ---------------- */ + xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */ + + xls_board_specific_overrides(&xlr_board_info); + + } else { /* XLR */ xlr_board_info.is_xls = 0; xlr_board_info.nr_cpus = 32; xlr_board_info.usb = 0; xlr_board_info.cfi = 1; - xlr_board_info.ata = xlr_pcmcia_present(); xlr_board_info.pci_irq = 0; xlr_board_info.credit_configs = xlr_core_cc_configs; - xlr_board_info.bucket_sizes = &bucket_sizes; - xlr_board_info.msgmap = xlr_rxstn_to_txstn_map; - xlr_board_info.gmacports = 4; - - /* GMAC0 */ - xlr_board_info.gmac_block[0].type = XLR_GMAC; - xlr_board_info.gmac_block[0].enabled = 0xf; - xlr_board_info.gmac_block[0].credit_config = &cc_table_gmac; - xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0; - xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0; - xlr_board_info.gmac_block[0].mode = XLR_RGMII; - xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET; - xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ; - xlr_board_info.gmac_block[0].baseinst = 0; - - /* XGMAC0 */ - xlr_board_info.gmac_block[1].type = XLR_XGMAC; - xlr_board_info.gmac_block[1].enabled = 1; - xlr_board_info.gmac_block[1].credit_config = &cc_table_xgs_0; - xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_XGS0_TX; - xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_XGS0FR; - xlr_board_info.gmac_block[1].mode = -1; - xlr_board_info.gmac_block[1].baseaddr = XLR_IO_XGMAC_0_OFFSET; - xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ; - xlr_board_info.gmac_block[1].baseinst = 4; - - /* XGMAC1 */ - xlr_board_info.gmac_block[2].type = XLR_XGMAC; - xlr_board_info.gmac_block[2].enabled = 1; - xlr_board_info.gmac_block[2].credit_config = &cc_table_xgs_1; - xlr_board_info.gmac_block[2].station_txbase = MSGRNG_STNID_XGS1_TX; - xlr_board_info.gmac_block[2].station_rfr = MSGRNG_STNID_XGS1FR; - xlr_board_info.gmac_block[2].mode = -1; - xlr_board_info.gmac_block[2].baseaddr = XLR_IO_XGMAC_1_OFFSET; - xlr_board_info.gmac_block[2].baseirq = PIC_XGS_1_IRQ; - xlr_board_info.gmac_block[2].baseinst = 5; - } - return 0; + xlr_board_info.bucket_sizes = &bucket_sizes; + xlr_board_info.msgmap = xlr_rxstn_to_txstn_map; + xlr_board_info.gmacports = 4; + + /* ---------------- GMAC0 ---------------- */ + blk0->type = XLR_GMAC; + blk0->enabled = 0xf; + blk0->credit_config = &cc_table_gmac; + blk0->station_id = TX_STN_GMAC; + blk0->station_txbase = MSGRNG_STNID_GMACTX0; + blk0->station_rfr = MSGRNG_STNID_GMACRFR_0; + blk0->mode = XLR_RGMII; + blk0->baseaddr = XLR_IO_GMAC_0_OFFSET; + blk0->baseirq = PIC_GMAC_0_IRQ; + blk0->baseinst = 0; + + /* first, do the common/easy stuff for all the ports */ + for (i = 0; i < 4; i++) { + blk0->gmac_port[i].valid = 1; + blk0->gmac_port[i].instance = i + blk0->baseinst; + blk0->gmac_port[i].type = XLR_RGMII; + blk0->gmac_port[i].phy_addr = i; + blk0->gmac_port[i].tx_bucket_id = + blk0->station_txbase + i; + blk0->gmac_port[i].mdint_id = 0; + blk0->gmac_port[i].base_addr = XLR_IO_GMAC_0_OFFSET + i * 0x1000; + blk0->gmac_port[i].mii_addr = XLR_IO_GMAC_0_OFFSET; + /* RGMII ports, no PCS/SERDES */ + blk0->num_ports++; + } + + /* ---------------- XGMAC0 ---------------- */ + blk1->type = XLR_XGMAC; + blk1->mode = XLR_XGMII; + blk1->enabled = 0; + blk1->credit_config = &cc_table_xgs_0; + blk1->station_txbase = MSGRNG_STNID_XGS0_TX; + blk1->station_rfr = MSGRNG_STNID_XMAC0RFR; + blk1->station_id = TX_STN_XGS_0; /* TBD: is this correct ? */ + blk1->baseaddr = XLR_IO_XGMAC_0_OFFSET; + blk1->baseirq = PIC_XGS_0_IRQ; + blk1->baseinst = 4; + + blk1->gmac_port[0].type = XLR_XGMII; + blk1->gmac_port[0].instance = 0; + blk1->gmac_port[0].phy_addr = 0; + blk1->gmac_port[0].base_addr = XLR_IO_XGMAC_0_OFFSET; + blk1->gmac_port[0].mii_addr = XLR_IO_XGMAC_0_OFFSET; + blk1->gmac_port[0].tx_bucket_id = blk1->station_txbase; + blk1->gmac_port[0].mdint_id = 1; + + /* ---------------- XGMAC1 ---------------- */ + blk2->type = XLR_XGMAC; + blk2->mode = XLR_XGMII; + blk2->enabled = 0; + blk2->credit_config = &cc_table_xgs_1; + blk2->station_txbase = MSGRNG_STNID_XGS1_TX; + blk2->station_rfr = MSGRNG_STNID_XMAC1RFR; + blk2->station_id = TX_STN_XGS_1; /* TBD: is this correct ? */ + blk2->baseaddr = XLR_IO_XGMAC_1_OFFSET; + blk2->baseirq = PIC_XGS_1_IRQ; + blk2->baseinst = 5; + + blk2->gmac_port[0].type = XLR_XGMII; + blk2->gmac_port[0].instance = 0; + blk2->gmac_port[0].phy_addr = 0; + blk2->gmac_port[0].base_addr = XLR_IO_XGMAC_1_OFFSET; + blk2->gmac_port[0].mii_addr = XLR_IO_XGMAC_1_OFFSET; + blk2->gmac_port[0].tx_bucket_id = blk2->station_txbase; + blk2->gmac_port[0].mdint_id = 2; + + /* Done with default setup. Now do board-specific tweaks. */ + xlr_board_specific_overrides(&xlr_board_info); + } + return 0; } Modified: user/imp/tbemd/sys/mips/rmi/board.h ============================================================================== --- user/imp/tbemd/sys/mips/rmi/board.h Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/mips/rmi/board.h Sat Aug 28 22:14:24 2010 (r211952) @@ -132,41 +132,53 @@ xlr_is_xls4xx_lite(void) uint32_t chipid = xlr_processor_id(); return (chipid == 0x88 || chipid == 0x8c); -} + } + +/* SPI-4 --> 8 ports, 1G MAC --> 4 ports and 10G MAC --> 1 port */ +#define MAX_NA_PORTS 8 /* all our knowledge of chip and board that cannot be detected run-time goes here */ -enum gmac_block_types { - XLR_GMAC, XLR_XGMAC, XLR_SPI4 -}; - -enum gmac_block_modes { - XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII -}; +enum gmac_block_types { XLR_GMAC, XLR_XGMAC, XLR_SPI4}; +enum gmac_port_types { XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII, XLR_XGMII, XLR_XAUI }; struct xlr_board_info { int is_xls; int nr_cpus; - int usb; /* usb enabled ? */ - int cfi; /* NOR flash */ - int ata; /* PCMCIA/compactflash driver */ + int usb; /* usb enabled ? */ + int cfi; /* compact flash driver for NOR? */ + int ata; /* ata driver */ int pci_irq; - struct stn_cc **credit_configs; /* pointer to Core station credits */ - struct bucket_size *bucket_sizes; /* pointer to Core station - * bucket */ - int *msgmap; /* mapping of message station to devices */ - int gmacports; /* number of gmac ports on the board */ - struct xlr_gmac_block_t { - int type; /* see enum gmac_block_types */ - unsigned int enabled; /* mask of ports enabled */ - struct stn_cc *credit_config; /* credit configuration */ - int station_txbase; /* station id for tx */ - int station_rfr;/* free desc bucket */ - int mode; /* see gmac_block_modes */ - uint32_t baseaddr; /* IO base */ - int baseirq; /* first irq for this block, the rest are in - * sequence */ - int baseinst; /* the first rge unit for this block */ - } gmac_block[3]; + struct stn_cc **credit_configs; /* pointer to Core station credits */ + struct bucket_size *bucket_sizes; /* pointer to Core station bucket */ + int *msgmap; /* mapping of message station to devices */ + int gmacports; /* number of gmac ports on the board */ + struct xlr_gmac_block_t { /* refers to the set of GMACs controlled by a + network accelarator */ + int type; /* see enum gmac_block_types */ + unsigned int enabled; /* mask of ports enabled */ + struct stn_cc *credit_config; /* credit configuration */ + int station_id; /* station id for sending msgs */ + int station_txbase; /* station id for tx */ + int station_rfr; /* free desc bucket */ + int mode; /* see gmac_block_modes */ + uint32_t baseaddr; /* IO base */ + int baseirq; /* first irq for this block, the rest are in sequence */ + int baseinst; /* the first rge unit for this block */ + int num_ports; + struct xlr_gmac_port { + int valid; + int type; /* see enum gmac_port_types */ + uint32_t instance; /* identifies the GMAC to which + this port is bound to. */ + uint32_t phy_addr; + uint32_t base_addr; + uint32_t mii_addr; + uint32_t pcs_addr; + uint32_t serdes_addr; + uint32_t tx_bucket_id; + uint32_t mdint_id; + } gmac_port[MAX_NA_PORTS]; + } gmac_block [3]; }; extern struct xlr_board_info xlr_board_info; Modified: user/imp/tbemd/sys/mips/rmi/files.xlr ============================================================================== --- user/imp/tbemd/sys/mips/rmi/files.xlr Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/mips/rmi/files.xlr Sat Aug 28 22:14:24 2010 (r211952) @@ -21,6 +21,7 @@ mips/rmi/bus_space_rmi_pci.c standard mips/rmi/dev/sec/rmisec.c optional rmisec mips/rmi/dev/sec/rmilib.c optional rmisec mips/rmi/dev/xlr/rge.c optional rge +mips/rmi/dev/nlge/if_nlge.c optional nlge dev/iicbus/xlr_rtc.c optional xlr_rtc dev/iicbus/xlr_temperature.c optional xlr_temperature dev/iicbus/xlr_eeprom.c optional xlr_eeprom Modified: user/imp/tbemd/sys/mips/rmi/iodi.c ============================================================================== --- user/imp/tbemd/sys/mips/rmi/iodi.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/mips/rmi/iodi.c Sat Aug 28 22:14:24 2010 (r211952) @@ -108,13 +108,14 @@ iodi_setup_intr(device_t dev, device_t c struct resource *ires, int flags, driver_filter_t * filt, driver_intr_t *intr, void *arg, void **cookiep) { + const char *name = device_get_name(child); - if (strcmp(device_get_name(child), "uart") == 0) { + if (strcmp(name, "uart") == 0) { /* FIXME uart 1? */ cpu_establish_hardintr("uart", filt, intr, arg, PIC_UART_0_IRQ, flags, cookiep); pic_setup_intr(PIC_IRT_UART_0_INDEX, PIC_UART_0_IRQ, 0x1, 0); - } else if (strcmp(device_get_name(child), "rge") == 0) { + } else if (strcmp(name, "rge") == 0 || strcmp(name, "nlge") == 0) { int irq; /* This is a hack to pass in the irq */ @@ -122,16 +123,15 @@ iodi_setup_intr(device_t dev, device_t c cpu_establish_hardintr("rge", filt, intr, arg, irq, flags, cookiep); pic_setup_intr(irq - PIC_IRQ_BASE, irq, 0x1, 0); - } else if (strcmp(device_get_name(child), "ehci") == 0) { + } else if (strcmp(name, "ehci") == 0) { cpu_establish_hardintr("ehci", filt, intr, arg, PIC_USB_IRQ, flags, cookiep); pic_setup_intr(PIC_USB_IRQ - PIC_IRQ_BASE, PIC_USB_IRQ, 0x1, 0); - } else if (strcmp(device_get_name(child), "ata") == 0) { + } else if (strcmp(name, "ata") == 0) { xlr_establish_intr("ata", filt, intr, arg, PIC_PCMCIA_IRQ, flags, cookiep, bridge_pcmcia_ack); pic_setup_intr(PIC_PCMCIA_IRQ - PIC_IRQ_BASE, PIC_PCMCIA_IRQ, 0x1, 0); } - return (0); } @@ -194,6 +194,7 @@ iodi_activate_resource(device_t bus, dev /* prototypes */ static int iodi_probe(device_t); static int iodi_attach(device_t); +static int iodi_detach(device_t); static void iodi_identify(driver_t *, device_t); int @@ -213,6 +214,7 @@ int iodi_attach(device_t dev) { device_t tmpd; + int i; /* * Attach each devices @@ -268,17 +270,47 @@ iodi_attach(device_t dev) tmpd = device_add_child(dev, "rge", 5); device_set_ivars(tmpd, &xlr_board_info.gmac_block[1]); #endif - } else - device_printf(dev, "Unknown type of gmac 1\n"); + } else + device_printf(dev, "Unknown type of gmac 1\n"); + } + + /* This is to add the new GMAC driver. The above adds the old driver, + which has been retained for now as the new driver is stabilized. + The new driver is enabled with "option nlge". Make sure that only + one of rge or nlge is enabled in the conf file. */ + for (i = 0; i < 3; i++) { + if (xlr_board_info.gmac_block[i].enabled == 0) + continue; + tmpd = device_add_child(dev, "nlna", i); + device_set_ivars(tmpd, &xlr_board_info.gmac_block[i]); } bus_generic_probe(dev); bus_generic_attach(dev); return 0; } +int +iodi_detach(device_t dev) +{ + device_t nlna_dev; + int error, i, ret; + + error = 0; + ret = 0; + for (i = 0; i < 3; i++) { + nlna_dev = device_find_child(dev, "nlna", i); + if (nlna_dev != NULL) + error = bus_generic_detach(nlna_dev); + if (error) + ret = error; + } + return ret; +} + static device_method_t iodi_methods[] = { DEVMETHOD(device_probe, iodi_probe), DEVMETHOD(device_attach, iodi_attach), + DEVMETHOD(device_detach, iodi_detach), DEVMETHOD(device_identify, iodi_identify), DEVMETHOD(bus_alloc_resource, iodi_alloc_resource), DEVMETHOD(bus_activate_resource, iodi_activate_resource), Modified: user/imp/tbemd/sys/netinet/sctp.h ============================================================================== --- user/imp/tbemd/sys/netinet/sctp.h Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/netinet/sctp.h Sat Aug 28 22:14:24 2010 (r211952) @@ -155,10 +155,8 @@ struct sctp_paramhdr { /* CMT ON/OFF socket option */ #define SCTP_CMT_ON_OFF 0x00001200 #define SCTP_CMT_USE_DAC 0x00001201 -/* EY - NR_SACK on/off socket option */ -#define SCTP_NR_SACK_ON_OFF 0x00001300 /* JRS - Pluggable Congestion Control Socket option */ -#define SCTP_PLUGGABLE_CC 0x00001202 +#define SCTP_PLUGGABLE_CC 0x00001202 /* read only */ #define SCTP_GET_SNDBUF_USE 0x00001101 Modified: user/imp/tbemd/sys/netinet/sctp_cc_functions.c ============================================================================== --- user/imp/tbemd/sys/netinet/sctp_cc_functions.c Sat Aug 28 21:41:18 2010 (r211951) +++ user/imp/tbemd/sys/netinet/sctp_cc_functions.c Sat Aug 28 22:14:24 2010 (r211952) @@ -71,7 +71,8 @@ sctp_cwnd_update_after_fr(struct sctp_tc * (net->fast_retran_loss_recovery == 0))) */ TAILQ_FOREACH(net, &asoc->nets, sctp_next) { - if ((asoc->fast_retran_loss_recovery == 0) || (SCTP_BASE_SYSCTL(sctp_cmt_on_off) == 1)) { + if ((asoc->fast_retran_loss_recovery == 0) || + (asoc->sctp_cmt_on_off == 1)) { /* out of a RFC2582 Fast recovery window? */ if (net->net_ack > 0) { /* @@ -232,11 +233,11 @@ sctp_cwnd_update_after_sack(struct sctp_ * * Should we stop any running T3 timer here? */ - if (SCTP_BASE_SYSCTL(sctp_cmt_on_off) && - SCTP_BASE_SYSCTL(sctp_cmt_pf) && + if ((asoc->sctp_cmt_on_off == 1) && + (asoc->sctp_cmt_pf > 0) && ((net->dest_state & SCTP_ADDR_PF) == SCTP_ADDR_PF)) { net->dest_state &= ~SCTP_ADDR_PF; - net->cwnd = net->mtu * SCTP_BASE_SYSCTL(sctp_cmt_pf); + net->cwnd = net->mtu * asoc->sctp_cmt_pf; SCTPDBG(SCTP_DEBUG_INDATA1, "Destination %p moved from PF to reachable with cwnd %d.\n", net, net->cwnd); /* @@ -260,7 +261,9 @@ sctp_cwnd_update_after_sack(struct sctp_ */ #endif - if (asoc->fast_retran_loss_recovery && will_exit == 0 && SCTP_BASE_SYSCTL(sctp_cmt_on_off) == 0) { + if (asoc->fast_retran_loss_recovery && + (will_exit == 0) && + (asoc->sctp_cmt_on_off == 0)) { /* * If we are in loss recovery we skip any cwnd * update @@ -271,7 +274,8 @@ sctp_cwnd_update_after_sack(struct sctp_ * CMT: CUC algorithm. Update cwnd if pseudo-cumack has * moved. */ - if (accum_moved || (SCTP_BASE_SYSCTL(sctp_cmt_on_off) && net->new_pseudo_cumack)) { + if (accum_moved || + ((asoc->sctp_cmt_on_off == 1) && net->new_pseudo_cumack)) { /* If the cumulative ack moved we can proceed */ if (net->cwnd <= net->ssthresh) { /* We are in slow start */ @@ -697,7 +701,8 @@ sctp_hs_cwnd_update_after_fr(struct sctp * (net->fast_retran_loss_recovery == 0))) */ TAILQ_FOREACH(net, &asoc->nets, sctp_next) { - if ((asoc->fast_retran_loss_recovery == 0) || (SCTP_BASE_SYSCTL(sctp_cmt_on_off) == 1)) { + if ((asoc->fast_retran_loss_recovery == 0) || + (asoc->sctp_cmt_on_off == 1)) { /* out of a RFC2582 Fast recovery window? */ if (net->net_ack > 0) { /* @@ -850,11 +855,11 @@ sctp_hs_cwnd_update_after_sack(struct sc * * Should we stop any running T3 timer here? */ - if (SCTP_BASE_SYSCTL(sctp_cmt_on_off) && - SCTP_BASE_SYSCTL(sctp_cmt_pf) && + if ((asoc->sctp_cmt_on_off == 1) && + (asoc->sctp_cmt_pf > 0) && ((net->dest_state & SCTP_ADDR_PF) == SCTP_ADDR_PF)) { net->dest_state &= ~SCTP_ADDR_PF; - net->cwnd = net->mtu * SCTP_BASE_SYSCTL(sctp_cmt_pf); + net->cwnd = net->mtu * asoc->sctp_cmt_pf; SCTPDBG(SCTP_DEBUG_INDATA1, "Destination %p moved from PF to reachable with cwnd %d.\n", net, net->cwnd); /* @@ -878,7 +883,9 @@ sctp_hs_cwnd_update_after_sack(struct sc */ #endif - if (asoc->fast_retran_loss_recovery && will_exit == 0 && SCTP_BASE_SYSCTL(sctp_cmt_on_off) == 0) { + if (asoc->fast_retran_loss_recovery && + (will_exit == 0) && + (asoc->sctp_cmt_on_off == 0)) { /* * If we are in loss recovery we skip any cwnd * update @@ -889,7 +896,8 @@ sctp_hs_cwnd_update_after_sack(struct sc * CMT: CUC algorithm. Update cwnd if pseudo-cumack has * moved. */ - if (accum_moved || (SCTP_BASE_SYSCTL(sctp_cmt_on_off) && net->new_pseudo_cumack)) { + if (accum_moved || + ((asoc->sctp_cmt_on_off == 1) && net->new_pseudo_cumack)) { /* If the cumulative ack moved we can proceed */ if (net->cwnd <= net->ssthresh) { /* We are in slow start */ @@ -1333,11 +1341,11 @@ sctp_htcp_cwnd_update_after_sack(struct * * Should we stop any running T3 timer here? */ - if (SCTP_BASE_SYSCTL(sctp_cmt_on_off) && - SCTP_BASE_SYSCTL(sctp_cmt_pf) && + if ((asoc->sctp_cmt_on_off == 1) && + (asoc->sctp_cmt_pf > 0) && ((net->dest_state & SCTP_ADDR_PF) == SCTP_ADDR_PF)) { net->dest_state &= ~SCTP_ADDR_PF; - net->cwnd = net->mtu * SCTP_BASE_SYSCTL(sctp_cmt_pf); + net->cwnd = net->mtu * asoc->sctp_cmt_pf; SCTPDBG(SCTP_DEBUG_INDATA1, "Destination %p moved from PF to reachable with cwnd %d.\n", net, net->cwnd); /* @@ -1361,7 +1369,9 @@ sctp_htcp_cwnd_update_after_sack(struct */ #endif - if (asoc->fast_retran_loss_recovery && will_exit == 0 && SCTP_BASE_SYSCTL(sctp_cmt_on_off) == 0) { + if (asoc->fast_retran_loss_recovery && + will_exit == 0 && + (asoc->sctp_cmt_on_off == 0)) { /* *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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