From owner-freebsd-arm@freebsd.org Thu Jan 16 15:06:08 2020 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 9D2601EB5C3 for ; Thu, 16 Jan 2020 15:06:08 +0000 (UTC) (envelope-from jwbentum44@gmail.com) Received: from mail-io1-xd33.google.com (mail-io1-xd33.google.com [IPv6:2607:f8b0:4864:20::d33]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "smtp.gmail.com", Issuer "GTS CA 1O1" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 47z6vz5kmFz481c for ; Thu, 16 Jan 2020 15:06:07 +0000 (UTC) (envelope-from jwbentum44@gmail.com) Received: by mail-io1-xd33.google.com with SMTP id c16so22077532ioh.6 for ; Thu, 16 Jan 2020 07:06:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to; bh=hxdKNxl2WEpJFz2t9sI5KBeT/RrUgFKYhh7czHsEc44=; b=Fzua0EcA4rotEFb9Ni9af/6JSMdOe5aQN0uIknd6f3l4PX74BOOnkKuC5V4ixtye2B GzNctQIx5u/djPJ6iSO60NaSmUQS2YfzxnOHUuxzbbq+a1+vwPQLByPXwyPE0ExKX9SQ gOltVMpJzzFV3pon8nzolIy6j/7mkA0K7j/IvjsItyHY059T7ksV8Vr9JT9cW8b0kMOT TWaI+ggpUbohJuAQ3Rxwk/QKuwfTDpOxgE00ePhehFl93FarIzOQKvRc6C1V74DDq+TK GfZafbqkrjFqfL8wWOsAcj/Wq3mbj4j+w9HL/Ep6t9Z09jOhe/SNIvmlM8pmHADgM1Ax PKuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to; bh=hxdKNxl2WEpJFz2t9sI5KBeT/RrUgFKYhh7czHsEc44=; b=RvAWZm+rXSOGzwF+HVJJdR6F5AxelYYvYziF/E1PhXjHL60Y5NH9bCjbWrRoZ+ZDy+ Cu8jnCDBy6q33i81Jpxu35H9Xnn+xo2lwhWO7EamFOs6JOGrFoozEyx4XJVIUfv6aVcO bDlN64mhTsLWLmmlxSDIqEGT/bHBfOk9GgGK7KO0YIKaOdoGHSa6XN5CbN7cITdY53fE 5V/Q9dOGc6b20b1QtGsz7ux3lBD7dIf/YJ+MuZB2FK9k3sCDfqeyJmVmJw4NNm16/Zc7 +j8OUDa5YEx2zTlmlmXvudkAIlTcJgIgZB1EB95kdVoPQaNiey3QJmJ0iGxvUzYqPMIx 2cMw== X-Gm-Message-State: APjAAAW8dV8xmNxOfQ0oKGY6et4mNKe1XigRMr4Iw6d9zo9MsfJPM7XL +dQP3p75vasAJl0YMtIsJp3K7JdQXqZiPP+xhfo= X-Google-Smtp-Source: APXvYqwmVuRzx+rKzIFAVAG5GDJCTTVCV0ebHMRSKCSoqL9+iMkvoEpeWB4Pfdl4Leju9JE9gMshnmo379YzPhtXEYQ= X-Received: by 2002:a6b:dd07:: with SMTP id f7mr26399002ioc.3.1579187165560; Thu, 16 Jan 2020 07:06:05 -0800 (PST) MIME-Version: 1.0 References: <20200115220647.1958e8639dc718e714775fed@freenet.de> In-Reply-To: <20200115220647.1958e8639dc718e714775fed@freenet.de> From: Hans Bentum Date: Thu, 16 Jan 2020 16:05:53 +0100 Message-ID: Subject: Re: How to get pin to mode 6 on beagle bone black To: =?UTF-8?Q?Manuel_St=C3=BChn?= , freebsd-arm@freebsd.org X-Rspamd-Queue-Id: 47z6vz5kmFz481c X-Spamd-Bar: - Authentication-Results: mx1.freebsd.org; dkim=pass header.d=gmail.com header.s=20161025 header.b=Fzua0EcA; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (mx1.freebsd.org: domain of jwbentum44@gmail.com designates 2607:f8b0:4864:20::d33 as permitted sender) smtp.mailfrom=jwbentum44@gmail.com X-Spamd-Result: default: False [-2.00 / 15.00]; TO_DN_SOME(0.00)[]; R_SPF_ALLOW(-0.20)[+ip6:2607:f8b0:4000::/36]; FREEMAIL_FROM(0.00)[gmail.com]; URI_COUNT_ODD(1.00)[3]; DKIM_TRACE(0.00)[gmail.com:+]; RCPT_COUNT_TWO(0.00)[2]; DMARC_POLICY_ALLOW(-0.50)[gmail.com,none]; FREEMAIL_TO(0.00)[freenet.de]; FROM_EQ_ENVFROM(0.00)[]; IP_SCORE(0.00)[ip: (-5.47), ipnet: 2607:f8b0::/32(-2.09), asn: 15169(-1.83), country: US(-0.05)]; MIME_TRACE(0.00)[0:+,1:+,2:~]; FREEMAIL_ENVFROM(0.00)[gmail.com]; ASN(0.00)[asn:15169, ipnet:2607:f8b0::/32, country:US]; DWL_DNSWL_NONE(0.00)[gmail.com.dwl.dnswl.org : 127.0.5.0]; ARC_NA(0.00)[]; NEURAL_HAM_MEDIUM(-1.00)[-1.000,0]; R_DKIM_ALLOW(-0.20)[gmail.com:s=20161025]; FROM_HAS_DN(0.00)[]; SH_EMAIL_DBL_DONT_QUERY_IPS(0.00)[0.0.2.188,0.0.0.24,0.1.134.160,0.0.171.224,2.249.105.224,2.220.108.0,0.0.3.232,0.0.1.254,0.0.58.152,0.0.1.232,0.0.3.146,0.0.15.160,0.0.93.192,0.0.164.16,0.0.0.120,0.0.0.0,0.1.56.128,0.0.121.24,0.0.54.176,0.0.109.96,0.0.27.88,0.4.147.224,0.0.0.200,0.0.128.232,0.0.1.234,0.0.136.184,0.0.0.3,2.250.240.128,0.0.0.38,2.211.72.40,0.0.125.0,0.0.0.4,0.0.0.100,0.0.85.240]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; MIME_GOOD(-0.10)[multipart/alternative,text/plain]; PREVIOUSLY_DELIVERED(0.00)[freebsd-arm@freebsd.org]; IP_SCORE_FREEMAIL(0.00)[]; TO_MATCH_ENVRCPT_SOME(0.00)[]; RCVD_IN_DNSWL_NONE(0.00)[3.3.d.0.0.0.0.0.0.0.0.0.0.0.0.0.0.2.0.0.4.6.8.4.0.b.8.f.7.0.6.2.list.dnswl.org : 127.0.5.0]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[] X-Mailman-Approved-At: Wed, 29 Jan 2020 21:02:54 +0000 Content-Type: text/plain; charset="UTF-8" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 Jan 2020 15:06:08 -0000 > > Hello Manuel, > > I discovered this tool: https://github.com/nmingotti/pinfun > > As you can see pin 8_16 has mode 7 (should be 6). So something must give > it mode 7. The overlays seems to be loaded. > > Below I include the : > output with pinfun. > dmesg (verbose mode) and the output of the command: > sysctl -b hw.fdt.dtb | dtc= -I dtb -O dts | less > to answer the questions. > > Hans > > > ------------------------------------------------------------------- > Pos Name Mode Function Setup > ------------------------------------------------------------------- > P.8.1 GND > P.8.2 GND > P.8.3 GPIO1_6 1 mmc1_dat6 > P.8.4 GPIO1_7 1 mmc1_dat7 > P.8.5 GPIO1_2 1 mmc1_dat2 > P.8.6 GPIO1_3 1 mmc1_dat3 > P.8.7 TIMER4 7 gpio2[2] > P.8.8 TIMER7 7 gpio2[3] > P.8.9 TIMER5 - > P.8.10 TIMER6 7 gpio2[4] > P.8.11 GPIO1_13 7 gpio1[13] > P.8.12 GPIO1_12 7 gpio1[12] > P.8.13 EHRPWM2B 7 gpio0[23] > P.8.14 GPIO0_26 7 gpio0[26] > P.8.15 GPIO1_15 7 gpio1[15] > P.8.16 GPIO1_14 7 gpio1[14] > P.8.17 GPIO0_27 7 gpio0[27] > P.8.18 GPIO2_1 7 gpio2[1] > P.8.19 EHRPWM2A 7 gpio0[22] > P.8.20 GPIO1_31 2 mmc1_cmd > P.8.21 GPIO1_30 2 mmc1_clk > P.8.22 GPIO1_5 1 mmc1_dat5 > P.8.23 GPIO1_4 1 mmc1_dat4 > P.8.24 GPIO1_1 1 mmc1_dat1 > P.8.25 GPIO1_0 1 mmc1_dat0 > P.8.26 GPIO1_29 7 gpio1[29] > P.8.27 GPIO2_22 0 lcd_vsync > P.8.28 GPIO2_24 0 lcd_pclk > P.8.29 GPIO2_23 0 lcd_hsync > P.8.30 GPIO2_25 0 lcd_ac_bias_en > P.8.31 UART5_CTSN 0 lcd_data14 > P.8.32 UART5_RTSN 0 lcd_data15 > P.8.33 UART4_RTSN 0 lcd_data13 > P.8.34 UART3_RTSN 0 lcd_data11 > P.8.35 UART4_CTSN 0 lcd_data12 > P.8.36 UART3_CTSN 0 lcd_data10 > P.8.37 UART5_TXD 0 lcd_data8 > P.8.38 UART5_RXD 0 lcd_data9 > P.8.39 GPIO2_12 0 lcd_data6 > P.8.40 GPIO2_13 0 lcd_data7 > P.8.41 GPIO2_10 0 lcd_data4 > P.8.42 GPIO2_11 0 lcd_data5 > P.8.43 GPIO2_8 0 lcd_data2 > P.8.44 GPIO2_9 0 lcd_data3 > P.8.45 GPIO2_6 0 lcd_data0 > P.8.46 GPIO2_7 0 lcd_data1 > P.9.1 GND > P.9.2 GND > P.9.3 DC_3.3V > P.9.4 DC_3.3V > P.9.5 VDD_5V > P.9.6 VDD_5V > P.9.7 SYS_5V > P.9.8 SYS_5V > P.9.9 PWR_BUT > P.9.10 SYS_RESETn 1 - > P.9.11 UART4_RXD 7 gpio0[30] > P.9.12 GPIO1_28 7 gpio1[28] > P.9.13 UART4_TXD 7 gpio0[31] > P.9.14 EHRPWM1A 7 gpio1[18] > P.9.15 GPIO1_16 7 gpio1[16] > P.9.16 EHRPWM1B 7 gpio1[19] > P.9.17 I2C1_SCL 7 gpio0[5] > P.9.18 I2C1_SDA 7 gpio0[4] > P.9.19 I2C2_SCL 3 I2C2_SCL > P.9.20 I2C2_SDA 3 I2C2_SDA > P.9.21 UART2_TXD 7 gpio0[3] > P.9.22 UART2_RXD 7 gpio0[2] > P.9.23 GPIO1_17 7 gpio1[17] > P.9.24 UART1_TXD 7 gpio0[15] > P.9.25 GPIO3_21 0 mcasp0_ahclkx > P.9.26 UART1_RXD 7 gpio0[14] > P.9.27 GPIO3_19 7 gpio3[19] > P.9.28 SPI1_CS0 2 mcasp0_axr2 > P.9.29 SPI1_D0 0 mcasp0_fsx > P.9.30 SPI1_D1 7 gpio3[16] > P.9.31 SPI1_SCLK 0 mcasp0_aclkx > P.9.32 VADC > P.9.33 AIN4 > P.9.34 AGND > P.9.35 AIN6 > P.9.36 AIN5 > P.9.37 AIN2 > P.9.38 AIN3 > P.9.39 AIN0 > P.9.40 AIN1 > P.9.41 CLKOUT2 3 clkout2 > P.9.42 GPIO0_7 7 gpio0[7] > P.9.43 GND > P.9.44 GND > P.9.45 GND > P.9.46 GND > > The dmesg with boot -v shows that the overlays are loaded: > > ---<>--- > Copyright (c) 1992-2019 The FreeBSD Project. > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 > The Regents of the University of California. All rights reserved. > FreeBSD is a registered trademark of The FreeBSD Foundation. > FreeBSD 12.1-RELEASE r354233 GENERIC arm > FreeBSD clang version 8.0.1 (tags/RELEASE_801/final 366581) (based on LLVM > 8.0.1) > VT: init without driver. > Preloaded elf kernel "/boot/kernel/kernel" at 0xc0cd4000. > Preloaded elf module "/boot/kernel/umodem.ko" at 0xc0cdcac8. > Preloaded elf module "/boot/kernel/ucom.ko" at 0xc0cdd00c. > Preloaded boot_entropy_cache "/boot/entropy" at 0xc0cdd550. > Preloaded dtbo "/boot/dtb/overlays/am335x-boneblack-pruss.dtbo" at > 0xc0cdd5a4. > Preloaded dtbo "/boot/dtb/overlays/egpio.dtbo" at 0xc0cdd60c. > module_register: cannot register ofwbus/pcib from kernel; already loaded > from kernel > Module ofwbus/pcib failed to register: 17 > module_register: cannot register simplebus/pcib from kernel; already > loaded from kernel > Module simplebus/pcib failed to register: 17 > CPU: ARM Cortex-A8 r3p2 (ECO: 0x00000000) > CPU Features: > Thumb2, Security, VMSAv7 > Optional instructions: > UMULL, SMULL, SIMD(ext) > LoUU:2 LoC:3 LoUIS:1 > Cache level 1: > 32KB/64B 4-way data cache WT WB Read-Alloc > 32KB/64B 4-way instruction cache Read-Alloc > Cache level 2: > 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc > real memory = 536231936 (511 MB) > avail memory = 509861888 (486 MB) > Physical memory chunk(s): > 0x80000000 - 0x9cf39fff, 463 MB ( 118586 pages) > 0x9cf48000 - 0x9ff71fff, 48 MB ( 12330 pages) > Excluded memory regions: > 0x95000000 - 0x95d53fff, 13 MB ( 3412 pages) NoAlloc > Static device mappings: > 0x44c00000 - 0x44ffffff mapped at VA 0xffb00000 > 0x47400000 - 0x474fffff mapped at VA 0xffa00000 > 0x47800000 - 0x478fffff mapped at VA 0xff900000 > 0x48000000 - 0x48ffffff mapped at VA 0xfe900000 > 0x49000000 - 0x490fffff mapped at VA 0xfe800000 > 0x49800000 - 0x49afffff mapped at VA 0xfe500000 > 0x4a000000 - 0x4affffff mapped at VA 0xfd500000 > No PSCI/SMCCC call function found > Texas Instruments AM335x Processor, Revision ES2.1 > random: read 3840 bytes from preloaded cache > random: unblocking device. > arc4random: read 32 bytes from preloaded cache > VIMAGE (virtualized network stack) enabled > ULE: setup cpu 0 > snd_unit_init() u=0x00ff8000 [512] d=0x00007c00 [32] c=0x000003ff [1024] > feeder_register: snd_unit=-1 snd_maxautovchans=16 latency=2 > feeder_rate_min=1 feeder_rate_max=2016000 feeder_rate_round=25 > random: entropy device external interface > openfirm: > nfslock: pseudo-device > crypto: > kbd0 at kbdmux0 > mem: > null: > ofwbus0: > simplebus0: on ofwbus0 > simplebus1: mem > 0x44c00000-0x44c007ff,0x44c00800-0x44c00fff,0x44c01000-0x44c013ff,0x44c01400-0x44c017ff > on simplebus0 > simplebus2: on simplebus1 > simplebus3: on simplebus1 > simplebus4: on simplebus1 > ti_sysc0: mem 0-0x3 on simplebus4 > am335x_prcm0: mem 0-0x1fff on ti_sysc0 > ti_sysc1: mem > 0x7000-0x7003,0x7010-0x7013,0x7114-0x7117 on simplebus4 > ti_sysc2: mem > 0x9050-0x9053,0x9054-0x9057,0x9058-0x905b on simplebus4 > ti_sysc3: mem > 0xb000-0xb007,0xb010-0xb017,0xb090-0xb097 on simplebus4 > ti_sysc4: mem 0xd000-0xd003,0xd010-0xd013 on > simplebus4 > ti_sysc5: mem 0x10000-0x10003 on simplebus4 > simplebus5: mem 0-0x1fff on ti_sysc5 > ti_scm0: mem 0-0x7ff on simplebus5 > ti_sysc6: mem > 0x31000-0x31003,0x31010-0x31013,0x31014-0x31017 on simplebus4 > ti_sysc7: mem > 0x35000-0x35003,0x35010-0x35013,0x35014-0x35017 on simplebus4 > ti_sysc8: mem 0x3e074-0x3e077,0x3e078-0x3e07b on > simplebus4 > simplebus6: mem > 0x48000000-0x480007ff,0x48000800-0x48000fff,0x48001000-0x480013ff,0x48001400-0x480017ff,0x48001800-0x48001bff,0x48001c00-0x48001fff > on simplebus0 > simplebus7: on simplebus6 > ti_sysc9: mem > 0x22050-0x22053,0x22054-0x22057,0x22058-0x2205b on simplebus7 > ti_sysc10: mem > 0x24050-0x24053,0x24054-0x24057,0x24058-0x2405b on simplebus7 > ti_sysc11: mem > 0x2a000-0x2a007,0x2a010-0x2a017,0x2a090-0x2a097 on simplebus7 > ti_sysc12: mem > 0x30000-0x30003,0x30110-0x30113,0x30114-0x30117 on simplebus7 > ti_sysc13: mem 0x38000-0x38003,0x38004-0x38007 on > simplebus7 > ti_sysc14: mem 0x3c000-0x3c003,0x3c004-0x3c007 on > simplebus7 > ti_sysc15: mem > 0x40000-0x40003,0x40010-0x40013,0x40014-0x40017 on simplebus7 > ti_sysc16: mem > 0x42000-0x42003,0x42010-0x42013,0x42014-0x42017 on simplebus7 > ti_sysc17: mem > 0x44000-0x44003,0x44010-0x44013,0x44014-0x44017 on simplebus7 > ti_sysc18: mem > 0x46000-0x46003,0x46010-0x46013,0x46014-0x46017 on simplebus7 > ti_sysc19: mem > 0x48000-0x48003,0x48010-0x48013,0x48014-0x48017 on simplebus7 > ti_sysc20: mem > 0x4a000-0x4a003,0x4a010-0x4a013,0x4a014-0x4a017 on simplebus7 > ti_sysc21: mem > 0x4c000-0x4c003,0x4c010-0x4c013,0x4c114-0x4c117 on simplebus7 > ti_sysc22: mem > 0x602fc-0x602ff,0x60110-0x60113,0x60114-0x60117 on simplebus7 > ti_sysc23: mem > 0x80000-0x80003,0x80010-0x80013,0x80014-0x80017 on simplebus7 > ti_sysc24: mem 0xc8000-0xc8003,0xc8010-0xc8013 on > simplebus7 > ti_sysc25: mem > 0xca000-0xca003,0xca010-0xca013,0xca014-0xca017 on simplebus7 > simplebus8: on simplebus6 > ti_sysc26: mem > 0x9c000-0x9c007,0x9c010-0x9c017,0x9c090-0x9c097 on simplebus8 > ti_sysc27: mem > 0xa0000-0xa0003,0xa0110-0xa0113,0xa0114-0xa0117 on simplebus8 > ti_sysc28: mem > 0xa6050-0xa6053,0xa6054-0xa6057,0xa6058-0xa605b on simplebus8 > ti_sysc29: mem > 0xa8050-0xa8053,0xa8054-0xa8057,0xa8058-0xa805b on simplebus8 > ti_sysc30: mem > 0xaa050-0xaa053,0xaa054-0xaa057,0xaa058-0xaa05b on simplebus8 > ti_sysc31: mem > 0xac000-0xac003,0xac010-0xac013,0xac114-0xac117 on simplebus8 > ti_sysc32: mem > 0xae000-0xae003,0xae010-0xae013,0xae114-0xae117 on simplebus8 > ti_sysc33: mem 0xcc000-0xcc003 on simplebus8 > ti_sysc34: mem 0xd0000-0xd0003 on simplebus8 > ti_sysc35: mem > 0xd82fc-0xd82ff,0xd8110-0xd8113,0xd8114-0xd8117 on simplebus8 > simplebus9: on simplebus6 > ti_sysc36: mem 0-0x3,0x4-0x7 on simplebus9 > ti_sysc37: mem 0x2000-0x2003,0x2004-0x2007 on > simplebus9 > ti_sysc38: mem 0x4000-0x4003,0x4004-0x4007 on > simplebus9 > ti_sysc39: mem 0xe000-0xe003,0xe054-0xe057 on > simplebus9 > ti_sysc40: mem 0x11fe0-0x11fe3,0x11fe4-0x11fe7 on > simplebus9 > simplebus10: mem > 0x47c00000-0x47c007ff,0x47c00800-0x47c00fff,0x47c01000-0x47c013ff on > simplebus0 > simplebus11: on simplebus10 > simplebus12: mem > 0x4a000000-0x4a0007ff,0x4a000800-0x4a000fff,0x4a001000-0x4a0013ff on > simplebus0 > simplebus13: on simplebus12 > ti_sysc41: mem > 0x101200-0x101203,0x101208-0x10120b,0x101204-0x101207 on simplebus13 > simplebus14: mem > 0x4b144400-0x4b1444ff,0x4b144800-0x4b144bff on simplebus0 > simplebus15: on simplebus14 > regfix0: on ofwbus0 > clk_fixed0: on ofwbus0 > ti_aintc0: mem 0x48200000-0x48200fff on > simplebus0 > ti_aintc0: Revision 5.0 > am335x_prcm0: Clocks: System 24.0 MHz, CPU 1000 MHz > cpulist0: on ofwbus0 > cpu0: on cpulist0 > cpu0: missing 'clock-frequency' property > cpufreq_dt0: on cpu0 > cpufreq_dt0: no regulator for cpu@0 > device_attach: cpufreq_dt0 attach returned 6 > ofwbus0: compat operating-points-v2-ti-cpu (no driver attached) > pmu0: mem 0x4b000000-0x4bffffff irq 0 on > ofwbus0 > ofwbus0: compat ti,omap-infra (no driver attached) > ti_pruss0: mem > 0x4a300000-0x4a37ffff irq 1,2,3,4,5,6,7,8 on simplebus0 > ti_pruss0: AM33xx PRU-ICSS > simplebus1: mem 0x100000-0x103fff,0x180000-0x181fff > compat ti,am3352-wkup-m3 (no driver attached) > simplebus3: mem 0-0x3 disabled compat ti,sysc-omap4 (no > driver attached) > simplebus3: disabled compat ti,sysc (no driver > attached) > simplebus4: disabled compat ti,sysc (no driver > attached) > simplebus4: disabled compat ti,sysc (no driver > attached) > gpio0: mem 0-0xfff irq 20 on > ti_sysc1 > gpiobus0: on gpio0 > gpioc0: on gpio0 > uart0: mem 0-0xfff irq 21 on ti_sysc2 > uart0: console (115384,n,8,1) > uart0: fast interrupt > uart0: PPS capture mode: DCD > iichb0: mem 0-0xfff irq 22 on ti_sysc3 > iichb0: I2C revision 4.0 FIFO size: 32 bytes > ti_adc0: mem 0-0xfff irq 23 disabled on ti_sysc4 > ti_adc0: scheme: 0x1 func: 0x730 rtl: 0 rev: 0.1 custom rev: 0 > ti_pinmux0: mem 0x800-0xa37 on simplebus5 > Processing 1 pin-config node(s) in pinctrl-0 for serial@0 > pinmux_uart0_pins: muxreg 0x0170 muxval 0x30 > pinmux_uart0_pins: muxreg 0x0174 muxval 0x00 > Processing 1 pin-config node(s) in pinctrl-0 for tda19988@70 > nxp_hdmi_bonelt_pins: muxreg 0x01b0 muxval 0x03 > nxp_hdmi_bonelt_pins: muxreg 0x00a0 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00a4 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00a8 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00ac muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00b0 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00b4 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00b8 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00bc muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00c0 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00c4 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00c8 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00cc muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00d0 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00d4 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00d8 muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00dc muxval 0x08 > nxp_hdmi_bonelt_pins: muxreg 0x00e0 muxval 0x00 > nxp_hdmi_bonelt_pins: muxreg 0x00e4 muxval 0x00 > nxp_hdmi_bonelt_pins: muxreg 0x00e8 muxval 0x00 > nxp_hdmi_bonelt_pins: muxreg 0x00ec muxval 0x00 > Processing 1 pin-config node(s) in pinctrl-0 for i2c@0 > pinmux_i2c0_pins: muxreg 0x0188 muxval 0x30 > pinmux_i2c0_pins: muxreg 0x018c muxval 0x30 > Processing 1 pin-config node(s) in pinctrl-0 for pinmux@800 > pinmux_clkout2_pin: muxreg 0x01b4 muxval 0x03 > Processing 1 pin-config node(s) in pinctrl-0 for mcasp@0 > mcasp0_pins: muxreg 0x01ac muxval 0x30 > mcasp0_pins: muxreg 0x019c muxval 0x02 > mcasp0_pins: muxreg 0x0194 muxval 0x10 > mcasp0_pins: muxreg 0x0190 muxval 0x00 > mcasp0_pins: muxreg 0x006c muxval 0x07 > Processing 1 pin-config node(s) in pinctrl-0 for mmc@0 > pinmux_mmc1_pins: muxreg 0x0160 muxval 0x2f > pinmux_mmc1_pins: muxreg 0x00fc muxval 0x30 > pinmux_mmc1_pins: muxreg 0x00f8 muxval 0x30 > pinmux_mmc1_pins: muxreg 0x00f4 muxval 0x30 > pinmux_mmc1_pins: muxreg 0x00f0 muxval 0x30 > pinmux_mmc1_pins: muxreg 0x0104 muxval 0x30 > pinmux_mmc1_pins: muxreg 0x0100 muxval 0x30 > Processing 1 pin-config node(s) in pinctrl-0 for i2c@0 > pinmux_i2c2_pins: muxreg 0x0178 muxval 0x33 > pinmux_i2c2_pins: muxreg 0x017c muxval 0x33 > Processing 1 pin-config node(s) in pinctrl-0 for mmc@0 > pinmux_emmc_pins: muxreg 0x0080 muxval 0x32 > pinmux_emmc_pins: muxreg 0x0084 muxval 0x32 > pinmux_emmc_pins: muxreg 0x0000 muxval 0x31 > pinmux_emmc_pins: muxreg 0x0004 muxval 0x31 > pinmux_emmc_pins: muxreg 0x0008 muxval 0x31 > pinmux_emmc_pins: muxreg 0x000c muxval 0x31 > pinmux_emmc_pins: muxreg 0x0010 muxval 0x31 > pinmux_emmc_pins: muxreg 0x0014 muxval 0x31 > pinmux_emmc_pins: muxreg 0x0018 muxval 0x31 > pinmux_emmc_pins: muxreg 0x001c muxval 0x31 > Processing 1 pin-config node(s) in pinctrl-0 for mdio@1000 > davinci_mdio_default: muxreg 0x0148 muxval 0x30 > davinci_mdio_default: muxreg 0x014c muxval 0x10 > Processing 1 pin-config node(s) in pinctrl-0 for ethernet@0 > cpsw_default: muxreg 0x0110 muxval 0x30 > cpsw_default: muxreg 0x0114 muxval 0x00 > cpsw_default: muxreg 0x0118 muxval 0x30 > cpsw_default: muxreg 0x011c muxval 0x00 > cpsw_default: muxreg 0x0120 muxval 0x00 > cpsw_default: muxreg 0x0124 muxval 0x00 > cpsw_default: muxreg 0x0128 muxval 0x00 > cpsw_default: muxreg 0x012c muxval 0x30 > cpsw_default: muxreg 0x0130 muxval 0x30 > cpsw_default: muxreg 0x0134 muxval 0x30 > cpsw_default: muxreg 0x0138 muxval 0x30 > cpsw_default: muxreg 0x013c muxval 0x30 > cpsw_default: muxreg 0x0140 muxval 0x30 > Processing 1 pin-config node(s) in pinctrl-0 for leds > user_leds_s0: muxreg 0x0054 muxval 0x07 > user_leds_s0: muxreg 0x0058 muxval 0x17 > user_leds_s0: muxreg 0x005c muxval 0x07 > user_leds_s0: muxreg 0x0060 muxval 0x17 > am335x_scm0: on ti_scm0 > simplebus5: mem 0x1324-0x1347 irq 24 compat > ti,am3352-wkup-m3-ipc (no driver attached) > simplebus5: mem 0xf90-0xfcf compat > ti,am335x-edma-crossbar (no driver attached) > ti_sysc6: mem 0-0x3ff irq 25 compat ti,am335x-timer-1ms (no > driver attached) > simplebus4: disabled compat ti,sysc (no driver > attached) > ti_wdt0: mem 0-0xfff irq 26 on ti_sysc7 > ti_wdt0: revision: 0x502a0501 > simplebus4: disabled compat ti,sysc (no driver > attached) > simplebus4: disabled compat ti,sysc (no driver > attached) > am335x_rtc0: mem 0-0xfff irq 27,28 on > ti_sysc8 > am335x_rtc0: AM335X RTC v1.0.6 > simplebus4: disabled compat ti,sysc (no driver > attached) > simplebus7: disabled compat ti,sysc (no driver > attached) > simplebus7: disabled compat ti,sysc (no driver > attached) > simplebus7: disabled compat ti,sysc (no driver > attached) > ti_sysc9: mem 0-0x1fff irq 29 disabled compat ti,am3352-uart > (no driver attached) > ti_sysc10: mem 0-0x1fff irq 30 disabled compat ti,am3352-uart > (no driver attached) > ti_sysc11: mem 0-0xfff irq 31 disabled compat ti,omap4-i2c (no > driver attached) > ti_sysc12: mem 0-0x3ff irq 32 disabled compat ti,omap4-mcspi (no > driver attached) > ti_sysc13: mem 0-0x1fff,0x46000000-0x463fffff irq 33,34 compat > ti,am33xx-mcasp-audio (no driver attached) > ti_sysc14: mem 0-0x1fff,0x46400000-0x467fffff irq 35,36 > disabled compat ti,am33xx-mcasp-audio (no driver attached) > am335x_dmtimer0: mem 0-0x3ff irq 37 on ti_sysc15 > Event timer "DMTimer2" frequency 24000000 Hz quality 500 > am335x_dmtimer1: mem 0-0x3ff irq 38 on ti_sysc16 > Timecounter "DMTimer3" frequency 24000000 Hz quality 500 > ti_sysc17: mem 0-0x3ff irq 39 compat ti,am335x-timer (no driver > attached) > ti_sysc18: mem 0-0x3ff irq 40 compat ti,am335x-timer (no driver > attached) > ti_sysc19: mem 0-0x3ff irq 41 compat ti,am335x-timer (no driver > attached) > ti_sysc20: mem 0-0x3ff irq 42 compat ti,am335x-timer (no driver > attached) > gpio1: mem 0-0xfff irq 43 on > ti_sysc21 > gpiobus1: on gpio1 > gpioc1: on gpio1 > simplebus7: disabled compat ti,sysc (no driver > attached) > sdhci_ti0: mem 0-0xfff irq 44 on ti_sysc22 > sdhci_ti0: Card presence detect on gpio0 pin 6, configured for interrupts. > sdhci_ti0-slot0: 96MHz HS 4bits VDD: 3.3V 3.0V VCCQ: 3.3V DRV: B PIO > removable > sdhci_ti0-slot0: ============== REGISTER DUMP ============== > sdhci_ti0-slot0: Sys addr: 0x00000000 | Version: 0x00003101 > sdhci_ti0-slot0: Blk size: 0x00000000 | Blk cnt: 0x00000000 > sdhci_ti0-slot0: Argument: 0x00000000 | Trn mode: 0x00000000 > sdhci_ti0-slot0: Present: 0x01f70000 | Host ctl: 0x00000000 > sdhci_ti0-slot0: Power: 0x00000000 | Blk gap: 0x00000000 > sdhci_ti0-slot0: Wake-up: 0x00000000 | Clock: 0x00000000 > sdhci_ti0-slot0: Timeout: 0x00000000 | Int stat: 0x00000000 > sdhci_ti0-slot0: Int enab: 0x00000000 | Sig enab: 0x00000000 > sdhci_ti0-slot0: AC12 err: 0x00000000 | Host ctl2:0x00000000 > sdhci_ti0-slot0: Caps: 0x07e10080 | Caps2: 0x00000000 > sdhci_ti0-slot0: Max curr: 0x00000000 | ADMA err: 0x00000000 > sdhci_ti0-slot0: ADMA addr:0x00000000 | Slot int: 0x00000000 > sdhci_ti0-slot0: =========================================== > ti_sysc23: mem 0-0x1fff irq 45 disabled compat ti,am3352-elm (no > driver attached) > simplebus7: disabled compat ti,sysc (no driver > attached) > ti_mbox0: mem 0-0x1ff irq 46 on ti_sysc24 > ti_mbox0: revision 4.0 > ti_sysc25: mem 0-0xfff compat ti,omap4-hwspinlock (no driver > attached) > simplebus7: disabled compat ti,sysc (no driver > attached) > simplebus8: disabled compat ti,sysc (no driver > attached) > simplebus8: disabled compat ti,sysc (no driver > attached) > iichb1: mem 0-0xfff irq 47 on ti_sysc26 > iichb1: I2C revision 4.0 FIFO size: 32 bytes > ti_sysc27: mem 0-0x3ff irq 48 disabled compat ti,omap4-mcspi (no > driver attached) > simplebus8: disabled compat ti,sysc (no driver > attached) > simplebus8: disabled compat ti,sysc (no driver > attached) > ti_sysc28: mem 0-0x1fff irq 49 disabled compat ti,am3352-uart > (no driver attached) > ti_sysc29: mem 0-0x1fff irq 50 disabled compat ti,am3352-uart > (no driver attached) > ti_sysc30: mem 0-0x1fff irq 51 disabled compat ti,am3352-uart > (no driver attached) > gpio2: mem 0-0xfff irq 52 on > ti_sysc31 > gpiobus2: on gpio2 > gpioc2: on gpio2 > gpio3: mem 0-0xfff irq 53 on > ti_sysc32 > gpiobus3: on gpio3 > gpioc3: on gpio3 > simplebus8: disabled compat ti,sysc (no driver > attached) > ti_sysc33: mem 0-0x1fff irq 54 disabled compat ti,am3352-d_can > (no driver attached) > ti_sysc34: mem 0-0x1fff irq 55 disabled compat ti,am3352-d_can > (no driver attached) > sdhci_ti1: mem 0-0xfff irq 56 on ti_sysc35 > sdhci_ti1-slot0: 96MHz HS 4bits VDD: 3.0V VCCQ: 3.3V DRV: B PIO removable > sdhci_ti1-slot0: ============== REGISTER DUMP ============== > sdhci_ti1-slot0: Sys addr: 0x00000000 | Version: 0x00003101 > sdhci_ti1-slot0: Blk size: 0x00000000 | Blk cnt: 0x00000000 > sdhci_ti1-slot0: Argument: 0x00000000 | Trn mode: 0x00000000 > sdhci_ti1-slot0: Present: 0x01f70000 | Host ctl: 0x00000000 > sdhci_ti1-slot0: Power: 0x00000000 | Blk gap: 0x00000000 > sdhci_ti1-slot0: Wake-up: 0x00000000 | Clock: 0x00000000 > sdhci_ti1-slot0: Timeout: 0x00000000 | Int stat: 0x00000000 > sdhci_ti1-slot0: Int enab: 0x00000000 | Sig enab: 0x00000000 > sdhci_ti1-slot0: AC12 err: 0x00000000 | Host ctl2:0x00000000 > sdhci_ti1-slot0: Caps: 0x06e10080 | Caps2: 0x00000000 > sdhci_ti1-slot0: Max curr: 0x00000000 | ADMA err: 0x00000000 > sdhci_ti1-slot0: ADMA addr:0x00000000 | Slot int: 0x00000000 > sdhci_ti1-slot0: =========================================== > sdhci_ti1-slot0: Card inserted > mmc0: on sdhci_ti1 > simplebus6: compat simple-bus (no driver attached) > ti_sysc36: mem 0-0xf disabled compat ti,am33xx-pwmss (no > driver attached) > ti_sysc37: mem 0-0xf disabled compat ti,am33xx-pwmss (no > driver attached) > ti_sysc38: mem 0-0xf disabled compat ti,am33xx-pwmss (no > driver attached) > fb0: mem 0-0xfff irq 57 on ti_sysc39 > ti_sysc40: mem 0-0x1fff irq 58 compat ti,omap4-rng (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus9: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > simplebus11: disabled compat ti,sysc (no driver > attached) > cpswss0: <3-port Switch Ethernet Subsystem> mem 0-0x7ff,0x1200-0x12ff irq > 59,60,61,62 on ti_sysc41 > cpswss0: CPSW SS Version 1.12 (0) > cpswss0: Initial queue size TX=128 RX=384 > cpsw0: on cpswss0 > miibus0: on cpsw0 > smscphy0: PHY 0 on miibus0 > smscphy0: OUI 0x00800f, model 0x000f, rev. 1 > smscphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto > cpsw0: bpf attached > cpsw0: Ethernet address: d0:39:72:30:58:f9 > simplebus13: disabled compat ti,sysc (no driver > attached) > simplebus13: disabled compat ti,sysc (no driver > attached) > simplebus13: disabled compat ti,sysc (no driver > attached) > simplebus15: disabled compat ti,sysc (no driver > attached) > simplebus15: disabled compat ti,sysc (no driver > attached) > simplebus0: mem 0x49000000-0x4900ffff irq 9,10,11 compat > ti,edma3-tpcc (no driver attached) > simplebus0: mem 0x49800000-0x498fffff irq 12 compat > ti,edma3-tptc (no driver attached) > simplebus0: mem 0x49900000-0x499fffff irq 13 compat > ti,edma3-tptc (no driver attached) > simplebus0: mem 0x49a00000-0x49afffff irq 14 compat > ti,edma3-tptc (no driver attached) > simplebus0: mem 0x47810000-0x47810fff irq 15 disabled > compat ti,omap4-hsmmc (no driver attached) > usbss0: mem > 0x47400000-0x47400fff on simplebus0 > usbss0: TI AM335X USBSS v0.0.13 > usbss0: mem > 0x44e10620-0x44e1062f,0x44e10648-0x44e1064b compat > ti,am335x-usb-ctrl-module (no driver attached) > usbss0: mem 0x47401300-0x474013ff compat > ti,am335x-usb-phy (no driver attached) > musbotg0: mem > 0x47401400-0x474017ff,0x47401000-0x474011ff irq 64 on usbss0 > usbus0: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM > usbus0 on musbotg0 > musbotg0: usbpf: Attached > usbss0: mem 0x47401b00-0x47401bff compat > ti,am335x-usb-phy (no driver attached) > musbotg1: mem > 0x47401c00-0x47401fff,0x47401800-0x474019ff irq 65 on usbss0 > usbus1: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM > usbus1 on musbotg1 > musbotg1: usbpf: Attached > usbss0: mem > 0x47400000-0x47400fff,0x47402000-0x47402fff,0x47403000-0x47403fff,0x47404000-0x47407fff > irq 66 compat ti,am3359-cppi41 (no driver attached) > simplebus0: mem 0x40300000-0x4030ffff compat mmio-sram > (no driver attached) > simplebus0: mem 0x4c000000-0x4cffffff irq 16 compat > ti,emif-am3352 (no driver attached) > simplebus0: mem 0x50000000-0x50001fff irq 17 disabled > compat ti,am3352-gpmc (no driver attached) > simplebus0: mem 0x53100000-0x531001ff irq 18 compat > ti,omap4-sham (no driver attached) > simplebus0: mem 0x53500000-0x5350009f irq 19 compat > ti,omap4-aes (no driver attached) > gpioled0: on ofwbus0 > ofwbus0: compat gpio-gate-clock (no driver attached) > ofwbus0: compat simple-audio-card (no driver attached) > cryptosoft0: > crypto: assign cryptosoft0 driver id 0, flags 0x6000000 > crypto: cryptosoft0 registers alg 1 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 2 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 3 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 4 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 5 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 16 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 6 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 7 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 32 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 18 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 19 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 20 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 8 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 15 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 9 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 10 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 13 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 14 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 34 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 35 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 36 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 37 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 11 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 22 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 23 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 25 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 24 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 26 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 27 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 28 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 21 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 17 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 29 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 30 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 31 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 40 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 39 flags 0 maxoplen 0 > crypto: cryptosoft0 registers alg 38 flags 0 maxoplen 0 > procfs registered > Timecounters tick every 1.000 msec > lo0: bpf attached > vlan: initialized, using hash tables with chaining > crypto: > IPsec: Initialized Security Association Processing. > tcp_init: net.inet.tcp.tcbhashsize auto tuned to 4096 > usbus0: 480Mbps High Speed USB v2.0 > usbus1: 480Mbps High Speed USB v2.0 > iicbus0: on iichb0 > iic0: on iicbus0 > am335x_pmic0: at addr 0x48 irq 67 on > iicbus0 > ugen1.1: at usbus1 > uhub0: on > usbus1 > ugen0.1: at usbus0 > uhub1: on > usbus0 > am335x_pmic0: TPS65217C ver 1.2 powered by AC > am335x_pmic0: BAT TEMP/NTC ERROR: true > am335x_pmic0: Pre-charge timer time-out: false > am335x_pmic0: Charge timer time-out: false > am335x_pmic0: Charger active: false > am335x_pmic0: Termination current detected: false > am335x_pmic0: Thermal suspend: false > am335x_pmic0: DPPM active: false > am335x_pmic0: Thermal regulation: inactive > am335x_pmic0: Charger: enabled > am335x_pmic0: Suspend charge: inactive > am335x_pmic0: Charge termination: enabled > am335x_pmic0: Charger reset: inactive > am335x_pmic0: NTC TYPE: 10k > am335x_pmic0: Safety timer: enabled > am335x_pmic0: Charge safety timer: 6h > am335x_pmic0: Charge voltage: 4.10V > am335x_pmic0: Pre-charge to fast charge transition voltage: 2.9V > am335x_pmic0: Dynamic timer function: enabled > am335x_pmic0: Temperature range for charging: 0-45 C > am335x_pmic0: Termination current factor: 7.5% > am335x_pmic0: Pre-charge time: 30 min > am335x_pmic0: Power path DPPM threshold: 4.25V > am335x_pmic0: Charge current: 500mA > icee0: at addr 0xa0 on iicbus0 > icee0: size: 32768 bytes, addressing: 16-bits > tda0 at addr 0xe0 irq 68 on iicbus0 > tda0: TDA19988 > tda0: failed to read EDID > iicbus1: on iichb1 > iic1: on iicbus1 > icee1: at addr 0xa8 on iicbus1 > icee1: size: 32768 bytes, addressing: 16-bits > icee2: at addr 0xaa on iicbus1 > icee2: size: 32768 bytes, addressing: 16-bits > icee3: at addr 0xac on iicbus1 > icee3: size: 32768 bytes, addressing: 16-bits > icee4: at addr 0xae on iicbus1 > icee4: size: 32768 bytes, addressing: 16-bits > sdhci_ti1-slot0: Divider 128 for freq 375000 (base 96000000) > mmc0: Probing bus > mmc0: SD probe: failed > mmc0: MMC probe: OK (OCR: 0x00ff8080) > mmc0: Current OCR: 0x00ff8080 > mmc0: Probing cards > mmc0: New card detected (CID 7001004d4d43303447580aac4f6a3185) > mmc0: New card detected (CSD d04f01320f5903ffffffffe78a400051) > uhub0: 1 port with 1 removable, self powered > uhub1: 1 port with 1 removable, self powered > mmc0: Card at relative address 0x0002 added: > mmc0: card: MMCHC MMC04G 5.8 SN 0AAC4F6A MFG 03/2014 by 112 0x0000 > mmc0: quirks: 0 > mmc0: bus: 8bit, 52MHz (high speed timing) > mmc0: memory: 7553024 blocks, erase sector 8192 blocks > mmc0: setting transfer rate to 52.000MHz (high speed timing) > sdhci_ti1-slot0: Divider 1 for freq 48000000 (base 96000000) > mmc0: setting bus width to 8 bits high speed timing > mmcsd0: taking advantage of TRIM > mmcsd0: cache size 32KB > mmcsd0: 4GB at > mmc0 48.0MHz/8bit/65535-block > mmcsd0boot0: 2MB partition 1 at mmcsd0 > mmcsd0boot1: 2MB partition 2 at mmcsd0 > mmcsd0rpmb: 131kB partition 3 at mmcsd0 > regulator: shutting down vmmcsd_fixed > Trying to mount root from ufs:/dev/ufs/rootfs [rw]... > GEOM: new disk mmcsd0 > GEOM: new disk mmcsd0boot0 > GEOM: new disk mmcsd0boot1 > Warning: no time-of-day clock registered, system time will not be set > accurately > start_init: trying /sbin/init > lo0: link state changed to UP > cpsw0: link state changed to DOWN > cpsw0: link state changed to UP > > > The command: > sysctl -b hw.fdt.dtb | dtc= -I dtb -O dts | less > > gives: > > /dts-v1/; > > / { > > serial-number = "5001BBBK6450"; > compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; > interrupt-parent = <0xc4>; > #address-cells = <0x1>; > #size-cells = <0x1>; > model = "TI AM335x BeagleBone Black"; > chosen { > > fixup-applied; > stdout-path = "/ocp/interconnect@44c00000/segment@200000 > /target-module@9000/serial@0"; > }; > aliases { > > i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0 > "; > i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0"; > i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000 > /i2c@0"; > serial0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000 > /serial@0"; > serial1 = "/ocp/interconnect@48000000/segment@0/target-module@22000 > /serial@0"; > serial2 = "/ocp/interconnect@48000000/segment@0/target-module@24000 > /serial@0"; > serial3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000 > /serial@0"; > serial4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000 > /serial@0"; > serial5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000 > /serial@0"; > d-can0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000 > /can@0"; > d-can1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000 > /can@0"; > usb0 = "/ocp/usb@47400000/usb@47401000"; > usb1 = "/ocp/usb@47400000/usb@47401800"; > phy0 = "/ocp/usb@47400000/usb-phy@47401300"; > phy1 = "/ocp/usb@47400000/usb-phy@47401b00"; > ethernet0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/slave@200"; > ethernet1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/slave@300"; > spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0"; > spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000 > /spi@0"; > }; > cpus { > > #address-cells = <0x1>; > #size-cells = <0x0>; > cpu@0 { > > compatible = "arm,cortex-a8"; > device_type = "cpu"; > reg = <0x0>; > operating-points-v2 = <0x1>; > clocks = <0x12>; > clock-names = "cpu"; > clock-latency = <0x493e0>; > cpu0-supply = <0x58>; > }; > }; > opp-table { > > compatible = "operating-points-v2-ti-cpu"; > syscon = <0x74>; > phandle = <0x1>; > opp50-300000000 { > > opp-hz = <0x0 0x11e1a300>; > opp-microvolt = <0xe7ef0 0xe34b8 0xec928>; > opp-supported-hw = <0x6 0x10>; > opp-suspend; > }; > opp100-275000000 { > > opp-hz = <0x0 0x10642ac0>; > opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>; > opp-supported-hw = <0x1 0xff>; > opp-suspend; > }; > opp100-300000000 { > > opp-hz = <0x0 0x11e1a300>; > opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>; > opp-supported-hw = <0x6 0x20>; > opp-suspend; > }; > opp100-500000000 { > > opp-hz = <0x0 0x1dcd6500>; > opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>; > opp-supported-hw = <0x1 0xffff>; > }; > opp100-600000000 { > > opp-hz = <0x0 0x23c34600>; > opp-microvolt = <0x10c8e0 0x1072f0 0x111ed0>; > opp-supported-hw = <0x6 0x40>; > }; > opp120-600000000 { > > opp-hz = <0x0 0x23c34600>; > opp-microvolt = <0x124f80 0x11f1c0 0x12ad40>; > opp-supported-hw = <0x1 0xffff>; > }; > opp120-720000000 { > > opp-hz = <0x0 0x2aea5400>; > opp-microvolt = <0x124f80 0x11f1c0 0x12ad40>; > opp-supported-hw = <0x6 0x80>; > }; > oppturbo-720000000 { > > opp-hz = <0x0 0x2aea5400>; > opp-microvolt = <0x1339e0 0x12d770 0x139c50>; > opp-supported-hw = <0x1 0xffff>; > }; > oppturbo-800000000 { > > opp-hz = <0x0 0x2faf0800>; > opp-microvolt = <0x1339e0 0x12d770 0x139c50>; > opp-supported-hw = <0x6 0x100>; > }; > oppnitro-1000000000 { > > opp-hz = <0x0 0x3b9aca00>; > opp-microvolt = <0x1437c8 0x13d044 0x149f4c>; > opp-supported-hw = <0x6 0x100>; > }; > }; > pmu@4b000000 { > > compatible = "arm,cortex-a8-pmu"; > interrupts = <0x3>; > reg = <0x4b000000 0x1000000>; > ti,hwmods = "debugss"; > }; > soc { > > compatible = "ti,omap-infra"; > mpu { > > compatible = "ti,omap3-mpu"; > ti,hwmods = "mpu"; > pm-sram = <0xd2 0xd3>; > }; > }; > ocp { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges; > ti,hwmods = "l3_main"; > pruss@4a300000 { > > interrupts = <0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>; > interrupt-parent = <0xc4>; > ti,pintc-offset = <0x20000>; > reg = <0x4a300000 0x80000>; > ti,deassert-hard-reset = "pruss", "pruss"; > compatible = "ti,pruss-v2"; > status = "okay"; > }; > interconnect@44c00000 { > > compatible = "ti,am33xx-l4-wkup", "simple-bus"; > reg = <0x44c00000 0x800 0x44c00800 0x800 0x44c01000 0x400 0x44c01400 > 0x400>; > reg-names = "ap", "la", "ia0", "ia1"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x44c00000 0x100000 0x100000 0x44d00000 0x100000 0x200000 > 0x44e00000 0x100000>; > phandle = <0x2>; > wkup_m3@100000 { > > compatible = "ti,am3352-wkup-m3"; > reg = <0x100000 0x4000 0x180000 0x2000>; > reg-names = "umem", "dmem"; > ti,hwmods = "wkup_m3"; > ti,pm-firmware = "am335x-pm-firmware.elf"; > phandle = <0x3>; > }; > segment@0 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 > 0x1400 0x400>; > }; > segment@100000 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x100000 0x4000 0x4000 0x104000 0x1000 0x80000 0x180000 > 0x2000 0x82000 0x182000 0x1000>; > target-module@0 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > reg = <0x0 0x4>; > reg-names = "rev"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x4000>; > status = "disabled"; > }; > target-module@80000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x80000 0x2000>; > }; > }; > segment@200000 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x200000 0x2000 0x2000 0x202000 0x1000 0x3000 0x203000 > 0x1000 0x4000 0x204000 0x1000 0x5000 0x205000 0x1000 0x6000 0x206000 0x1000 > 0x7000 0x207000 0x1000 0x8000 0x208000 0x1000 0x9000 0x209000 0x1000 0xa000 > 0x20a000 0x1000 0xb000 0x20b000 0x1000 0xc000 0x20c000 0x1000 0xd000 > 0x20d000 0x1000 0xf000 0x20f000 0x1000 0x10000 0x210000 0x10000 0x20000 > 0x220000 0x10000 0x30000 0x230000 0x1000 0x31000 0x231000 0x1000 0x32000 > 0x232000 0x1000 0x33000 0x233000 0x1000 0x34000 0x234000 0x1000 0x35000 > 0x235000 0x1000 0x36000 0x236000 0x1000 0x37000 0x237000 0x1000 0x38000 > 0x238000 0x1000 0x39000 0x239000 0x1000 0x3a000 0x23a000 0x1000 0x3e000 > 0x23e000 0x1000 0x3f000 0x23f000 0x1000 0xe000 0x20e000 0x1000 0x40000 > 0x240000 0x40000 0x80000 0x280000 0x1000>; > target-module@0 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > reg = <0x0 0x4>; > reg-names = "rev"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x2000>; > prcm@0 { > > compatible = "ti,am3-prcm", "simple-bus"; > reg = <0x0 0x2000>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x2000>; > phandle = <0x4>; > clocks { > > #address-cells = <0x1>; > #size-cells = <0x0>; > phandle = <0x5>; > clk_32768_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x8000>; > phandle = <0x6>; > }; > clk_rc32k_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x7d00>; > phandle = <0x7>; > }; > virt_19200000_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x124f800>; > phandle = <0x8>; > }; > virt_24000000_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x16e3600>; > phandle = <0x9>; > }; > virt_25000000_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x17d7840>; > phandle = <0xa>; > }; > virt_26000000_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x18cba80>; > phandle = <0xb>; > }; > tclkin_ck { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0xb71b00>; > phandle = <0xc>; > }; > dpll_core_ck@490 { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-core-clock"; > clocks = <0x77 0x77>; > reg = <0x490 0x45c 0x468>; > phandle = <0xd>; > }; > dpll_core_x2_ck { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-x2-clock"; > clocks = <0xd>; > phandle = <0xe>; > }; > dpll_core_m4_ck@480 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0xe>; > ti,max-div = <0x1f>; > reg = <0x480>; > ti,index-starts-at-one; > phandle = <0xf>; > }; > dpll_core_m5_ck@484 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0xe>; > ti,max-div = <0x1f>; > reg = <0x484>; > ti,index-starts-at-one; > phandle = <0x10>; > }; > dpll_core_m6_ck@4d8 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0xe>; > ti,max-div = <0x1f>; > reg = <0x4d8>; > ti,index-starts-at-one; > phandle = <0x11>; > }; > dpll_mpu_ck@488 { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-clock"; > clocks = <0x77 0x77>; > reg = <0x488 0x420 0x42c>; > phandle = <0x12>; > }; > dpll_mpu_m2_ck@4a8 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x12>; > ti,max-div = <0x1f>; > reg = <0x4a8>; > ti,index-starts-at-one; > phandle = <0x13>; > }; > dpll_ddr_ck@494 { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-no-gate-clock"; > clocks = <0x77 0x77>; > reg = <0x494 0x434 0x440>; > phandle = <0x14>; > }; > dpll_ddr_m2_ck@4a0 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x14>; > ti,max-div = <0x1f>; > reg = <0x4a0>; > ti,index-starts-at-one; > phandle = <0x15>; > }; > dpll_ddr_m2_div2_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x15>; > clock-mult = <0x1>; > clock-div = <0x2>; > phandle = <0x16>; > }; > dpll_disp_ck@498 { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-no-gate-clock"; > clocks = <0x77 0x77>; > reg = <0x498 0x448 0x454>; > phandle = <0x17>; > }; > dpll_disp_m2_ck@4a4 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x17>; > ti,max-div = <0x1f>; > reg = <0x4a4>; > ti,index-starts-at-one; > ti,set-rate-parent; > phandle = <0x18>; > }; > dpll_per_ck@48c { > > #clock-cells = <0x0>; > compatible = "ti,am3-dpll-no-gate-j-type-clock"; > clocks = <0x77 0x77>; > reg = <0x48c 0x470 0x49c>; > phandle = <0x19>; > }; > dpll_per_m2_ck@4ac { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x19>; > ti,max-div = <0x1f>; > reg = <0x4ac>; > ti,index-starts-at-one; > phandle = <0x1a>; > }; > dpll_per_m2_div4_wkupdm_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x1a>; > clock-mult = <0x1>; > clock-div = <0x4>; > phandle = <0x1b>; > }; > dpll_per_m2_div4_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x1a>; > clock-mult = <0x1>; > clock-div = <0x4>; > phandle = <0x1c>; > }; > clk_24mhz { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x1a>; > clock-mult = <0x1>; > clock-div = <0x8>; > phandle = <0x1d>; > }; > clkdiv32k_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x1d>; > clock-mult = <0x1>; > clock-div = <0x2dc>; > phandle = <0x1e>; > }; > l3_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0xf>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x1f>; > }; > pruss_ocp_gclk@530 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x1f 0x18>; > reg = <0x530>; > phandle = <0x20>; > }; > mmu_fck@914 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0xf>; > ti,bit-shift = <0x1>; > reg = <0x914>; > phandle = <0x21>; > }; > timer1_fck@528 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x77 0x46 0x0 0x0 0xc 0x7 0x6>; > reg = <0x528>; > phandle = <0x22>; > }; > timer2_fck@508 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x508>; > phandle = <0x23>; > }; > timer3_fck@50c { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x50c>; > phandle = <0x24>; > }; > timer4_fck@510 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x510>; > phandle = <0x25>; > }; > timer5_fck@518 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x518>; > phandle = <0x26>; > }; > timer6_fck@51c { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x51c>; > phandle = <0x27>; > }; > timer7_fck@504 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xc 0x77 0x46 0x0 0x0>; > reg = <0x504>; > phandle = <0x28>; > }; > usbotg_fck@47c { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x19>; > ti,bit-shift = <0x8>; > reg = <0x47c>; > phandle = <0x29>; > }; > dpll_core_m4_div2_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0xf>; > clock-mult = <0x1>; > clock-div = <0x2>; > phandle = <0x2a>; > }; > ieee5000_fck@e4 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x2a>; > ti,bit-shift = <0x1>; > reg = <0xe4>; > phandle = <0x2b>; > }; > wdt1_fck@538 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x7 0x46 0x0 0x0>; > reg = <0x538>; > phandle = <0x2c>; > }; > l4_rtc_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0xf>; > clock-mult = <0x1>; > clock-div = <0x2>; > phandle = <0x2d>; > }; > l4hs_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0xf>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x2e>; > }; > l3s_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x2a>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x2f>; > }; > l4fw_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x2a>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x30>; > }; > l4ls_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x2a>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x31>; > }; > sysclk_div_ck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0xf>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x32>; > }; > cpsw_125mhz_gclk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x10>; > clock-mult = <0x1>; > clock-div = <0x2>; > phandle = <0x33>; > }; > cpsw_cpts_rft_clk@520 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x10 0xf>; > reg = <0x520>; > phandle = <0x34>; > }; > gpio0_dbclk_mux_ck@53c { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x7 0x6 0x46 0x0 0x0>; > reg = <0x53c>; > phandle = <0x35>; > }; > lcd_gclk@534 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x18 0x10 0x1a>; > reg = <0x534>; > ti,set-rate-parent; > phandle = <0x36>; > }; > mmc_clk { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x1a>; > clock-mult = <0x1>; > clock-div = <0x2>; > phandle = <0x37>; > }; > gfx_fclk_clksel_ck@52c { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0xf 0x1a>; > ti,bit-shift = <0x1>; > reg = <0x52c>; > phandle = <0x38>; > }; > gfx_fck_div_ck@52c { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x38>; > reg = <0x52c>; > ti,max-div = <0x2>; > phandle = <0x39>; > }; > sysclkout_pre_ck@700 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x6 0x1f 0x15 0x1a 0x36>; > reg = <0x700>; > phandle = <0x3a>; > }; > clkout2_div_ck@700 { > > #clock-cells = <0x0>; > compatible = "ti,divider-clock"; > clocks = <0x3a>; > ti,bit-shift = <0x3>; > ti,max-div = <0x8>; > reg = <0x700>; > phandle = <0x3b>; > }; > clkout2_ck@700 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x3b>; > ti,bit-shift = <0x7>; > reg = <0x700>; > phandle = <0x3c>; > }; > }; > clockdomains { > > phandle = <0x3d>; > }; > per-cm@0 { > > compatible = "ti,omap4-cm"; > reg = <0x0 0x400>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x400>; > phandle = <0x3e>; > l4ls-clkctrl@38 { > > compatible = "ti,clkctrl"; > reg = <0x38 0x2c 0x6c 0x28 0xac 0xc 0xc0 0x1c 0xec 0xc 0x10c 0x8 0x130 > 0x4>; > #clock-cells = <0x2>; > phandle = <0x3f>; > }; > l3s-clkctrl@1c { > > compatible = "ti,clkctrl"; > reg = <0x1c 0x4 0x30 0x8 0x68 0x4 0xf8 0x4>; > #clock-cells = <0x2>; > phandle = <0x40>; > }; > l3-clkctrl@24 { > > compatible = "ti,clkctrl"; > reg = <0x24 0xc 0x94 0x10 0xbc 0x4 0xdc 0x8 0xfc 0x8>; > #clock-cells = <0x2>; > phandle = <0x41>; > }; > l4hs-clkctrl@120 { > > compatible = "ti,clkctrl"; > reg = <0x120 0x4>; > #clock-cells = <0x2>; > phandle = <0x42>; > }; > pruss-ocp-clkctrl@e8 { > > compatible = "ti,clkctrl"; > reg = <0xe8 0x4>; > #clock-cells = <0x2>; > phandle = <0x43>; > }; > cpsw-125mhz-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x18>; > #clock-cells = <0x2>; > phandle = <0x44>; > }; > lcdc-clkctrl@18 { > > compatible = "ti,clkctrl"; > reg = <0x18 0x4>; > #clock-cells = <0x2>; > phandle = <0x45>; > }; > clk-24mhz-clkctrl@14c { > > compatible = "ti,clkctrl"; > reg = <0x14c 0x4>; > #clock-cells = <0x2>; > phandle = <0x46>; > }; > }; > wkup-cm@400 { > > compatible = "ti,omap4-cm"; > reg = <0x400 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x400 0x100>; > phandle = <0x47>; > l4-wkup-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x10 0xb4 0x24>; > #clock-cells = <0x2>; > phandle = <0x48>; > }; > l3-aon-clkctrl@14 { > > compatible = "ti,clkctrl"; > reg = <0x14 0x4>; > #clock-cells = <0x2>; > phandle = <0x49>; > }; > l4-wkup-aon-clkctrl@b0 { > > compatible = "ti,clkctrl"; > reg = <0xb0 0x4>; > #clock-cells = <0x2>; > phandle = <0x4a>; > }; > }; > mpu-cm@600 { > > compatible = "ti,omap4-cm"; > reg = <0x600 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x600 0x100>; > phandle = <0x4b>; > mpu-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x8>; > #clock-cells = <0x2>; > phandle = <0x4c>; > }; > }; > l4-rtc-cm@800 { > > compatible = "ti,omap4-cm"; > reg = <0x800 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x800 0x100>; > phandle = <0x4d>; > l4-rtc-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x4>; > #clock-cells = <0x2>; > phandle = <0x4e>; > }; > }; > gfx-l3-cm@900 { > > compatible = "ti,omap4-cm"; > reg = <0x900 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x900 0x100>; > phandle = <0x4f>; > gfx-l3-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x8>; > #clock-cells = <0x2>; > phandle = <0x50>; > }; > }; > l4-cefuse-cm@a00 { > > compatible = "ti,omap4-cm"; > reg = <0xa00 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa00 0x100>; > phandle = <0x51>; > l4-cefuse-clkctrl@0 { > > compatible = "ti,clkctrl"; > reg = <0x0 0x24>; > #clock-cells = <0x2>; > phandle = <0x52>; > }; > }; > }; > }; > target-module@3000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3000 0x1000>; > }; > target-module@5000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x5000 0x1000>; > }; > target-module@7000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "gpio1"; > reg = <0x7000 0x4 0x7010 0x4 0x7114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x48 0x8 0x0 0x48 0x8 0x12>; > clock-names = "fck", "dbclk"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x7000 0x1000>; > gpio@0 { > > compatible = "ti,omap4-gpio"; > gpio-controller; > #gpio-cells = <0x2>; > interrupt-controller; > #interrupt-cells = <0x2>; > reg = <0x0 0x1000>; > interrupts = <0x60>; > phandle = <0x53>; > }; > }; > target-module@9000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart1"; > reg = <0x9050 0x4 0x9054 0x4 0x9058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x48 0xb4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x9000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x1000>; > interrupts = <0x48>; > status = "okay"; > dmas = <0xc5 0x1a 0x0 0xc5 0x1b 0x0>; > dma-names = "tx", "rx"; > pinctrl-names = "default"; > pinctrl-0 = <0x69>; > phandle = <0x54>; > }; > }; > target-module@b000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "i2c1"; > reg = <0xb000 0x8 0xb010 0x8 0xb090 0x8>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x48 0xb8 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xb000 0x1000>; > i2c@0 { > > compatible = "ti,omap4-i2c"; > #address-cells = <0x1>; > #size-cells = <0x0>; > reg = <0x0 0x1000>; > interrupts = <0x46>; > status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <0x67>; > clock-frequency = <0x61a80>; > phandle = <0x55>; > tps@24 { > > reg = <0x24>; > compatible = "ti,tps65217"; > interrupt-controller; > #interrupt-cells = <0x1>; > interrupts = <0x7>; > interrupt-parent = <0xc4>; > ti,pmic-shutdown-controller; > phandle = <0x56>; > charger { > > compatible = "ti,tps65217-charger"; > interrupts = <0x0 0x1>; > interrupt-names = "USB", "AC"; > status = "okay"; > }; > pwrbutton { > > compatible = "ti,tps65217-pwrbutton"; > interrupts = <0x2>; > status = "okay"; > }; > regulators { > > #address-cells = <0x1>; > #size-cells = <0x0>; > regulator@0 { > > reg = <0x0>; > regulator-compatible = "dcdc1"; > regulator-name = "vdds_dpr"; > regulator-always-on; > phandle = <0x57>; > }; > regulator@1 { > > reg = <0x1>; > regulator-compatible = "dcdc2"; > regulator-name = "vdd_mpu"; > regulator-min-microvolt = <0xe1d48>; > regulator-max-microvolt = <0x149f4c>; > regulator-boot-on; > regulator-always-on; > phandle = <0x58>; > }; > regulator@2 { > > reg = <0x2>; > regulator-compatible = "dcdc3"; > regulator-name = "vdd_core"; > regulator-min-microvolt = <0xe1d48>; > regulator-max-microvolt = <0x118c30>; > regulator-boot-on; > regulator-always-on; > phandle = <0x59>; > }; > regulator@3 { > > reg = <0x3>; > regulator-compatible = "ldo1"; > regulator-name = "vio,vrtc,vdds"; > regulator-always-on; > phandle = <0x5a>; > }; > regulator@4 { > > reg = <0x4>; > regulator-compatible = "ldo2"; > regulator-name = "vdd_3v3aux"; > regulator-always-on; > phandle = <0x5b>; > }; > regulator@5 { > > reg = <0x5>; > regulator-compatible = "ldo3"; > regulator-name = "vdd_1v8"; > regulator-always-on; > regulator-min-microvolt = <0x1b7740>; > regulator-max-microvolt = <0x1b7740>; > phandle = <0x5c>; > }; > regulator@6 { > > reg = <0x6>; > regulator-compatible = "ldo4"; > regulator-name = "vdd_3v3a"; > regulator-always-on; > phandle = <0x5d>; > }; > }; > }; > baseboard_eeprom@50 { > > compatible = "atmel,24c256"; > reg = <0x50>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0x5e>; > baseboard_data@0 { > > reg = <0x0 0x100>; > phandle = <0x5f>; > }; > }; > tda19988@70 { > > compatible = "nxp,tda998x"; > reg = <0x70>; > nxp,calib-gpios = <0x98 0x19 0x0>; > interrupts-extended = <0x98 0x19 0x8>; > pinctrl-names = "default", "off"; > pinctrl-0 = <0x71>; > pinctrl-1 = <0x72>; > #sound-dai-cells = <0x0>; > audio-ports = <0x2 0x3>; > phandle = <0x60>; > ports { > > port@0 { > > endpoint@0 { > > remote-endpoint = <0xba>; > phandle = <0x61>; > }; > }; > }; > }; > }; > }; > target-module@d000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "adc_tsc"; > reg = <0xd000 0x4 0xd010 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x48 0xbc 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xd000 0x1000 0x1000 0xe000 0x1000>; > tscadc@0 { > > compatible = "ti,am3359-tscadc"; > reg = <0x0 0x1000>; > interrupts = <0x10>; > status = "disabled"; > dmas = <0xc5 0x35 0x0 0xc5 0x39 0x0>; > dma-names = "fifo0", "fifo1"; > phandle = <0x62>; > tsc { > > compatible = "ti,am3359-tsc"; > }; > adc { > > #io-channel-cells = <0x1>; > compatible = "ti,am3359-adc"; > phandle = <0x63>; > }; > }; > }; > target-module@10000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > reg = <0x10000 0x4>; > reg-names = "rev"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x10000 0x10000 0x10000 0x20000 0x10000>; > scm@0 { > > compatible = "ti,am3-scm", "simple-bus"; > reg = <0x0 0x2000>; > #address-cells = <0x1>; > #size-cells = <0x1>; > #pinctrl-cells = <0x1>; > ranges = <0x0 0x0 0x2000>; > phandle = <0x64>; > pinmux@800 { > > compatible = "pinctrl-single"; > reg = <0x800 0x238>; > #pinctrl-cells = <0x1>; > pinctrl-single,register-width = <0x20>; > pinctrl-single,function-mask = <0x7f>; > pinctrl-names = "default"; > pinctrl-0 = <0x6a>; > phandle = <0x65>; > user_leds_s0 { > > pinctrl-single,pins = <0x54 0x7 0x58 0x17 0x5c 0x7 0x60 0x17>; > phandle = <0x66>; > }; > pinmux_i2c0_pins { > > pinctrl-single,pins = <0x188 0x30 0x18c 0x30>; > phandle = <0x67>; > }; > pinmux_i2c2_pins { > > pinctrl-single,pins = <0x178 0x33 0x17c 0x33>; > phandle = <0x68>; > }; > pinmux_uart0_pins { > > pinctrl-single,pins = <0x170 0x30 0x174 0x0>; > phandle = <0x69>; > }; > pinmux_clkout2_pin { > > pinctrl-single,pins = <0x1b4 0x3>; > phandle = <0x6a>; > }; > cpsw_default { > > pinctrl-single,pins = <0x110 0x30 0x114 0x0 0x118 0x30 0x11c 0x0 0x120 0x0 > 0x124 0x0 0x128 0x0 0x12c 0x30 0x130 0x30 0x134 0x30 0x138 0x30 0x13c 0x30 > 0x140 0x30>; > phandle = <0x6b>; > }; > cpsw_sleep { > > pinctrl-single,pins = <0x110 0x27 0x114 0x27 0x118 0x27 0x11c 0x27 0x120 > 0x27 0x124 0x27 0x128 0x27 0x12c 0x27 0x130 0x27 0x134 0x27 0x138 0x27 > 0x13c 0x27 0x140 0x27>; > phandle = <0x6c>; > }; > davinci_mdio_default { > > pinctrl-single,pins = <0x148 0x30 0x14c 0x10>; > phandle = <0x6d>; > }; > davinci_mdio_sleep { > > pinctrl-single,pins = <0x148 0x27 0x14c 0x27>; > phandle = <0x6e>; > }; > pinmux_mmc1_pins { > > pinctrl-single,pins = <0x160 0x2f 0xfc 0x30 0xf8 0x30 0xf4 0x30 0xf0 0x30 > 0x104 0x30 0x100 0x30>; > phandle = <0x6f>; > }; > pinmux_emmc_pins { > > pinctrl-single,pins = <0x80 0x32 0x84 0x32 0x0 0x31 0x4 0x31 0x8 0x31 0xc > 0x31 0x10 0x31 0x14 0x31 0x18 0x31 0x1c 0x31>; > phandle = <0x70>; > }; > nxp_hdmi_bonelt_pins { > > pinctrl-single,pins = <0x1b0 0x3 0xa0 0x8 0xa4 0x8 0xa8 0x8 0xac 0x8 0xb0 > 0x8 0xb4 0x8 0xb8 0x8 0xbc 0x8 0xc0 0x8 0xc4 0x8 0xc8 0x8 0xcc 0x8 0xd0 0x8 > 0xd4 0x8 0xd8 0x8 0xdc 0x8 0xe0 0x0 0xe4 0x0 0xe8 0x0 0xec 0x0>; > phandle = <0x71>; > }; > nxp_hdmi_bonelt_off_pins { > > pinctrl-single,pins = <0x1b0 0x3>; > phandle = <0x72>; > }; > mcasp0_pins { > > pinctrl-single,pins = <0x1ac 0x30 0x19c 0x2 0x194 0x10 0x190 0x0 0x6c 0x7>; > phandle = <0x73>; > }; > }; > scm_conf@0 { > > compatible = "syscon", "simple-bus"; > reg = <0x0 0x800>; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x800>; > phandle = <0x74>; > phy-gmii-sel { > > compatible = "ti,am3352-phy-gmii-sel"; > reg = <0x650 0x4>; > #phy-cells = <0x2>; > phandle = <0x75>; > }; > clocks { > > #address-cells = <0x1>; > #size-cells = <0x0>; > phandle = <0x76>; > sys_clkin_ck@40 { > > #clock-cells = <0x0>; > compatible = "ti,mux-clock"; > clocks = <0x8 0x9 0xa 0xb>; > ti,bit-shift = <0x16>; > reg = <0x40>; > phandle = <0x77>; > }; > adc_tsc_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x78>; > }; > dcan0_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x79>; > }; > dcan1_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7a>; > }; > mcasp0_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7b>; > }; > mcasp1_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7c>; > }; > smartreflex0_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7d>; > }; > smartreflex1_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7e>; > }; > sha0_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x7f>; > }; > aes0_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x80>; > }; > rng_fck { > > #clock-cells = <0x0>; > compatible = "fixed-factor-clock"; > clocks = <0x77>; > clock-mult = <0x1>; > clock-div = <0x1>; > phandle = <0x81>; > }; > ehrpwm0_tbclk@44e10664 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x31>; > ti,bit-shift = <0x0>; > reg = <0x664>; > phandle = <0x82>; > }; > ehrpwm1_tbclk@44e10664 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x31>; > ti,bit-shift = <0x1>; > reg = <0x664>; > phandle = <0x83>; > }; > ehrpwm2_tbclk@44e10664 { > > #clock-cells = <0x0>; > compatible = "ti,gate-clock"; > clocks = <0x31>; > ti,bit-shift = <0x2>; > reg = <0x664>; > phandle = <0x84>; > }; > }; > }; > wkup_m3_ipc@1324 { > > compatible = "ti,am3352-wkup-m3-ipc"; > reg = <0x1324 0x24>; > interrupts = <0x4e>; > ti,rproc = <0x3>; > mboxes = <0x9b 0x9c>; > phandle = <0x85>; > }; > dma-router@f90 { > > compatible = "ti,am335x-edma-crossbar"; > reg = <0xf90 0x40>; > #dma-cells = <0x3>; > dma-requests = <0x20>; > dma-masters = <0xc5>; > phandle = <0x86>; > }; > clockdomains { > > phandle = <0x87>; > }; > }; > }; > target-module@31000 { > > compatible = "ti,sysc-omap2-timer", "ti,sysc"; > ti,hwmods = "timer1"; > reg = <0x31000 0x4 0x31010 0x4 0x31014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x303>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x48 0xc4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x31000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer-1ms"; > reg = <0x0 0x400>; > interrupts = <0x43>; > ti,timer-alwon; > clocks = <0x22>; > clock-names = "fck"; > phandle = <0x88>; > }; > }; > target-module@33000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x33000 0x1000>; > }; > target-module@35000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "wd_timer2"; > reg = <0x35000 0x4 0x35010 0x4 0x35014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x22>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x48 0xd4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x35000 0x1000>; > wdt@0 { > > compatible = "ti,omap3-wdt"; > reg = <0x0 0x1000>; > interrupts = <0x5b>; > phandle = <0x89>; > }; > }; > target-module@37000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x37000 0x1000>; > }; > target-module@39000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x39000 0x1000>; > }; > target-module@3e000 { > > compatible = "ti,sysc-omap4-simple", "ti,sysc"; > ti,hwmods = "rtc"; > reg = <0x3e074 0x4 0x3e078 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x4e 0x0 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3e000 0x1000>; > rtc@0 { > > compatible = "ti,am3352-rtc", "ti,da830-rtc"; > reg = <0x0 0x1000>; > interrupts = <0x4b 0x4c>; > clocks = <0x6 0x46 0x0 0x0>; > clock-names = "ext-clk", "int-clk"; > system-power-controller; > phandle = <0x8a>; > }; > }; > target-module@40000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x40000 0x40000>; > }; > }; > }; > interconnect@48000000 { > > compatible = "ti,am33xx-l4-per", "simple-bus"; > reg = <0x48000000 0x800 0x48000800 0x800 0x48001000 0x400 0x48001400 0x400 > 0x48001800 0x400 0x48001c00 0x400>; > reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x48000000 0x100000 0x100000 0x48100000 0x100000 0x200000 > 0x48200000 0x100000 0x300000 0x48300000 0x100000 0x46000000 0x46000000 > 0x400000 0x46400000 0x46400000 0x400000>; > phandle = <0x8b>; > segment@0 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x1400 > 0x1400 0x400 0x1800 0x1800 0x400 0x1c00 0x1c00 0x400 0x8000 0x8000 0x1000 > 0x9000 0x9000 0x1000 0x16000 0x16000 0x1000 0x17000 0x17000 0x1000 0x22000 > 0x22000 0x1000 0x23000 0x23000 0x1000 0x24000 0x24000 0x1000 0x25000 > 0x25000 0x1000 0x2a000 0x2a000 0x1000 0x2b000 0x2b000 0x1000 0x38000 > 0x38000 0x2000 0x3a000 0x3a000 0x1000 0x14000 0x14000 0x1000 0x15000 > 0x15000 0x1000 0x3c000 0x3c000 0x2000 0x3e000 0x3e000 0x1000 0x40000 > 0x40000 0x1000 0x41000 0x41000 0x1000 0x42000 0x42000 0x1000 0x43000 > 0x43000 0x1000 0x44000 0x44000 0x1000 0x45000 0x45000 0x1000 0x46000 > 0x46000 0x1000 0x47000 0x47000 0x1000 0x48000 0x48000 0x1000 0x49000 > 0x49000 0x1000 0x4c000 0x4c000 0x1000 0x4d000 0x4d000 0x1000 0x50000 > 0x50000 0x2000 0x52000 0x52000 0x1000 0x60000 0x60000 0x1000 0x61000 > 0x61000 0x1000 0x80000 0x80000 0x10000 0x90000 0x90000 0x1000 0xa0000 > 0xa0000 0x10000 0xb0000 0xb0000 0x1000 0x30000 0x30000 0x1000 0x31000 > 0x31000 0x1000 0x4a000 0x4a000 0x1000 0x4b000 0x4b000 0x1000 0xc8000 > 0xc8000 0x1000 0xc9000 0xc9000 0x1000 0xcc000 0xcc000 0x1000 0xcd000 > 0xcd000 0x1000 0xca000 0xca000 0x1000 0xcb000 0xcb000 0x1000 0x46000000 > 0x46000000 0x400000 0x46400000 0x46400000 0x400000>; > target-module@8000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x8000 0x1000>; > }; > target-module@14000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x14000 0x1000>; > }; > target-module@16000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x16000 0x1000>; > }; > target-module@22000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart2"; > reg = <0x22050 0x4 0x22054 0x4 0x22058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x34 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x22000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x2000>; > interrupts = <0x49>; > status = "disabled"; > dmas = <0xc5 0x1c 0x0 0xc5 0x1d 0x0>; > dma-names = "tx", "rx"; > phandle = <0x8c>; > }; > }; > target-module@24000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart3"; > reg = <0x24050 0x4 0x24054 0x4 0x24058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x38 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x24000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x2000>; > interrupts = <0x4a>; > status = "disabled"; > dmas = <0xc5 0x1e 0x0 0xc5 0x1f 0x0>; > dma-names = "tx", "rx"; > phandle = <0x8d>; > }; > }; > target-module@2a000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "i2c2"; > reg = <0x2a000 0x8 0x2a010 0x8 0x2a090 0x8>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x10 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x2a000 0x1000>; > i2c@0 { > > compatible = "ti,omap4-i2c"; > #address-cells = <0x1>; > #size-cells = <0x0>; > reg = <0x0 0x1000>; > interrupts = <0x47>; > status = "disabled"; > phandle = <0x8e>; > }; > }; > target-module@30000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "spi0"; > reg = <0x30000 0x4 0x30110 0x4 0x30114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x303>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x14 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x30000 0x1000>; > spi@0 { > > compatible = "ti,omap4-mcspi"; > #address-cells = <0x1>; > #size-cells = <0x0>; > reg = <0x0 0x400>; > interrupts = <0x41>; > ti,spi-num-cs = <0x2>; > dmas = <0xc5 0x10 0x0 0xc5 0x11 0x0 0xc5 0x12 0x0 0xc5 0x13 0x0>; > dma-names = "tx0", "rx0", "tx1", "rx1"; > status = "disabled"; > phandle = <0x8f>; > }; > }; > target-module@38000 { > > compatible = "ti,sysc-omap4-simple", "ti,sysc"; > ti,hwmods = "mcasp0"; > reg = <0x38000 0x4 0x38004 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-sidle = <0x0 0x1 0x2>; > clocks = <0x40 0x18 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x38000 0x2000 0x46000000 0x46000000 0x400000>; > mcasp@0 { > > compatible = "ti,am33xx-mcasp-audio"; > reg = <0x0 0x2000 0x46000000 0x400000>; > reg-names = "mpu", "dat"; > interrupts = <0x50 0x51>; > interrupt-names = "tx", "rx"; > status = "okay"; > dmas = <0xc5 0x8 0x2 0xc5 0x9 0x2>; > dma-names = "tx", "rx"; > #sound-dai-cells = <0x0>; > pinctrl-names = "default"; > pinctrl-0 = <0x73>; > op-mode = <0x0>; > tdm-slots = <0x2>; > serial-dir = <0x0 0x0 0x1 0x0>; > tx-num-evt = <0x20>; > rx-num-evt = <0x20>; > phandle = <0x90>; > }; > }; > target-module@3c000 { > > compatible = "ti,sysc-omap4-simple", "ti,sysc"; > ti,hwmods = "mcasp1"; > reg = <0x3c000 0x4 0x3c004 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-sidle = <0x0 0x1 0x2>; > clocks = <0x40 0x4c 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3c000 0x2000 0x46400000 0x46400000 0x400000>; > mcasp@0 { > > compatible = "ti,am33xx-mcasp-audio"; > reg = <0x0 0x2000 0x46400000 0x400000>; > reg-names = "mpu", "dat"; > interrupts = <0x52 0x53>; > interrupt-names = "tx", "rx"; > status = "disabled"; > dmas = <0xc5 0xa 0x2 0xc5 0xb 0x2>; > dma-names = "tx", "rx"; > phandle = <0x91>; > }; > }; > target-module@40000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer2"; > reg = <0x40000 0x4 0x40010 0x4 0x40014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x48 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x40000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x44>; > clocks = <0x23>; > clock-names = "fck"; > phandle = <0x92>; > }; > }; > target-module@42000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer3"; > reg = <0x42000 0x4 0x42010 0x4 0x42014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x4c 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x42000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x45>; > phandle = <0x93>; > }; > }; > target-module@44000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer4"; > reg = <0x44000 0x4 0x44010 0x4 0x44014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x50 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x44000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x5c>; > ti,timer-pwm; > phandle = <0x94>; > }; > }; > target-module@46000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer5"; > reg = <0x46000 0x4 0x46010 0x4 0x46014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0xb4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x46000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x5d>; > ti,timer-pwm; > phandle = <0x95>; > }; > }; > target-module@48000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer6"; > reg = <0x48000 0x4 0x48010 0x4 0x48014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0xb8 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x48000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x5e>; > ti,timer-pwm; > phandle = <0x96>; > }; > }; > target-module@4a000 { > > compatible = "ti,sysc-omap4-timer", "ti,sysc"; > ti,hwmods = "timer7"; > reg = <0x4a000 0x4 0x4a010 0x4 0x4a014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x44 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x4a000 0x1000>; > timer@0 { > > compatible = "ti,am335x-timer"; > reg = <0x0 0x400>; > interrupts = <0x5f>; > ti,timer-pwm; > phandle = <0x97>; > }; > }; > target-module@4c000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "gpio2"; > reg = <0x4c000 0x4 0x4c010 0x4 0x4c114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x74 0x0 0x3f 0x74 0x12>; > clock-names = "fck", "dbclk"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x4c000 0x1000>; > gpio@0 { > > compatible = "ti,omap4-gpio"; > gpio-controller; > #gpio-cells = <0x2>; > interrupt-controller; > #interrupt-cells = <0x2>; > reg = <0x0 0x1000>; > interrupts = <0x62>; > phandle = <0x98>; > }; > }; > target-module@50000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x50000 0x2000>; > }; > target-module@60000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "mmc1"; > reg = <0x602fc 0x4 0x60110 0x4 0x60114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x60000 0x1000>; > mmc@0 { > > compatible = "ti,omap4-hsmmc"; > ti,dual-volt; > ti,needs-special-reset; > ti,needs-special-hs-handling; > dmas = <0x86 0x18 0x0 0x0 0x86 0x19 0x0 0x0>; > dma-names = "tx", "rx"; > interrupts = <0x40>; > reg = <0x0 0x1000>; > status = "okay"; > bus-width = <0x4>; > pinctrl-names = "default"; > pinctrl-0 = <0x6f>; > cd-gpios = <0x53 0x6 0x1>; > vmmc-supply = <0xd8>; > phandle = <0x99>; > }; > }; > target-module@80000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "elm"; > reg = <0x80000 0x4 0x80010 0x4 0x80014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x303>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x8 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x80000 0x10000>; > elm@0 { > > compatible = "ti,am3352-elm"; > reg = <0x0 0x2000>; > interrupts = <0x4>; > status = "disabled"; > phandle = <0x9a>; > }; > }; > target-module@a0000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa0000 0x10000>; > }; > target-module@c8000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "mailbox"; > reg = <0xc8000 0x4 0xc8010 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1 0x2>; > clocks = <0x3f 0xd8 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xc8000 0x1000>; > mailbox@0 { > > compatible = "ti,omap4-mailbox"; > reg = <0x0 0x200>; > interrupts = <0x4d>; > #mbox-cells = <0x1>; > ti,mbox-num-users = <0x4>; > ti,mbox-num-fifos = <0x8>; > phandle = <0x9b>; > wkup_m3 { > > ti,mbox-send-noirq; > ti,mbox-tx = <0x0 0x0 0x0>; > ti,mbox-rx = <0x0 0x0 0x3>; > phandle = <0x9c>; > }; > }; > }; > target-module@ca000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "spinlock"; > reg = <0xca000 0x4 0xca010 0x4 0xca014 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0xd4 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xca000 0x1000>; > spinlock@0 { > > compatible = "ti,omap4-hwspinlock"; > reg = <0x0 0x1000>; > #hwlock-cells = <0x1>; > phandle = <0x9d>; > }; > }; > target-module@cc000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xcc000 0x1000>; > }; > }; > segment@100000 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x8c000 0x18c000 0x1000 0x8d000 0x18d000 0x1000 0x8e000 0x18e000 > 0x1000 0x8f000 0x18f000 0x1000 0x9c000 0x19c000 0x1000 0x9d000 0x19d000 > 0x1000 0xa6000 0x1a6000 0x1000 0xa7000 0x1a7000 0x1000 0xa8000 0x1a8000 > 0x1000 0xa9000 0x1a9000 0x1000 0xaa000 0x1aa000 0x1000 0xab000 0x1ab000 > 0x1000 0xac000 0x1ac000 0x1000 0xad000 0x1ad000 0x1000 0xae000 0x1ae000 > 0x1000 0xaf000 0x1af000 0x1000 0xb0000 0x1b0000 0x10000 0xc0000 0x1c0000 > 0x1000 0xcc000 0x1cc000 0x2000 0xce000 0x1ce000 0x2000 0xd0000 0x1d0000 > 0x2000 0xd2000 0x1d2000 0x2000 0xd8000 0x1d8000 0x1000 0xd9000 0x1d9000 > 0x1000 0xa0000 0x1a0000 0x1000 0xa1000 0x1a1000 0x1000 0xa2000 0x1a2000 > 0x1000 0xa3000 0x1a3000 0x1000 0xa4000 0x1a4000 0x1000 0xa5000 0x1a5000 > 0x1000>; > target-module@8c000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x8c000 0x1000>; > }; > target-module@8e000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x8e000 0x1000>; > }; > target-module@9c000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "i2c3"; > reg = <0x9c000 0x8 0x9c010 0x8 0x9c090 0x8>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0xc 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x9c000 0x1000>; > i2c@0 { > > compatible = "ti,omap4-i2c"; > #address-cells = <0x1>; > #size-cells = <0x0>; > reg = <0x0 0x1000>; > interrupts = <0x1e>; > status = "okay"; > pinctrl-names = "default"; > pinctrl-0 = <0x68>; > clock-frequency = <0x186a0>; > phandle = <0x9e>; > cape_eeprom0@54 { > > compatible = "atmel,24c256"; > reg = <0x54>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0x9f>; > cape_data@0 { > > reg = <0x0 0x100>; > phandle = <0xa0>; > }; > }; > cape_eeprom1@55 { > > compatible = "atmel,24c256"; > reg = <0x55>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0xa1>; > cape_data@0 { > > reg = <0x0 0x100>; > phandle = <0xa2>; > }; > }; > cape_eeprom2@56 { > > compatible = "atmel,24c256"; > reg = <0x56>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0xa3>; > cape_data@0 { > > reg = <0x0 0x100>; > phandle = <0xa4>; > }; > }; > cape_eeprom3@57 { > > compatible = "atmel,24c256"; > reg = <0x57>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0xa5>; > cape_data@0 { > > reg = <0x0 0x100>; > phandle = <0xa6>; > }; > }; > }; > }; > target-module@a0000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "spi1"; > reg = <0xa0000 0x4 0xa0110 0x4 0xa0114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x303>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x18 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa0000 0x1000>; > spi@0 { > > compatible = "ti,omap4-mcspi"; > #address-cells = <0x1>; > #size-cells = <0x0>; > reg = <0x0 0x400>; > interrupts = <0x7d>; > ti,spi-num-cs = <0x2>; > dmas = <0xc5 0x2a 0x0 0xc5 0x2b 0x0 0xc5 0x2c 0x0 0xc5 0x2d 0x0>; > dma-names = "tx0", "rx0", "tx1", "rx1"; > status = "disabled"; > phandle = <0xa7>; > }; > }; > target-module@a2000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa2000 0x1000>; > }; > target-module@a4000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa4000 0x1000>; > }; > target-module@a6000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart4"; > reg = <0xa6050 0x4 0xa6054 0x4 0xa6058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x3c 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa6000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x2000>; > interrupts = <0x2c>; > status = "disabled"; > phandle = <0xa8>; > }; > }; > target-module@a8000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart5"; > reg = <0xa8050 0x4 0xa8054 0x4 0xa8058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x40 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xa8000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x2000>; > interrupts = <0x2d>; > status = "disabled"; > phandle = <0xa9>; > }; > }; > target-module@aa000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "uart6"; > reg = <0xaa050 0x4 0xaa054 0x4 0xaa058 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x0 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xaa000 0x1000>; > serial@0 { > > compatible = "ti,am3352-uart", "ti,omap3-uart"; > clock-frequency = <0x2dc6c00>; > reg = <0x0 0x2000>; > interrupts = <0x2e>; > status = "disabled"; > phandle = <0xaa>; > }; > }; > target-module@ac000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "gpio3"; > reg = <0xac000 0x4 0xac010 0x4 0xac114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x78 0x0 0x3f 0x78 0x12>; > clock-names = "fck", "dbclk"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xac000 0x1000>; > gpio@0 { > > compatible = "ti,omap4-gpio"; > gpio-controller; > #gpio-cells = <0x2>; > interrupt-controller; > #interrupt-cells = <0x2>; > reg = <0x0 0x1000>; > interrupts = <0x20>; > phandle = <0xab>; > }; > }; > target-module@ae000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "gpio4"; > reg = <0xae000 0x4 0xae010 0x4 0xae114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x7>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0x7c 0x0 0x3f 0x7c 0x12>; > clock-names = "fck", "dbclk"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xae000 0x1000>; > gpio@0 { > > compatible = "ti,omap4-gpio"; > gpio-controller; > #gpio-cells = <0x2>; > interrupt-controller; > #interrupt-cells = <0x2>; > reg = <0x0 0x1000>; > interrupts = <0x3e>; > phandle = <0xac>; > }; > }; > target-module@b0000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xb0000 0x10000>; > }; > target-module@cc000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "d_can0"; > reg = <0xcc000 0x4>; > reg-names = "rev"; > clocks = <0x3f 0x88 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xcc000 0x2000>; > can@0 { > > compatible = "ti,am3352-d_can"; > reg = <0x0 0x2000>; > clocks = <0x79>; > clock-names = "fck"; > syscon-raminit = <0x74 0x644 0x0>; > interrupts = <0x34>; > status = "disabled"; > phandle = <0xad>; > }; > }; > target-module@d0000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "d_can1"; > reg = <0xd0000 0x4>; > reg-names = "rev"; > clocks = <0x3f 0x8c 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xd0000 0x2000>; > can@0 { > > compatible = "ti,am3352-d_can"; > reg = <0x0 0x2000>; > clocks = <0x7a>; > clock-names = "fck"; > syscon-raminit = <0x74 0x644 0x1>; > interrupts = <0x37>; > status = "disabled"; > phandle = <0xae>; > }; > }; > target-module@d8000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "mmc2"; > reg = <0xd82fc 0x4 0xd8110 0x4 0xd8114 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x307>; > ti,sysc-sidle = <0x0 0x1 0x2>; > ti,syss-mask = <0x1>; > clocks = <0x3f 0xbc 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xd8000 0x1000>; > mmc@0 { > > compatible = "ti,omap4-hsmmc"; > ti,needs-special-reset; > dmas = <0xc5 0x2 0x0 0xc5 0x3 0x0>; > dma-names = "tx", "rx"; > interrupts = <0x1c>; > reg = <0x0 0x1000>; > status = "okay"; > vmmc-supply = <0xd8>; > pinctrl-names = "default"; > pinctrl-0 = <0x70>; > bus-width = <0x8>; > phandle = <0xaf>; > }; > }; > }; > segment@200000 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > }; > segment@300000 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x300000 0x1000 0x1000 0x301000 0x1000 0x2000 0x302000 > 0x1000 0x3000 0x303000 0x1000 0x4000 0x304000 0x1000 0x5000 0x305000 0x1000 > 0xe000 0x30e000 0x1000 0xf000 0x30f000 0x1000 0x18000 0x318000 0x4000 > 0x1c000 0x31c000 0x1000 0x10000 0x310000 0x2000 0x12000 0x312000 0x1000 > 0x15000 0x315000 0x1000 0x16000 0x316000 0x1000 0x17000 0x317000 0x1000 > 0x13000 0x313000 0x1000 0x14000 0x314000 0x1000 0x20000 0x320000 0x1000 > 0x21000 0x321000 0x1000 0x22000 0x322000 0x1000 0x23000 0x323000 0x1000 > 0x24000 0x324000 0x1000 0x25000 0x325000 0x1000>; > target-module@0 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "epwmss0"; > reg = <0x0 0x4 0x4 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-midle = <0x0 0x1 0x2 0x3>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x9c 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x1000>; > epwmss@0 { > > compatible = "ti,am33xx-pwmss"; > reg = <0x0 0x10>; > #address-cells = <0x1>; > #size-cells = <0x1>; > status = "disabled"; > ranges = <0x0 0x0 0x1000>; > phandle = <0xb0>; > ecap@100 { > > compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; > #pwm-cells = <0x3>; > reg = <0x100 0x80>; > clocks = <0x31>; > clock-names = "fck"; > interrupts = <0x1f>; > interrupt-names = "ecap0"; > status = "disabled"; > phandle = <0xb1>; > }; > pwm@200 { > > compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; > #pwm-cells = <0x3>; > reg = <0x200 0x80>; > clocks = <0x82 0x31>; > clock-names = "tbclk", "fck"; > status = "disabled"; > phandle = <0xb2>; > }; > }; > }; > target-module@2000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "epwmss1"; > reg = <0x2000 0x4 0x2004 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-midle = <0x0 0x1 0x2 0x3>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0x94 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x2000 0x1000>; > epwmss@0 { > > compatible = "ti,am33xx-pwmss"; > reg = <0x0 0x10>; > #address-cells = <0x1>; > #size-cells = <0x1>; > status = "disabled"; > ranges = <0x0 0x0 0x1000>; > phandle = <0xb3>; > ecap@100 { > > compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; > #pwm-cells = <0x3>; > reg = <0x100 0x80>; > clocks = <0x31>; > clock-names = "fck"; > interrupts = <0x2f>; > interrupt-names = "ecap1"; > status = "disabled"; > phandle = <0xb4>; > }; > pwm@200 { > > compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; > #pwm-cells = <0x3>; > reg = <0x200 0x80>; > clocks = <0x83 0x31>; > clock-names = "tbclk", "fck"; > status = "disabled"; > phandle = <0xb5>; > }; > }; > }; > target-module@4000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "epwmss2"; > reg = <0x4000 0x4 0x4004 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-midle = <0x0 0x1 0x2 0x3>; > ti,sysc-sidle = <0x0 0x1 0x2 0x3>; > clocks = <0x3f 0xa0 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x4000 0x1000>; > epwmss@0 { > > compatible = "ti,am33xx-pwmss"; > reg = <0x0 0x10>; > #address-cells = <0x1>; > #size-cells = <0x1>; > status = "disabled"; > ranges = <0x0 0x0 0x1000>; > phandle = <0xb6>; > ecap@100 { > > compatible = "ti,am3352-ecap", "ti,am33xx-ecap"; > #pwm-cells = <0x3>; > reg = <0x100 0x80>; > clocks = <0x31>; > clock-names = "fck"; > interrupts = <0x3d>; > interrupt-names = "ecap2"; > status = "disabled"; > phandle = <0xb7>; > }; > pwm@200 { > > compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm"; > #pwm-cells = <0x3>; > reg = <0x200 0x80>; > clocks = <0x84 0x31>; > clock-names = "tbclk", "fck"; > status = "disabled"; > phandle = <0xb8>; > }; > }; > }; > target-module@e000 { > > compatible = "ti,sysc-omap4", "ti,sysc"; > ti,hwmods = "lcdc"; > reg = <0xe000 0x4 0xe054 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-midle; > ti,sysc-sidle = <0x0 0x1 0x2>; > clocks = <0x45 0x0 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xe000 0x1000>; > lcdc@0 { > > compatible = "ti,am33xx-tilcdc"; > reg = <0x0 0x1000>; > interrupts = <0x24>; > status = "okay"; > blue-and-red-wiring = "straight"; > phandle = <0xb9>; > port { > > endpoint@0 { > > remote-endpoint = <0x61>; > phandle = <0xba>; > }; > }; > }; > }; > target-module@10000 { > > compatible = "ti,sysc-omap2", "ti,sysc"; > ti,hwmods = "rng"; > reg = <0x11fe0 0x4 0x11fe4 0x4>; > reg-names = "rev", "sysc"; > ti,sysc-mask = <0x1>; > ti,sysc-sidle = <0x0 0x1>; > clocks = <0x3f 0x58 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x10000 0x2000>; > rng@0 { > > compatible = "ti,omap4-rng"; > reg = <0x0 0x2000>; > interrupts = <0x6f>; > phandle = <0xbb>; > }; > }; > target-module@13000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x13000 0x1000>; > }; > target-module@15000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x15000 0x1000 0x1000 0x16000 0x1000>; > }; > target-module@18000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x18000 0x4000>; > }; > target-module@20000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x20000 0x1000>; > }; > target-module@22000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x22000 0x1000>; > }; > target-module@24000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x24000 0x1000>; > }; > }; > }; > interconnect@47c00000 { > > compatible = "ti,am33xx-l4-fw", "simple-bus"; > reg = <0x47c00000 0x800 0x47c00800 0x800 0x47c01000 0x400>; > reg-names = "ap", "la", "ia0"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x47c00000 0x1000000>; > phandle = <0xbc>; > segment@0 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0xc000 > 0xc000 0x1000 0xd000 0xd000 0x1000 0xe000 0xe000 0x1000 0xf000 0xf000 > 0x1000 0x10000 0x10000 0x1000 0x11000 0x11000 0x1000 0x1a000 0x1a000 0x1000 > 0x1b000 0x1b000 0x1000 0x24000 0x24000 0x1000 0x25000 0x25000 0x1000 > 0x26000 0x26000 0x1000 0x27000 0x27000 0x1000 0x30000 0x30000 0x1000 > 0x31000 0x31000 0x1000 0x38000 0x38000 0x1000 0x39000 0x39000 0x1000 > 0x3a000 0x3a000 0x1000 0x3b000 0x3b000 0x1000 0x3e000 0x3e000 0x1000 > 0x3f000 0x3f000 0x1000 0x3c000 0x3c000 0x1000 0x40000 0x40000 0x1000 > 0x46000 0x46000 0x1000 0x47000 0x47000 0x1000 0x44000 0x44000 0x1000 > 0x45000 0x45000 0x1000 0x28000 0x28000 0x1000 0x29000 0x29000 0x1000 > 0x32000 0x32000 0x1000 0x33000 0x33000 0x1000 0x3d000 0x3d000 0x1000 > 0x41000 0x41000 0x1000 0x42000 0x42000 0x1000 0x43000 0x43000 0x1000 > 0x14000 0x14000 0x1000 0x15000 0x15000 0x1000>; > target-module@c000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xc000 0x1000>; > }; > target-module@e000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0xe000 0x1000>; > }; > target-module@10000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x10000 0x1000>; > }; > target-module@14000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x14000 0x1000>; > }; > target-module@1a000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x1a000 0x1000>; > }; > target-module@24000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x24000 0x1000>; > }; > target-module@26000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x26000 0x1000>; > }; > target-module@28000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x28000 0x1000>; > }; > target-module@30000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x30000 0x1000>; > }; > target-module@32000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x32000 0x1000>; > }; > target-module@38000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x38000 0x1000>; > }; > target-module@3a000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3a000 0x1000>; > }; > target-module@3c000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3c000 0x1000>; > }; > target-module@3e000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3e000 0x1000>; > }; > target-module@40000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x40000 0x1000>; > }; > target-module@42000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x42000 0x1000>; > }; > target-module@44000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x44000 0x1000>; > }; > target-module@46000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x46000 0x1000>; > }; > }; > }; > interconnect@4a000000 { > > compatible = "ti,am33xx-l4-fast", "simple-bus"; > reg = <0x4a000000 0x800 0x4a000800 0x800 0x4a001000 0x400>; > reg-names = "ap", "la", "ia0"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x4a000000 0x1000000>; > phandle = <0xbd>; > segment@0 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x800 0x800 0x800 0x800 0x1000 0x1000 0x400 0x100000 > 0x100000 0x8000 0x108000 0x108000 0x1000 0x180000 0x180000 0x20000 0x1a0000 > 0x1a0000 0x1000 0x200000 0x200000 0x80000 0x280000 0x280000 0x1000 0x300000 > 0x300000 0x80000 0x380000 0x380000 0x1000>; > target-module@100000 { > > compatible = "ti,sysc-omap4-simple", "ti,sysc"; > ti,hwmods = "cpgmac0"; > reg = <0x101200 0x4 0x101208 0x4 0x101204 0x4>; > reg-names = "rev", "sysc", "syss"; > ti,sysc-mask = <0x0>; > ti,sysc-midle = <0x0 0x1>; > ti,sysc-sidle = <0x0 0x1>; > ti,syss-mask = <0x1>; > clocks = <0x44 0x14 0x0>; > clock-names = "fck"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x100000 0x8000>; > ethernet@0 { > > compatible = "ti,am335x-cpsw", "ti,cpsw"; > clocks = <0x33 0x34>; > clock-names = "fck", "cpts"; > cpdma_channels = <0x8>; > ale_entries = <0x400>; > bd_ram_size = <0x2000>; > mac_control = <0x20>; > slaves = <0x1>; > active_slave = <0x0>; > cpts_clock_mult = <0x80000000>; > cpts_clock_shift = <0x1d>; > reg = <0x0 0x800 0x1200 0x100>; > #address-cells = <0x1>; > #size-cells = <0x1>; > interrupts = <0x28 0x29 0x2a 0x2b>; > ranges = <0x0 0x0 0x8000>; > syscon = <0x74>; > status = "okay"; > pinctrl-names = "default", "sleep"; > pinctrl-0 = <0x6b>; > pinctrl-1 = <0x6c>; > phandle = <0xbe>; > mdio@1000 { > > compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; > #address-cells = <0x1>; > #size-cells = <0x0>; > ti,hwmods = "davinci_mdio"; > bus_freq = <0xf4240>; > reg = <0x1000 0x100>; > status = "okay"; > pinctrl-names = "default", "sleep"; > pinctrl-0 = <0x6d>; > pinctrl-1 = <0x6e>; > phandle = <0xbf>; > ethernet-phy@0 { > > reg = <0x0>; > phandle = <0xc0>; > }; > }; > slave@200 { > > local-mac-address = [d0 39 72 30 58 f9]; > mac-address = [d0 39 72 30 58 f9]; > phys = <0x75 0x1 0x1>; > phy-handle = <0xc0>; > phy-mode = "mii"; > phandle = <0xc1>; > }; > slave@300 { > > local-mac-address = [d0 39 72 30 58 fb]; > mac-address = [d0 39 72 30 58 fb]; > phys = <0x75 0x2 0x1>; > phandle = <0xc2>; > }; > }; > }; > target-module@180000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x180000 0x20000>; > }; > target-module@200000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x200000 0x80000>; > }; > target-module@300000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x300000 0x80000>; > }; > }; > }; > interconnect@4b140000 { > > compatible = "ti,am33xx-l4-mpuss", "simple-bus"; > reg = <0x4b144400 0x100 0x4b144800 0x400>; > reg-names = "la", "ap"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x4b140000 0x8000>; > phandle = <0xc3>; > segment@0 { > > compatible = "simple-bus"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x4800 0x4800 0x400 0x1000 0x1000 0x1000 0x2000 0x2000 0x1000 > 0x4000 0x4000 0x400 0x5000 0x5000 0x400 0x0 0x0 0x1000 0x3000 0x3000 0x1000 > 0x800 0x800 0x800>; > target-module@0 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x0 0x1000 0x1000 0x1000 0x1000 0x2000 0x2000 0x1000>; > }; > target-module@3000 { > > compatible = "ti,sysc"; > status = "disabled"; > #address-cells = <0x1>; > #size-cells = <0x1>; > ranges = <0x0 0x3000 0x1000>; > }; > }; > }; > interrupt-controller@48200000 { > > compatible = "ti,am33xx-intc"; > interrupt-controller; > #interrupt-cells = <0x1>; > reg = <0x48200000 0x1000>; > phandle = <0xc4>; > }; > edma@49000000 { > > compatible = "ti,edma3-tpcc"; > ti,hwmods = "tpcc"; > reg = <0x49000000 0x10000>; > reg-names = "edma3_cc"; > interrupts = <0xc 0xd 0xe>; > interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint"; > dma-requests = <0x40>; > #dma-cells = <0x2>; > ti,tptcs = <0xc6 0x7 0xc7 0x5 0xc8 0x0>; > ti,edma-memcpy-channels = <0x14 0x15>; > phandle = <0xc5>; > }; > tptc@49800000 { > > compatible = "ti,edma3-tptc"; > ti,hwmods = "tptc0"; > reg = <0x49800000 0x100000>; > interrupts = <0x70>; > interrupt-names = "edma3_tcerrint"; > phandle = <0xc6>; > }; > tptc@49900000 { > > compatible = "ti,edma3-tptc"; > ti,hwmods = "tptc1"; > reg = <0x49900000 0x100000>; > interrupts = <0x71>; > interrupt-names = "edma3_tcerrint"; > phandle = <0xc7>; > }; > tptc@49a00000 { > > compatible = "ti,edma3-tptc"; > ti,hwmods = "tptc2"; > reg = <0x49a00000 0x100000>; > interrupts = <0x72>; > interrupt-names = "edma3_tcerrint"; > phandle = <0xc8>; > }; > mmc@47810000 { > > compatible = "ti,omap4-hsmmc"; > ti,hwmods = "mmc3"; > ti,needs-special-reset; > interrupts = <0x1d>; > reg = <0x47810000 0x1000>; > status = "disabled"; > phandle = <0xc9>; > }; > usb@47400000 { > > compatible = "ti,am33xx-usb"; > reg = <0x47400000 0x1000>; > ranges; > #address-cells = <0x1>; > #size-cells = <0x1>; > ti,hwmods = "usb_otg_hs"; > status = "okay"; > phandle = <0xca>; > control@44e10620 { > > compatible = "ti,am335x-usb-ctrl-module"; > reg = <0x44e10620 0x10 0x44e10648 0x4>; > reg-names = "phy_ctrl", "wakeup"; > status = "okay"; > phandle = <0xcb>; > }; > usb-phy@47401300 { > > compatible = "ti,am335x-usb-phy"; > reg = <0x47401300 0x100>; > reg-names = "phy"; > status = "okay"; > ti,ctrl_mod = <0xcb>; > #phy-cells = <0x0>; > phandle = <0xcc>; > }; > usb@47401000 { > > compatible = "ti,musb-am33xx"; > status = "okay"; > reg = <0x47401400 0x400 0x47401000 0x200>; > reg-names = "mc", "control"; > interrupts = <0x12>; > interrupt-names = "mc", "vbus"; > dr_mode = "peripheral"; > mentor,multipoint = <0x1>; > mentor,num-eps = <0x10>; > mentor,ram-bits = <0xc>; > mentor,power = <0x1f4>; > phys = <0xcc>; > dmas = <0xd0 0x0 0x0 0xd0 0x1 0x0 0xd0 0x2 0x0 0xd0 0x3 0x0 0xd0 0x4 0x0 > 0xd0 0x5 0x0 0xd0 0x6 0x0 0xd0 0x7 0x0 0xd0 0x8 0x0 0xd0 0x9 0x0 0xd0 0xa > 0x0 0xd0 0xb 0x0 0xd0 0xc 0x0 0xd0 0xd 0x0 0xd0 0xe 0x0 0xd0 0x0 0x1 0xd0 > 0x1 0x1 0xd0 0x2 0x1 0xd0 0x3 0x1 0xd0 0x4 0x1 0xd0 0x5 0x1 0xd0 0x6 0x1 > 0xd0 0x7 0x1 0xd0 0x8 0x1 0xd0 0x9 0x1 0xd0 0xa 0x1 0xd0 0xb 0x1 0xd0 0xc > 0x1 0xd0 0xd 0x1 0xd0 0xe 0x1>; > dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", > "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", > "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", > "tx15"; > interrupts-extended = <0xc4 0x12 0x56 0x0>; > phandle = <0xcd>; > }; > usb-phy@47401b00 { > > compatible = "ti,am335x-usb-phy"; > reg = <0x47401b00 0x100>; > reg-names = "phy"; > status = "okay"; > ti,ctrl_mod = <0xcb>; > #phy-cells = <0x0>; > phandle = <0xce>; > }; > usb@47401800 { > > compatible = "ti,musb-am33xx"; > status = "okay"; > reg = <0x47401c00 0x400 0x47401800 0x200>; > reg-names = "mc", "control"; > interrupts = <0x13>; > interrupt-names = "mc"; > dr_mode = "host"; > mentor,multipoint = <0x1>; > mentor,num-eps = <0x10>; > mentor,ram-bits = <0xc>; > mentor,power = <0x1f4>; > phys = <0xce>; > dmas = <0xd0 0xf 0x0 0xd0 0x10 0x0 0xd0 0x11 0x0 0xd0 0x12 0x0 0xd0 0x13 > 0x0 0xd0 0x14 0x0 0xd0 0x15 0x0 0xd0 0x16 0x0 0xd0 0x17 0x0 0xd0 0x18 0x0 > 0xd0 0x19 0x0 0xd0 0x1a 0x0 0xd0 0x1b 0x0 0xd0 0x1c 0x0 0xd0 0x1d 0x0 0xd0 > 0xf 0x1 0xd0 0x10 0x1 0xd0 0x11 0x1 0xd0 0x12 0x1 0xd0 0x13 0x1 0xd0 0x14 > 0x1 0xd0 0x15 0x1 0xd0 0x16 0x1 0xd0 0x17 0x1 0xd0 0x18 0x1 0xd0 0x19 0x1 > 0xd0 0x1a 0x1 0xd0 0x1b 0x1 0xd0 0x1c 0x1 0xd0 0x1d 0x1>; > dma-names = "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", "rx8", "rx9", > "rx10", "rx11", "rx12", "rx13", "rx14", "rx15", "tx1", "tx2", "tx3", "tx4", > "tx5", "tx6", "tx7", "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", "tx14", > "tx15"; > phandle = <0xcf>; > }; > dma-controller@47402000 { > > compatible = "ti,am3359-cppi41"; > reg = <0x47400000 0x1000 0x47402000 0x1000 0x47403000 0x1000 0x47404000 > 0x4000>; > reg-names = "glue", "controller", "scheduler", "queuemgr"; > interrupts = <0x11>; > interrupt-names = "glue"; > #dma-cells = <0x2>; > #dma-channels = <0x1e>; > #dma-requests = <0x100>; > status = "okay"; > phandle = <0xd0>; > }; > }; > ocmcram@40300000 { > > compatible = "mmio-sram"; > reg = <0x40300000 0x10000>; > ranges = <0x0 0x40300000 0x10000>; > #address-cells = <0x1>; > #size-cells = <0x1>; > phandle = <0xd1>; > pm-sram-code@0 { > > compatible = "ti,sram"; > reg = <0x0 0x1000>; > protect-exec; > phandle = <0xd2>; > }; > pm-sram-data@1000 { > > compatible = "ti,sram"; > reg = <0x1000 0x1000>; > pool; > phandle = <0xd3>; > }; > }; > emif@4c000000 { > > compatible = "ti,emif-am3352"; > reg = <0x4c000000 0x1000000>; > ti,hwmods = "emif"; > interrupts = <0x65>; > sram = <0xd2 0xd3>; > ti,no-idle; > phandle = <0xd4>; > }; > gpmc@50000000 { > > compatible = "ti,am3352-gpmc"; > ti,hwmods = "gpmc"; > ti,no-idle-on-init; > reg = <0x50000000 0x2000>; > interrupts = <0x64>; > dmas = <0xc5 0x34 0x0>; > dma-names = "rxtx"; > gpmc,num-cs = <0x7>; > gpmc,num-waitpins = <0x2>; > #address-cells = <0x2>; > #size-cells = <0x1>; > interrupt-controller; > #interrupt-cells = <0x2>; > gpio-controller; > #gpio-cells = <0x2>; > status = "disabled"; > phandle = <0xd5>; > }; > sham@53100000 { > > compatible = "ti,omap4-sham"; > ti,hwmods = "sham"; > reg = <0x53100000 0x200>; > interrupts = <0x6d>; > dmas = <0xc5 0x24 0x0>; > dma-names = "rx"; > status = "okay"; > phandle = <0xd6>; > }; > aes@53500000 { > > compatible = "ti,omap4-aes"; > ti,hwmods = "aes"; > reg = <0x53500000 0xa0>; > interrupts = <0x67>; > dmas = <0xc5 0x6 0x0 0xc5 0x5 0x0>; > dma-names = "tx", "rx"; > status = "okay"; > phandle = <0xd7>; > }; > }; > memory@80000000 { > > device_type = "memory"; > reg = <0x80000000 0x20000000>; > }; > leds { > > pinctrl-names = "default"; > pinctrl-0 = <0x66>; > compatible = "gpio-leds"; > led2 { > > label = "beaglebone:green:heartbeat"; > gpios = <0x98 0x15 0x0>; > linux,default-trigger = "heartbeat"; > default-state = "off"; > }; > led3 { > > label = "beaglebone:green:mmc0"; > gpios = <0x98 0x16 0x0>; > linux,default-trigger = "mmc0"; > default-state = "off"; > }; > led4 { > > label = "beaglebone:green:usr2"; > gpios = <0x98 0x17 0x0>; > linux,default-trigger = "cpu0"; > default-state = "off"; > }; > led5 { > > label = "beaglebone:green:usr3"; > gpios = <0x98 0x18 0x0>; > linux,default-trigger = "mmc1"; > default-state = "off"; > }; > }; > fixedregulator0 { > > compatible = "regulator-fixed"; > regulator-name = "vmmcsd_fixed"; > regulator-min-microvolt = <0x325aa0>; > regulator-max-microvolt = <0x325aa0>; > phandle = <0xd8>; > }; > clk_mcasp0_fixed { > > #clock-cells = <0x0>; > compatible = "fixed-clock"; > clock-frequency = <0x1770000>; > phandle = <0xd9>; > }; > clk_mcasp0 { > > #clock-cells = <0x0>; > compatible = "gpio-gate-clock"; > clocks = <0xd9>; > enable-gpios = <0x98 0x1b 0x0>; > phandle = <0xda>; > }; > sound { > > compatible = "simple-audio-card"; > simple-audio-card,name = "TI BeagleBone Black"; > simple-audio-card,format = "i2s"; > simple-audio-card,bitclock-master = <0xdb>; > simple-audio-card,frame-master = <0xdb>; > simple-audio-card,cpu { > > sound-dai = <0x90>; > clocks = <0xda>; > phandle = <0xdb>; > }; > simple-audio-card,codec { > > sound-dai = <0x60>; > }; > }; > __symbols__ { > > dailink0_master = "/sound/simple-audio-card,cpu"; > clk_mcasp0 = "/clk_mcasp0"; > clk_mcasp0_fixed = "/clk_mcasp0_fixed"; > vmmcsd_fixed = "/fixedregulator0"; > aes = "/ocp/aes@53500000"; > sham = "/ocp/sham@53100000"; > gpmc = "/ocp/gpmc@50000000"; > emif = "/ocp/emif@4c000000"; > pm_sram_data = "/ocp/ocmcram@40300000/pm-sram-data@1000"; > pm_sram_code = "/ocp/ocmcram@40300000/pm-sram-code@0"; > ocmcram = "/ocp/ocmcram@40300000"; > cppi41dma = "/ocp/usb@47400000/dma-controller@47402000"; > usb1 = "/ocp/usb@47400000/usb@47401800"; > usb1_phy = "/ocp/usb@47400000/usb-phy@47401b00"; > usb0 = "/ocp/usb@47400000/usb@47401000"; > usb0_phy = "/ocp/usb@47400000/usb-phy@47401300"; > usb_ctrl_mod = "/ocp/usb@47400000/control@44e10620"; > usb = "/ocp/usb@47400000"; > mmc3 = "/ocp/mmc@47810000"; > edma_tptc2 = "/ocp/tptc@49a00000"; > edma_tptc1 = "/ocp/tptc@49900000"; > edma_tptc0 = "/ocp/tptc@49800000"; > edma = "/ocp/edma@49000000"; > intc = "/ocp/interrupt-controller@48200000"; > l4_mpuss = "/ocp/interconnect@4b140000"; > cpsw_emac1 = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/slave@300"; > cpsw_emac0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/slave@200"; > ethphy0 = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/mdio@1000/ethernet-phy@0"; > davinci_mdio = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0/mdio@1000"; > mac = "/ocp/interconnect@4a000000/segment@0/target-module@100000 > /ethernet@0"; > l4_fast = "/ocp/interconnect@4a000000"; > l4_fw = "/ocp/interconnect@47c00000"; > rng = "/ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0 > "; > lcdc_0 = "/ocp/interconnect@48000000/segment@300000/target-module@e000 > /lcdc@0/port/endpoint@0"; > lcdc = "/ocp/interconnect@48000000/segment@300000/target-module@e000 > /lcdc@0"; > ehrpwm2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000 > /epwmss@0/pwm@200"; > ecap2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000 > /epwmss@0/ecap@100"; > epwmss2 = "/ocp/interconnect@48000000/segment@300000/target-module@4000 > /epwmss@0"; > ehrpwm1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000 > /epwmss@0/pwm@200"; > ecap1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000 > /epwmss@0/ecap@100"; > epwmss1 = "/ocp/interconnect@48000000/segment@300000/target-module@2000 > /epwmss@0"; > ehrpwm0 = "/ocp/interconnect@48000000/segment@300000/target-module@0 > /epwmss@0/pwm@200"; > ecap0 = "/ocp/interconnect@48000000/segment@300000/target-module@0 > /epwmss@0/ecap@100"; > epwmss0 = "/ocp/interconnect@48000000/segment@300000/target-module@0 > /epwmss@0"; > mmc2 = "/ocp/interconnect@48000000/segment@100000/target-module@d8000 > /mmc@0"; > dcan1 = "/ocp/interconnect@48000000/segment@100000/target-module@d0000 > /can@0"; > dcan0 = "/ocp/interconnect@48000000/segment@100000/target-module@cc000 > /can@0"; > gpio3 = "/ocp/interconnect@48000000/segment@100000/target-module@ae000 > /gpio@0"; > gpio2 = "/ocp/interconnect@48000000/segment@100000/target-module@ac000 > /gpio@0"; > uart5 = "/ocp/interconnect@48000000/segment@100000/target-module@aa000 > /serial@0"; > uart4 = "/ocp/interconnect@48000000/segment@100000/target-module@a8000 > /serial@0"; > uart3 = "/ocp/interconnect@48000000/segment@100000/target-module@a6000 > /serial@0"; > spi1 = "/ocp/interconnect@48000000/segment@100000/target-module@a0000 > /spi@0"; > cape3_data = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom3@57/cape_data@0"; > cape_eeprom3 = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom3@57"; > cape2_data = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom2@56/cape_data@0"; > cape_eeprom2 = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom2@56"; > cape1_data = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom1@55/cape_data@0"; > cape_eeprom1 = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom1@55"; > cape0_data = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom0@54/cape_data@0"; > cape_eeprom0 = "/ocp/interconnect@48000000/segment@100000 > /target-module@9c000/i2c@0/cape_eeprom0@54"; > i2c2 = "/ocp/interconnect@48000000/segment@100000/target-module@9c000 > /i2c@0"; > hwspinlock = "/ocp/interconnect@48000000/segment@0/target-module@ca000 > /spinlock@0"; > mbox_wkupm3 = "/ocp/interconnect@48000000/segment@0/target-module@c8000 > /mailbox@0/wkup_m3"; > mailbox = "/ocp/interconnect@48000000/segment@0/target-module@c8000 > /mailbox@0"; > elm = "/ocp/interconnect@48000000/segment@0/target-module@80000/elm@0"; > mmc1 = "/ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0"; > gpio1 = "/ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0"; > timer7 = "/ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0 > "; > timer6 = "/ocp/interconnect@48000000/segment@0/target-module@48000/timer@0 > "; > timer5 = "/ocp/interconnect@48000000/segment@0/target-module@46000/timer@0 > "; > timer4 = "/ocp/interconnect@48000000/segment@0/target-module@44000/timer@0 > "; > timer3 = "/ocp/interconnect@48000000/segment@0/target-module@42000/timer@0 > "; > timer2 = "/ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 > "; > mcasp1 = "/ocp/interconnect@48000000/segment@0/target-module@3c000/mcasp@0 > "; > mcasp0 = "/ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0 > "; > spi0 = "/ocp/interconnect@48000000/segment@0/target-module@30000/spi@0"; > i2c1 = "/ocp/interconnect@48000000/segment@0/target-module@2a000/i2c@0"; > uart2 = "/ocp/interconnect@48000000/segment@0/target-module@24000/serial@0 > "; > uart1 = "/ocp/interconnect@48000000/segment@0/target-module@22000/serial@0 > "; > l4_per = "/ocp/interconnect@48000000"; > rtc = "/ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0 > "; > wdt2 = "/ocp/interconnect@44c00000/segment@200000/target-module@35000 > /wdt@0"; > timer1 = "/ocp/interconnect@44c00000/segment@200000/target-module@31000 > /timer@0"; > scm_clockdomains = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/clockdomains"; > edma_xbar = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/dma-router@f90"; > wkup_m3_ipc = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/wkup_m3_ipc@1324"; > ehrpwm2_tbclk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664"; > ehrpwm1_tbclk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm1_tbclk@44e10664"; > ehrpwm0_tbclk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664"; > rng_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0/clocks/rng_fck"; > aes0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0/clocks/aes0_fck"; > sha0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0/clocks/sha0_fck"; > smartreflex1_fck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/smartreflex1_fck"; > smartreflex0_fck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/smartreflex0_fck"; > mcasp1_fck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/mcasp1_fck"; > mcasp0_fck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/mcasp0_fck"; > dcan1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0/clocks/dcan1_fck"; > dcan0_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0/clocks/dcan0_fck"; > adc_tsc_fck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/adc_tsc_fck"; > sys_clkin_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks/sys_clkin_ck@40"; > scm_clocks = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/clocks"; > phy_gmii_sel = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/scm_conf@0/phy-gmii-sel"; > scm_conf = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/scm_conf@0"; > mcasp0_pins = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/mcasp0_pins"; > nxp_hdmi_bonelt_off_pins = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_off_pins"; > nxp_hdmi_bonelt_pins = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/nxp_hdmi_bonelt_pins"; > emmc_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/pinmux@800/pinmux_emmc_pins"; > mmc1_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/pinmux@800/pinmux_mmc1_pins"; > davinci_mdio_sleep = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/davinci_mdio_sleep"; > davinci_mdio_default = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/davinci_mdio_default"; > cpsw_sleep = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/cpsw_sleep"; > cpsw_default = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/cpsw_default"; > clkout2_pin = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/pinmux_clkout2_pin"; > uart0_pins = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/pinmux_uart0_pins"; > i2c2_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/pinmux@800/pinmux_i2c2_pins"; > i2c0_pins = "/ocp/interconnect@44c00000/segment@200000/target-module@10000 > /scm@0/pinmux@800/pinmux_i2c0_pins"; > user_leds_s0 = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800/user_leds_s0"; > am33xx_pinmux = "/ocp/interconnect@44c00000/segment@200000 > /target-module@10000/scm@0/pinmux@800"; > scm = "/ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0 > "; > am335x_adc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000 > /tscadc@0/adc"; > tscadc = "/ocp/interconnect@44c00000/segment@200000/target-module@d000 > /tscadc@0"; > hdmi_0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tda19988@70/ports/port@0/endpoint@0"; > tda19988 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tda19988@70"; > baseboard_data = "/ocp/interconnect@44c00000/segment@200000 > /target-module@b000/i2c@0/baseboard_eeprom@50/baseboard_data@0"; > baseboard_eeprom = "/ocp/interconnect@44c00000/segment@200000 > /target-module@b000/i2c@0/baseboard_eeprom@50"; > ldo4_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@6"; > ldo3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@5"; > ldo2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@4"; > ldo1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@3"; > dcdc3_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@2"; > dcdc2_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@1"; > dcdc1_reg = "/ocp/interconnect@44c00000/segment@200000/target-module@b000 > /i2c@0/tps@24/regulators/regulator@0"; > tps = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0 > /tps@24"; > i2c0 = "/ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0 > "; > uart0 = "/ocp/interconnect@44c00000/segment@200000/target-module@9000 > /serial@0"; > gpio0 = "/ocp/interconnect@44c00000/segment@200000/target-module@7000 > /gpio@0"; > l4_cefuse_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/l4-cefuse-cm@a00/l4-cefuse-clkctrl@0"; > l4_cefuse_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/l4-cefuse-cm@a00"; > gfx_l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/gfx-l3-cm@900/gfx-l3-clkctrl@0"; > gfx_l3_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/gfx-l3-cm@900"; > l4_rtc_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/l4-rtc-cm@800/l4-rtc-clkctrl@0"; > l4_rtc_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/l4-rtc-cm@800"; > mpu_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/mpu-cm@600/mpu-clkctrl@0"; > mpu_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0 > /mpu-cm@600"; > l4_wkup_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/wkup-cm@400/l4-wkup-aon-clkctrl@b0"; > l3_aon_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/wkup-cm@400/l3-aon-clkctrl@14"; > l4_wkup_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/wkup-cm@400/l4-wkup-clkctrl@0"; > wkup_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/wkup-cm@400"; > clk_24mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/per-cm@0/clk-24mhz-clkctrl@14c"; > lcdc_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/per-cm@0/lcdc-clkctrl@18"; > cpsw_125mhz_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/per-cm@0/cpsw-125mhz-clkctrl@0"; > pruss_ocp_clkctrl = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/per-cm@0/pruss-ocp-clkctrl@e8"; > l4hs_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/per-cm@0/l4hs-clkctrl@120"; > l3_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/per-cm@0/l3-clkctrl@24"; > l3s_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/per-cm@0/l3s-clkctrl@1c"; > l4ls_clkctrl = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/per-cm@0/l4ls-clkctrl@38"; > per_cm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0 > /per-cm@0"; > prcm_clockdomains = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clockdomains"; > clkout2_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/clkout2_ck@700"; > clkout2_div_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/clkout2_div_ck@700"; > sysclkout_pre_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/sysclkout_pre_ck@700"; > gfx_fck_div_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/gfx_fck_div_ck@52c"; > gfx_fclk_clksel_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/gfx_fclk_clksel_ck@52c"; > mmc_clk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/mmc_clk"; > lcd_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/lcd_gclk@534"; > gpio0_dbclk_mux_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/gpio0_dbclk_mux_ck@53c"; > cpsw_cpts_rft_clk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/cpsw_cpts_rft_clk@520"; > cpsw_125mhz_gclk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/cpsw_125mhz_gclk"; > sysclk_div_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/sysclk_div_ck"; > l4ls_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l4ls_gclk"; > l4fw_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l4fw_gclk"; > l3s_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l3s_gclk"; > l4hs_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l4hs_gclk"; > l4_rtc_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l4_rtc_gclk"; > wdt1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/wdt1_fck@538"; > ieee5000_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/ieee5000_fck@e4"; > dpll_core_m4_div2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_core_m4_div2_ck"; > usbotg_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/usbotg_fck@47c"; > timer7_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer7_fck@504"; > timer6_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer6_fck@51c"; > timer5_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer5_fck@518"; > timer4_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer4_fck@510"; > timer3_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer3_fck@50c"; > timer2_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer2_fck@508"; > timer1_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/timer1_fck@528"; > mmu_fck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/mmu_fck@914"; > pruss_ocp_gclk = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/pruss_ocp_gclk@530"; > l3_gclk = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/l3_gclk"; > clkdiv32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/clkdiv32k_ck"; > clk_24mhz = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/clk_24mhz"; > dpll_per_m2_div4_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_per_m2_div4_ck"; > dpll_per_m2_div4_wkupdm_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_per_m2_div4_wkupdm_ck"; > dpll_per_m2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_per_m2_ck@4ac"; > dpll_per_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/dpll_per_ck@48c"; > dpll_disp_m2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_disp_m2_ck@4a4"; > dpll_disp_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/dpll_disp_ck@498"; > dpll_ddr_m2_div2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_ddr_m2_div2_ck"; > dpll_ddr_m2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_ddr_m2_ck@4a0"; > dpll_ddr_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/dpll_ddr_ck@494"; > dpll_mpu_m2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_mpu_m2_ck@4a8"; > dpll_mpu_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/dpll_mpu_ck@488"; > dpll_core_m6_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_core_m6_ck@4d8"; > dpll_core_m5_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_core_m5_ck@484"; > dpll_core_m4_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_core_m4_ck@480"; > dpll_core_x2_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/dpll_core_x2_ck"; > dpll_core_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/dpll_core_ck@490"; > tclkin_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/tclkin_ck"; > virt_26000000_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/virt_26000000_ck"; > virt_25000000_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/virt_25000000_ck"; > virt_24000000_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/virt_24000000_ck"; > virt_19200000_ck = "/ocp/interconnect@44c00000/segment@200000 > /target-module@0/prcm@0/clocks/virt_19200000_ck"; > clk_rc32k_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/clk_rc32k_ck"; > clk_32768_ck = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks/clk_32768_ck"; > prcm_clocks = "/ocp/interconnect@44c00000/segment@200000/target-module@0 > /prcm@0/clocks"; > prcm = "/ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0"; > wkup_m3 = "/ocp/interconnect@44c00000/wkup_m3@100000"; > l4_wkup = "/ocp/interconnect@44c00000"; > cpu0_opp_table = "/opp-table"; > }; > }; > > > > > > > > > >