From owner-freebsd-smp Wed Jan 15 11:06:47 1997 Return-Path: Received: (from root@localhost) by freefall.freebsd.org (8.8.4/8.8.4) id LAA17565 for smp-outgoing; Wed, 15 Jan 1997 11:06:47 -0800 (PST) Received: from mail11.digital.com (mail11.digital.com [192.208.46.10]) by freefall.freebsd.org (8.8.4/8.8.4) with ESMTP id LAA17358 for ; Wed, 15 Jan 1997 11:03:32 -0800 (PST) Received: from muggsy.lkg.dec.com by mail11.digital.com (8.7.5/UNX 1.5/1.0/WV) id NAA11215; Wed, 15 Jan 1997 13:50:32 -0500 (EST) Received: from whydos.lkg.dec.com by muggsy.lkg.dec.com (5.65/DEC-Ultrix/4.3) with SMTP id AA08690; Wed, 15 Jan 1997 13:50:30 -0500 Received: from localhost.lkg.dec.com (localhost.lkg.dec.com [127.0.0.1]) by whydos.lkg.dec.com (8.6.12/8.6.12) with SMTP id OAA26586; Wed, 15 Jan 1997 14:57:51 GMT Message-Id: <199701151457.OAA26586@whydos.lkg.dec.com> X-Authentication-Warning: whydos.lkg.dec.com: Host localhost.lkg.dec.com didn't use HELO protocol X-Mailer: exmh version 1.6.5 12/11/95 To: Steve Passe Cc: smp@freebsd.org Subject: Re: Adaptec 3940UW and SMP In-Reply-To: Your message of "Wed, 15 Jan 1997 10:28:55 MST." <199701151728.KAA04559@clem.systemsix.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 15 Jan 1997 14:57:48 +0000 From: Matt Thomas Sender: owner-smp@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > > > > What is happening is a limitation of the PCI code. Each PCI slot has > > four interrupt lines (INTA .. INTD) and then are normally mapped into > > ISA IRQs. Since most PCI devices only use INTA, since means there is > > a simple one-to-one mapping. > > > > Introducing a PCI-PCI bridge means that INTB .. INTD will also be used. > > Devices behind the PPB get their INT lines rotated. This rotation is > > simple (take the device number, add it to the INTx, and AND with 3. > > 0=INTA 3=INTD). So ahc1 is using INTB and the PCI/APIC needs to how > > to map this INTB line into the APIC irq. > > I don't get to map anything, the MB manufacturer does that, I can only read > the MP table and use what it gives me. The MP table in question shows > no mapping for the ahc0/1 so they remain redirected thru the ISA bus. > Ie, I am expecting them to appear on the same vector levels on the APIC > as they appear on the 8259s. Could you expand on how the INTA/B/C/D > lines are handled when redirected via the ISA bus? Specifically, how > does the ahc1 INTB line get tied to the ISA INT line in a normal setup? What needs to be done is to call the PCI BIOS funtion to get the IRQ mapping. However, we don't use the PCI BIOS. I would expect the MP table to show a mapping between a PCI slot and its INT[A-D] lines to the APIC. So while the MP table doesn't have an entry for the ahc0/ahc1, it should have an entry for the PCI-PCI Bridge. Using that information, you can map the INTA line of ahc0 to INTA of ppb0 and INTA of ahc0 to INTB of ppb0. Traditionally, ahc1 INTA gets to an ISA INT by POST processing of the BIOS and the IRQ gets written into the one of the configuration registers of the device. The PCI code reads this register and uses the value; it does no setup since that was done by the BIOS. -- Matt Thomas Internet: matt@3am-software.com 3am Software Foundry WWW URL: http://www.3am-software.com/bio/matt.html Westford, MA Disclaimer: I disavow all knowledge of this message