From owner-freebsd-bugs@FreeBSD.ORG Sat Jun 6 08:50:04 2009 Return-Path: Delivered-To: freebsd-bugs@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 521E61065673 for ; Sat, 6 Jun 2009 08:50:04 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id AA4128FC16 for ; Sat, 6 Jun 2009 08:50:03 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (gnats@localhost [127.0.0.1]) by freefall.freebsd.org (8.14.3/8.14.3) with ESMTP id n568o3wH051679 for ; Sat, 6 Jun 2009 08:50:03 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.3/8.14.3/Submit) id n568o32j051678; Sat, 6 Jun 2009 08:50:03 GMT (envelope-from gnats) Date: Sat, 6 Jun 2009 08:50:03 GMT Message-Id: <200906060850.n568o32j051678@freefall.freebsd.org> To: freebsd-bugs@FreeBSD.org From: David Wood Cc: Subject: Re: kern/134878: [puc] [patch] Add support for Oxford OXPCIe954 and OXPCIe958 PCI Express chips X-BeenThere: freebsd-bugs@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: David Wood List-Id: Bug reports List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jun 2009 08:50:04 -0000 The following reply was made to PR kern/134878; it has been noted by GNATS. From: David Wood To: bug-followup@FreeBSD.org, david@wood2.org.uk, marcel@FreeBSD.org Cc: Subject: Re: kern/134878: [puc] [patch] Add support for Oxford OXPCIe954 and OXPCIe958 PCI Express chips Date: Sat, 6 Jun 2009 09:48:50 +0100 [marcel@ cc'd, as I believe he is maintaining puc(4)] I have updated the patches to: * Support the '2 native UARTs' configuration of the OXPCIe952 * Read the number of UARTs from BAR 0 (rid 0x10) offset 0x4, so boards with slave chips or some UARTs disabled by EEPROM are now fully supported. * Print the number of UARTs found. * Set the enhanced mode bit on each UART, so uart(4) detects them as 16950 and should make use of the deeper FIFOs. Apart from MSI-X support (which would be nice), all the features of these chips that are within the ambit of puc(4) rather than uart(4) are now supported. The Lindy 51189 board in my Dell PowerEdge 2950 III running 7.2-RELEASE amd64 with the patch applied appears as: boot (extract): puc0: mem 0xd5efc000-0xd5efffff,0xd5c00000-0xd5dfffff,0xd5a00000-0xd5bfffff irq 18 at device 0.0 on pci8 puc0: 4 UARTs detected puc0: [FILTER] uart0: <16950 or compatible> on puc0 uart0: [FILTER] uart1: <16950 or compatible> on puc0 uart1: [FILTER] uart2: <16950 or compatible> on puc0 uart2: [FILTER] uart3: <16950 or compatible> on puc0 uart3: [FILTER] pciconf -lcv (extract): puc0@pci0:8:0:0: class=0x070002 card=0xc2081415 chip=0xc2081415 rev=0x00 hdr=0x00 vendor = 'Oxford Semiconductor Ltd' class = simple comms subclass = UART cap 01[40] = powerspec 3 supports D0 D1 D2 D3 current D0 cap 10[70] = PCI-Express 1 endpoint cap 11[b0] = MSI-X supports 16 messages in map 0x14 Kernel configuration (partial): include GENERIC ident MANGANESE # SERIAL # Multi-port serial cards device puc # Disable sio(4) so that uart(4) is used nodevice sio The latest patches are in the same locations as the old ones: 7.2-RELEASE (tested): http://www.wood2.org.uk/freebsd/oxford-pci-e-pucdata.c.7.2-release.patch HEAD (untested): http://www.wood2.org.uk/freebsd/oxford-pci-e-pucdata.c.patch The old patches are still available - suffix the URLs with .old With best wishes, David -- David Wood david@wood2.org.uk