From owner-svn-src-head@freebsd.org Fri May 4 16:23:55 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1CCE7FB1771; Fri, 4 May 2018 16:23:55 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id C4A137F39C; Fri, 4 May 2018 16:23:54 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id BFADE11519; Fri, 4 May 2018 16:23:54 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w44GNs1T099966; Fri, 4 May 2018 16:23:54 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w44GNs6i099965; Fri, 4 May 2018 16:23:54 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201805041623.w44GNs6i099965@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Fri, 4 May 2018 16:23:54 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r333255 - head/sys/arm/freescale/imx X-SVN-Group: head X-SVN-Commit-Author: ian X-SVN-Commit-Paths: head/sys/arm/freescale/imx X-SVN-Commit-Revision: 333255 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 04 May 2018 16:23:55 -0000 Author: ian Date: Fri May 4 16:23:54 2018 New Revision: 333255 URL: https://svnweb.freebsd.org/changeset/base/333255 Log: Make reading imx6 gpio pins work correctly whether the pin is in open-drain mode or not. An earlier attempt to make this work was done in r320456, by always reading the pad status register (PSR) instead of the data register. But it turns out the values in PSR only reflect the electrical level of an output pin if the pad is configured with the SION (Set Input On) bit in the pinmux config, and most output gpio pads are not configured that way. So now a gpio read is done by returning the value from the data register, which works right whether the pin is configured for input or output, unless the pin has been set for OPENDRAIN mode, in which case the PSR is read instead. For this to work, the pin must also be configured with SION turned on in the fdt pinmux data, which is a reasonable thing to require for the unusual case of reading an open-drain output pin. Modified: head/sys/arm/freescale/imx/imx_gpio.c Modified: head/sys/arm/freescale/imx/imx_gpio.c ============================================================================== --- head/sys/arm/freescale/imx/imx_gpio.c Fri May 4 15:20:34 2018 (r333254) +++ head/sys/arm/freescale/imx/imx_gpio.c Fri May 4 16:23:54 2018 (r333255) @@ -644,7 +644,20 @@ imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigne if (pin >= sc->gpio_npins) return (EINVAL); - *val = (READ4(sc, IMX_GPIO_PSR_REG) >> pin) & 1; + /* + * Normally a pin set for output can be read by reading the DR reg which + * indicates what value is being driven to that pin. The exception is + * pins configured for open-drain mode, in which case we have to read + * the pad status register in case the pin is being driven externally. + * Doing so requires that the SION bit be configured in pinmux, which + * isn't the case for most normal gpio pins, so only try to read via PSR + * if the OPENDRAIN flag is set, and it's the user's job to correctly + * configure SION along with open-drain output mode for those pins. + */ + if (sc->gpio_pins[pin].gp_flags & GPIO_PIN_OPENDRAIN) + *val = (READ4(sc, IMX_GPIO_PSR_REG) >> pin) & 1; + else + *val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1; return (0); }