From owner-freebsd-arm@freebsd.org Mon Sep 18 20:42:38 2017 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D5DA0E05E5F for ; Mon, 18 Sep 2017 20:42:38 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-66.reflexion.net [208.70.210.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 85E4D7F3D0 for ; Mon, 18 Sep 2017 20:42:38 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 6805 invoked from network); 18 Sep 2017 20:42:37 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 18 Sep 2017 20:42:37 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.40.3) with SMTP; Mon, 18 Sep 2017 16:42:37 -0400 (EDT) Received: (qmail 14603 invoked from network); 18 Sep 2017 20:42:36 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 18 Sep 2017 20:42:36 -0000 Received: from [192.168.1.109] (c-67-170-167-181.hsd1.or.comcast.net [67.170.167.181]) by iron2.pdx.net (Postfix) with ESMTPSA id 4181DEC938A; Mon, 18 Sep 2017 13:42:36 -0700 (PDT) From: Mark Millard Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: Re: allwinner question: New CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG) for phyno !=0 vs. CLR4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG) before. . . Date: Mon, 18 Sep 2017 13:42:35 -0700 References: To: Emmanuel Vadot , freebsd-arm In-Reply-To: Message-Id: <5830ABC8-6544-4588-BDB6-483C2D1B3D3E@dsl-only.net> X-Mailer: Apple Mail (2.3273) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Sep 2017 20:42:38 -0000 On 2017-Sep-18, at 1:30 PM, Mark Millard wrote: > It probably just my ignorance of the code's intent > but for A64 it used to be that phyno ==1 had code > that did CLR4 for phyno==0 (hard coded): > > if (sc->phy_type == AWUSBPHY_TYPE_A64) { > CLR4(sc, phyno, PMU_UNK_H3, PMU_UNK_H3_CLR); > > /* EHCI0 and OTG share a PHY */ > if (phyno == 0) > SET4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); > else if (phyno == 1) > CLR4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); > } > > So: that last CLR4 manipulated phyno==0 as far as I can tell, > no matter what the passed-in phyno was. > > In the new code there seems to be no hook for phyno==1 > to manipulate phyno==0 similarly: > > if (sc->phy_conf->phy0_route == true) { > if (phyno == 0) > SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); > else > CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG); > } > > That CLR4 seems to be manipulating phyno==1 instead and > seems to have no means of doing otherwise. > > Was the old code wrong? May be I asked the reverse of the right question: that first CLR 4 in the old code varied by phyno but now always uses phy_ctrl: if (sc->phy_conf->pmu_unk1 == true) CLR4(sc->phy_ctrl, PMU_UNK_H3, PMU_UNK_H3_CLR); Overall one part or the other seems to be a mismatch with the old code for A64. === Mark Millard markmi at dsl-only.net