From owner-freebsd-mips@FreeBSD.ORG Fri May 17 17:45:38 2013 Return-Path: Delivered-To: freebsd-mips@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 3E8D6804 for ; Fri, 17 May 2013 17:45:38 +0000 (UTC) (envelope-from lists@rewt.org.uk) Received: from hosted.mx.as41113.net (hosted.mx.as41113.net [91.208.177.22]) by mx1.freebsd.org (Postfix) with ESMTP id 07299D70 for ; Fri, 17 May 2013 17:45:37 +0000 (UTC) Received: from [172.16.9.23] (bella.stf.rewt.org.uk [91.208.177.62]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: lists@rewt.org.uk) by hosted.mx.as41113.net (Postfix) with ESMTPSA id 3bBxjm40bgzs0; Fri, 17 May 2013 18:45:32 +0100 (BST) Message-ID: <51966CB6.2040701@rewt.org.uk> Date: Fri, 17 May 2013 18:45:26 +0100 From: Joe Holden User-Agent: Thunderbird 2.0.0.24 (Windows/20100228) MIME-Version: 1.0 To: Milan Obuch Subject: Re: Ubiquiti EdgeRouter Lite works multi-user with -CURRENT. References: <20130516111059.38543d57@wind.dino.sk> <20130516131642.adfae355aa3bf7767e9b56e5@ddteam.net> <20130516124248.33ae4e05@wind.dino.sk> <51952112.9010607@rewt.org.uk> <20130517192206.5db0533f@zeta.dino.sk> In-Reply-To: <20130517192206.5db0533f@zeta.dino.sk> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: Aleksandr Rybalko , freebsd-mips@freebsd.org X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 May 2013 17:45:38 -0000 Milan Obuch wrote: > On Thu, 16 May 2013 19:10:26 +0100, Joe Holden > wrote: > > [ snip ] > >>> for this quick test I used OCTEON1 kernel config with some necessary >>> tweaks, device gpio is commented out, maybe this will be enough for >>> enable octeon_gpio.c (looking at files.octeon1 it seems to be >>> possible). I will test it, definitely. >> There is only one pin exposed via gpio: >> >> root@erl1:~ # gpioctl -f /dev/gpioc0 -l -v >> pin 07: 0 F/D, caps: >> >> Not sure if it maps to anything usable, haven't played with it yet - >> the other header is EJTAG according to Cavium docs. > > I built new kernel with device gpio, something is not working - F/D > should mean 'factory default' aka 'reset switch', but it does not sense > status ot that switch. No matter whether pressed or not, gpioctl still > reports 0. > > Also, somehow strangely, in dmesg: > > gpio0: on ciu0 > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [GIANT-LOCKED] > gpio0: [pin0] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin1] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin2] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin3] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin4] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin5] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin6] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin7] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin8] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin9] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin10] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin11] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin12] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin13] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin14] output=0, invinput=0, intr=0, intr_type=level > gpio0: [pin15] output=0, invinput=0, intr=0, intr_type=level > gpioc0: on gpio0 > gpiobus0: on gpio0 > > GIANT-LOCKED line is there 16 times, once for every one from 16 pins - > why? > 16 possible pins on the controller? There is only one pin on the board, and that is the F/D button on the back. > Regards, > Milan