Skip site navigation (1)Skip section navigation (2)
Date:      Sat, 20 Jul 1996 23:10:08 +1000
From:      Bruce Evans <bde@zeta.org.au>
To:        bde@zeta.org.au, wong@wong.rogerswave.ca
Cc:        E00114@vnet.atea.be, freebsd-hardware@freebsd.org
Subject:   Re: Multiple COM ports with same IRQ
Message-ID:  <199607201310.XAA32484@godzilla.zeta.org.au>

next in thread | raw e-mail | index | archive | help
>> 16550 UARTs just generate signals that should work with either level or
>> edge sensitive schemes.  If the interrupts are still edge sensitive from
>> the 8259 PIC's point of view, then they can't be shared.
>     ^^^^^^^^^
>I thought all 8259 PIC can be programmed to use either edge or level.
>anyway at least mine said it does.

If it is programmed for level triggered interrupts, then all devices
have to generate IRQ signals that stay asserted while there is an IRQ.
Some don't.  I think at least MFM disk controllers usually assert IRQ
and pulse it low to cause an edge.  I think the 8254 clock in RATEGEN
(standard FreeBSD) mode is similar.

Perhaps more importantly, it must be possible to program the device to
stop it interrupting.  This is inconvenient for the 8254 clock.  In
SQWAVE (standard BIOS) mode it asserts IRQ half the time and there is
no good way to stop it interrupting half the time if interrupts are
level sensitive.

Bruce



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199607201310.XAA32484>