Date: Wed, 26 Jun 2019 21:43:41 +0000 (UTC) From: Alan Cox <alc@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r349442 - head/sys/arm64/arm64 Message-ID: <201906262143.x5QLhf6u015004@repo.freebsd.org>
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Author: alc Date: Wed Jun 26 21:43:41 2019 New Revision: 349442 URL: https://svnweb.freebsd.org/changeset/base/349442 Log: Revert one of the changes from r349323. Specifically, undo the change that replaced a pmap_invalidate_page() with a dsb(ishst) in pmap_enter_quick_locked(). Even though this change is in principle correct, I am seeing occasional, spurious bus errors that are only reproducible without this pmap_invalidate_page(). (None of adding an isb, "upgrading" the dsb to wait on loads as well as stores, or disabling superpage mappings eliminates the bus errors.) Add an XXX comment explaining why the pmap_invalidate_page() is being performed. Discussed with: andrew, markj Modified: head/sys/arm64/arm64/pmap.c Modified: head/sys/arm64/arm64/pmap.c ============================================================================== --- head/sys/arm64/arm64/pmap.c Wed Jun 26 21:19:43 2019 (r349441) +++ head/sys/arm64/arm64/pmap.c Wed Jun 26 21:43:41 2019 (r349442) @@ -3758,7 +3758,15 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, v cpu_icache_sync_range(PHYS_TO_DMAP(pa), PAGE_SIZE); pmap_load_store(l3, l3_val); - dsb(ishst); + + /* + * XXX In principle, because this L3 entry was invalid, we should not + * need to perform a TLB invalidation here. However, in practice, + * when simply performing a "dsb ishst" here, processes are being + * terminated due to bus errors and segmentation violations. + */ + pmap_invalidate_page(pmap, va); + return (mpte); }
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