Date: Fri, 20 Oct 1995 15:51:08 +0930 (CST) From: Michael Smith <msmith@atrad.adelaide.edu.au> To: davidg@Root.COM Cc: root@spiffy.cybernet.com, hackers@FreeBSD.org Subject: Re: Bragging rights.. Message-ID: <199510200621.PAA17640@genesis.atrad.adelaide.edu.au> In-Reply-To: <199510192337.QAA00227@corbin.Root.COM> from "David Greenman" at Oct 19, 95 04:37:01 pm
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David Greenman stands accused of saying: > >As a slightly interested party, I'd like to ask: > > > >As mentioned recently on -hackers, isn't it possilbe to up the rate of the serial > >chip simply by doubling (or quadding) the rate of the xtal driving the chip? > >Many (most?) 16550 chips should be able to handle a Fmax higher than they are being > >driven, and with 16 byte FIFOS (set to trigger at 14 bytes), the interrupt overhead > >would not necessarily be increased. > > > >Is the same xtal trick applicable to sync serial, to get 32 KBytes/second @256000 > >bits/sec (as opposed to 28.8 KBytes/sec async serial @230400 bits/sec)? > > Apparantly, *some* 16550 UARTs will do this, but as far as I know, this > would be overclocking most versions out there and might result in the part > overheating (or simply not working at 230K baud). The PC16550D (The "reference" part for 16550's) is specified to a 24MHz input clock. The standard clock reference for this part in a PC is 1.8MHz. Decent serial card vendors (eg. Quatech) offer jumper-selectable clock dividers to allow you to pick your desired clock rate. I would have a hard time believing that a modern CMOS '550 clone wouldn't handle a 3.6MHz input clock. Regardless, the question was about sync serial speeds. You don't do sync with a '550, so the point is moot. > -DG -- ]] Mike Smith, Software Engineer msmith@atrad.adelaide.edu.au [[ ]] Genesis Software genesis@atrad.adelaide.edu.au [[ ]] High-speed data acquisition and [[ ]] realtime instrument control (ph/fax) +61-8-267-3039 [[ ]] My car has "demand start" -Terry Lambert UNIX: live FreeBSD or die! [[
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