From owner-freebsd-alpha@FreeBSD.ORG Thu Aug 7 12:10:22 2003 Return-Path: Delivered-To: freebsd-alpha@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 6D76837B401; Thu, 7 Aug 2003 12:10:22 -0700 (PDT) Received: from zmamail05.zma.compaq.com (mailout.zma.compaq.com [161.114.64.105]) by mx1.FreeBSD.org (Postfix) with ESMTP id 9238743F85; Thu, 7 Aug 2003 12:10:21 -0700 (PDT) (envelope-from peter.portante@hp.com) Received: from tayexg12.americas.cpqcorp.net (tayexg12.americas.cpqcorp.net [16.103.130.103]) by zmamail05.zma.compaq.com (Postfix) with ESMTP id A1E7AB1AA; Thu, 7 Aug 2003 15:10:16 -0400 (EDT) Received: from tayexc17.americas.cpqcorp.net ([16.103.130.15]) by tayexg12.americas.cpqcorp.net with Microsoft SMTPSVC(5.0.2195.6673); Thu, 7 Aug 2003 15:10:16 -0400 X-MimeOLE: Produced By Microsoft Exchange V6.0.6375.0 content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Date: Thu, 7 Aug 2003 15:10:15 -0400 Message-ID: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Atomic swap Thread-Index: AcNdFuXivOgvVZlLTO+gkyfdPCLCkAAACCLE From: "Portante, Peter" To: X-OriginalArrivalTime: 07 Aug 2003 19:10:16.0537 (UTC) FILETIME=[89488C90:01C35D17] cc: alpha@freebsd.org cc: Marcel Moolenaar Subject: RE: Atomic swap X-BeenThere: freebsd-alpha@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Porting FreeBSD to the Alpha List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Aug 2003 19:10:22 -0000 Dan, > ---------- > From: Daniel Eischen > Reply To: deischen@freebsd.org > Sent: Thursday, August 7, 2003 3:05 PM > To: Marcel Moolenaar > Cc: Portante, Peter; alpha@freebsd.org; deischen@freebsd.org > Subject: Re: Atomic swap >=20 > On Thu, 7 Aug 2003, Marcel Moolenaar wrote: >=20 > > On Thu, Aug 07, 2003 at 01:44:18PM -0400, Daniel Eischen wrote: > > > How about this? > > >=20 > > > static __inline void > > > atomic_swap_long(volatile long *dst, long val, long *res) > > > { > > > u_int64_t result, temp; > > >=20 > > > __asm __volatile ( > > > "1:\tldq %1, %3\n\t" /* load value to store */ > > > "ldq_l %0, %2\n\t" /* load current value, asserting lock */ > > > "stq_c %1, %2\n\t" /* attempt to store */ > > > "beq %1, 2f\n\t" /* if the store failed, spin */ > > > "br 3f\n" /* it worked, exit */ > > > "2:\tbr 1b\n" /* *dst not updated, loop */ > > > "3:\n" /* it worked */ > > > : "=3D&r" (result), "=3D&r" (temp) > > > : "m" (*dst), "m" (val) > > > : "memory"); > > >=20 > > > *res =3D result; > > > } > >=20 > > The first instruction is wrong. "val" isn't memory. Also, > > forget about the branch prediction optimization. It just > > makes the code unreadable and we don't even know if it > > makes a difference. > >=20 > > The following has been written down without testing (I > > dropped the cosmetic \t and instead indented by hand to > > make the source code readable, not what is given to the > > assembler (per se): > >=20 > > static __inline void > > atomic_swap_long(volatile long *dst, long val, long *res) > > { > > __asm ( "1: ldq_l t0,%0\n" > > " mov %1,t1\n" >=20 > If I swap the first 2 instructions: >=20 > __asm ( "1: mov %1,t1\n" > ldq_l t0,%0\n" >=20 > that eliminates 1 instruction from between the locked > instructions. Is there anything wrong with doing that? >=20 Actually, the processor has a chance to do something while waiting for = memory, so it does not hurt to have the mov inside the ldq_l/stq_c pair. -Peter