From owner-svn-src-head@freebsd.org Fri May 5 16:40:47 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 331B2D5FDBE; Fri, 5 May 2017 16:40:47 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E733F182F; Fri, 5 May 2017 16:40:46 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v45GejBf049042; Fri, 5 May 2017 16:40:45 GMT (envelope-from emaste@FreeBSD.org) Received: (from emaste@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v45Gej6c049041; Fri, 5 May 2017 16:40:45 GMT (envelope-from emaste@FreeBSD.org) Message-Id: <201705051640.v45Gej6c049041@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: emaste set sender to emaste@FreeBSD.org using -f From: Ed Maste Date: Fri, 5 May 2017 16:40:45 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r317835 - head/share/man/man7 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 May 2017 16:40:47 -0000 Author: emaste Date: Fri May 5 16:40:45 2017 New Revision: 317835 URL: https://svnweb.freebsd.org/changeset/base/317835 Log: arch(7): add a table of per-arch initial/final FreeBSD version Reviewed by: kib, wblock Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D10573 Modified: head/share/man/man7/arch.7 Modified: head/share/man/man7/arch.7 ============================================================================== --- head/share/man/man7/arch.7 Fri May 5 16:24:35 2017 (r317834) +++ head/share/man/man7/arch.7 Fri May 5 16:40:45 2017 (r317835) @@ -37,6 +37,9 @@ Differences between CPU architectures an .Fx . .Ss Introduction If not explicitly mentioned, sizes are in bytes. +The architecture details in this document apply to +.Fx 10.0 +and later, unless otherwise noted. .Pp FreeBSD uses flat address space for program execution, where pointers have the same binary representation as @@ -72,6 +75,42 @@ The kernel is located at the highest add .Pp On each architecture, the main user mode thread's stack starts near the highest user address and grows down. +.Pp +.Fx +architecture support varies by release. +This table shows the first +.Fx +release to support each architecture, and, for discontinued +architectures, the final release. +.Pp +.Bl -column -offset indent "Sy Architecture" "Sy Initial Release" "Sy Final Release" +.It Sy Architecture Ta Sy Initial Release Ta Sy Final Release +.It alpha Ta 1.0 Ta 6.4 +.It amd64 Ta 5.1 +.It arm Ta 6.0 +.It armeb Ta 8.0 +.It armv6 Ta 10.0 +.It arm64 Ta 11.0 +.It ia64 Ta 5.0 Ta 10.x +.It i386 Ta 1.0 +.It mips Ta 8.0 +.It mipsel Ta 9.0 +.It mipselhf Ta 12.0 +.It mipshf Ta 12.0 +.It mipsn32 Ta 9.0 +.It mips64 Ta 9.0 +.It mips64el Ta 9.0 +.It mips64elhf Ta 12.0 +.It mips64hf Ta 12.0 +.It pc98 Ta 5.0 Ta 11.x +.It powerpc Ta 6.0 +.It powerpcspe Ta 12.0 +.It powerpc64 Ta 6.0 +.It riscv64 Ta 12.0 +.It riscv64sf Ta 12.0 +.It sparc64 Ta 5.0 +.El + .Ss Type sizes All FreeBSD architectures use some variant of the ELF (see .Xr elf 5 ) @@ -220,7 +259,7 @@ variants of powerpc. .It amd64 Ta hard Ta hard, 80 bit .It arm Ta soft Ta soft, double precision .It armeb Ta soft Ta soft, double precision -.It armv6 Ta hard Ta hard, double precision +.It armv6 Ta hard(1) Ta hard, double precision .It arm64 Ta hard Ta soft, quad precision .It i386 Ta hard Ta hard, 80 bit .It mips Ta soft Ta identical to double @@ -239,6 +278,11 @@ variants of powerpc. .It riscv64sf Ta soft Ta soft, double precision .It sparc64 Ta hard Ta hard, quad precision .El +.Pp +(1) Prior to +.Fx 11.0 , +armv6 used the softfp ABI even though it supported only processors +with a floating point unit. .Ss Predefined Macros The compiler provides a number of predefined macros. Some of these provide architecture-specific details and are explained below.