From owner-svn-src-all@FreeBSD.ORG Thu Jan 8 13:20:29 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2A42B106566B; Thu, 8 Jan 2009 13:20:29 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 175628FC1C; Thu, 8 Jan 2009 13:20:29 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n08DKSZ6023488; Thu, 8 Jan 2009 13:20:28 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n08DKS0w023483; Thu, 8 Jan 2009 13:20:28 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <200901081320.n08DKS0w023483@svn.freebsd.org> From: Rafal Jaworowski Date: Thu, 8 Jan 2009 13:20:28 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r186899 - in head/sys/arm/mv: . discovery kirkwood orion X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 08 Jan 2009 13:20:30 -0000 Author: raj Date: Thu Jan 8 13:20:28 2009 New Revision: 186899 URL: http://svn.freebsd.org/changeset/base/186899 Log: Adjust Marvell SOC support for A0 chip revision. - Clean up TCLK handling so that it's dynamically recognized depending on registers settings or chip version/revision. Update registers definitions. - Teach SOC ident routine about A0 (initial silicon version for general audience) Obtained from: Marvell, Semihalf Modified: head/sys/arm/mv/common.c head/sys/arm/mv/discovery/discovery.c head/sys/arm/mv/kirkwood/kirkwood.c head/sys/arm/mv/mvreg.h head/sys/arm/mv/orion/orion.c Modified: head/sys/arm/mv/common.c ============================================================================== --- head/sys/arm/mv/common.c Thu Jan 8 12:49:55 2009 (r186898) +++ head/sys/arm/mv/common.c Thu Jan 8 13:20:28 2009 (r186899) @@ -104,17 +104,6 @@ soc_power_ctrl_get(uint32_t mask) return (mask); } -uint32_t -get_tclk(void) -{ - -#if defined(SOC_MV_DISCOVERY) - return (TCLK_200MHZ); -#else - return (TCLK_166MHZ); -#endif -} - void soc_id(uint32_t *dev, uint32_t *rev) { @@ -165,6 +154,10 @@ soc_identify(void) break; case MV_DEV_88F6281: dev = "Marvell 88F6281"; + if (r == 0) + rev = "Z0"; + else if (r == 2) + rev = "A0"; break; case MV_DEV_MV78100: dev = "Marvell MV78100"; Modified: head/sys/arm/mv/discovery/discovery.c ============================================================================== --- head/sys/arm/mv/discovery/discovery.c Thu Jan 8 12:49:55 2009 (r186898) +++ head/sys/arm/mv/discovery/discovery.c Thu Jan 8 13:20:28 2009 (r186899) @@ -226,3 +226,25 @@ const struct decode_win idma_win_tbl[] = }; const struct decode_win *idma_wins = idma_win_tbl; int idma_wins_no = sizeof(idma_win_tbl) / sizeof(struct decode_win); + +uint32_t +get_tclk(void) +{ + uint32_t sar; + + /* + * On Discovery TCLK is can be configured to 166 MHz or 200 MHz. + * Current setting is read from Sample At Reset register. + */ + sar = bus_space_read_4(obio_tag, MV_MPP_BASE, SAMPLE_AT_RESET_HI); + sar = (sar & TCLK_MASK) >> TCLK_SHIFT; + + switch (sar) { + case 0: + return (TCLK_166MHZ); + case 1: + return (TCLK_200MHZ); + default: + panic("Unknown TCLK settings!"); + } +} Modified: head/sys/arm/mv/kirkwood/kirkwood.c ============================================================================== --- head/sys/arm/mv/kirkwood/kirkwood.c Thu Jan 8 12:49:55 2009 (r186898) +++ head/sys/arm/mv/kirkwood/kirkwood.c Thu Jan 8 13:20:28 2009 (r186899) @@ -150,3 +150,21 @@ const struct decode_win cpu_win_tbl[] = }; const struct decode_win *cpu_wins = cpu_win_tbl; int cpu_wins_no = sizeof(cpu_win_tbl) / sizeof(struct decode_win); + +uint32_t +get_tclk(void) +{ + uint32_t dev, rev; + + /* + * On Kirkwood TCLK is not configurable and depends on silicon + * revision: + * - A0 has TCLK hardcoded to 200 MHz. + * - Z0 and others have TCLK hardcoded to 166 MHz. + */ + soc_id(&dev, &rev); + if (dev == MV_DEV_88F6281 && rev == 2) + return (TCLK_200MHZ); + + return (TCLK_166MHZ); +} Modified: head/sys/arm/mv/mvreg.h ============================================================================== --- head/sys/arm/mv/mvreg.h Thu Jan 8 12:49:55 2009 (r186898) +++ head/sys/arm/mv/mvreg.h Thu Jan 8 13:20:28 2009 (r186899) @@ -405,15 +405,29 @@ /* * MPP */ +#if defined(SOC_MV_ORION) #define MPP_CONTROL0 0x00 #define MPP_CONTROL1 0x04 #define MPP_CONTROL2 0x50 -#define DEVICE_MULTIPLEX 0x08 +#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) +#define MPP_CONTROL0 0x00 +#define MPP_CONTROL1 0x04 +#define MPP_CONTROL2 0x08 +#define MPP_CONTROL3 0x0C +#define MPP_CONTROL4 0x10 +#define MPP_CONTROL5 0x14 +#define MPP_CONTROL6 0x18 +#else +#error SOC_MV_XX not defined +#endif #if defined(SOC_MV_ORION) #define SAMPLE_AT_RESET 0x10 -#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) +#elif defined(SOC_MV_KIRKWOOD) #define SAMPLE_AT_RESET 0x30 +#elif defined(SOC_MV_DISCOVERY) +#define SAMPLE_AT_RESET_LO 0x30 +#define SAMPLE_AT_RESET_HI 0x34 #else #error SOC_MV_XX not defined #endif @@ -421,14 +435,12 @@ /* * Clocks */ -#ifdef SOC_MV_ORION -#define TCLK_MASK 0x300 -#define TCLK_SHIFT 0x8 -#elif defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY) -#define TCLK_MASK 0x30000 -#define TCLK_SHIFT 0x10 -#else -#error SOC_MV_XX not defined +#if defined(SOC_MV_ORION) +#define TCLK_MASK 0x00000300 +#define TCLK_SHIFT 0x08 +#elif defined(SOC_MV_DISCOVERY) +#define TCLK_MASK 0x00000180 +#define TCLK_SHIFT 0x07 #endif #define TCLK_100MHZ 100000000 Modified: head/sys/arm/mv/orion/orion.c ============================================================================== --- head/sys/arm/mv/orion/orion.c Thu Jan 8 12:49:55 2009 (r186898) +++ head/sys/arm/mv/orion/orion.c Thu Jan 8 13:20:28 2009 (r186899) @@ -167,3 +167,24 @@ const struct decode_win idma_win_tbl[] = }; const struct decode_win *idma_wins = idma_win_tbl; int idma_wins_no = sizeof(idma_win_tbl) / sizeof(struct decode_win); + +uint32_t +get_tclk(void) +{ + uint32_t sar; + + /* + * On Orion TCLK is can be configured to 150 MHz or 166 MHz. + * Current setting is read from Sample At Reset register. + */ + sar = bus_space_read_4(obio_tag, MV_MPP_BASE, SAMPLE_AT_RESET); + sar = (sar & TCLK_MASK) >> TCLK_SHIFT; + switch (sar) { + case 1: + return (TCLK_150MHZ); + case 2: + return (TCLK_166MHZ); + default: + panic("Unknown TCLK settings!"); + } +}