From owner-svn-src-stable-9@FreeBSD.ORG Thu Dec 5 21:49:42 2013 Return-Path: Delivered-To: svn-src-stable-9@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 27CF42D7; Thu, 5 Dec 2013 21:49:42 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id EDD871ECE; Thu, 5 Dec 2013 21:49:41 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rB5LnfoA012516; Thu, 5 Dec 2013 21:49:41 GMT (envelope-from dim@svn.freebsd.org) Received: (from dim@localhost) by svn.freebsd.org (8.14.7/8.14.7/Submit) id rB5Lnfh5012514; Thu, 5 Dec 2013 21:49:41 GMT (envelope-from dim@svn.freebsd.org) Message-Id: <201312052149.rB5Lnfh5012514@svn.freebsd.org> From: Dimitry Andric Date: Thu, 5 Dec 2013 21:49:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r259011 - stable/9/contrib/llvm/lib/Transforms/InstCombine X-SVN-Group: stable-9 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-9@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for only the 9-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Dec 2013 21:49:42 -0000 Author: dim Date: Thu Dec 5 21:49:41 2013 New Revision: 259011 URL: http://svnweb.freebsd.org/changeset/base/259011 Log: MFC r255076: Pull in r189672 from upstream llvm trunk: InstCombine: Check for zero shift amounts before subtracting one causing integer overflow. PR17026. Also avoid undefined shifts and shift amounts larger than 64 bits (those are always undef because we can't represent integer types that large). This should fix assertion failures when building the emulators/xmame port. Reported by: bapt Modified: stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Directory Properties: stable/9/contrib/llvm/ (props changed) Modified: stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp ============================================================================== --- stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu Dec 5 21:49:14 2013 (r259010) +++ stable/9/contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu Dec 5 21:49:41 2013 (r259011) @@ -845,21 +845,26 @@ Value *InstCombiner::SimplifyDemandedUse Value *InstCombiner::SimplifyShrShlDemandedBits(Instruction *Shr, Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) { - unsigned ShlAmt = cast(Shl->getOperand(1))->getZExtValue(); - unsigned ShrAmt = cast(Shr->getOperand(1))->getZExtValue(); + const APInt &ShlOp1 = cast(Shl->getOperand(1))->getValue(); + const APInt &ShrOp1 = cast(Shr->getOperand(1))->getValue(); + if (!ShlOp1 || !ShrOp1) + return 0; // Noop. + + Value *VarX = Shr->getOperand(0); + Type *Ty = VarX->getType(); + unsigned BitWidth = Ty->getIntegerBitWidth(); + if (ShlOp1.uge(BitWidth) || ShrOp1.uge(BitWidth)) + return 0; // Undef. + + unsigned ShlAmt = ShlOp1.getZExtValue(); + unsigned ShrAmt = ShrOp1.getZExtValue(); KnownOne.clearAllBits(); KnownZero = APInt::getBitsSet(KnownZero.getBitWidth(), 0, ShlAmt-1); KnownZero &= DemandedMask; - if (ShlAmt == 0 || ShrAmt == 0) - return 0; - - Value *VarX = Shr->getOperand(0); - Type *Ty = VarX->getType(); - - APInt BitMask1(APInt::getAllOnesValue(Ty->getIntegerBitWidth())); - APInt BitMask2(APInt::getAllOnesValue(Ty->getIntegerBitWidth())); + APInt BitMask1(APInt::getAllOnesValue(BitWidth)); + APInt BitMask2(APInt::getAllOnesValue(BitWidth)); bool isLshr = (Shr->getOpcode() == Instruction::LShr); BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) :