From owner-svn-src-releng@freebsd.org Thu Oct 3 16:22:56 2019 Return-Path: Delivered-To: svn-src-releng@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id C19EC13A8F1; Thu, 3 Oct 2019 16:22:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46kdb44fqgz4LZn; Thu, 3 Oct 2019 16:22:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 8440BECD8; Thu, 3 Oct 2019 16:22:56 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x93GMuTP011066; Thu, 3 Oct 2019 16:22:56 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x93GMuAt011065; Thu, 3 Oct 2019 16:22:56 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201910031622.x93GMuAt011065@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Thu, 3 Oct 2019 16:22:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-releng@freebsd.org Subject: svn commit: r353053 - releng/12.1/contrib/llvm/lib/Target/X86 X-SVN-Group: releng X-SVN-Commit-Author: dim X-SVN-Commit-Paths: releng/12.1/contrib/llvm/lib/Target/X86 X-SVN-Commit-Revision: 353053 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-releng@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the release engineering / security commits to the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 03 Oct 2019 16:22:56 -0000 Author: dim Date: Thu Oct 3 16:22:56 2019 New Revision: 353053 URL: https://svnweb.freebsd.org/changeset/base/353053 Log: Merge r353031 from stable/12: Pull in r357528 from upstream llvm trunk (by Craig Topper): [X86] Check MI.isConvertibleTo3Addr() before calling convertToThreeAddress in X86FixupLEAs. X86FixupLEAs just assumes convertToThreeAddress will return nullptr for any instruction that isn't convertible. But the code in convertToThreeAddress for X86 assumes that any instruction coming in has at least 2 operands and that the second one is a register. But those properties aren't guaranteed of all instructions. We should check the instruction property first. Pull in r365720 from upstream llvm trunk (by Craig Topper): [X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass. We use the functions that convert to three address to do the conversion, but changing an 8 or 16 bit will cause it to create a virtual register. This can't be done after register allocation where this pass runs. I've switched the pass completely to a white list of instructions that can be converted to LEA instead of a blacklist that was incorrect. This will avoid surprises if we enhance the three address conversion function to include additional instructions in the future. Fixes PR42565. This should fix assertions/segfaults when compiling certain ports with CPUTYPE=atom. Approved by: re (kib) PR: 240928 Modified: releng/12.1/contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp Directory Properties: releng/12.1/ (props changed) Modified: releng/12.1/contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp ============================================================================== --- releng/12.1/contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp Thu Oct 3 15:23:38 2019 (r353052) +++ releng/12.1/contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp Thu Oct 3 16:22:56 2019 (r353053) @@ -154,6 +154,15 @@ FixupLEAPass::postRAConvertToLEA(MachineFunction::iter MFI->insert(MBBI, NewMI); // Insert the new inst return NewMI; } + } + + if (!MI.isConvertibleTo3Addr()) + return nullptr; + + switch (MI.getOpcode()) { + default: + // Only convert instructions that we've verified are safe. + return nullptr; case X86::ADD64ri32: case X86::ADD64ri8: case X86::ADD64ri32_DB: @@ -162,24 +171,24 @@ FixupLEAPass::postRAConvertToLEA(MachineFunction::iter case X86::ADD32ri8: case X86::ADD32ri_DB: case X86::ADD32ri8_DB: - case X86::ADD16ri: - case X86::ADD16ri8: - case X86::ADD16ri_DB: - case X86::ADD16ri8_DB: if (!MI.getOperand(2).isImm()) { // convertToThreeAddress will call getImm() // which requires isImm() to be true return nullptr; } break; - case X86::ADD16rr: - case X86::ADD16rr_DB: - if (MI.getOperand(1).getReg() != MI.getOperand(2).getReg()) { - // if src1 != src2, then convertToThreeAddress will - // need to create a Virtual register, which we cannot do - // after register allocation. - return nullptr; - } + case X86::SHL64ri: + case X86::SHL32ri: + case X86::INC64r: + case X86::INC32r: + case X86::DEC64r: + case X86::DEC32r: + case X86::ADD64rr: + case X86::ADD64rr_DB: + case X86::ADD32rr: + case X86::ADD32rr_DB: + // These instructions are all fine to convert. + break; } return TII->convertToThreeAddress(MFI, MI, nullptr); }