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Date:      Fri, 5 Dec 2008 19:53:12 +0000 (UTC)
From:      John Baldwin <jhb@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-6@freebsd.org
Subject:   svn commit: r185645 - in stable/6/sys: . dev/mii
Message-ID:  <200812051953.mB5JrCmP071495@svn.freebsd.org>

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Author: jhb
Date: Fri Dec  5 19:53:12 2008
New Revision: 185645
URL: http://svn.freebsd.org/changeset/base/185645

Log:
  MFC: Support for the IC Plus IP101 10/100 PHY and Vitesse VSC8601 PHY that
  are found on some nvidia parts.
  
  Suggested by:	yongari

Modified:
  stable/6/sys/   (props changed)
  stable/6/sys/dev/mii/ciphy.c
  stable/6/sys/dev/mii/ciphyreg.h
  stable/6/sys/dev/mii/miidevs
  stable/6/sys/dev/mii/rlphy.c

Modified: stable/6/sys/dev/mii/ciphy.c
==============================================================================
--- stable/6/sys/dev/mii/ciphy.c	Fri Dec  5 17:44:26 2008	(r185644)
+++ stable/6/sys/dev/mii/ciphy.c	Fri Dec  5 19:53:12 2008	(r185645)
@@ -93,6 +93,7 @@ static const struct mii_phydesc ciphys[]
 	MII_PHY_DESC(CICADA, CS8201),
 	MII_PHY_DESC(CICADA, CS8201A),
 	MII_PHY_DESC(CICADA, CS8201B),
+	MII_PHY_DESC(VITESSE, VSC8601),
 	MII_PHY_END
 };
 
@@ -356,11 +357,28 @@ ciphy_fixup(struct mii_softc *sc)
 {
 	uint16_t		model;
 	uint16_t		status, speed;
+	uint16_t		val;
 
 	model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
 	status = PHY_READ(sc, CIPHY_MII_AUXCSR);
 	speed = status & CIPHY_AUXCSR_SPEED;
 
+	if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
+	    "nfe") == 0) {
+		/* need to set for 2.5V RGMII for NVIDIA adapters */
+		val = PHY_READ(sc, CIPHY_MII_ECTL1);
+		val &= ~(CIPHY_ECTL1_IOVOL | CIPHY_ECTL1_INTSEL);
+		val |= (CIPHY_IOVOL_2500MV | CIPHY_INTSEL_RGMII);
+		PHY_WRITE(sc, CIPHY_MII_ECTL1, val);
+		/* From Linux. */
+		val = PHY_READ(sc, CIPHY_MII_AUXCSR);
+		val |= CIPHY_AUXCSR_MDPPS;
+		PHY_WRITE(sc, CIPHY_MII_AUXCSR, val);
+		val = PHY_READ(sc, CIPHY_MII_10BTCSR);
+		val |= CIPHY_10BTCSR_ECHO;
+		PHY_WRITE(sc, CIPHY_MII_10BTCSR, val);
+	}
+
 	switch (model) {
 	case MII_MODEL_CICADA_CS8201:
 
@@ -398,6 +416,8 @@ ciphy_fixup(struct mii_softc *sc)
 		}
 
 		break;
+	case MII_MODEL_VITESSE_VSC8601:
+		break;
 	default:
 		device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
 		    model);

Modified: stable/6/sys/dev/mii/ciphyreg.h
==============================================================================
--- stable/6/sys/dev/mii/ciphyreg.h	Fri Dec  5 17:44:26 2008	(r185644)
+++ stable/6/sys/dev/mii/ciphyreg.h	Fri Dec  5 19:53:12 2008	(r185645)
@@ -251,6 +251,16 @@
 /* Extended PHY control register #1 */
 #define CIPHY_MII_ECTL1		0x17
 #define CIPHY_ECTL1_ACTIPHY	0x0020	/* Enable ActiPHY power saving */
+#define CIPHY_ECTL1_IOVOL	0x0e00	/* MAC interface and I/O voltage select */
+#define CIPHY_ECTL1_INTSEL	0xf000	/* select MAC interface */
+
+#define CIPHY_IOVOL_3300MV	0x0000	/* 3.3V for I/O pins */
+#define CIPHY_IOVOL_2500MV	0x0200	/* 2.5V for I/O pins */
+
+#define CIPHY_INTSEL_GMII	0x0000	/* GMII/MII */
+#define CIPHY_INTSEL_RGMII	0x1000
+#define CIPHY_INTSEL_TBI	0x2000
+#define CIPHY_INTSEL_RTBI	0x3000
 
 /* Extended PHY control register #2 */
 #define CIPHY_MII_ECTL2		0x18

Modified: stable/6/sys/dev/mii/miidevs
==============================================================================
--- stable/6/sys/dev/mii/miidevs	Fri Dec  5 17:44:26 2008	(r185644)
+++ stable/6/sys/dev/mii/miidevs	Fri Dec  5 19:53:12 2008	(r185645)
@@ -68,6 +68,7 @@ oui SEEQ			0x00a07d	Seeq
 oui SIS				0x00e006	Silicon Integrated Systems
 oui TDK				0x00c039	TDK
 oui TI				0x080028	Texas Instruments
+oui VITESSE			0x0001c1	Vitesse Semiconductor
 oui XAQTI			0x00e0ae	XaQti Corp.
 oui MARVELL			0x005043	Marvell Semiconductor
 oui xxMARVELL			0x000ac2	Marvell Semiconductor
@@ -143,6 +144,7 @@ model BROADCOM2 BCM5906		0x0004 BCM5906 
 model CICADA CS8201		0x0001 Cicada CS8201 10/100/1000TX PHY
 model CICADA CS8201A		0x0020 Cicada CS8201 10/100/1000TX PHY
 model CICADA CS8201B		0x0021 Cicada CS8201 10/100/1000TX PHY
+model VITESSE VSC8601		0x0002 Vitesse VSC8601 10/100/1000TX PHY
 
 /* Davicom Semiconductor PHYs */
 model DAVICOM DM9102		0x0004 DM9102 10/100 media interface
@@ -155,6 +157,7 @@ model xxICS 1892		0x0003 ICS1892 10/100 
 model xxICS 1893		0x0004 ICS1893 10/100 media interface
 
 /* IC Plus Corp. PHYs */
+model ICPLUS IP101		0x0005 IC Plus 10/100 PHY
 model ICPLUS IP1000A		0x0008 IC Plus 10/100/1000 media interface
 model ICPLUS IP1001		0x0019 IC Plus IP1001 10/100/1000 media interface
 

Modified: stable/6/sys/dev/mii/rlphy.c
==============================================================================
--- stable/6/sys/dev/mii/rlphy.c	Fri Dec  5 17:44:26 2008	(r185644)
+++ stable/6/sys/dev/mii/rlphy.c	Fri Dec  5 19:53:12 2008	(r185645)
@@ -93,6 +93,7 @@ static const struct mii_phydesc rlintphy
 
 static const struct mii_phydesc rlphys[] = {
 	MII_PHY_DESC(REALTEK, RTL8201L),
+	MII_PHY_DESC(ICPLUS, IP101),
 	MII_PHY_END
 };
 



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