Date: Thu, 26 Sep 2002 15:54:00 -0700 (PDT) From: "Justin T. Gibbs" <gibbs@FreeBSD.org> To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/dev/aic7xxx aic79xx.c aic79xx.h aic79xx.reg aic79xx.seq aic79xx_inline.h aic79xx_pci.c Message-ID: <200209262254.g8QMs0re050223@freefall.freebsd.org>
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gibbs 2002/09/26 15:54:00 PDT
Modified files:
sys/dev/aic7xxx aic79xx.c aic79xx.h aic79xx.reg
aic79xx.seq aic79xx_inline.h
aic79xx_pci.c
Log:
Upgrade to version 1.1 of the aic79xx U320 driver.
aic79xx.c:
o Remove redundant ahd_update_modes() call.
o Correct panic in diagnostic should state corruption cause
the SCB Id to be invalid during a selection timeout.
o Add workaround for missing BUSFREEREV feature in Rev A silicon.
o Corect formatting nits.
o Use register pretty printing in more places.
o Save and restore our SCB pointer when updating the waiting queue
list for an "expected" LQ-out busfree.
o In ahd_clear_intstat, deal with the missing autoclear in the
CLRLQO* registers.
o BE fixup in a diagnostic printf.
o Make sure that we are in the proper mode before disabling
selections in ahd_update_pending_scbs.
o Add more diagnostics.
o task_attribute_nonpkt_tag -> task_attribute: we don't need a
nonpkt_tag field anymore for allowing all 512 SCBs to be
used in non-packetized connections.
o Negotiate HOLD_MCS to U320 devices.
o Add a few additional mode assertions.
o Restore the chip mode after clearing out the qinfifo so that
code using ahd_abort_scbs sees a consistent mode.
o Simplify the DMA engine shutdown routine prior to performing
a bus reset.
o Perform the sequencer restart after a chip reset prior to
setting up our timer to poll for the reset to be complete.
On some OSes, the timer could actually pre-empt us and order
is important here.
o Have our "reset poller" set the expected mode since there is
no guarantee of what mode will be in force when we are called
from the OS timer.
o Save and restore the SCB pointer in ahd_dump_card_state(). This
routine must not modify card state.
o Ditto for ahd_dump_scbs().
aic79xx.h:
o Add a few more chip bug definitions.
o Align our tag on a 32bit boundary.
aic79xx.reg:
aic79xx.seq:
o Start work on removing workarounds for Rev B.
o Use a special location in scratch from for stroring
our SCBPTR during legacy FIFO allocations. This corrects
problems in mixed packetized/non-packetized configurations
where calling into a FIFO task corrupted our SCBPTR.
o Don't rely on DMA priority to guarantee that all data in
our FIFOs will flush prior to a command completion notification
going out of the command channel. We've never seen this assumption
fail, but better safe than sorry.
o Deal with missing BUSFREEREV feature in H2A.
o Simplify disconnect list code now that the list will always
have only a single entry.
o Implement the AHD_REG_SLOW_SETTLE_BUG workaround.
o Swith to using "REG_ISR" for local mode scratch during
our ISR.
o Add a missing jmp to the data_group_dma_loop after our
data pointers have been re-initialized by the kernel.
o Correct test in the bitbucket code so that we actually
wait for the bitbucket to complete before signaling the
kernel of the overrun condition.
o Reposition pkt_saveptrs to avoid a jmp instruction.
o Update a comment to reflect that the code now waits for
a FIFO to drain prior to issuing a CLRCHN.
aic79xx_inline.h:
o Remove unused untagged queue handling code.
o Don't attempt to htole64 what could be a 32bit value.
aic79xx_pci.c:
o Set additional bug flags for rev A chips.
Revision Changes Path
1.4 +151 -89 src/sys/dev/aic7xxx/aic79xx.c
1.5 +10 -6 src/sys/dev/aic7xxx/aic79xx.h
1.3 +30 -14 src/sys/dev/aic7xxx/aic79xx.reg
1.3 +138 -84 src/sys/dev/aic7xxx/aic79xx.seq
1.4 +3 -49 src/sys/dev/aic7xxx/aic79xx_inline.h
1.4 +4 -2 src/sys/dev/aic7xxx/aic79xx_pci.c
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