Date: Mon, 14 Jul 1997 20:48:59 +0200 (MET DST) From: Luigi Rizzo <luigi@labinfo.iet.unipi.it> To: smp@csn.net (Steve Passe) Cc: smp@FreeBSD.ORG, hackers@FreeBSD.ORG Subject: Re: interrupt latency Message-ID: <199707141849.UAA11489@labinfo.iet.unipi.it> In-Reply-To: <199707141916.NAA00523@Ilsa.StevesCafe.com> from "Steve Passe" at Jul 14, 97 01:15:47 pm
next in thread | previous in thread | raw e-mail | index | archive | help
> Hi, > > > what are the starting and ending event that you are looking for ? > > > > start: hw_irq, handler (glue code) called ? > > end: handler called, driver called ? > > thats a good question. > > the problem: > > in our SMP system an INT may be sent to a CPU that can't enter the kernel > because another CPU is currently inside the kernel. this causes a long delay > between the time the INT tickels the hardware and the time the ISR actually > runs. I am not familiar at all with the SMP code or the apic, but using a hardware solution seems extremely complex. Since you are looking at solution to improve the int latency anyways, can you consider the following approach: Replace the "giant lock" with a couple of nested locks; the most external one would only allow the posting of the hardware intr to some cpu, but not the acquisition of the "giant lock" (i.e. the right to enter the kernel). The nested lock is what you currently call 'the giant lock'. Cheers Luigi -----------------------------+-------------------------------------- Luigi Rizzo | Dip. di Ingegneria dell'Informazione email: luigi@iet.unipi.it | Universita' di Pisa tel: +39-50-568533 | via Diotisalvi 2, 56126 PISA (Italy) fax: +39-50-568522 | http://www.iet.unipi.it/~luigi/ _____________________________|______________________________________
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199707141849.UAA11489>