Date: Mon, 25 Mar 2002 06:40:40 -0800 (PST) From: Thomas Moestl <tmm@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 8371 for review Message-ID: <200203251440.g2PEeeK03431@freefall.freebsd.org>
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http://people.freebsd.org/~peter/p4db/chv.cgi?CH=8371 Change 8371 by tmm@tmm_sparc64 on 2002/03/25 06:40:39 Integ. misc fixes and cleanups from sparc64-tmm. Affected files ... ... //depot/projects/sparc64/sys/conf/files.sparc64#31 integrate ... //depot/projects/sparc64/sys/sparc64/include/iommureg.h#8 integrate ... //depot/projects/sparc64/sys/sparc64/isa/isa.c#9 integrate ... //depot/projects/sparc64/sys/sparc64/pci/psycho.c#26 integrate ... //depot/projects/sparc64/sys/sparc64/sparc64/iommu.c#19 integrate Differences ... ==== //depot/projects/sparc64/sys/conf/files.sparc64#31 (text+ko) ==== @@ -33,8 +33,8 @@ sparc64/fpu/fpu_subr.c standard sparc64/fpu/fpu_sqrt.c standard sparc64/isa/isa.c optional isa -# The following is needed for both ISA and EBus. -sparc64/isa/ofw_isa.c standard +sparc64/isa/ofw_isa.c optional ebus +sparc64/isa/ofw_isa.c optional isa sparc64/pci/apb.c optional apb sparc64/pci/ofw_pci.c optional pci sparc64/pci/psycho.c optional pci ==== //depot/projects/sparc64/sys/sparc64/include/iommureg.h#8 (text+ko) ==== @@ -162,7 +162,7 @@ (((pa) & IOTTE_PAMASK) | ((w) ? IOTTE_W : 0) | \ ((c) ? IOTTE_C : 0) | ((s) ? IOTTE_STREAM : 0) | \ (IOTTE_V | IOTTE_8K)) -#define IOTSBSLOT(va,sz) \ +#define IOTSBSLOT(va) \ ((u_int)(((vm_offset_t)(va)) - (is->is_dvmabase)) >> IO_PAGE_SHIFT) #endif /* !_MACHINE_IOMMUREG_H_ */ ==== //depot/projects/sparc64/sys/sparc64/isa/isa.c#9 (text+ko) ==== @@ -283,11 +283,8 @@ start += base; end += base; if (!INRANGE(start, base, limit) || - !INRANGE(end, base, limit)) { - panic("isa_alloc_resource: resource list entry " - "out of bus range (0x%lx - 0x%lx not in " - "0x%lx - 0x%lx)", start, end, base, limit); - } + !INRANGE(end, base, limit)) + return (NULL); break; case SYS_RES_IRQ: start = end = isa_route_intr_res(bus, start, end); ==== //depot/projects/sparc64/sys/sparc64/pci/psycho.c#26 (text+ko) ==== @@ -507,23 +507,25 @@ psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, psycho_bus_a); - psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, INTR_FAST, - psycho_bus_b); psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, INTR_FAST, psycho_powerfail); + /* Psycho-specific initialization. */ + if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { + /* + * Sabres do not have the following two interrupts. + */ + psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, + INTR_FAST, psycho_bus_b); #ifdef PSYCHO_MAP_WAKEUP - /* - * On some models, this is mapped to the same interrupt as - * pciberr by default, so leave it alone for now since - * psycho_wakeup() doesn't do anything useful anyway. - */ - psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, - psycho_wakeup); + /* + * psycho_wakeup() doesn't do anything useful right + * now. + */ + psycho_set_intr(sc, 5, dev, PSR_PWRMGT_INT_MAP, 0, + psycho_wakeup); #endif /* PSYCHO_MAP_WAKEUP */ - - /* Initialize the counter-timer if we handle a psycho. */ - if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { + /* Initialize the counter-timer. */ sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, PSR_TC0); } ==== //depot/projects/sparc64/sys/sparc64/sparc64/iommu.c#19 (text+ko) ==== @@ -341,12 +341,12 @@ iommu_strbuf_flush_done(is); } DPRINTF(IDB_IOMMU, ("Clearing TSB slot %d for va %p\n", - (int)IOTSBSLOT(va, is->is_tsbsize), (void *)(u_long)va)); - is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)] = tte; + (int)IOTSBSLOT(va), (void *)(u_long)va)); + is->is_tsb[IOTSBSLOT(va)] = tte; IOMMU_WRITE8(is, is_iommu, IMR_FLUSH, va); DPRINTF(IDB_IOMMU, ("iommu_enter: va %lx pa %lx TSB[%lx]@%p=%lx\n", - va, (long)pa, (u_long)IOTSBSLOT(va, is->is_tsbsize), - (void *)(u_long)&is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)], + va, (long)pa, (u_long)IOTSBSLOT(va), + (void *)(u_long)&is->is_tsb[IOTSBSLOT(va)], (u_long)tte)); #ifdef IOMMU_DIAG iommu_diag(is, va); @@ -379,20 +379,20 @@ va = trunc_io_page(va); DPRINTF(IDB_IOMMU, ("iommu_remove: va %lx TSB[%lx]@%p\n", - va, (u_long)IOTSBSLOT(va, is->is_tsbsize), - &is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)])); + va, (u_long)IOTSBSLOT(va), + &is->is_tsb[IOTSBSLOT(va)])); while (len > 0) { DPRINTF(IDB_IOMMU, ("iommu_remove: clearing TSB slot %d for va " - "%p size %lx\n", (int)IOTSBSLOT(va, is->is_tsbsize), + "%p size %lx\n", (int)IOTSBSLOT(va), (void *)(u_long)va, (u_long)len)); if (is->is_sb[0] != 0 || is->is_sb[1] != 0) { DPRINTF(IDB_IOMMU, ("iommu_remove: flushing va %p " "TSB[%lx]@%p=%lx, %lu bytes left\n", (void *)(u_long)va, - (long)IOTSBSLOT(va, is->is_tsbsize), + (long)IOTSBSLOT(va), (void *)(u_long)&is->is_tsb[ - IOTSBSLOT(va, is->is_tsbsize)], - (long)(is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)]), + IOTSBSLOT(va)], + (long)(is->is_tsb[IOTSBSLOT(va)]), (u_long)len)); iommu_strbuf_flush(is, va); if (len <= IO_PAGE_SIZE) @@ -400,10 +400,10 @@ DPRINTF(IDB_IOMMU, ("iommu_remove: flushed va %p " "TSB[%lx]@%p=%lx, %lu bytes left\n", (void *)(u_long)va, - (long)IOTSBSLOT(va, is->is_tsbsize), + (long)IOTSBSLOT(va), (void *)(u_long)&is->is_tsb[ - IOTSBSLOT(va,is->is_tsbsize)], - (long)(is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)]), + IOTSBSLOT(va)], + (long)(is->is_tsb[IOTSBSLOT(va)]), (u_long)len)); } @@ -412,7 +412,7 @@ else len -= IO_PAGE_SIZE; - is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)] = 0; + is->is_tsb[IOTSBSLOT(va)] = 0; IOMMU_WRITE8(is, is_iommu, IMR_FLUSH, va); va += IO_PAGE_SIZE; } @@ -844,7 +844,7 @@ IOMMU_WRITE8(is, is_dva, 0, trunc_io_page(va)); membar(StoreStore | StoreLoad); printf("iommu_diag: tte entry %#lx", - is->is_tsb[IOTSBSLOT(va, is->is_tsbsize)]); + is->is_tsb[IOTSBSLOT(va)]); if (is->is_dtcmp != 0) { printf(", tag compare register is %#lx\n" IOMMU_READ8(is, is_dtcmp, 0)); To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
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