Date: Wed, 26 Apr 2017 19:45:01 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r317461 - in vendor/llvm/dist: cmake/modules docs include/llvm/ADT include/llvm/Analysis include/llvm/CodeGen include/llvm/CodeGen/GlobalISel include/llvm/DebugInfo/CodeView include/llv... Message-ID: <201704261945.v3QJj15A039693@repo.freebsd.org>
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Author: dim Date: Wed Apr 26 19:45:00 2017 New Revision: 317461 URL: https://svnweb.freebsd.org/changeset/base/317461 Log: Vendor import of llvm trunk r301441: https://llvm.org/svn/llvm-project/llvm/trunk@301441 Added: vendor/llvm/dist/include/llvm/Support/KnownBits.h (contents, props changed) vendor/llvm/dist/lib/Target/Mips/Relocation.txt (contents, props changed) vendor/llvm/dist/test/Analysis/ScalarEvolution/exponential-behavior.ll vendor/llvm/dist/test/CodeGen/AArch64/GlobalISel/select-pr32733.mir vendor/llvm/dist/test/CodeGen/AArch64/fence-singlethread.ll vendor/llvm/dist/test/CodeGen/AArch64/optimize-imm.ll vendor/llvm/dist/test/CodeGen/AArch64/swiftself-scavenger.ll vendor/llvm/dist/test/CodeGen/AMDGPU/code-object-metadata-images.ll vendor/llvm/dist/test/CodeGen/AMDGPU/fence-amdgiz.ll vendor/llvm/dist/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll vendor/llvm/dist/test/CodeGen/AMDGPU/merge-m0.mir vendor/llvm/dist/test/CodeGen/AMDGPU/mubuf-offset-private.ll vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-isel-divmod.ll vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir vendor/llvm/dist/test/CodeGen/ARM/GlobalISel/arm-unsupported.ll vendor/llvm/dist/test/CodeGen/ARM/fence-singlethread.ll vendor/llvm/dist/test/CodeGen/ARM/v6m-smul-with-overflow.ll vendor/llvm/dist/test/CodeGen/AVR/pseudo/LDDWRdPtrQ-same-src-dst.mir vendor/llvm/dist/test/CodeGen/AVR/pseudo/LDWRdPtr-same-src-dst.mir vendor/llvm/dist/test/CodeGen/MSP430/select-use-sr.ll vendor/llvm/dist/test/CodeGen/SystemZ/splitMove_undefReg_mverifier_2.ll vendor/llvm/dist/test/CodeGen/Thumb/optionaldef-scheduling.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/callingconv.ll vendor/llvm/dist/test/CodeGen/X86/avx-schedule.ll vendor/llvm/dist/test/CodeGen/X86/constant-hoisting-bfi.ll vendor/llvm/dist/test/CodeGen/X86/eh-frame-unreachable.ll vendor/llvm/dist/test/CodeGen/X86/empty-function.ll vendor/llvm/dist/test/CodeGen/X86/insertelement-duplicates.ll vendor/llvm/dist/test/CodeGen/X86/memcpy-struct-by-value.ll vendor/llvm/dist/test/CodeGen/X86/post-ra-sched-with-debug.mir vendor/llvm/dist/test/CodeGen/X86/pr14657.ll vendor/llvm/dist/test/CodeGen/X86/pr22970.ll vendor/llvm/dist/test/CodeGen/X86/sse3-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse41-schedule.ll vendor/llvm/dist/test/CodeGen/X86/sse42-schedule.ll vendor/llvm/dist/test/CodeGen/X86/ssse3-schedule.ll vendor/llvm/dist/test/DebugInfo/PDB/pdbdump-yaml-lineinfo.test vendor/llvm/dist/test/DebugInfo/X86/dwarfdump-ranges-unrelocated.s (contents, props changed) vendor/llvm/dist/test/DebugInfo/X86/split-dwarf-cross-unit-reference.ll vendor/llvm/dist/test/DebugInfo/X86/stack-value-dwarf2.ll vendor/llvm/dist/test/DebugInfo/X86/this-stack_value.ll vendor/llvm/dist/test/Instrumentation/AddressSanitizer/global_metadata_array.ll vendor/llvm/dist/test/LTO/Resolution/X86/Inputs/mod-asm-used.ll vendor/llvm/dist/test/LTO/Resolution/X86/mod-asm-used.ll vendor/llvm/dist/test/MC/AMDGPU/gfx9_asm_all.s (contents, props changed) vendor/llvm/dist/test/Other/Inputs/invariant.group.barrier.ll vendor/llvm/dist/test/Other/pr32085.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineCallRef.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineOptRemark.ll vendor/llvm/dist/test/Transforms/CodeExtractor/unreachable-block.ll vendor/llvm/dist/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll vendor/llvm/dist/test/Transforms/JumpThreading/fold-not-thread.ll vendor/llvm/dist/test/Transforms/LoadStoreVectorizer/AMDGPU/gep-bitcast.ll vendor/llvm/dist/test/Transforms/LoopIdiom/non-integral-pointers.ll vendor/llvm/dist/test/Transforms/LoopUnroll/not-rotated.ll vendor/llvm/dist/test/Transforms/LoopVectorize/phi-cost.ll vendor/llvm/dist/test/Transforms/LowerSwitch/phi-in-dead-block.ll vendor/llvm/dist/test/Transforms/Mem2Reg/debug-alloca-phi.ll vendor/llvm/dist/test/Transforms/ObjCARC/clang-arc-use-barrier.ll vendor/llvm/dist/test/Transforms/Util/libcalls-fast-math-inf-loop.ll vendor/llvm/dist/test/tools/llvm-cvtres/ vendor/llvm/dist/test/tools/llvm-cvtres/basic.test vendor/llvm/dist/test/tools/llvm-objdump/X86/Inputs/debug-info-fileinfo.exe.elf-x86_64 (contents, props changed) vendor/llvm/dist/test/tools/llvm-objdump/X86/debug-info-fileinfo.test vendor/llvm/dist/test/tools/llvm-pdbdump/Inputs/ComplexPaddingTest.cpp (contents, props changed) vendor/llvm/dist/test/tools/llvm-pdbdump/Inputs/ComplexPaddingTest.pdb (contents, props changed) vendor/llvm/dist/test/tools/llvm-pdbdump/complex-padding-graphical.test vendor/llvm/dist/test/tools/llvm-xray/X86/Inputs/graph-diff-A.yaml vendor/llvm/dist/test/tools/llvm-xray/X86/Inputs/graph-diff-B.yaml vendor/llvm/dist/test/tools/llvm-xray/X86/graph-diff-simple.txt (contents, props changed) vendor/llvm/dist/tools/llvm-cvtres/ vendor/llvm/dist/tools/llvm-cvtres/CMakeLists.txt (contents, props changed) vendor/llvm/dist/tools/llvm-cvtres/LLVMBuild.txt (contents, props changed) vendor/llvm/dist/tools/llvm-cvtres/Opts.td vendor/llvm/dist/tools/llvm-cvtres/llvm-cvtres.cpp (contents, props changed) vendor/llvm/dist/tools/llvm-cvtres/llvm-cvtres.h (contents, props changed) vendor/llvm/dist/tools/llvm-xray/xray-graph-diff.cc (contents, props changed) vendor/llvm/dist/tools/llvm-xray/xray-graph-diff.h (contents, props changed) vendor/llvm/dist/unittests/Support/DynamicLibrary/ Deleted: vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDumperBase.h vendor/llvm/dist/test/Analysis/ScalarEvolution/or-as-add.ll vendor/llvm/dist/test/CodeGen/AVR/pseudo/expand-lddw-dst-src-same.mir vendor/llvm/dist/test/Transforms/InstCombine/or-to-xor.ll vendor/llvm/dist/test/Transforms/StructurizeCFG/invert-compare.ll vendor/llvm/dist/test/tools/llvm-pdbdump/simple-padding-text.test vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassLayoutTextDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassLayoutTextDumper.h Modified: vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake vendor/llvm/dist/docs/AMDGPUUsage.rst vendor/llvm/dist/docs/GettingStarted.rst vendor/llvm/dist/docs/HowToAddABuilder.rst vendor/llvm/dist/docs/LibFuzzer.rst vendor/llvm/dist/include/llvm/ADT/APFloat.h vendor/llvm/dist/include/llvm/ADT/APInt.h vendor/llvm/dist/include/llvm/ADT/APSInt.h vendor/llvm/dist/include/llvm/ADT/BitVector.h vendor/llvm/dist/include/llvm/ADT/SmallBitVector.h vendor/llvm/dist/include/llvm/ADT/StringExtras.h vendor/llvm/dist/include/llvm/ADT/Triple.h vendor/llvm/dist/include/llvm/Analysis/DemandedBits.h vendor/llvm/dist/include/llvm/Analysis/InstructionSimplify.h vendor/llvm/dist/include/llvm/Analysis/LoopInfo.h vendor/llvm/dist/include/llvm/Analysis/LoopInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/RegionInfo.h vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h vendor/llvm/dist/include/llvm/CodeGen/DIE.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/InstructionSelector.h vendor/llvm/dist/include/llvm/CodeGen/MachineOperand.h vendor/llvm/dist/include/llvm/CodeGen/SelectionDAG.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CodeView.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/ModuleSubstreamVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFCompileUnit.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFContext.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFTypeUnit.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFUnit.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/DIA/DIARawSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/IPDBRawSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/ModStream.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/NativeRawSymbol.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/UDTLayout.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/RPCSerialization.h vendor/llvm/dist/include/llvm/IR/Attributes.h vendor/llvm/dist/include/llvm/IR/ConstantRange.h vendor/llvm/dist/include/llvm/IR/Dominators.h vendor/llvm/dist/include/llvm/IR/IntrinsicsAMDGPU.td vendor/llvm/dist/include/llvm/IR/Module.h vendor/llvm/dist/include/llvm/IR/Value.h vendor/llvm/dist/include/llvm/MC/MCTargetOptions.h vendor/llvm/dist/include/llvm/Object/ELF.h vendor/llvm/dist/include/llvm/Object/ELFObjectFile.h vendor/llvm/dist/include/llvm/Object/ELFTypes.h vendor/llvm/dist/include/llvm/Object/IRSymtab.h vendor/llvm/dist/include/llvm/Object/MachO.h vendor/llvm/dist/include/llvm/Object/ModuleSummaryIndexObjectFile.h vendor/llvm/dist/include/llvm/Object/ModuleSymbolTable.h vendor/llvm/dist/include/llvm/Object/RelocVisitor.h vendor/llvm/dist/include/llvm/Object/StackMapParser.h vendor/llvm/dist/include/llvm/Object/Wasm.h vendor/llvm/dist/include/llvm/ObjectYAML/WasmYAML.h vendor/llvm/dist/include/llvm/ProfileData/InstrProf.h vendor/llvm/dist/include/llvm/Support/BranchProbability.h vendor/llvm/dist/include/llvm/Support/FileSystem.h vendor/llvm/dist/include/llvm/Support/GenericDomTree.h vendor/llvm/dist/include/llvm/Support/YAMLTraits.h vendor/llvm/dist/include/llvm/Target/GlobalISel/Target.td vendor/llvm/dist/include/llvm/Target/TargetInstrInfo.h vendor/llvm/dist/include/llvm/Target/TargetLowering.h vendor/llvm/dist/include/llvm/Target/TargetRegisterInfo.h vendor/llvm/dist/include/llvm/Transforms/Instrumentation.h vendor/llvm/dist/include/llvm/Transforms/Scalar/ConstantHoisting.h vendor/llvm/dist/lib/Analysis/BasicAliasAnalysis.cpp vendor/llvm/dist/lib/Analysis/ConstantFolding.cpp vendor/llvm/dist/lib/Analysis/DemandedBits.cpp vendor/llvm/dist/lib/Analysis/DomPrinter.cpp vendor/llvm/dist/lib/Analysis/IVUsers.cpp vendor/llvm/dist/lib/Analysis/InlineCost.cpp vendor/llvm/dist/lib/Analysis/InstructionSimplify.cpp vendor/llvm/dist/lib/Analysis/Lint.cpp vendor/llvm/dist/lib/Analysis/MemorySSAUpdater.cpp vendor/llvm/dist/lib/Analysis/ScalarEvolution.cpp vendor/llvm/dist/lib/Analysis/ScalarEvolutionNormalization.cpp vendor/llvm/dist/lib/Analysis/ValueTracking.cpp vendor/llvm/dist/lib/Bitcode/Writer/BitcodeWriter.cpp vendor/llvm/dist/lib/Bitcode/Writer/ValueEnumerator.cpp vendor/llvm/dist/lib/Bitcode/Writer/ValueEnumerator.h vendor/llvm/dist/lib/CodeGen/AggressiveAntiDepBreaker.cpp vendor/llvm/dist/lib/CodeGen/AntiDepBreaker.h vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinter.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DIE.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfDebug.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfExpression.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfUnit.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfUnit.h vendor/llvm/dist/lib/CodeGen/CriticalAntiDepBreaker.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/InstructionSelect.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/LegalizerHelper.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/RegisterBank.cpp vendor/llvm/dist/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp vendor/llvm/dist/lib/CodeGen/MIRPrinter.cpp vendor/llvm/dist/lib/CodeGen/MachineInstr.cpp vendor/llvm/dist/lib/CodeGen/MachineLICM.cpp vendor/llvm/dist/lib/CodeGen/PrologEpilogInserter.cpp vendor/llvm/dist/lib/CodeGen/RegAllocFast.cpp vendor/llvm/dist/lib/CodeGen/RegisterScavenging.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/DAGCombiner.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/InstrEmitter.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAG.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp vendor/llvm/dist/lib/CodeGen/SelectionDAG/TargetLowering.cpp vendor/llvm/dist/lib/CodeGen/StackMaps.cpp vendor/llvm/dist/lib/CodeGen/TargetInstrInfo.cpp vendor/llvm/dist/lib/CodeGen/TargetLoweringBase.cpp vendor/llvm/dist/lib/CodeGen/TargetRegisterInfo.cpp vendor/llvm/dist/lib/CodeGen/VirtRegMap.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFContext.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFDebugLine.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFFormValue.cpp vendor/llvm/dist/lib/DebugInfo/DWARF/DWARFUnit.cpp vendor/llvm/dist/lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp vendor/llvm/dist/lib/DebugInfo/PDB/DIA/DIASession.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/ModStream.cpp vendor/llvm/dist/lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp vendor/llvm/dist/lib/DebugInfo/PDB/UDTLayout.cpp vendor/llvm/dist/lib/Fuzzer/CMakeLists.txt vendor/llvm/dist/lib/Fuzzer/FuzzerDefs.h vendor/llvm/dist/lib/Fuzzer/FuzzerMerge.h vendor/llvm/dist/lib/IR/AsmWriter.cpp vendor/llvm/dist/lib/IR/AttributeImpl.h vendor/llvm/dist/lib/IR/Attributes.cpp vendor/llvm/dist/lib/IR/GCOV.cpp vendor/llvm/dist/lib/IR/Value.cpp vendor/llvm/dist/lib/LTO/LTO.cpp vendor/llvm/dist/lib/LTO/LTOBackend.cpp vendor/llvm/dist/lib/MC/MCParser/AsmParser.cpp vendor/llvm/dist/lib/MC/WasmObjectWriter.cpp vendor/llvm/dist/lib/Object/ELF.cpp vendor/llvm/dist/lib/Object/ELFObjectFile.cpp vendor/llvm/dist/lib/Object/IRSymtab.cpp vendor/llvm/dist/lib/Object/MachOObjectFile.cpp vendor/llvm/dist/lib/Object/ModuleSummaryIndexObjectFile.cpp vendor/llvm/dist/lib/Object/ModuleSymbolTable.cpp vendor/llvm/dist/lib/Object/RecordStreamer.cpp vendor/llvm/dist/lib/Object/RecordStreamer.h vendor/llvm/dist/lib/Object/WasmObjectFile.cpp vendor/llvm/dist/lib/ObjectYAML/WasmYAML.cpp vendor/llvm/dist/lib/Passes/PassBuilder.cpp vendor/llvm/dist/lib/Support/APFloat.cpp vendor/llvm/dist/lib/Support/APInt.cpp vendor/llvm/dist/lib/Support/DynamicLibrary.cpp vendor/llvm/dist/lib/Support/Triple.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64FrameLowering.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64ISelLowering.h vendor/llvm/dist/lib/Target/AArch64/AArch64InstrAtomics.td vendor/llvm/dist/lib/Target/AArch64/AArch64InstrFormats.td vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64InstrInfo.h vendor/llvm/dist/lib/Target/AArch64/AArch64InstructionSelector.cpp vendor/llvm/dist/lib/Target/AArch64/AArch64SchedFalkor.td vendor/llvm/dist/lib/Target/AArch64/AArch64SchedFalkorDetails.td vendor/llvm/dist/lib/Target/AArch64/AArch64SchedFalkorWriteRes.td vendor/llvm/dist/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp vendor/llvm/dist/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp vendor/llvm/dist/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPU.td vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUISelLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUISelLowering.h vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUInstrInfo.td vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp vendor/llvm/dist/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp vendor/llvm/dist/lib/Target/AMDGPU/BUFInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/GCNRegPressure.cpp vendor/llvm/dist/lib/Target/AMDGPU/MCTargetDesc/AMDGPUCodeObjectMetadataStreamer.cpp vendor/llvm/dist/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIFixSGPRCopies.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIFrameLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIFrameLowering.h vendor/llvm/dist/lib/Target/AMDGPU/SIISelLowering.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInsertWaitcnts.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInsertWaits.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.h vendor/llvm/dist/lib/Target/AMDGPU/SIInstrInfo.td vendor/llvm/dist/lib/Target/AMDGPU/SIInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/SIMachineFunctionInfo.h vendor/llvm/dist/lib/Target/AMDGPU/SIRegisterInfo.cpp vendor/llvm/dist/lib/Target/AMDGPU/SOPInstructions.td vendor/llvm/dist/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMBaseInstrInfo.h vendor/llvm/dist/lib/Target/ARM/ARMBaseRegisterInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMCallLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMExpandPseudoInsts.cpp vendor/llvm/dist/lib/Target/ARM/ARMFrameLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMISelLowering.cpp vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.h vendor/llvm/dist/lib/Target/ARM/ARMInstrInfo.td vendor/llvm/dist/lib/Target/ARM/ARMInstrThumb.td vendor/llvm/dist/lib/Target/ARM/ARMInstructionSelector.cpp vendor/llvm/dist/lib/Target/ARM/ARMLegalizerInfo.cpp vendor/llvm/dist/lib/Target/ARM/ARMLegalizerInfo.h vendor/llvm/dist/lib/Target/ARM/ARMMCInstLower.cpp vendor/llvm/dist/lib/Target/ARM/ARMRegisterBankInfo.cpp vendor/llvm/dist/lib/Target/ARM/Thumb1InstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/Thumb1InstrInfo.h vendor/llvm/dist/lib/Target/ARM/Thumb2InstrInfo.cpp vendor/llvm/dist/lib/Target/ARM/Thumb2InstrInfo.h vendor/llvm/dist/lib/Target/AVR/AVRAsmPrinter.cpp vendor/llvm/dist/lib/Target/AVR/AVRExpandPseudoInsts.cpp vendor/llvm/dist/lib/Target/AVR/AVRFrameLowering.cpp vendor/llvm/dist/lib/Target/AVR/AVRInstrInfo.cpp vendor/llvm/dist/lib/Target/AVR/AVRRegisterInfo.cpp vendor/llvm/dist/lib/Target/Hexagon/BitTracker.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonAsmPrinter.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonBitSimplify.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonExpandCondsets.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonFrameLowering.cpp vendor/llvm/dist/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp vendor/llvm/dist/lib/Target/MSP430/MSP430InstrInfo.td vendor/llvm/dist/lib/Target/Mips/MipsAsmPrinter.cpp vendor/llvm/dist/lib/Target/Mips/MipsCCState.cpp vendor/llvm/dist/lib/Target/Mips/MipsCCState.h vendor/llvm/dist/lib/Target/Mips/MipsFastISel.cpp vendor/llvm/dist/lib/Target/Mips/MipsFrameLowering.cpp vendor/llvm/dist/lib/Target/Mips/MipsISelLowering.cpp vendor/llvm/dist/lib/Target/Mips/MipsMachineFunction.cpp vendor/llvm/dist/lib/Target/Mips/MipsOptimizePICCall.cpp vendor/llvm/dist/lib/Target/Mips/MipsSEFrameLowering.cpp vendor/llvm/dist/lib/Target/Mips/MipsSEInstrInfo.cpp vendor/llvm/dist/lib/Target/NVPTX/NVPTXInstrInfo.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCFrameLowering.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCISelLowering.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.cpp vendor/llvm/dist/lib/Target/PowerPC/PPCInstrInfo.h vendor/llvm/dist/lib/Target/Sparc/SparcISelLowering.cpp vendor/llvm/dist/lib/Target/SystemZ/SystemZInstrInfo.cpp vendor/llvm/dist/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp vendor/llvm/dist/lib/Target/X86/AsmParser/X86AsmParser.cpp vendor/llvm/dist/lib/Target/X86/X86.h vendor/llvm/dist/lib/Target/X86/X86.td vendor/llvm/dist/lib/Target/X86/X86CallLowering.cpp vendor/llvm/dist/lib/Target/X86/X86CallLowering.h vendor/llvm/dist/lib/Target/X86/X86FastISel.cpp vendor/llvm/dist/lib/Target/X86/X86FrameLowering.cpp vendor/llvm/dist/lib/Target/X86/X86FrameLowering.h vendor/llvm/dist/lib/Target/X86/X86ISelLowering.cpp vendor/llvm/dist/lib/Target/X86/X86InstrArithmetic.td vendor/llvm/dist/lib/Target/X86/X86InstrInfo.cpp vendor/llvm/dist/lib/Target/X86/X86InstrInfo.h vendor/llvm/dist/lib/Target/X86/X86InstrInfo.td vendor/llvm/dist/lib/Target/X86/X86InstrSSE.td vendor/llvm/dist/lib/Target/X86/X86InstructionSelector.cpp vendor/llvm/dist/lib/Target/X86/X86RegisterInfo.cpp vendor/llvm/dist/lib/Target/X86/X86SelectionDAGInfo.cpp vendor/llvm/dist/lib/Target/X86/X86Subtarget.cpp vendor/llvm/dist/lib/Target/X86/X86Subtarget.h vendor/llvm/dist/lib/Target/X86/X86TargetMachine.cpp vendor/llvm/dist/lib/Target/XCore/XCoreFrameLowering.cpp vendor/llvm/dist/lib/Target/XCore/XCoreISelLowering.cpp vendor/llvm/dist/lib/Target/XCore/XCoreMachineFunctionInfo.cpp vendor/llvm/dist/lib/Transforms/IPO/PartialInlining.cpp vendor/llvm/dist/lib/Transforms/IPO/PassManagerBuilder.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAddSub.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCalls.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCasts.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineCompares.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineInternal.h vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSelect.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp vendor/llvm/dist/lib/Transforms/InstCombine/InstructionCombining.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/AddressSanitizer.cpp vendor/llvm/dist/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp vendor/llvm/dist/lib/Transforms/ObjCARC/PtrState.cpp vendor/llvm/dist/lib/Transforms/Scalar/ConstantHoisting.cpp vendor/llvm/dist/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp vendor/llvm/dist/lib/Transforms/Scalar/GuardWidening.cpp vendor/llvm/dist/lib/Transforms/Scalar/InferAddressSpaces.cpp vendor/llvm/dist/lib/Transforms/Scalar/JumpThreading.cpp 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vendor/llvm/dist/tools/llvm-pdbdump/CMakeLists.txt vendor/llvm/dist/tools/llvm-pdbdump/LinePrinter.cpp vendor/llvm/dist/tools/llvm-pdbdump/PdbYaml.cpp vendor/llvm/dist/tools/llvm-pdbdump/PdbYaml.h vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassDefinitionDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassDefinitionDumper.h vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassLayoutGraphicalDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/PrettyClassLayoutGraphicalDumper.h vendor/llvm/dist/tools/llvm-pdbdump/PrettyTypeDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/PrettyVariableDumper.cpp vendor/llvm/dist/tools/llvm-pdbdump/PrettyVariableDumper.h vendor/llvm/dist/tools/llvm-pdbdump/YAMLOutputStyle.cpp vendor/llvm/dist/tools/llvm-pdbdump/YAMLOutputStyle.h vendor/llvm/dist/tools/llvm-pdbdump/llvm-pdbdump.cpp vendor/llvm/dist/tools/llvm-pdbdump/llvm-pdbdump.h vendor/llvm/dist/tools/llvm-xray/CMakeLists.txt vendor/llvm/dist/tools/llvm-xray/xray-color-helper.cc vendor/llvm/dist/tools/llvm-xray/xray-color-helper.h vendor/llvm/dist/tools/llvm-xray/xray-graph.cc vendor/llvm/dist/tools/llvm-xray/xray-graph.h vendor/llvm/dist/unittests/ADT/APFloatTest.cpp vendor/llvm/dist/unittests/ADT/APIntTest.cpp vendor/llvm/dist/unittests/ADT/BitVectorTest.cpp vendor/llvm/dist/unittests/ADT/StringExtrasTest.cpp vendor/llvm/dist/unittests/ADT/TripleTest.cpp vendor/llvm/dist/unittests/Analysis/ScalarEvolutionTest.cpp vendor/llvm/dist/unittests/DebugInfo/DWARF/DwarfGenerator.h vendor/llvm/dist/unittests/Support/BranchProbabilityTest.cpp vendor/llvm/dist/unittests/Support/Path.cpp vendor/llvm/dist/utils/TableGen/AsmMatcherEmitter.cpp vendor/llvm/dist/utils/TableGen/CodeEmitterGen.cpp vendor/llvm/dist/utils/TableGen/GlobalISelEmitter.cpp vendor/llvm/dist/utils/TableGen/SubtargetFeatureInfo.cpp vendor/llvm/dist/utils/TableGen/SubtargetFeatureInfo.h vendor/llvm/dist/utils/TableGen/Types.cpp vendor/llvm/dist/utils/git-svn/git-llvm Modified: vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/cmake/modules/HandleLLVMOptions.cmake Wed Apr 26 19:45:00 2017 (r317461) @@ -222,6 +222,13 @@ if( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT endif( LLVM_BUILD_32_BITS ) endif( CMAKE_SIZEOF_VOID_P EQUAL 8 AND NOT WIN32 ) +# If building on a GNU specific 32-bit system, make sure off_t is 64 bits +# so that off_t can stored offset > 2GB +if( CMAKE_SIZEOF_VOID_P EQUAL 4 ) + add_definitions( -D_LARGEFILE_SOURCE ) + add_definitions( -D_FILE_OFFSET_BITS=64 ) +endif() + if( XCODE ) # For Xcode enable several build settings that correspond to # many warnings that are on by default in Clang but are Modified: vendor/llvm/dist/docs/AMDGPUUsage.rst ============================================================================== --- vendor/llvm/dist/docs/AMDGPUUsage.rst Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/docs/AMDGPUUsage.rst Wed Apr 26 19:45:00 2017 (r317461) @@ -82,9 +82,8 @@ handler as follows: =============== ============= =============================================== Usage Code Sequence Description =============== ============= =============================================== - llvm.trap s_endpgm Causes wavefront to be terminated. - llvm.debugtrap s_nop No operation. Compiler warning generated that - there is no trap handler installed. + llvm.trap s_endpgm Causes wavefront to be terminated. + llvm.debugtrap Nothing. Compiler warning generated that there is no trap handler installed. =============== ============= =============================================== Assembler Modified: vendor/llvm/dist/docs/GettingStarted.rst ============================================================================== --- vendor/llvm/dist/docs/GettingStarted.rst Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/docs/GettingStarted.rst Wed Apr 26 19:45:00 2017 (r317461) @@ -171,6 +171,8 @@ Linux PowerPC Solaris V9 (Ultrasparc) GCC FreeBSD x86\ :sup:`1` GCC, Clang FreeBSD amd64 GCC, Clang +NetBSD x86\ :sup:`1` GCC, Clang +NetBSD amd64 GCC, Clang MacOS X\ :sup:`2` PowerPC GCC MacOS X x86 GCC, Clang Cygwin/Win32 x86\ :sup:`1, 3` GCC Modified: vendor/llvm/dist/docs/HowToAddABuilder.rst ============================================================================== --- vendor/llvm/dist/docs/HowToAddABuilder.rst Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/docs/HowToAddABuilder.rst Wed Apr 26 19:45:00 2017 (r317461) @@ -83,6 +83,8 @@ Here are the steps you can follow to do * slaves are added to ``buildbot/osuosl/master/config/slaves.py`` * builders are added to ``buildbot/osuosl/master/config/builders.py`` + Please make sure your builder name and its builddir are unique through the file. + It is possible to whitelist email addresses to unconditionally receive notifications on build failure; for this you'll need to add an ``InformativeMailNotifier`` to ``buildbot/osuosl/master/config/status.py``. This is particularly useful for the Modified: vendor/llvm/dist/docs/LibFuzzer.rst ============================================================================== --- vendor/llvm/dist/docs/LibFuzzer.rst Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/docs/LibFuzzer.rst Wed Apr 26 19:45:00 2017 (r317461) @@ -87,10 +87,16 @@ Some important things to remember about * Usually, the narrower the target the better. E.g. if your target can parse several data formats, split it into several targets, one per format. -Building --------- +Fuzzer Usage +------------ + +Very recent versions of Clang (> April 20 2017) include libFuzzer, +and no installation is necessary. +In order to fuzz your binary, use the `-fsanitize=fuzzer` flag during the compilation:: -Next, build the libFuzzer library as a static archive, without any sanitizer + clang -fsanitize=fuzzer,address mytarget.c + +Otherwise, build the libFuzzer library as a static archive, without any sanitizer options. Note that the libFuzzer library contains the ``main()`` function: .. code-block:: console @@ -728,6 +734,7 @@ to crash on invalid inputs. Examples: regular expression matchers, text or binary format parsers, compression, network, crypto. + Trophies ======== * GLIBC: https://sourceware.org/glibc/wiki/FuzzingLibc Modified: vendor/llvm/dist/include/llvm/ADT/APFloat.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/APFloat.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/APFloat.h Wed Apr 26 19:45:00 2017 (r317461) @@ -397,6 +397,12 @@ public: /// consider inserting before falling back to scientific /// notation. 0 means to always use scientific notation. /// + /// \param TruncateZero Indicate whether to remove the trailing zero in + /// fraction part or not. Also setting this parameter to false forcing + /// producing of output more similar to default printf behavior. + /// Specifically the lower e is used as exponent delimiter and exponent + /// always contains no less than two digits. + /// /// Number Precision MaxPadding Result /// ------ --------- ---------- ------ /// 1.01E+4 5 2 10100 @@ -406,7 +412,7 @@ public: /// 1.01E-2 4 2 0.0101 /// 1.01E-2 4 1 1.01E-2 void toString(SmallVectorImpl<char> &Str, unsigned FormatPrecision = 0, - unsigned FormatMaxPadding = 3) const; + unsigned FormatMaxPadding = 3, bool TruncateZero = true) const; /// If this value has an exact multiplicative inverse, store it in inv and /// return true. @@ -649,7 +655,7 @@ public: bool isInteger() const; void toString(SmallVectorImpl<char> &Str, unsigned FormatPrecision, - unsigned FormatMaxPadding) const; + unsigned FormatMaxPadding, bool TruncateZero = true) const; bool getExactInverse(APFloat *inv) const; @@ -1144,9 +1150,9 @@ public: APFloat &operator=(APFloat &&RHS) = default; void toString(SmallVectorImpl<char> &Str, unsigned FormatPrecision = 0, - unsigned FormatMaxPadding = 3) const { + unsigned FormatMaxPadding = 3, bool TruncateZero = true) const { APFLOAT_DISPATCH_ON_SEMANTICS( - toString(Str, FormatPrecision, FormatMaxPadding)); + toString(Str, FormatPrecision, FormatMaxPadding, TruncateZero)); } void print(raw_ostream &) const; Modified: vendor/llvm/dist/include/llvm/ADT/APInt.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/APInt.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/APInt.h Wed Apr 26 19:45:00 2017 (r317461) @@ -78,6 +78,8 @@ public: APINT_BITS_PER_WORD = APINT_WORD_SIZE * CHAR_BIT }; + static const WordType WORD_MAX = ~WordType(0); + private: /// This union is used to store the integer value. When the /// integer bit-width <= 64, it uses VAL, otherwise it uses pVal. @@ -90,6 +92,8 @@ private: friend struct DenseMapAPIntKeyInfo; + friend class APSInt; + /// \brief Fast internal constructor /// /// This constructor is used only internally for speed of construction of @@ -134,15 +138,10 @@ private: /// zero'd out. APInt &clearUnusedBits() { // Compute how many bits are used in the final word - unsigned wordBits = BitWidth % APINT_BITS_PER_WORD; - if (wordBits == 0) - // If all bits are used, we want to leave the value alone. This also - // avoids the undefined behavior of >> when the shift is the same size as - // the word size (64). - return *this; + unsigned WordBits = ((BitWidth-1) % APINT_BITS_PER_WORD) + 1; // Mask out the high bits. - uint64_t mask = UINT64_MAX >> (APINT_BITS_PER_WORD - wordBits); + uint64_t mask = WORD_MAX >> (APINT_BITS_PER_WORD - WordBits); if (isSingleWord()) VAL &= mask; else @@ -194,6 +193,9 @@ private: /// out-of-line slow case for lshr. void lshrSlowCase(unsigned ShiftAmt); + /// out-of-line slow case for ashr. + void ashrSlowCase(unsigned ShiftAmt); + /// out-of-line slow case for operator= void AssignSlowCase(const APInt &RHS); @@ -230,6 +232,14 @@ private: /// out-of-line slow case for operator^=. void XorAssignSlowCase(const APInt& RHS); + /// Unsigned comparison. Returns -1, 0, or 1 if this APInt is less than, equal + /// to, or greater than RHS. + int compare(const APInt &RHS) const LLVM_READONLY; + + /// Signed comparison. Returns -1, 0, or 1 if this APInt is less than, equal + /// to, or greater than RHS. + int compareSigned(const APInt &RHS) const LLVM_READONLY; + public: /// \name Constructors /// @{ @@ -363,7 +373,7 @@ public: /// This checks to see if the value has all bits of the APInt are set or not. bool isAllOnesValue() const { if (isSingleWord()) - return VAL == UINT64_MAX >> (APINT_BITS_PER_WORD - BitWidth); + return VAL == WORD_MAX >> (APINT_BITS_PER_WORD - BitWidth); return countPopulationSlowCase() == BitWidth; } @@ -445,7 +455,7 @@ public: assert(numBits != 0 && "numBits must be non-zero"); assert(numBits <= BitWidth && "numBits out of range"); if (isSingleWord()) - return VAL == (UINT64_MAX >> (APINT_BITS_PER_WORD - numBits)); + return VAL == (WORD_MAX >> (APINT_BITS_PER_WORD - numBits)); unsigned Ones = countTrailingOnesSlowCase(); return (numBits == Ones) && ((Ones + countLeadingZerosSlowCase()) == BitWidth); @@ -509,7 +519,7 @@ public: /// /// \returns the all-ones value for an APInt of the specified bit-width. static APInt getAllOnesValue(unsigned numBits) { - return APInt(numBits, UINT64_MAX, true); + return APInt(numBits, WORD_MAX, true); } /// \brief Get the '0' value. @@ -886,7 +896,26 @@ public: /// \brief Arithmetic right-shift function. /// /// Arithmetic right-shift this APInt by shiftAmt. - APInt ashr(unsigned shiftAmt) const; + APInt ashr(unsigned ShiftAmt) const { + APInt R(*this); + R.ashrInPlace(ShiftAmt); + return R; + } + + /// Arithmetic right-shift this APInt by ShiftAmt in place. + void ashrInPlace(unsigned ShiftAmt) { + assert(ShiftAmt <= BitWidth && "Invalid shift amount"); + if (isSingleWord()) { + int64_t SExtVAL = SignExtend64(VAL, BitWidth); + if (ShiftAmt == BitWidth) + VAL = SExtVAL >> (APINT_BITS_PER_WORD - 1); // Fill with sign bit. + else + VAL = SExtVAL >> ShiftAmt; + clearUnusedBits(); + return; + } + ashrSlowCase(ShiftAmt); + } /// \brief Logical right-shift function. /// @@ -928,7 +957,14 @@ public: /// \brief Arithmetic right-shift function. /// /// Arithmetic right-shift this APInt by shiftAmt. - APInt ashr(const APInt &shiftAmt) const; + APInt ashr(const APInt &ShiftAmt) const { + APInt R(*this); + R.ashrInPlace(ShiftAmt); + return R; + } + + /// Arithmetic right-shift this APInt by shiftAmt in place. + void ashrInPlace(const APInt &shiftAmt); /// \brief Logical right-shift function. /// @@ -1079,7 +1115,7 @@ public: /// the validity of the less-than relationship. /// /// \returns true if *this < RHS when both are considered unsigned. - bool ult(const APInt &RHS) const LLVM_READONLY; + bool ult(const APInt &RHS) const { return compare(RHS) < 0; } /// \brief Unsigned less than comparison /// @@ -1098,7 +1134,7 @@ public: /// validity of the less-than relationship. /// /// \returns true if *this < RHS when both are considered signed. - bool slt(const APInt &RHS) const LLVM_READONLY; + bool slt(const APInt &RHS) const { return compareSigned(RHS) < 0; } /// \brief Signed less than comparison /// @@ -1117,7 +1153,7 @@ public: /// validity of the less-or-equal relationship. /// /// \returns true if *this <= RHS when both are considered unsigned. - bool ule(const APInt &RHS) const { return ult(RHS) || eq(RHS); } + bool ule(const APInt &RHS) const { return compare(RHS) <= 0; } /// \brief Unsigned less or equal comparison /// @@ -1133,7 +1169,7 @@ public: /// validity of the less-or-equal relationship. /// /// \returns true if *this <= RHS when both are considered signed. - bool sle(const APInt &RHS) const { return slt(RHS) || eq(RHS); } + bool sle(const APInt &RHS) const { return compareSigned(RHS) <= 0; } /// \brief Signed less or equal comparison /// @@ -1149,7 +1185,7 @@ public: /// the validity of the greater-than relationship. /// /// \returns true if *this > RHS when both are considered unsigned. - bool ugt(const APInt &RHS) const { return !ult(RHS) && !eq(RHS); } + bool ugt(const APInt &RHS) const { return !ule(RHS); } /// \brief Unsigned greater than comparison /// @@ -1168,7 +1204,7 @@ public: /// validity of the greater-than relationship. /// /// \returns true if *this > RHS when both are considered signed. - bool sgt(const APInt &RHS) const { return !slt(RHS) && !eq(RHS); } + bool sgt(const APInt &RHS) const { return !sle(RHS); } /// \brief Signed greater than comparison /// @@ -1286,7 +1322,7 @@ public: /// \brief Set every bit to 1. void setAllBits() { if (isSingleWord()) - VAL = UINT64_MAX; + VAL = WORD_MAX; else // Set all the bits in all the words. memset(pVal, -1, getNumWords() * APINT_WORD_SIZE); @@ -1316,7 +1352,7 @@ public: return; } if (loBit < APINT_BITS_PER_WORD && hiBit <= APINT_BITS_PER_WORD) { - uint64_t mask = UINT64_MAX >> (APINT_BITS_PER_WORD - (hiBit - loBit)); + uint64_t mask = WORD_MAX >> (APINT_BITS_PER_WORD - (hiBit - loBit)); mask <<= loBit; if (isSingleWord()) VAL |= mask; @@ -1358,7 +1394,7 @@ public: /// \brief Toggle every bit to its opposite value. void flipAllBits() { if (isSingleWord()) { - VAL ^= UINT64_MAX; + VAL ^= WORD_MAX; clearUnusedBits(); } else { flipAllBitsSlowCase(); @@ -1653,7 +1689,7 @@ public: /// referencing 2 in a space where 2 does no exist. unsigned nearestLogBase2() const { // Special case when we have a bitwidth of 1. If VAL is 1, then we - // get 0. If VAL is 0, we get UINT64_MAX which gets truncated to + // get 0. If VAL is 0, we get WORD_MAX which gets truncated to // UINT32_MAX. if (BitWidth == 1) return VAL - 1; Modified: vendor/llvm/dist/include/llvm/ADT/APSInt.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/APSInt.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/APSInt.h Wed Apr 26 19:45:00 2017 (r317461) @@ -125,7 +125,10 @@ public: return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false); } APSInt& operator>>=(unsigned Amt) { - *this = *this >> Amt; + if (IsUnsigned) + lshrInPlace(Amt); + else + ashrInPlace(Amt); return *this; } @@ -179,7 +182,7 @@ public: return APSInt(static_cast<const APInt&>(*this) << Bits, IsUnsigned); } APSInt& operator<<=(unsigned Amt) { - *this = *this << Amt; + static_cast<APInt&>(*this) <<= Amt; return *this; } @@ -285,12 +288,12 @@ public: /// \brief Compare underlying values of two numbers. static int compareValues(const APSInt &I1, const APSInt &I2) { if (I1.getBitWidth() == I2.getBitWidth() && I1.isSigned() == I2.isSigned()) - return I1 == I2 ? 0 : I1 > I2 ? 1 : -1; + return I1.IsUnsigned ? I1.compare(I2) : I1.compareSigned(I2); // Check for a bit-width mismatch. if (I1.getBitWidth() > I2.getBitWidth()) return compareValues(I1, I2.extend(I1.getBitWidth())); - else if (I2.getBitWidth() > I1.getBitWidth()) + if (I2.getBitWidth() > I1.getBitWidth()) return compareValues(I1.extend(I2.getBitWidth()), I2); // We have a signedness mismatch. Check for negative values and do an @@ -305,7 +308,7 @@ public: return 1; } - return I1.eq(I2) ? 0 : I1.ugt(I2) ? 1 : -1; + return I1.compare(I2); } static APSInt get(int64_t X) { return APSInt(APInt(64, X), false); } Modified: vendor/llvm/dist/include/llvm/ADT/BitVector.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/BitVector.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/BitVector.h Wed Apr 26 19:45:00 2017 (r317461) @@ -15,7 +15,6 @@ #define LLVM_ADT_BITVECTOR_H #include "llvm/ADT/ArrayRef.h" -#include "llvm/ADT/STLExtras.h" #include "llvm/Support/MathExtras.h" #include <algorithm> #include <cassert> @@ -35,9 +34,8 @@ class BitVector { static_assert(BITWORD_SIZE == 64 || BITWORD_SIZE == 32, "Unsupported word size"); - BitWord *Bits; // Actual bits. - unsigned Size; // Size of bitvector in bits. - unsigned Capacity; // Number of BitWords allocated in the Bits array. + MutableArrayRef<BitWord> Bits; // Actual bits. + unsigned Size; // Size of bitvector in bits. public: typedef unsigned size_type; @@ -77,16 +75,14 @@ public: /// BitVector default ctor - Creates an empty bitvector. - BitVector() : Size(0), Capacity(0) { - Bits = nullptr; - } + BitVector() : Size(0) {} /// BitVector ctor - Creates a bitvector of specified number of bits. All /// bits are initialized to the specified value. explicit BitVector(unsigned s, bool t = false) : Size(s) { - Capacity = NumBitWords(s); - Bits = (BitWord *)std::malloc(Capacity * sizeof(BitWord)); - init_words(Bits, Capacity, t); + size_t Capacity = NumBitWords(s); + Bits = allocate(Capacity); + init_words(Bits, t); if (t) clear_unused_bits(); } @@ -94,25 +90,21 @@ public: /// BitVector copy ctor. BitVector(const BitVector &RHS) : Size(RHS.size()) { if (Size == 0) { - Bits = nullptr; - Capacity = 0; + Bits = MutableArrayRef<BitWord>(); return; } - Capacity = NumBitWords(RHS.size()); - Bits = (BitWord *)std::malloc(Capacity * sizeof(BitWord)); - std::memcpy(Bits, RHS.Bits, Capacity * sizeof(BitWord)); + size_t Capacity = NumBitWords(RHS.size()); + Bits = allocate(Capacity); + std::memcpy(Bits.data(), RHS.Bits.data(), Capacity * sizeof(BitWord)); } - BitVector(BitVector &&RHS) - : Bits(RHS.Bits), Size(RHS.Size), Capacity(RHS.Capacity) { - RHS.Bits = nullptr; - RHS.Size = RHS.Capacity = 0; + BitVector(BitVector &&RHS) : Bits(RHS.Bits), Size(RHS.Size) { + RHS.Bits = MutableArrayRef<BitWord>(); + RHS.Size = 0; } - ~BitVector() { - std::free(Bits); - } + ~BitVector() { std::free(Bits.data()); } /// empty - Tests whether there are no bits in this bitvector. bool empty() const { return Size == 0; } @@ -163,6 +155,22 @@ public: return -1; } + /// find_last - Returns the index of the last set bit, -1 if none of the bits + /// are set. + int find_last() const { + if (Size == 0) + return -1; + + unsigned N = NumBitWords(size()); + assert(N > 0); + + unsigned i = N - 1; + while (i > 0 && Bits[i] == BitWord(0)) + --i; + + return int((i + 1) * BITWORD_SIZE - countLeadingZeros(Bits[i])) - 1; + } + /// find_first_unset - Returns the index of the first unset bit, -1 if all /// of the bits are set. int find_first_unset() const { @@ -174,6 +182,30 @@ public: return -1; } + /// find_last_unset - Returns the index of the last unset bit, -1 if all of + /// the bits are set. + int find_last_unset() const { + if (Size == 0) + return -1; + + const unsigned N = NumBitWords(size()); + assert(N > 0); + + unsigned i = N - 1; + BitWord W = Bits[i]; + + // The last word in the BitVector has some unused bits, so we need to set + // them all to 1 first. Set them all to 1 so they don't get treated as + // valid unset bits. + unsigned UnusedCount = BITWORD_SIZE - size() % BITWORD_SIZE; + W |= maskLeadingOnes<BitWord>(UnusedCount); + + while (W == ~BitWord(0) && --i > 0) + W = Bits[i]; + + return int((i + 1) * BITWORD_SIZE - countLeadingOnes(W)) - 1; + } + /// find_next - Returns the index of the next set bit following the /// "Prev" bit. Returns -1 if the next set bit is not found. int find_next(unsigned Prev) const { @@ -228,10 +260,10 @@ public: /// resize - Grow or shrink the bitvector. void resize(unsigned N, bool t = false) { - if (N > Capacity * BITWORD_SIZE) { - unsigned OldCapacity = Capacity; + if (N > getBitCapacity()) { + unsigned OldCapacity = Bits.size(); grow(N); - init_words(&Bits[OldCapacity], (Capacity-OldCapacity), t); + init_words(Bits.drop_front(OldCapacity), t); } // Set any old unused bits that are now included in the BitVector. This @@ -248,19 +280,19 @@ public: } void reserve(unsigned N) { - if (N > Capacity * BITWORD_SIZE) + if (N > getBitCapacity()) grow(N); } // Set, reset, flip BitVector &set() { - init_words(Bits, Capacity, true); + init_words(Bits, true); clear_unused_bits(); return *this; } BitVector &set(unsigned Idx) { - assert(Bits && "Bits never allocated"); + assert(Bits.data() && "Bits never allocated"); Bits[Idx / BITWORD_SIZE] |= BitWord(1) << (Idx % BITWORD_SIZE); return *this; } @@ -295,7 +327,7 @@ public: } BitVector &reset() { - init_words(Bits, Capacity, false); + init_words(Bits, false); return *this; } @@ -562,21 +594,21 @@ public: Size = RHS.size(); unsigned RHSWords = NumBitWords(Size); - if (Size <= Capacity * BITWORD_SIZE) { + if (Size <= getBitCapacity()) { if (Size) - std::memcpy(Bits, RHS.Bits, RHSWords * sizeof(BitWord)); + std::memcpy(Bits.data(), RHS.Bits.data(), RHSWords * sizeof(BitWord)); clear_unused_bits(); return *this; } // Grow the bitvector to have enough elements. - Capacity = RHSWords; - assert(Capacity > 0 && "negative capacity?"); - BitWord *NewBits = (BitWord *)std::malloc(Capacity * sizeof(BitWord)); - std::memcpy(NewBits, RHS.Bits, Capacity * sizeof(BitWord)); + unsigned NewCapacity = RHSWords; + assert(NewCapacity > 0 && "negative capacity?"); + auto NewBits = allocate(NewCapacity); + std::memcpy(NewBits.data(), RHS.Bits.data(), NewCapacity * sizeof(BitWord)); // Destroy the old bits. - std::free(Bits); + std::free(Bits.data()); Bits = NewBits; return *this; @@ -585,13 +617,12 @@ public: const BitVector &operator=(BitVector &&RHS) { if (this == &RHS) return *this; - std::free(Bits); + std::free(Bits.data()); Bits = RHS.Bits; Size = RHS.Size; - Capacity = RHS.Capacity; - RHS.Bits = nullptr; - RHS.Size = RHS.Capacity = 0; + RHS.Bits = MutableArrayRef<BitWord>(); + RHS.Size = 0; return *this; } @@ -599,7 +630,6 @@ public: void swap(BitVector &RHS) { std::swap(Bits, RHS.Bits); std::swap(Size, RHS.Size); - std::swap(Capacity, RHS.Capacity); } //===--------------------------------------------------------------------===// @@ -659,14 +689,14 @@ private: uint32_t NumWords = NumBitWords(Size); - auto Src = ArrayRef<BitWord>(Bits, NumWords).drop_back(Count); - auto Dest = MutableArrayRef<BitWord>(Bits, NumWords).drop_front(Count); + auto Src = Bits.take_front(NumWords).drop_back(Count); + auto Dest = Bits.take_front(NumWords).drop_front(Count); // Since we always move Word-sized chunks of data with src and dest both // aligned to a word-boundary, we don't need to worry about endianness // here. std::memmove(Dest.begin(), Src.begin(), Dest.size() * sizeof(BitWord)); - std::memset(Bits, 0, Count * sizeof(BitWord)); + std::memset(Bits.data(), 0, Count * sizeof(BitWord)); clear_unused_bits(); } @@ -679,14 +709,19 @@ private: uint32_t NumWords = NumBitWords(Size); - auto Src = ArrayRef<BitWord>(Bits, NumWords).drop_front(Count); - auto Dest = MutableArrayRef<BitWord>(Bits, NumWords).drop_back(Count); + auto Src = Bits.take_front(NumWords).drop_front(Count); + auto Dest = Bits.take_front(NumWords).drop_back(Count); assert(Dest.size() == Src.size()); std::memmove(Dest.begin(), Src.begin(), Dest.size() * sizeof(BitWord)); std::memset(Dest.end(), 0, Count * sizeof(BitWord)); } + MutableArrayRef<BitWord> allocate(size_t NumWords) { + BitWord *RawBits = (BitWord *)std::malloc(NumWords * sizeof(BitWord)); + return MutableArrayRef<BitWord>(RawBits, NumWords); + } + int next_unset_in_word(int WordIndex, BitWord Word) const { unsigned Result = WordIndex * BITWORD_SIZE + countTrailingOnes(Word); return Result < size() ? Result : -1; @@ -700,8 +735,8 @@ private: void set_unused_bits(bool t = true) { // Set high words first. unsigned UsedWords = NumBitWords(Size); - if (Capacity > UsedWords) - init_words(&Bits[UsedWords], (Capacity-UsedWords), t); + if (Bits.size() > UsedWords) + init_words(Bits.drop_front(UsedWords), t); // Then set any stray high bits of the last used word. unsigned ExtraBits = Size % BITWORD_SIZE; @@ -720,16 +755,17 @@ private: } void grow(unsigned NewSize) { - Capacity = std::max(NumBitWords(NewSize), Capacity * 2); - assert(Capacity > 0 && "realloc-ing zero space"); - Bits = (BitWord *)std::realloc(Bits, Capacity * sizeof(BitWord)); - + size_t NewCapacity = std::max<size_t>(NumBitWords(NewSize), Bits.size() * 2); + assert(NewCapacity > 0 && "realloc-ing zero space"); + BitWord *NewBits = + (BitWord *)std::realloc(Bits.data(), NewCapacity * sizeof(BitWord)); + Bits = MutableArrayRef<BitWord>(NewBits, NewCapacity); clear_unused_bits(); } - void init_words(BitWord *B, unsigned NumWords, bool t) { - if (NumWords > 0) - memset(B, 0 - (int)t, NumWords*sizeof(BitWord)); + void init_words(MutableArrayRef<BitWord> B, bool t) { + if (B.size() > 0) + memset(B.data(), 0 - (int)t, B.size() * sizeof(BitWord)); } template<bool AddBits, bool InvertMask> @@ -761,7 +797,8 @@ private: public: /// Return the size (in bytes) of the bit vector. - size_t getMemorySize() const { return Capacity * sizeof(BitWord); } + size_t getMemorySize() const { return Bits.size() * sizeof(BitWord); } + size_t getBitCapacity() const { return Bits.size() * BITWORD_SIZE; } }; static inline size_t capacity_in_bytes(const BitVector &X) { Modified: vendor/llvm/dist/include/llvm/ADT/SmallBitVector.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/SmallBitVector.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/SmallBitVector.h Wed Apr 26 19:45:00 2017 (r317461) @@ -117,9 +117,7 @@ private: } // Return the size. - size_t getSmallSize() const { - return getSmallRawBits() >> SmallNumDataBits; - } + size_t getSmallSize() const { return getSmallRawBits() >> SmallNumDataBits; } void setSmallSize(size_t Size) { setSmallRawBits(getSmallBits() | (Size << SmallNumDataBits)); @@ -216,6 +214,16 @@ public: return getPointer()->find_first(); } + int find_last() const { + if (isSmall()) { + uintptr_t Bits = getSmallBits(); + if (Bits == 0) + return -1; + return NumBaseBits - countLeadingZeros(Bits); + } + return getPointer()->find_last(); + } + /// Returns the index of the first unset bit, -1 if all of the bits are set. int find_first_unset() const { if (isSmall()) { @@ -228,6 +236,17 @@ public: return getPointer()->find_first_unset(); } + int find_last_unset() const { + if (isSmall()) { + if (count() == getSmallSize()) + return -1; + + uintptr_t Bits = getSmallBits(); + return NumBaseBits - countLeadingOnes(Bits); + } + return getPointer()->find_last_unset(); + } + /// Returns the index of the next set bit following the "Prev" bit. /// Returns -1 if the next set bit is not found. int find_next(unsigned Prev) const { Modified: vendor/llvm/dist/include/llvm/ADT/StringExtras.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/StringExtras.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/StringExtras.h Wed Apr 26 19:45:00 2017 (r317461) @@ -76,6 +76,36 @@ static inline std::string toHex(StringRe return Output; } +static inline uint8_t hexFromNibbles(char MSB, char LSB) { + unsigned U1 = hexDigitValue(MSB); + unsigned U2 = hexDigitValue(LSB); + assert(U1 != -1U && U2 != -1U); + + return static_cast<uint8_t>((U1 << 4) | U2); +} + +/// Convert hexadecimal string \p Input to its binary representation. +/// The return string is half the size of \p Input. +static inline std::string fromHex(StringRef Input) { + if (Input.empty()) + return std::string(); + + std::string Output; + Output.reserve((Input.size() + 1) / 2); + if (Input.size() % 2 == 1) { + Output.push_back(hexFromNibbles('0', Input.front())); + Input = Input.drop_front(); + } + + assert(Input.size() % 2 == 0); + while (!Input.empty()) { + uint8_t Hex = hexFromNibbles(Input[0], Input[1]); + Output.push_back(Hex); + Input = Input.drop_front(2); + } + return Output; +} + static inline std::string utostr(uint64_t X, bool isNeg = false) { char Buffer[21]; char *BufPtr = std::end(Buffer); Modified: vendor/llvm/dist/include/llvm/ADT/Triple.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/Triple.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/ADT/Triple.h Wed Apr 26 19:45:00 2017 (r317461) @@ -140,7 +140,8 @@ public: Myriad, AMD, Mesa, - LastVendorType = Mesa + SUSE, + LastVendorType = SUSE }; enum OSType { UnknownOS, Modified: vendor/llvm/dist/include/llvm/Analysis/DemandedBits.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/DemandedBits.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/Analysis/DemandedBits.h Wed Apr 26 19:45:00 2017 (r317461) @@ -35,6 +35,7 @@ class Function; class Instruction; class DominatorTree; class AssumptionCache; +struct KnownBits; class DemandedBits { public: @@ -58,8 +59,7 @@ private: void determineLiveOperandBits(const Instruction *UserI, const Instruction *I, unsigned OperandNo, const APInt &AOut, APInt &AB, - APInt &KnownZero, APInt &KnownOne, - APInt &KnownZero2, APInt &KnownOne2); + KnownBits &Known, KnownBits &Known2); bool Analyzed; Modified: vendor/llvm/dist/include/llvm/Analysis/InstructionSimplify.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/InstructionSimplify.h Wed Apr 26 19:41:53 2017 (r317460) +++ vendor/llvm/dist/include/llvm/Analysis/InstructionSimplify.h Wed Apr 26 19:45:00 2017 (r317461) @@ -47,8 +47,33 @@ namespace llvm { class Type; class Value; + struct SimplifyQuery { + const DataLayout &DL; + const TargetLibraryInfo *TLI = nullptr; + const DominatorTree *DT = nullptr; + AssumptionCache *AC = nullptr; + const Instruction *CxtI = nullptr; + SimplifyQuery(const DataLayout &DL) : DL(DL) {} + + SimplifyQuery(const DataLayout &DL, const TargetLibraryInfo *TLI, + const DominatorTree *DT, AssumptionCache *AC = nullptr, + const Instruction *CXTI = nullptr) + : DL(DL), TLI(TLI), DT(DT), AC(AC), CxtI(CXTI) {} + SimplifyQuery getWithInstruction(Instruction *I) const { + SimplifyQuery Copy(*this); + Copy.CxtI = I; + return Copy; + } + }; + + // NOTE: the explicit multiple argument versions of these functions are + // deprecated. + // Please use the SimplifyQuery versions in new code. + /// Given operands for an Add, fold the result or return null. Value *SimplifyAddInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, + const SimplifyQuery &Q); + Value *SimplifyAddInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -57,6 +82,8 @@ namespace llvm { /// Given operands for a Sub, fold the result or return null. Value *SimplifySubInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, + const SimplifyQuery &Q); + Value *SimplifySubInst(Value *LHS, Value *RHS, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -65,6 +92,8 @@ namespace llvm { /// Given operands for an FAdd, fold the result or return null. Value *SimplifyFAddInst(Value *LHS, Value *RHS, FastMathFlags FMF, + const SimplifyQuery &Q); + Value *SimplifyFAddInst(Value *LHS, Value *RHS, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -73,6 +102,8 @@ namespace llvm { /// Given operands for an FSub, fold the result or return null. Value *SimplifyFSubInst(Value *LHS, Value *RHS, FastMathFlags FMF, + const SimplifyQuery &Q); + Value *SimplifyFSubInst(Value *LHS, Value *RHS, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -81,6 +112,8 @@ namespace llvm { /// Given operands for an FMul, fold the result or return null. Value *SimplifyFMulInst(Value *LHS, Value *RHS, FastMathFlags FMF, + const SimplifyQuery &Q); + Value *SimplifyFMulInst(Value *LHS, Value *RHS, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -88,6 +121,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for a Mul, fold the result or return null. + Value *SimplifyMulInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifyMulInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -95,6 +129,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for an SDiv, fold the result or return null. + Value *SimplifySDivInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifySDivInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -102,6 +137,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for a UDiv, fold the result or return null. + Value *SimplifyUDivInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifyUDivInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -110,6 +146,8 @@ namespace llvm { /// Given operands for an FDiv, fold the result or return null. Value *SimplifyFDivInst(Value *LHS, Value *RHS, FastMathFlags FMF, + const SimplifyQuery &Q); + Value *SimplifyFDivInst(Value *LHS, Value *RHS, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -117,6 +155,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for an SRem, fold the result or return null. + Value *SimplifySRemInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifySRemInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -124,6 +163,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for a URem, fold the result or return null. + Value *SimplifyURemInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifyURemInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -132,6 +172,8 @@ namespace llvm { /// Given operands for an FRem, fold the result or return null. Value *SimplifyFRemInst(Value *LHS, Value *RHS, FastMathFlags FMF, + const SimplifyQuery &Q); + Value *SimplifyFRemInst(Value *LHS, Value *RHS, FastMathFlags FMF, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -140,6 +182,8 @@ namespace llvm { /// Given operands for a Shl, fold the result or return null. Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, + const SimplifyQuery &Q); + Value *SimplifyShlInst(Value *Op0, Value *Op1, bool isNSW, bool isNUW, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -148,6 +192,8 @@ namespace llvm { /// Given operands for a LShr, fold the result or return null. Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, + const SimplifyQuery &Q); + Value *SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -156,6 +202,8 @@ namespace llvm { /// Given operands for a AShr, fold the result or return nulll. Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, + const SimplifyQuery &Q); + Value *SimplifyAShrInst(Value *Op0, Value *Op1, bool isExact, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -163,6 +211,7 @@ namespace llvm { const Instruction *CxtI = nullptr); /// Given operands for an And, fold the result or return null. + Value *SimplifyAndInst(Value *LHS, Value *RHS, const SimplifyQuery &Q); Value *SimplifyAndInst(Value *LHS, Value *RHS, const DataLayout &DL, const TargetLibraryInfo *TLI = nullptr, const DominatorTree *DT = nullptr, @@ -170,6 +219,7 @@ namespace llvm { *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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