From owner-freebsd-threads@FreeBSD.ORG Thu Apr 26 01:28:14 2012 Return-Path: Delivered-To: freebsd-threads@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 598B71065672 for ; Thu, 26 Apr 2012 01:28:14 +0000 (UTC) (envelope-from yfw.bsd@gmail.com) Received: from mail-ob0-f182.google.com (mail-ob0-f182.google.com [209.85.214.182]) by mx1.freebsd.org (Postfix) with ESMTP id 1E4A98FC12 for ; Thu, 26 Apr 2012 01:28:14 +0000 (UTC) Received: by obcni5 with SMTP id ni5so31389obc.13 for ; Wed, 25 Apr 2012 18:28:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=DtorzYfPs6Wg7tZ4W7ru3KQv5XnfWPLXTxtZ2NGD5n4=; b=uwznZO6I/rC5xBWseVHYXM0f18o5oEsVVqq4xgWW+PiQM5OIhlqEMz6LZtwY/A/vEY uMabt2XWNAwaRJ97+Qrv09EHZCyNoCHbvnjBNZrBTsedFwR/8v342zsqmECGR83rBO0h 1FaQNHk4U2x+H9nbZJdgMYdkpUNwfWVoDA3ZNBUVPEd0pbTojcnTOIcv18rkeRPVZ8Pm o+wHCX8+UgAzy54huvXRam9oCviuZmSBG95z3JUO/8IMoofsvChJ7VD+g7Td+I5aqIZE 9FtXMPVT6vDOwA5EgMJvha4QU57XBIdKRGAWw/WwGajNoVYclZv/R8o1KsHZAzvjMvEq dbAg== MIME-Version: 1.0 Received: by 10.60.22.10 with SMTP id z10mr6622939oee.16.1335403693695; Wed, 25 Apr 2012 18:28:13 -0700 (PDT) Received: by 10.60.125.135 with HTTP; Wed, 25 Apr 2012 18:28:13 -0700 (PDT) In-Reply-To: References: <20120423084120.GD76983@zxy.spb.ru> Date: Thu, 26 Apr 2012 09:28:13 +0800 Message-ID: From: Fengwei yin To: Ricardo Nabinger Sanchez Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Cc: freebsd-threads@freebsd.org Subject: Re: About the memory barrier in BSD libc X-BeenThere: freebsd-threads@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Threading on FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Apr 2012 01:28:14 -0000 On Thu, Apr 26, 2012 at 6:51 AM, Ricardo Nabinger Sanchez wrote: > On Mon, 23 Apr 2012 12:41:20 +0400, Slawa Olhovchenkov wrote: > >> /usr/include/machine/atomic.h: >> >> #define mb() =A0 =A0__asm __volatile("lock; addl $0,(%%esp)" : : : "memo= ry") >> #define wmb() =A0 __asm __volatile("lock; addl $0,(%%esp)" : : : "memory= ") >> #define rmb() =A0 __asm __volatile("lock; addl $0,(%%esp)" : : : "memory= ") > > Somewhat late on this topic, but I'd like to understand why issue a write > on %esp, which would invalidate (%esp) on other cores --- thus forcing a > miss on them? The key here is prefix "lock:" which could be considered as "mfence" on modern CPU. > > Instead, why not issue "mfence" (mb), "sfence" (wmb), and "lfence" (rmb)? > Not all x86 family support "fence" instruction. "lock" prefix works for all= . > Cheers > > -- > Ricardo Nabinger Sanchez =A0 =A0 =A0 =A0 =A0 http://rnsanchez.wait4.org/ > =A0"Left to themselves, things tend to go from bad to worse." > > _______________________________________________ > freebsd-threads@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-threads > To unsubscribe, send any mail to "freebsd-threads-unsubscribe@freebsd.org= "