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Date:      Sun, 17 Nov 2002 10:59:46 -0800
From:      Marcel Moolenaar <marcel@xcllnt.net>
To:        Daniel Eischen <eischen@pcnet1.pcnet.com>
Cc:        Doug Rabson <dfr@nlsystems.com>, Alfred Perlstein <bright@mu.org>, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org
Subject:   Re: cvs commit: src/lib/libc_r/arch/ia64 _atomic_lock.S
Message-ID:  <20021117185946.GC603@athlon.pn.xcllnt.net>
In-Reply-To: <Pine.GSO.4.10.10211171051480.16958-100000@pcnet1.pcnet.com>
References:  <200211171401.02376.dfr@nlsystems.com> <Pine.GSO.4.10.10211171051480.16958-100000@pcnet1.pcnet.com>

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On Sun, Nov 17, 2002 at 10:56:43AM -0500, Daniel Eischen wrote:
> 
> Just curious, how do you intend to work this into things
> for which the specs allow one stack?  pthread_attr_setstackaddr,
> pthread_attr_setstacksize, makecontext, etc.

You always have a base and a size. The register stack can be put
at the base, because it grows upwards and the "normal" stack can
be put at (base+size), because it grows backwards. Other nice
tricks for when you have guard pages is that both start at
(base+size/2) and they grow away from each other, towards guard
pages.

-- 
 Marcel Moolenaar	  USPA: A-39004		 marcel@xcllnt.net

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