Date: Fri, 25 Feb 2011 18:31:45 -0500 From: Jung-uk Kim <jkim@FreeBSD.org> To: src-committers@FreeBSD.org Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org Subject: Re: svn commit: r219046 - head/sys/x86/cpufreq Message-ID: <201102251831.51396.jkim@FreeBSD.org> In-Reply-To: <201102252314.p1PNEOSN017377@svn.freebsd.org> References: <201102252314.p1PNEOSN017377@svn.freebsd.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Friday 25 February 2011 06:14 pm, Jung-uk Kim wrote: > Author: jkim > Date: Fri Feb 25 23:14:24 2011 > New Revision: 219046 > URL: http://svn.freebsd.org/changeset/base/219046 > > Log: > Set C1 "I/O then Halt" capability bit for Intel EIST. Some > broken BIOSes refuse to load external SSDTs if this bit is unset > for _PDC. It seems Linux and OpenSolaris did the same long ago. > > MFC after: 1 week Please note, however, it only works when cpufreq(4) is loaded with acpi(4) because acpi_cpu evaluates _PDC (or _OSC) only once. FYI, this is an OpenSolaris PR I found: http://bugs.opensolaris.org/bugdatabase/view_bug.do?bug_id=6667515 Jung-uk Kim
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201102251831.51396.jkim>