Date: Mon, 19 May 1997 20:11:37 -0700 From: Jason Thorpe <thorpej@nas.nasa.gov> To: dg@root.com Cc: Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>, freebsd-hackers@freebsd.org, freebsd-bugs@freebsd.org Subject: Re: trap type 29 on P6 Message-ID: <199705200311.UAA19076@lestat.nas.nasa.gov>
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On Mon, 19 May 1997 19:43:58 -0700 David Greenman <dg@root.com> wrote: > Is the instruction right before this one an inb or outb? I've seen this > before on P6 machines... Saw something similar to this on similar hardware under NetBSD, although it was the serial port initialization that tickled it. IIRC, that's a "reserved trap" in Intel lingo... (I think... pardon if I'm wrong, since I'm neither an export on nor a fan of the x86 "architecture" :-) As I understand it, what basically happens is some buggy bit of hardware (say, an I/O combo ASIC) signals an interrupt but drops it again before the PIC can latch it... per the interrupt protocol, the PIC has to post an interrupt to the CPU, and for hysterical raisins, picks "default IR7". Apparently, this happens to map to a reserved trap vector :-) There's not much you can do about it, really... you can't really stop the condition from occurring, short of publicly flogging purveyors of broken hardware (and it's not clear that'll help anyhow). It was fixed in NetBSD-current some time ago by catching and ignoring this particular reserved trap vector. Gotta love PCs. Jason R. Thorpe thorpej@nas.nasa.gov NASA Ames Research Center Home: 408.866.1912 NAS: M/S 258-6 Work: 415.604.0935 Moffett Field, CA 94035 Pager: 415.428.6939
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